the following patch was just integrated into master:
commit 66decf16446eeb8d3b2da93d0b0086a583bc17bf
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Thu Feb 4 11:21:33 2016 -0800
Documentation: x86 Enable Serial Output
Document the steps necessary to enable serial output
TEST=None
Change-Id: Ifc0e700d7ef54fb1e28ca9bca34b94cccd3633ac
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
Reviewed-on: https://review.coreboot.org/13444
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13444 for details.
-gerrit
the following patch was just integrated into master:
commit 7e0078b990b7b498391505fb5c492ff7ed8e54cb
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Sun Jan 31 11:48:15 2016 -0800
Documentation: Add the x86 FSP Binary
Document how to add the FSP binary to the SPI flash image.
TEST=None
Change-Id: I51b16600ea69853240282ac2eb0d84935b8e2a71
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
Reviewed-on: https://review.coreboot.org/13442
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13442 for details.
-gerrit
the following patch was just integrated into master:
commit a1e4de47c6775acfc6ed692a8875e94db85a5834
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Thu Feb 4 13:32:39 2016 -0800
Documentation: Add Galileo Gen 1 Documentation
TEST=None
Change-Id: Ic5a732dc27e772c4708a090ecd0c0af17dc5b056
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
Reviewed-on: https://review.coreboot.org/13606
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13606 for details.
-gerrit
the following patch was just integrated into master:
commit e8424cf10f1cd906fb3ece585058925b46ac3704
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Wed Feb 3 07:28:22 2016 -0800
Documentation: Fix links to Intel/documentation.html
Fix links to the documenation.html page which was renamed from
x86Documenation.html.
TEST=Verified documentation links and searched for x86Documenation.html
Change-Id: Icee79bab4c05ac9b8010dc7acdde8dd5e2ab2909
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
Reviewed-on: https://review.coreboot.org/13592
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13592 for details.
-gerrit
the following patch was just integrated into master:
commit b251a507140801ed86e43f7f6b88852af07c0d69
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Tue Nov 24 14:17:49 2015 -0600
mainboard/asus/kcma-d8: Add initial ASUS KCMA-D8 support
Change-Id: Idefa304a27823c741fab72ff5c2f20fed1aa5a39
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13523
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13523 for details.
-gerrit
the following patch was just integrated into master:
commit 4551b68c83e7693ae0b079dce9e4dcaf35050fa2
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Tue Nov 24 14:12:08 2015 -0600
mainboard/asus/kcma-d8: Copy ASUS KGPE-D16 for initial support work
Also updated KGPE-D16 strings to KCMA-D8 throughout the copy to work
around Jenkins failures caused by an unmodified clone.
Change-Id: I943e81c8c2987a8333fc2a1cdb3675abf2d90cf1
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13521
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13521 for details.
-gerrit
the following patch was just integrated into master:
commit f098a7310a6e1d1e86f3720d10eaa7c0b0687935
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Tue Nov 24 14:12:07 2015 -0600
mainboard/asus/kgpe-d16: Add CPB control CMOS option
Change-Id: I28ad2298ad4dfb428dcd41a4f00db88c5e817cd7
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13173
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth(a)google.com>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
See https://review.coreboot.org/13173 for details.
-gerrit
the following patch was just integrated into master:
commit 4e543d391592929d3d9a4d16cba7cec6696c8440
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Tue Nov 24 14:12:07 2015 -0600
cpu/amd/fam10h-fam15h: Honor CMOS option to disable CPB (core boost)
On certain systems and CPUs Core Performance Boost (CPB) may cause
sporadic system lockups. This issue is also somewhat known on the
various proprietary BIOSes, therefore it seems to be a hardware
incompatibility when present.
Allow the user to disable CBP if needed.
Change-Id: Id6395d067d48963f6c084ad0bf79e23419af24d8
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13172
Tested-by: build bot (Jenkins)
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
See https://review.coreboot.org/13172 for details.
-gerrit
the following patch was just integrated into master:
commit fec8872c9dee4411ba1a89fc8ec833a700b476c6
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Tue Nov 24 14:11:52 2015 -0600
nb/amd/mct_ddr3: Fix RDIMM training failure on Fam15h
Certain registered DIMMs failed training due to an error
likely introduced during historical rebase. Ensure that
the SubMemclkRegDly bit is set according to BKDG
recommendations on Family 15 processors.
Change-Id: I24c95265dada9eabf4df280b6f2b4a1eb9cecaf1
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13148
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13148 for details.
-gerrit
the following patch was just integrated into master:
commit 31682364ba062fb3cbf4ff3b0ad7cbdb7b5daae1
Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Date: Sat Jan 30 23:34:51 2016 -0600
nb/amd/mct_ddr3: Work around RDIMM training failure
Under certain conditions, not elucidated in the BKDG,
an extra memclock of CAS write latency is required.
The only reliable way I have found to detect when this
is required is to try training without the delay, and
if DQS position training fails, adding the delay and
retraining.
This is probably related in some form or another to
the badly broken DQS Write Early algorithm given
in the BKDG.
Change-Id: Idfaca1b3da3f45793d210980e952ccdfc9ba1410
Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com>
Reviewed-on: https://review.coreboot.org/13531
Tested-by: build bot (Jenkins)
Tested-by: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com>
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13531 for details.
-gerrit