the following patch was just integrated into master:
commit 2dc15e9ea8522959e90def168e459e629ccec12f
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Thu Feb 4 18:59:48 2016 +0100
Revert "northbridge/intel/peg: Disable unused ports"
This reverts commit 0e06f5bd70b45fd330d8dfb1dc77cce043caf841.
It breaks gm45 and also does some magic without being asked too. It
disables bridge devices permanently if no device was found on the se-
condary bus. In a simple notebook world this might be ok, but it breaks
hot-plugging and late detection (if a secondary bus device comes up too
slow for the firmware to detect and the OS has to enumerate it).
Change-Id: Ia2010640d7c55b0bdd44164b81c75dd4be50410b
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/13609
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Rudolph <siro(a)das-labor.org>
See https://review.coreboot.org/13609 for details.
-gerrit
the following patch was just integrated into master:
commit b27c24f69b89aca3203d56522663a546811cbfb8
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Mon Feb 8 00:10:44 2016 +0100
Workaround for unused variable warning.
Change-Id: I0a0c925509027f98f724d0a4347146f21ac06c02
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13624
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13624 for details.
-gerrit
the following patch was just integrated into master:
commit bb7dbcdf30ee9697dda0ae45025b4ea183b7a748
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Mon Feb 8 00:09:55 2016 +0100
ASL: Use temporary variable when storing register into itself.
Otherwise it triggers a IASL warning with new IASL.
Change-Id: I090ee18df78ea779137ee6797c55b96ea27e6d27
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13623
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13623 for details.
-gerrit
the following patch was just integrated into master:
commit 01586063ab0b65421678399256441d7a5190e169
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Mon Feb 8 00:08:49 2016 +0100
ASL: Fix HPBA shadowing.
Store (HPBA, HPBA) had no effect. Rename one of HPBA to avoid shadowing.
Change-Id: I54bfa7bcb3e05c28fe8a257825af56527dbf663e
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13622
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13622 for details.
-gerrit
the following patch was just integrated into master:
commit 764bd9789d14ec6f7ef20dd93dca91ed1aa5c055
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Mon Feb 8 00:02:37 2016 +0100
rx886ex: Fix PBIF reference.
PBIF is package and so a scalar can't be stored instead of it.
What was meant is probably Index(PBIF, 0)
Change-Id: Iddd18e1f165e0f48fd91124200aba5c6b4a5b4bd
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13621
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13621 for details.
-gerrit
the following patch was just integrated into master:
commit ec730396cc7fdf5ce0f48fb5f1a9dba2ecac601e
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Mon Feb 8 00:01:09 2016 +0100
ASL: Remove unused local variables.
Change-Id: Ifcbb6916b718d41fb9cda537ffdc3e652e13cbbf
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13620
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13620 for details.
-gerrit
the following patch was just integrated into master:
commit d200e0e7fb37c545153d28cb518f6f5adcc0ac45
Author: Vladimir Serbinenko <phcoder(a)gmail.com>
Date: Sun Jan 31 13:22:56 2016 +0100
stout: Fix ASL warnings
Change-Id: I1ddf37aa61fe95ad632c35d8041aed02fb1e8c01
Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com>
Reviewed-on: https://review.coreboot.org/13533
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13533 for details.
-gerrit
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13608
-gerrit
commit ee3ef78ed02ebf536005d832046e8ee3aa6f2752
Author: Martin Roth <martinroth(a)google.com>
Date: Thu Feb 4 19:52:27 2016 -0700
Kconfig: Move payloads section to payloads/Kconfig
Move the payloads section of the kconfig tree out of the top level
kconfig file and into a separate Kconfig just for payloads before
it starts to get added to.
Change-Id: I4f52818f862bf1aeba538c1c6ed93211a78b9853
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
payloads/Kconfig | 51 +++++++++++++++++++++++++++++++++++++++++++++++++++
src/Kconfig | 51 +--------------------------------------------------
2 files changed, 52 insertions(+), 50 deletions(-)
diff --git a/payloads/Kconfig b/payloads/Kconfig
new file mode 100644
index 0000000..51c89ea
--- /dev/null
+++ b/payloads/Kconfig
@@ -0,0 +1,51 @@
+menu "Payload"
+
+choice
+ prompt "Add a payload"
+ default PAYLOAD_NONE if !ARCH_X86
+ default PAYLOAD_SEABIOS if ARCH_X86
+
+config PAYLOAD_NONE
+ bool "None"
+ help
+ Select this option if you want to create an "empty" coreboot
+ ROM image for a certain mainboard, i.e. a coreboot ROM image
+ which does not yet contain a payload.
+
+ For such an image to be useful, you have to use 'cbfstool'
+ to add a payload to the ROM image later.
+
+config PAYLOAD_ELF
+ bool "An ELF executable payload"
+ help
+ Select this option if you have a payload image (an ELF file)
+ which coreboot should run as soon as the basic hardware
+ initialization is completed.
+
+ You will be able to specify the location and file name of the
+ payload image later.
+
+source "payloads/external/*/Kconfig.name"
+
+endchoice
+
+source "payloads/external/*/Kconfig"
+
+config PAYLOAD_FILE
+ string "Payload path and filename"
+ depends on PAYLOAD_ELF
+ default "payload.elf"
+ help
+ The path and filename of the ELF executable file to use as payload.
+
+# TODO: Defined if no payload? Breaks build?
+config COMPRESSED_PAYLOAD_LZMA
+ bool "Use LZMA compression for payloads"
+ default y
+ depends on !PAYLOAD_NONE && !PAYLOAD_LINUX
+ help
+ In order to reduce the size payloads take up in the ROM chip
+ coreboot can compress them using the LZMA algorithm.
+
+endmenu
+
diff --git a/src/Kconfig b/src/Kconfig
index feefc91..35acad4 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -732,56 +732,7 @@ config MAINBOARD_SMBIOS_PRODUCT_NAME
endmenu
-menu "Payload"
-
-choice
- prompt "Add a payload"
- default PAYLOAD_NONE if !ARCH_X86
- default PAYLOAD_SEABIOS if ARCH_X86
-
-config PAYLOAD_NONE
- bool "None"
- help
- Select this option if you want to create an "empty" coreboot
- ROM image for a certain mainboard, i.e. a coreboot ROM image
- which does not yet contain a payload.
-
- For such an image to be useful, you have to use 'cbfstool'
- to add a payload to the ROM image later.
-
-config PAYLOAD_ELF
- bool "An ELF executable payload"
- help
- Select this option if you have a payload image (an ELF file)
- which coreboot should run as soon as the basic hardware
- initialization is completed.
-
- You will be able to specify the location and file name of the
- payload image later.
-
-source "payloads/external/*/Kconfig.name"
-
-endchoice
-
-source "payloads/external/*/Kconfig"
-
-config PAYLOAD_FILE
- string "Payload path and filename"
- depends on PAYLOAD_ELF
- default "payload.elf"
- help
- The path and filename of the ELF executable file to use as payload.
-
-# TODO: Defined if no payload? Breaks build?
-config COMPRESSED_PAYLOAD_LZMA
- bool "Use LZMA compression for payloads"
- default y
- depends on !PAYLOAD_NONE && !PAYLOAD_LINUX
- help
- In order to reduce the size payloads take up in the ROM chip
- coreboot can compress them using the LZMA algorithm.
-
-endmenu
+source "payloads/Kconfig"
menu "Debugging"
the following patch was just integrated into master:
commit 2bb16a52180f06742231d756b6c29f3345c63586
Author: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de>
Date: Wed Jan 27 21:58:50 2016 +0100
mainboard/lenovo: Add support for the Lenovo ThinkPad X220i
The ThinkPad X220i is essentially identical to the ThinkPad X220 but it
has a Sandybridge i3 (instead of a Sandybridge i5/i7) CPU and the
VGA_BIOS_ID differs. Thus, support is added by using the X220 mainboard
directory and setting the VGA_BIOS_ID in Kconfig.
Change-Id: I33345a099c617e8c87a1de64b7254b7e7716ca90
Signed-off-by: Christopher Spinrath <christopher.spinrath(a)rwth-aachen.de>
Reviewed-on: https://review.coreboot.org/13594
Tested-by: build bot (Jenkins)
Reviewed-by: Alexander Couzens <lynxis(a)fe80.eu>
See https://review.coreboot.org/13594 for details.
-gerrit
the following patch was just integrated into master:
commit 03be2383e7120ac2f1ea90a425e51df67015a8af
Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com>
Date: Mon Dec 7 17:08:07 2015 -0800
intel/kunimitsu: Clean up GPIOs.
Some of the pins are not connected/used on kunimitsu board,
this patch will make them "Not connected".
Un-used PINS will controlled by GPIO controller (PMODE = GPIO) and
GPIO TX/RX will be disabled.
BRANCH=none
BUG=none
TEST=Build and booted in kunimitsu.
Change-Id: Iaf0d4806836648808fb91cfc7807c4c1595a5167
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: a7c25ad8ee0d189178124cff20569152b1053488
Original-Change-Id: I3add625b2bf01223cd389c6a5585827ac62dd0c0
Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/316700
Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com>
Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com>
Reviewed-on: https://review.coreboot.org/13629
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13629 for details.
-gerrit