the following patch was just integrated into master:
commit 6f0e6fa6e125a7919a6b7836fa119e0074dca250
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Tue Feb 9 09:40:39 2016 -0800
skylake: Finalize SMM in coreboot
Once we lock down the SPI BAR we need to tell SMM to re-init its
SPI driver or it will be unable to write ELOG events via SMI.
This SMI is also sent at the end of depthcharge so there was just
a window where SMI events could get lost.
BUG=chrome-os-partner:50076
BRANCH=glados
TEST=enable DEBUG_SMI, boot to dev screen, press power button and
see elog events get added without without transaction errors.
Change-Id: I1f14717b5e7f29c158dde8fd308bdbfb67eba41a
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 60ca24c760c70e2ebe5f3e68f95d3ffdba0fef9e
Original-Change-Id: I4e323249f00954e290a6a30f515e34632681bfdd
Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/326861
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13697
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13697 for details.
-gerrit
the following patch was just integrated into master:
commit 5f0cd58e0e32c930011865224792ae83aff3d406
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Tue Feb 9 09:21:41 2016 -0800
skylake: Check for power failure when WAK_STS is not set
The PCH does not set PM1_STS[WAK_STS] bit when waking from a
G3 state, which is triggered by hibernate now on chell when we
do a PMIC shutdown. This means the checks for S5 wake are not
done and instead it is logged as a wake from S0.
BUG=chrome-os-partner:50076
BRANCH=glados
TEST=pass firmware_EventLog test on chell
Change-Id: I3ca05a4824df3401150a63d4b6555f759de40087
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: de6c9bac447edd06568193f990f1f4e278576783
Original-Change-Id: I4472498468d620fe69f2b68710e818a4ad287382
Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/326888
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13696
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13696 for details.
-gerrit
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13696
-gerrit
commit 81d0e1ca848cb9ac382b6bcf0efcf9807729b689
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Tue Feb 9 09:21:41 2016 -0800
skylake: Check for power failure when WAK_STS is not set
The PCH does not set PM1_STS[WAK_STS] bit when waking from a
G3 state, which is triggered by hibernate now on chell when we
do a PMIC shutdown. This means the checks for S5 wake are not
done and instead it is logged as a wake from S0.
BUG=chrome-os-partner:50076
BRANCH=glados
TEST=pass firmware_EventLog test on chell
Change-Id: I3ca05a4824df3401150a63d4b6555f759de40087
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: de6c9bac447edd06568193f990f1f4e278576783
Original-Change-Id: I4472498468d620fe69f2b68710e818a4ad287382
Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/326888
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
---
src/soc/intel/skylake/romstage/power_state.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/src/soc/intel/skylake/romstage/power_state.c b/src/soc/intel/skylake/romstage/power_state.c
index 1987534..85234b5 100644
--- a/src/soc/intel/skylake/romstage/power_state.c
+++ b/src/soc/intel/skylake/romstage/power_state.c
@@ -69,6 +69,14 @@ static uint32_t prev_sleep_state(struct chipset_power_state *ps)
}
/* Clear SLP_TYP. */
outl(ps->pm1_cnt & ~(SLP_TYP), ACPI_BASE_ADDRESS + PM1_CNT);
+ } else {
+ /*
+ * Check for any power failure to determine if this a wake from
+ * S5 because the PCH does not set the WAK_STS bit when waking
+ * from a true G3 state.
+ */
+ if (ps->gen_pmcon_b & (PWR_FLR | SUS_PWR_FLR))
+ prev_sleep_state = SLEEP_STATE_S5;
}
/*
the following patch was just integrated into master:
commit 3054c8b7542f5393ee2ac1272525764ffecb52d0
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Wed Feb 10 17:10:05 2016 -0800
skylake: Enable DDI-A 4-lane support if GOP does not execute
This change will allow the kernel to use 4-lane eDP connections
if the GOP driver does not execute and set this bit. If GOP
has executed (everyone but Chrome OS verified mode) the link will
already be up and this will do nothing.
BUG=chrome-os-partner:50197
BRANCH=glados
TEST=boot on chell and ensure 4
Change-Id: I9e2328b00db84f26b9bd03220b8ac0bd5f64cfbf
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: cff83e18ce9936c8d507f93c8443b7056c62e844
Original-Change-Id: I3f1e5d78b91eb0e4a23fcc196aff0edadc252a0c
Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/327251
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13690
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13690 for details.
-gerrit
the following patch was just integrated into master:
commit 73b753a7f50d7435d1ba3ef763a910a30ee32d16
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Feb 8 16:08:15 2016 -0800
skylake: acpi: Make GRXS method serialized
This method creates a named object and should be serialized to avoid
a compiler warning from recent iasl releases.
BUG=chrome-os-partner:40635
BRANCH=glados
TEST=emerge-chell coreboot with no iasl warnings
Change-Id: If54df4eca8849a8d278816712164b30a775a41ca
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 9aa8c5627276be08bf0dc3d0f4b9b7bd3f40c227
Original-Change-Id: Ieb05525503bf61c9922677484aba5479856a3f35
Original-Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/326843
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13689
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13689 for details.
-gerrit
the following patch was just integrated into master:
commit 4ed5cb3fb3c8f92e4f0dd3554de97670aff47b03
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Thu Feb 11 22:04:55 2016 +0100
kconfig: make oldconfig work "non-strict"
oldconfig is regularly used to clean up templates that sometimes contain
duplicates or old symbols.
Since it cleans up the config, it doesn't need to fail on issues.
Change-Id: Ife0e9e3b9bfdde1eb6be0e2e38e81b9042cb7950
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13687
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
See https://review.coreboot.org/13687 for details.
-gerrit
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13648
-gerrit
commit 8c651a9ae19017422428c9cf0e4ceb9037abebed
Author: Martin Roth <martinroth(a)google.com>
Date: Tue Feb 9 12:20:32 2016 -0700
board_status: Add script that will set up a ubuntu live image
This is a pretty basic script that can be downloaded with wget to a
ubuntu-based live image, and will set it up so that the board_status
script can connect and run cbmem.
1) Verify that this is being run on a ubuntu-based live image by
checking for the installer.
2) Install and configure the ssh server.
3) Set a root password 'coreboot' so that root can log in.
4) download and build cbmem.
5) find and print the IP(s) that should be used to connect.
Change-Id: I068423c9f5501b156f25371d89559f4a206916b5
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/board_status/set_up_live_image.sh | 70 ++++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/util/board_status/set_up_live_image.sh b/util/board_status/set_up_live_image.sh
new file mode 100755
index 0000000..d80434e
--- /dev/null
+++ b/util/board_status/set_up_live_image.sh
@@ -0,0 +1,70 @@
+#!/bin/bash
+
+# This script is used to set up a ubuntu-based live image to be used
+# with coreboot's board_status script. It modifies the system so that
+# board_status can connect over SSH and run cbmem. This script is NOT
+# meant to be run on an installed system, and changes the configuration
+# in ways that would be dangerous to security on an installed system.
+
+# Make sure we're on a ubuntu live image
+if [ ! -e /usr/bin/ubiquity ]; then
+ echo "Error: This doesn't appear to be a ubuntu based live image. Exiting."
+ exit 1
+fi
+
+RED='\033[1;31m'
+GREEN='\033[1;32m'
+NC='\033[0m' # No Color
+
+# shellcheck disable=SC2059
+error ()
+{
+ printf "${RED}ERROR: $1 ${NC}\n" >&2
+ if [ -n "$2" ]; then printf "${RED}Removing $2 ${NC}\n"; rm -rf "./$2"; fi
+ exit 1
+}
+
+# shellcheck disable=SC2059
+status ()
+{
+ printf "${GREEN}${1}${NC}"
+}
+
+# Install and configure the ssh server for the board-status script to connect to.
+status "Installing and configuring ssh server\n"
+sudo rm -f /etc/apt/sources.list
+sudo apt-get update || \
+ error "Could not update packages"
+sudo apt-get install -y openssh-server || \
+ error "Could not install openssh-server"
+sudo sed -i.bak 's/PermitRootLogin.*/PermitRootLogin yes/' /etc/ssh/sshd_config || \
+ error "Could not update sshd.config to allow root login."
+sudo sudo service ssh restart || \
+ error "Could not restart ssh server"
+
+# Set the root password so it can be used to log in
+status "Setting root password to 'coreboot'\n"
+echo -e "root:coreboot" | sudo chpasswd || \
+ error "Could not reset root password"
+
+# Download the coreboot tree
+status "Installing git and clone the coreboot repo\n"
+sudo apt-get install -y git build-essential || \
+ error "Could not install git"
+git clone --depth 1 https://review.coreboot.org/coreboot || \
+ error "Could not download coreboot repository"
+
+# Build and install cbmem
+status "Building and installing cbmem\n"
+make -C coreboot/util/cbmem || \
+ error "Could not build cbmem"
+sudo make -C coreboot/util/cbmem install || \
+ error "Could not instll cbmem"
+sudo cbmem || \
+ error "cbmem did not run correctly"
+rm -rf coreboot
+
+# Identify the ip address that board-status will connect to
+IP_ADDR=$(ifconfig -a | grep 'inet addr' | grep -v '127.0.0.1' | \
+ sed 's|.*inet addr:||' | sed 's|Bcast.*||')
+status "\nAddress or addresses for this board: $IP_ADDR\n"
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13648
-gerrit
commit cd97fe411cfc8f8d3548614a706cdf65f0b1b27c
Author: Martin Roth <martinroth(a)google.com>
Date: Tue Feb 9 12:20:32 2016 -0700
board_status: Add script that will set up a ubuntu live image
This is a pretty basic script that can be downloaded with wget to a
ubuntu-based live image, and will set it up so that the board_status
script can connect and run cbmem.
1) Verify that this is being run on a ubuntu-based live image by
checking for the installer.
2) Install and configure the ssh server.
3) Set a root password 'coreboot' so that root can log in.
4) download and build cbmem.
5) find and print the IP(s) that should be used to connect.
Change-Id: I068423c9f5501b156f25371d89559f4a206916b5
Signed-off-by: Martin Roth <martinroth(a)google.com>
---
util/board_status/set_up_live_image.sh | 70 ++++++++++++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/util/board_status/set_up_live_image.sh b/util/board_status/set_up_live_image.sh
new file mode 100755
index 0000000..bb79820
--- /dev/null
+++ b/util/board_status/set_up_live_image.sh
@@ -0,0 +1,70 @@
+#!/bin/bash
+
+# This script is used to set up a ubuntu-based live image to be used
+# with coreboot's board_status script. It modifies the system so that
+# board_status can connect over SSH and run cbmem. This script is NOT
+# meant to be run on an installed system, and changes the configuration
+# in ways that would be dangerous to security on an installed system.
+
+# Make sure we're on a ubuntu live image
+if [ ! -e /usr/bin/ubiquity ]; then
+ echo "Error: This doesn't appear to be a ubuntu based live image. Exiting."
+ exit 1
+fi
+
+RED='\033[1;31m'
+GREEN='\033[1;32m'
+NC='\033[0m' # No Color
+
+# shellcheck disable=SC2059
+error ()
+{
+ printf "${RED}ERROR: $1 ${NC}\n" >&2
+ if [ -n "$2" ]; then printf "${RED}Removing $2 ${NC}\n"; rm -rf "./$2"; fi
+ exit 1
+}
+
+# shellcheck disable=SC2059
+status ()
+{
+ printf "${GREEN}${1}${NC}"
+}
+
+# Install and configure the ssh server for the board-status script to connect to.
+status "Installing and configuring ssh server\n"
+sudo rm -f /etc/apt/sources.list
+sudo apt-get update || \
+ error "Could not update packages"
+sudo apt-get install -y openssh-server || \
+ error "Could not install openssh-server"
+sudo sed -i.bak 's/PermitRootLogin.*/PermitRootLogin yes/' /etc/ssh/sshd_config || \
+ error "Could not update sshd.config to allow root login."
+sudo sudo service ssh restart || \
+ error "Could not restart ssh server"
+
+# Set the root password so it can be used to log in
+status "Setting root password to 'coreboot'\n"
+echo -e "root:coreboot" | sudo chpasswd || \
+ error "Could not reset root password"
+
+# Download the coreboot tree
+status "Installing git and clone the coreboot repo\n"
+sudo apt-get install -y git || \
+ error "Could not install git"
+git clone --depth 1 https://review.coreboot.org/coreboot || \
+ error "Could not download coreboot repository"
+
+# Build and install cbmem
+status "Building and installing cbmem\n"
+make -C coreboot/util/cbmem || \
+ error "Could not build cbmem"
+sudo make -C coreboot/util/cbmem install || \
+ error "Could not instll cbmem"
+sudo cbmem || \
+ error "cbmem did not run correctly"
+rm -rf coreboot
+
+# Identify the ip address that board-status will connect to
+IP_ADDR=$(ifconfig -a | grep 'inet addr' | grep -v '127.0.0.1' | \
+ sed 's|.*inet addr:||' | sed 's|Bcast.*||')
+status "\nAddress or addresses for this board: $IP_ADDR\n"
the following patch was just integrated into master:
commit 13a2e949d5970b9ff09cdd7d8a3943f111538d83
Author: robbie zhang <robbie.zhang(a)intel.com>
Date: Wed Feb 10 11:40:11 2016 -0800
Intel common: add microcode loading to romstage before fspmemoryinit
The intend is to seek upgraded microcode in RW section and load it
before Fsp memoryinit, to ensure any goodness in the microcode update,
especially related to memory configuration, can be applied earlier.
BUG=chrome-os-partner:50132
BRANCH=glados
TEST=Built and boot on kunimintus. Verified microcode gets reloaded.
Boot time impact is very minor.
CQ-DEPEND=CL:327170
Change-Id: I1a5df1d1efa25fb256743dca6a661c828263ec7c
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: d7f700c1876e53194748d1d1c66637b9419b7086
Original-Change-Id: I7083ec6305af9e14a57d7b0cb1bd800cd9e22f44
Original-Signed-off-by: Robbie Zhang <robbie.zhang(a)intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/327193
Original-Tested-by: Wenkai Du <wenkai.du(a)intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13688
Tested-by: build bot (Jenkins)
Reviewed-by: Robbie Zhang <robbie.zhang(a)intel.com>
Reviewed-by: Leroy P Leahy <leroy.p.leahy(a)intel.com>
See https://review.coreboot.org/13688 for details.
-gerrit