coreboot-gerrit February 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: util: Add scripts to download and extract blobs
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit 9a4881a783fa1edc730dc484bb2c293d92e45823 Author: Joe Pillow <joseph.a.pillow(a)gmail.com> Date: Fri Feb 19 15:18:14 2016 -0800 util: Add scripts to download and extract blobs This turned out really handy when I tried to build coreboot for my Chromebox. These scripts can be used to extract System Agent reference code and other blobs (e.g. mrc.bin, refcode, VGA option roms) from a Chrome OS recovery image. crosfirmware.sh downloads a Chrome OS recovery image from the recovery image server, unpacks it, extracts the firmware update shell archive, extracts the firmware images from the shell archive. To download all Chrome OS firmware images, run $ ./crosfirmware.sh To download, e.g. the Panther firmware image, run $ ./crosfirmware.sh panther extract_blobs.sh extracts the blobs from a Chrome OS firmware image. Right now it will produce the ME firmware blob, IFD, VGA option rom, and mrc.bin Change-Id: I5fb7e14b10e03e18cd360bc35f1dc92e8ed34e63 Signed-off-by: Joe Pillow <joseph.a.pillow(a)gmail.com> Reviewed-on: https://review.coreboot.org/13752 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/13752 for details. -gerrit

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Patch merged into coreboot/master: cbfs: Add LZ4 in-place decompression support for pre-RAM stages
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit 09f2921b5dacaf79b391652cecd606be4dd69f50 Author: Julius Werner <jwerner(a)chromium.org> Date: Tue Sep 29 13:51:35 2015 -0700 cbfs: Add LZ4 in-place decompression support for pre-RAM stages This patch ports the LZ4 decompression code that debuted in libpayload last year to coreboot for use in CBFS stages (upgrading the base algorithm to LZ4's dev branch to access the new in-place decompression checks). This is especially useful for pre-RAM stages in constrained SRAM-based systems, which previously could not be compressed due to the size requirements of the LZMA scratchpad and bounce buffer. The LZ4 algorithm offers a very lean decompressor function and in-place decompression support to achieve roughly the same boot speed gains (trading compression ratio for decompression time) with nearly no memory overhead. For now we only activate it for the stages that had previously not been compressed at all on non-XIP (read: non-x86) boards. In the future we may also consider replacing LZMA completely for certain boards, since which algorithm wins out on boot speed depends on board-specific parameters (architecture, processor speed, SPI transfer rate, etc.). BRANCH=None BUG=None TEST=Built and booted Oak, Jerry, Nyan and Falco. Measured boot time on Oak to be about ~20ms faster (cutting load times for affected stages almost in half). Change-Id: Iec256c0e6d585d1b69985461939884a54e3ab900 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://review.coreboot.org/13638 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/13638 for details. -gerrit

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Patch merged into coreboot/master: urara: Increase bootblock size
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit 0e3d7de7410c4ff7c9465261b58524675a0329e2 Author: Julius Werner <jwerner(a)chromium.org> Date: Thu Feb 18 12:56:26 2016 -0800 urara: Increase bootblock size The urara bootblock is less than a kilobyte from its limit (20K). There's more than enough space available so increase it to avoid impeding changes to core code. Also add some more automated checks to better model the platform's multiple windows into the same memory region and guard against accidental overlaps by a seemingly benign change to one window. Change-Id: I2e535b56d5d1748830ea1e70fd12fd9e87009bce Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://review.coreboot.org/13733 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/13733 for details. -gerrit

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Patch merged into coreboot/master: memlayout: Add symbols for stage bounds
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit 862c385f9a6a5b92fa6b694136854d84b471ed8e Author: Julius Werner <jwerner(a)chromium.org> Date: Thu Feb 18 15:46:15 2016 -0800 memlayout: Add symbols for stage bounds Stages are inconsistent with other memlayout regions in that they don't have _<name> and _e<name> symbols defined. We have _program and _eprogram, but that always only refers to the current stage and _eprogram marks the actual end of the executable's memory footprint, not the end of the area allocated in memlayout. Both of these are sometimes useful to know, so let's add another set of symbols that allow the stage areas to be treated more similarly to other regions. Change-Id: I9e8cff46bb15b51c71a87bd11affb37610aa7df9 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://review.coreboot.org/13737 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/13737 for details. -gerrit

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Patch merged into coreboot/master: mainboard/intel/galileo: Enable minimal ACPI tables
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit f7c01aa7748ecd22832ded41e7e2ec0cc186c813 Author: Lee Leahy <leroy.p.leahy(a)intel.com> Date: Sat Feb 20 17:53:54 2016 -0800 mainboard/intel/galileo: Enable minimal ACPI tables Enable the minimal ACPI tables. Initialize the FADT header and provide an empty DSDT. Testing on Galileo: * Edit the src/mainboard/intel/galileo/Makefile.inc file: * Add "select ADD_FSP_PDAT_FILE" * Add "select ADD_FSP_RAW_BIN" * Add "select ADD_RMU_FILE" * Place the FSP.bin file in the location specified by CONFIG_FSP_FILE * Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE * Place the rmu.bin file in the location specified by CONFIG_RMU_FILE * Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate UEFIPAYLOAD.fd * Edit .config file and add the following lines: * CONFIG_PAYLOAD_ELF=y * CONFIG_PAYLOAD_FILE="path to UEFIPAYLOAD.fd" * Testing successful if: * Outputs multiple lines of debug serial text Change-Id: I2e30c8af2994c9f56d9ba4fe6bc35e133b1d2d6b Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com> Reviewed-on: https://review.coreboot.org/13759 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/13759 for details. -gerrit

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Patch merged into coreboot/master: soc/intel/quark: Add the initial pieces required for ACPI tables
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit d3de85cbcce96cd192ef414f818ec8bee08acc41 Author: Lee Leahy <leroy.p.leahy(a)intel.com> Date: Sat Feb 20 17:15:33 2016 -0800 soc/intel/quark: Add the initial pieces required for ACPI tables Enable ACPI tables TEST=None Change-Id: I38b90f54cd9b00b063557c08980e71851bf3059b Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com> Reviewed-on: https://review.coreboot.org/13758 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/13758 for details. -gerrit

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Patch merged into coreboot/master: fsp_baytrail: Add full support for iosf access in reg_script
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit 9d0215363d710f7a3303724ad7a369e4a2dd2d36 Author: Werner Zeh <werner.zeh(a)siemens.com> Date: Fri Feb 19 10:02:49 2016 +0100 fsp_baytrail: Add full support for iosf access in reg_script Add all needed functions to fsp_baytrail so that reg_script can do full iosf access. To keep it simple, this patch synchronises iosf access between baytrail and fsp_baytrail. Change-Id: Ic7f52d7d90c0fe3560fa5a5d96f7fc15062d66d1 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/13742 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/13742 for details. -gerrit

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Patch merged into coreboot/master: board-status: deal with sanitized paths
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit a05d03322607fd04f996050c267f01a6c3cc0c1b Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Mon Feb 22 03:01:57 2016 +0100 board-status: deal with sanitized paths Change I9dd8e4027be21363015cd8df9918610e206afce2 replaces colons with underscores in paths, to improve compatibility of paths. This breaks any attempt to interpret the timestamp part of the tree as a timestamp, so revert the change before doing so. Change-Id: I0e82e4045120700e9b4fcc8c6e54d761068eaea3 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: https://review.coreboot.org/13766 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See https://review.coreboot.org/13766 for details. -gerrit

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Patch set updated for coreboot: util: Add scripts to download and extract blobs
by Joseph Pillow 22 Feb '16

22 Feb '16

Joseph Pillow (joseph.a.pillow(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13752 -gerrit commit 878f5fc6cb25dc3f4d25d1b6b1436c1f0b7cddad Author: Joe Pillow <joseph.a.pillow(a)gmail.com> Date: Fri Feb 19 15:18:14 2016 -0800 util: Add scripts to download and extract blobs This turned out really handy when I tried to build coreboot for my Chromebox. These scripts can be used to extract System Agent reference code and other blobs (e.g. mrc.bin, refcode, VGA option roms) from a Chrome OS recovery image. crosfirmware.sh downloads a Chrome OS recovery image from the recovery image server, unpacks it, extracts the firmware update shell archive, extracts the firmware images from the shell archive. To download all Chrome OS firmware images, run $ ./crosfirmware.sh To download, e.g. the Panther firmware image, run $ ./crosfirmware.sh panther extract_blobs.sh extracts the blobs from a Chrome OS firmware image. Right now it will produce the ME firmware blob, IFD, VGA option rom, and mrc.bin Change-Id: I5fb7e14b10e03e18cd360bc35f1dc92e8ed34e63 Signed-off-by: Joe Pillow <joseph.a.pillow(a)gmail.com> --- util/chromeos/README.md | 27 ++++++++ util/chromeos/crosfirmware.sh | 140 +++++++++++++++++++++++++++++++++++++++++ util/chromeos/extract_blobs.sh | 51 +++++++++++++++ 3 files changed, 218 insertions(+) diff --git a/util/chromeos/README.md b/util/chromeos/README.md new file mode 100644 index 0000000..3c3d721 --- /dev/null +++ b/util/chromeos/README.md @@ -0,0 +1,27 @@ +Chrome OS binary extraction +=========================== + +These scripts can be used to extract System Agent reference code +and other blobs (e.g. mrc.bin, refcode, VGA option roms) from a +Chrome OS recovery image. + +crosfirmware.sh +--------------- + +crosfirmware.sh downloads a Chrome OS recovery image from the recovery +image server, unpacks it, extracts the firmware update shell archive, +extracts the firmware images from the shell archive. + +To download all Chrome OS firmware images, run +$ ./crosfirmware.sh + +To download, e.g. the Panther firmware image, run +$ ./crosfirmware.sh panther + +extract_blobs.sh +---------------- + +extract_blobs.sh extracts the blobs from a Chrome OS firmware image. + +Right now it will produce the ME firmware blob, IFD, VGA option rom, +and mrc.bin diff --git a/util/chromeos/crosfirmware.sh b/util/chromeos/crosfirmware.sh new file mode 100644 index 0000000..a4cb487 --- /dev/null +++ b/util/chromeos/crosfirmware.sh @@ -0,0 +1,140 @@ +#!/bin/bash -x +# +# This file is part of the coreboot project. +# +# Copyright (C) 2016 Joe Pillow +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +# This script needs +# * sharutils + +#DEBUG=1 + +debug() +{ + test "$DEBUG" == "1" && echo "$*" +} + +get_inventory() +{ + _conf=$1 + _url=https://dl.google.com/dl/edgedl/chromeos/recovery/recovery.conf + + debug "Downloading recovery image inventory..." + + curl -s "$_url" > $_conf +} + +download_image() +{ + _url=$1 + _file=$2 + + debug "Downloading recovery image" + curl -s "$_url" > "$_file.zip" + debug "Decompressing recovery image" + unzip -q "$_file.zip" + rm "$_file.zip" +} + +extract_partition() +{ + NAME=$1 + FILE=$2 + ROOTFS=$3 + _bs=1024 + + debug "Extracting ROOT-A partition" + ROOTP=$( printf "unit\nB\nprint\nquit\n" | parted $FILE | grep $NAME ) + + START=$(( $( echo $ROOTP | cut -f2 -d\ | tr -d "B" ) )) + SIZE=$(( $( echo $ROOTP | cut -f4 -d\ | tr -d "B" ) )) + + dd if=$FILE of=$ROOTFS bs=$_bs skip=$(( $START / $_bs )) \ + count=$(( $SIZE / $_bs )) > /dev/null 2>&1 +} + +extract_shellball() +{ + ROOTFS=$1 + SHELLBALL=$2 + + debug "Extracting chromeos-firmwareupdate" + printf "cd /usr/sbin\ndump chromeos-firmwareupdate $SHELLBALL\nquit" | \ + debugfs $ROOTFS > /dev/null 2>&1 +} + +extract_coreboot() +{ + _shellball=$1 + _unpacked=$( mktemp -d ) + + debug "Extracting coreboot image" + sh $_shellball --sb_extract $_unpacked > /dev/null + + _version=$( cat $_unpacked/VERSION | grep BIOS\ version: | \ + cut -f2 -d: | tr -d \ ) + + cp $_unpacked/bios.bin coreboot-$_version.bin + rm -r "$_unpacked" +} + +do_one_board() +{ + _board=$1 + _url=$2 + _file=$3 + + download_image $_url $_file + + extract_partition ROOT-A $_file root-a.ext2 + extract_shellball root-a.ext2 chromeos-firmwareupdate-$_board + rm $_file root-a.ext2 + + extract_coreboot chromeos-firmwareupdate-$_board +} + +# +# Main +# + +BOARD=$1 + +if [ "$BOARD" == "all" ]; then + CONF=$( mktemp ) + get_inventory $CONF + + grep ^name= $CONF| while read _line; do + name=$( echo $_line | cut -f2 -d= ) + echo Processing board $name + eval $( grep -v hwid= $CONF | grep -A11 "$_line" | \ + grep '$url=\|file=$' ) + BOARD=$( echo $url | cut -f3 -d_ ) + do_one_board $BOARD $url $file + done + + rm "$CONF" +elif [ "$BOARD" != "" ]; then + CONF=$( mktemp ) + get_inventory $CONF + + echo Processing board $BOARD + eval $( grep $BOARD $CONF | grep '$url=\|file=$' ) + do_one_board $BOARD $url $file + + rm "$CONF" +else + echo "Usage: $0 <boardname>" + echo " $0 all" + echo + exit 1 +fi diff --git a/util/chromeos/extract_blobs.sh b/util/chromeos/extract_blobs.sh new file mode 100644 index 0000000..af9d026 --- /dev/null +++ b/util/chromeos/extract_blobs.sh @@ -0,0 +1,51 @@ +#!/bin/bash -x +# +# This file is part of the coreboot project. +# +# Copyright (C) 2016 Joe Pillow +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +IMAGE=$1 + +if [ ! -r "$IMAGE" ]; then + echo "Can't find image $IMAGE." + exit 1 +fi + +CBFSTOOL=$(which cbfstool) +if [ $? != 0 ]; then + echo "Can't find cbfstool." + exit 1 +fi + +IFDTOOL=$(which ifdtool) +if [ $? != 0 ]; then + echo "Can't find ifdtool." + exit 1 +fi + +$CBFSTOOL $IMAGE print + +if [ $? -ne 0 ]; then + echo "Not a coreboot image: $IMAGE" + exit 1 +fi + +PCI=$($CBFSTOOL $IMAGE print|grep pci|cut -f1 -d\ ) +MRC=$($CBFSTOOL $IMAGE print|grep mrc.bin|cut -f1 -d\ ) + +$CBFSTOOL $IMAGE extract -n $PCI -f $PCI +$CBFSTOOL $IMAGE extract -n $MRC -f $MRC +$IFDTOOL -x $IMAGE +mv flashregion_0_flashdescriptor.bin flashdescriptor.bin +mv flashregion_2_intel_me.bin me.bin +rm flashregion_*.bin

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Patch merged into coreboot/master: die() when attempting to use bounce buffer on non-i386.
by gerrit＠coreboot.org 22 Feb '16

22 Feb '16

the following patch was just integrated into master: commit f0d39c409b95c2095f84adcd0dcb9b0381e1562e Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Feb 19 16:44:22 2016 +0100 die() when attempting to use bounce buffer on non-i386. Only i386 has code to support bounce buffer. For others coreboot would silently discard part of binary which doesn't work and is a hell to debug. Instead just die. Change-Id: I37ae24ea5d13aae95f9856a896700a0408747233 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: https://review.coreboot.org/13750 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/13750 for details. -gerrit

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coreboot-gerrit February 2016