coreboot-gerrit December 2016

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Patch set updated for coreboot: soc/broadwell: set EM4/EM5 registers based on cdclk
by Matt DeVillier 04 Dec '16

04 Dec '16

Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17718 -gerrit commit cecd3b221067fb9a1e82a40ff2b53a871bab2f26 Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Wed Nov 16 23:37:43 2016 -0600 soc/broadwell: set EM4/EM5 registers based on cdclk The EM4/EM5 registers in the mini-HD audio device must be set based on the GPU cdclk value in order for HDMI audio to function properly. Add variables to save the correct values when initializing the GPU, and accessor functions to retrieve them in order to set the registers when initializing the mini-HD device. Also fix a GPU-type check which meant to cap ULX GPUs cdclk value but incorrectly checked for ULT instead. Change-Id: Icce7d5981f0b2ccb09d3861b28b843a260c8aeba Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- src/soc/intel/broadwell/igd.c | 23 +++++++++++++++++++---- src/soc/intel/broadwell/include/soc/igd.h | 22 ++++++++++++++++++++++ src/soc/intel/broadwell/minihd.c | 5 +++++ 3 files changed, 46 insertions(+), 4 deletions(-) diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index ccb1e93..5c5e8bf 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -31,6 +31,7 @@ #include <soc/systemagent.h> #include <soc/intel/broadwell/chip.h> #include <vboot/vbnv.h> +#include <soc/igd.h> #define GT_RETRY 1000 #define GT_CDCLK_337 0 @@ -38,6 +39,12 @@ #define GT_CDCLK_540 2 #define GT_CDCLK_675 3 +static u32 reg_em4; +static u32 reg_em5; + +u32 igd_get_reg_em4(void) { return reg_em4; } +u32 igd_get_reg_em5(void) { return reg_em5; } + struct reg_script haswell_early_init_script[] = { /* Enable Force Wake */ REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa180, 0x00000020), @@ -398,6 +405,7 @@ static void igd_cdclk_init_haswell(struct device *dev) static void igd_cdclk_init_broadwell(struct device *dev) { config_t *conf = dev->chip_info; + int devid = pci_read_config16(dev, PCI_DEVICE_ID); int cdclk = conf->cdclk; u32 dpdiv, lpcll, pwctl, cdset; @@ -407,8 +415,7 @@ static void igd_cdclk_init_broadwell(struct device *dev) gtt_write(0x138124, 0x80000018); /* Poll GT driver mailbox for run/busy clear */ - if (!gtt_poll(0x138124, (1 << 31), (0 << 31))) - cdclk = GT_CDCLK_450; + gtt_poll(0x138124, (1 << 31), (0 << 31)); if (gtt_read(0x42014) & 0x1000000) { /* If CD clock is fixed then set to 450MHz */ @@ -421,8 +428,8 @@ static void igd_cdclk_init_broadwell(struct device *dev) cdclk = GT_CDCLK_675; } - /* CD clock frequency 675MHz not supported on ULT */ - if (cpu_is_ult() && cdclk == GT_CDCLK_675) + /* CD clock frequency 675MHz not supported on ULX */ + if (devid == IGD_BROADWELL_Y_GT2 && cdclk == GT_CDCLK_675) cdclk = GT_CDCLK_540; /* Set variables based on CD Clock setting */ @@ -432,24 +439,32 @@ static void igd_cdclk_init_broadwell(struct device *dev) lpcll = (1 << 27); pwctl = 2; dpdiv = 169; + reg_em4 = 16; + reg_em5 = 225; break; case GT_CDCLK_450: cdset = 449; lpcll = 0; pwctl = 0; dpdiv = 225; + reg_em4 = 4; + reg_em5 = 75; break; case GT_CDCLK_540: cdset = 539; lpcll = (1 << 26); pwctl = 1; dpdiv = 270; + reg_em4 = 4; + reg_em5 = 90; break; case GT_CDCLK_675: cdset = 674; lpcll = (1 << 26) | (1 << 27); pwctl = 3; dpdiv = 338; + reg_em4 = 8; + reg_em5 = 225; default: return; } diff --git a/src/soc/intel/broadwell/include/soc/igd.h b/src/soc/intel/broadwell/include/soc/igd.h new file mode 100644 index 0000000..a0db5ef --- /dev/null +++ b/src/soc/intel/broadwell/include/soc/igd.h @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Chromium OS Authors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_BROADWELL_GMA_H +#define SOC_INTEL_BROADWELL_GMA_H + +u32 igd_get_reg_em4(void); +u32 igd_get_reg_em5(void); + +#endif /* SOC_INTEL_BROADWELL_GMA_H */ \ No newline at end of file diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c index 5014b08..a9fc3d6 100644 --- a/src/soc/intel/broadwell/minihd.c +++ b/src/soc/intel/broadwell/minihd.c @@ -25,6 +25,7 @@ #include <stdlib.h> #include <soc/intel/common/hda_verb.h> #include <soc/ramstage.h> +#include <soc/igd.h> static const u32 minihd_verb_table[] = { /* coreboot specific header */ @@ -101,6 +102,10 @@ static void minihd_init(struct device *dev) minihd_verb_table); } } + + /* Set EM4/EM5 registers */ + write32(base + 0x0100c, igd_get_reg_em4()); + write32(base + 0x01010, igd_get_reg_em5()); } static struct device_operations minihd_ops = {

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New patch to review for coreboot: google/beltino: fix LED for Tricky variant
by Matt DeVillier 04 Dec '16

04 Dec '16

Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17719 -gerrit commit cca16ab430cbe671ffe9f6e3e5027305ea4c6cc5 Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Fri Dec 2 23:27:32 2016 -0600 google/beltino: fix LED for Tricky variant Polarity value for Tricky's power LED was incorrect for the 'on' state; fix using correct value from Chromium source TEST: power on Tricky, observe LED lit / solid Change-Id: I8bc7c4ae3f83d3f37b76fd5c90a4faed7057ebee Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- src/mainboard/google/beltino/variants/tricky/led.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/beltino/variants/tricky/led.c b/src/mainboard/google/beltino/variants/tricky/led.c index 72498a3..9bf561d 100644 --- a/src/mainboard/google/beltino/variants/tricky/led.c +++ b/src/mainboard/google/beltino/variants/tricky/led.c @@ -25,7 +25,7 @@ void set_power_led(int state) it8772f_gpio_led(IT8772F_GPIO_DEV, 2 /* set */, 0xF7 /* select */, - state /* polarity: state dependent */, + 0x04 * state /* polarity: state dependent */, 0x00 /* 0=pulldown */, 0x04 /* output */, 0x04 /* 1=Simple IO function */,

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New patch to review for coreboot: soc/broadwell: set EM4/EM5 registers based on cdclk
by Matt DeVillier 04 Dec '16

04 Dec '16

Matt DeVillier (matt.devillier(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17718 -gerrit commit 867cacf4b88696a212d0c03240cbb2c8ff4d3c83 Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Wed Nov 16 23:37:43 2016 -0600 soc/broadwell: set EM4/EM5 registers based on cdclk The EM4/EM5 registers in the mini-HD audio device must be set based on the GPU cdclk value in order for HDMI audio to function properly. Add variables to save the correct values when initializing the GPU, and accessor functions to retrieve them in order to set the registers when initializing the mini-HD device. Also fix a GPU-type check which meant to cap ULX GPUs cdclk value but incorrectly checked for ULT instead. Change-Id: Icce7d5981f0b2ccb09d3861b28b843a260c8aeba Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- src/soc/intel/broadwell/igd.c | 22 ++++++++++++++++++---- src/soc/intel/broadwell/include/soc/igd.h | 22 ++++++++++++++++++++++ src/soc/intel/broadwell/minihd.c | 5 +++++ 3 files changed, 45 insertions(+), 4 deletions(-) diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index ccb1e93..9c05876 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -38,6 +38,12 @@ #define GT_CDCLK_540 2 #define GT_CDCLK_675 3 +static u32 reg_em4; +static u32 reg_em5; + +u32 igd_get_reg_em4(void) { return reg_em4; } +u32 igd_get_reg_em5(void) { return reg_em5; } + struct reg_script haswell_early_init_script[] = { /* Enable Force Wake */ REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0xa180, 0x00000020), @@ -398,6 +404,7 @@ static void igd_cdclk_init_haswell(struct device *dev) static void igd_cdclk_init_broadwell(struct device *dev) { config_t *conf = dev->chip_info; + int devid = pci_read_config16(dev, PCI_DEVICE_ID); int cdclk = conf->cdclk; u32 dpdiv, lpcll, pwctl, cdset; @@ -407,8 +414,7 @@ static void igd_cdclk_init_broadwell(struct device *dev) gtt_write(0x138124, 0x80000018); /* Poll GT driver mailbox for run/busy clear */ - if (!gtt_poll(0x138124, (1 << 31), (0 << 31))) - cdclk = GT_CDCLK_450; + gtt_poll(0x138124, (1 << 31), (0 << 31)); if (gtt_read(0x42014) & 0x1000000) { /* If CD clock is fixed then set to 450MHz */ @@ -421,8 +427,8 @@ static void igd_cdclk_init_broadwell(struct device *dev) cdclk = GT_CDCLK_675; } - /* CD clock frequency 675MHz not supported on ULT */ - if (cpu_is_ult() && cdclk == GT_CDCLK_675) + /* CD clock frequency 675MHz not supported on ULX */ + if (devid == IGD_BROADWELL_Y_GT2 && cdclk == GT_CDCLK_675) cdclk = GT_CDCLK_540; /* Set variables based on CD Clock setting */ @@ -432,24 +438,32 @@ static void igd_cdclk_init_broadwell(struct device *dev) lpcll = (1 << 27); pwctl = 2; dpdiv = 169; + reg_em4 = 16; + reg_em5 = 225; break; case GT_CDCLK_450: cdset = 449; lpcll = 0; pwctl = 0; dpdiv = 225; + reg_em4 = 4; + reg_em5 = 75; break; case GT_CDCLK_540: cdset = 539; lpcll = (1 << 26); pwctl = 1; dpdiv = 270; + reg_em4 = 4; + reg_em5 = 90; break; case GT_CDCLK_675: cdset = 674; lpcll = (1 << 26) | (1 << 27); pwctl = 3; dpdiv = 338; + reg_em4 = 8; + reg_em5 = 225; default: return; } diff --git a/src/soc/intel/broadwell/include/soc/igd.h b/src/soc/intel/broadwell/include/soc/igd.h new file mode 100644 index 0000000..a0db5ef --- /dev/null +++ b/src/soc/intel/broadwell/include/soc/igd.h @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Chromium OS Authors + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef SOC_INTEL_BROADWELL_GMA_H +#define SOC_INTEL_BROADWELL_GMA_H + +u32 igd_get_reg_em4(void); +u32 igd_get_reg_em5(void); + +#endif /* SOC_INTEL_BROADWELL_GMA_H */ \ No newline at end of file diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c index 5014b08..a9fc3d6 100644 --- a/src/soc/intel/broadwell/minihd.c +++ b/src/soc/intel/broadwell/minihd.c @@ -25,6 +25,7 @@ #include <stdlib.h> #include <soc/intel/common/hda_verb.h> #include <soc/ramstage.h> +#include <soc/igd.h> static const u32 minihd_verb_table[] = { /* coreboot specific header */ @@ -101,6 +102,10 @@ static void minihd_init(struct device *dev) minihd_verb_table); } } + + /* Set EM4/EM5 registers */ + write32(base + 0x0100c, igd_get_reg_em4()); + write32(base + 0x01010, igd_get_reg_em5()); } static struct device_operations minihd_ops = {

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Patch set updated for coreboot: soc/intel/common: remove mrc cache assumptions
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17717 -gerrit commit 4f28f3df612c5ae6df53660bb1a72571e904fee4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 22:08:20 2016 -0600 soc/intel/common: remove mrc cache assumptions Update the mrc cache implementation to use region_file. Instead of relying on memory-mapped access and pointer arithmetic use the region_devices and region_file to obtain the latest data associated with the region. This removes the need for the nvm wrapper as the region_devices can be used directly. Thus, the library is more generic and can be extended to work on different boot mediums. BUG=chrome-os-partner:56151 Change-Id: Ic14e2d2f7339e50256b4a3a297fc33991861ca44 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/intel/fsp1_1/romstage.c | 29 +- src/drivers/intel/fsp2_0/memory_init.c | 58 +-- src/soc/intel/apollolake/mmap_boot.c | 17 - src/soc/intel/apollolake/romstage.c | 15 +- src/soc/intel/baytrail/romstage/raminit.c | 15 +- src/soc/intel/broadwell/romstage/raminit.c | 16 +- src/soc/intel/common/mrc_cache.c | 612 +++++++++++++++-------------- src/soc/intel/common/mrc_cache.h | 45 +-- src/soc/intel/common/nvm.c | 122 ++---- src/soc/intel/common/nvm.h | 16 +- 10 files changed, 426 insertions(+), 519 deletions(-) diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index bb3e96c..73fb66d 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -19,6 +19,7 @@ #include <arch/io.h> #include <arch/cbfs.h> #include <arch/early_variables.h> +#include <assert.h> #include <boardid.h> #include <console/console.h> #include <cbmem.h> @@ -99,7 +100,7 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih) /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { - const struct mrc_saved_data *cache; + struct region_device rdev; struct pei_data *pei_data; post_code(0x32); @@ -127,11 +128,15 @@ void romstage_common(struct romstage_params *params) printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); } else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) - && (!mrc_cache_get_current_with_version(&cache, - params->fsp_version))) { + && (!mrc_cache_get_current(MRC_TRAINING_DATA, + params->fsp_version, + &rdev))) { /* MRC cache found */ - params->pei_data->saved_data_size = cache->size; - params->pei_data->saved_data = &cache->data[0]; + params->pei_data->saved_data_size = + region_device_sz(&rdev); + params->pei_data->saved_data = rdev_mmap_full(&rdev); + /* Assum boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); } else if (params->pei_data->boot_mode == ACPI_S3) { /* Waking from S3 and no cache. */ printk(BIOS_DEBUG, @@ -155,10 +160,10 @@ void romstage_common(struct romstage_params *params) if ((params->pei_data->boot_mode != ACPI_S3) && (params->pei_data->data_to_save_size != 0) && (params->pei_data->data_to_save != NULL)) - mrc_cache_stash_data_with_version( + mrc_cache_stash_data(MRC_TRAINING_DATA, + params->fsp_version, params->pei_data->data_to_save, - params->pei_data->data_to_save_size, - params->fsp_version); + params->pei_data->data_to_save_size); } /* Save DIMM information */ @@ -355,15 +360,15 @@ __attribute__((weak)) void mainboard_add_dimm_info( } /* Get the memory configuration data */ -__attribute__((weak)) int mrc_cache_get_current_with_version( - const struct mrc_saved_data **cache, uint32_t version) +__attribute__((weak)) int mrc_cache_get_current(int type, uint32_t version, + struct region_device *rdev) { return -1; } /* Save the memory configuration data */ -__attribute__((weak)) int mrc_cache_stash_data_with_version(const void *data, - size_t size, uint32_t version) +__attribute__((weak)) int mrc_cache_stash_data(int type, uint32_t version, + const void *data, size_t size) { return -1; } diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 283b179..fab65f2 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -15,6 +15,7 @@ #include <arch/io.h> #include <arch/cpu.h> #include <arch/symbols.h> +#include <assert.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -107,9 +108,9 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version) * code which saves the data to flash doesn't write if the latest * training data matches this one. */ - if (mrc_cache_stash_data_with_version(mrc_data, mrc_data_size, - fsp_version) < 0) - printk(BIOS_ERR, "Failed to stash MRC data\n"); + if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, + mrc_data_size) < 0) + printk(BIOS_ERR, "Failed to stash MRC data\n"); mrc_cache_update_tpm_hash(mrc_data, mrc_data_size); } @@ -146,24 +147,6 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) romstage_handoff_init(s3wake); } -static const char *mrc_cache_get_region_name(void) -{ - /* In normal mode, always use DEFAULT_MRC_CACHE */ - if (!vboot_recovery_mode_enabled()) - return DEFAULT_MRC_CACHE; - - /* - * In recovery mode, force retraining by returning NULL if: - * 1. Recovery cache is not supported, or - * 2. Memory retrain switch is set. - */ - if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) || - vboot_recovery_mode_memory_retrain()) - return NULL; - - return RECOVERY_MRC_CACHE; -} - static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) { uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; @@ -209,29 +192,46 @@ static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake, uint32_t fsp_version) { - const struct mrc_saved_data *mrc_cache; - const char *name; + struct region_device rdev; + void *data; arch_upd->NvsBufferPtr = NULL; if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) return; - name = mrc_cache_get_region_name(); + /* + * In recovery mode, force retraining: + * 1. Recovery cache is not supported, or + * 2. Memory retrain switch is set. + */ + if (vboot_recovery_mode_enabled()) { + if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) + return; + if (vboot_recovery_mode_memory_retrain()) + return; + } + + if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0) + return; + + /* Assume boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + data = rdev_mmap_full(&rdev); - if (mrc_cache_get_current_from_region(&mrc_cache, fsp_version, name)) + if (data == NULL) return; - if (!mrc_cache_verify_tpm_hash(mrc_cache->data, mrc_cache->size)) + if (!mrc_cache_verify_tpm_hash(data, region_device_sz(&rdev))) return; /* MRC cache found */ - arch_upd->NvsBufferPtr = (void *)mrc_cache->data; + arch_upd->NvsBufferPtr = data; arch_upd->BootMode = s3wake ? FSP_BOOT_ON_S3_RESUME: FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; - printk(BIOS_SPEW, "MRC cache found, size %x bootmode:%d\n", - mrc_cache->size, arch_upd->BootMode); + printk(BIOS_SPEW, "MRC cache found, size %zx bootmode:%d\n", + region_device_sz(&rdev), arch_upd->BootMode); } static enum cb_err check_region_overlap(const struct memranges *ranges, diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c index bf2e5b9..4617630 100644 --- a/src/soc/intel/apollolake/mmap_boot.c +++ b/src/soc/intel/apollolake/mmap_boot.c @@ -22,7 +22,6 @@ #include <commonlib/region.h> #include <console/console.h> #include <fmap.h> -#include <soc/intel/common/nvm.h> #include <soc/mmap_boot.h> #include <soc/spi.h> @@ -148,22 +147,6 @@ const struct cbfs_locator cbfs_master_header_locator = { .locate = iafw_boot_region_properties, }; -uint32_t nvm_mmio_to_flash_offset(void *p) -{ - bios_mmap_init(); - - size_t start, size; - start = car_get_var(bios_start); - size = car_get_var(bios_size); - - /* - * Returns : - * addr - base of mmaped region in addr space + offset of mmaped region - * start on flash - */ - return (uintptr_t)p - (4ULL * GiB - size) + start; -} - size_t get_bios_size(void) { bios_mmap_init(); diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 039b586..feb566b 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -201,8 +201,9 @@ asmlinkage void car_stage_entry(void) new_var_data = fsp_find_extension_hob_by_guid(hob_variable_guid, &var_size); if (new_var_data) - mrc_cache_stash_vardata(new_var_data, var_size, - car_get_var(fsp_version)); + mrc_cache_stash_data(MRC_VARIABLE_DATA, + car_get_var(fsp_version), new_var_data, + var_size); else printk(BIOS_ERR, "Failed to determine variable data\n"); @@ -257,7 +258,7 @@ static void fill_console_params(FSPM_UPD *mupd) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { - const struct mrc_saved_data *msd; + struct region_device rdev; fill_console_params(mupd); mainboard_memory_init_params(mupd); @@ -292,10 +293,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) * wrong/missing key renders DRAM contents useless. */ - if (mrc_cache_get_vardata(&msd, version) < 0) { - printk(BIOS_DEBUG, "MRC variable data missing/invalid\n"); - } else { - mupd->FspmConfig.VariableNvsBufferPtr = (void*) msd->data; + if (mrc_cache_get_current(MRC_VARIABLE_DATA, version, &rdev) == 0) { + /* Assume leaking is ok. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + mupd->FspmConfig.VariableNvsBufferPtr = rdev_mmap_full(&rdev); } car_set_var(fsp_version, version); diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index a79fe95..190231d 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -15,7 +15,7 @@ #include <stddef.h> #include <arch/acpi.h> -#include <arch/io.h> +#include <assert.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -111,7 +111,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) { int ret; mrc_wrapper_entry_t mrc_entry; - const struct mrc_saved_data *cache; + struct region_device rdev; /* Fill in default entries. */ mp->version = MRC_PARAMS_VER; @@ -125,9 +125,11 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) if (vboot_recovery_mode_enabled()) { printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); - } else if (!mrc_cache_get_current(&cache)) { - mp->saved_data_size = cache->size; - mp->saved_data = &cache->data[0]; + } else if (!mrc_cache_get_current(MRC_TRAINING_DATA, 0, &rdev)) { + mp->saved_data_size = region_device_sz(&rdev); + mp->saved_data = rdev_mmap_full(&rdev); + /* Assume boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); } else if (prev_sleep_state == ACPI_S3) { /* If waking from S3 and no cache then. */ printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n"); @@ -178,5 +180,6 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) mp->data_to_save_size); if (mp->data_to_save != NULL && mp->data_to_save_size > 0) - mrc_cache_stash_data(mp->data_to_save, mp->data_to_save_size); + mrc_cache_stash_data(MRC_TRAINING_DATA, 0, mp->data_to_save, + mp->data_to_save_size); } diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 61b1bc9..1185788 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -15,6 +15,7 @@ #include <arch/cbfs.h> #include <arch/io.h> +#include <assert.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -41,7 +42,7 @@ */ void raminit(struct pei_data *pei_data) { - const struct mrc_saved_data *cache; + struct region_device rdev; struct memory_info* mem_info; pei_wrapper_entry_t entry; int ret; @@ -51,10 +52,12 @@ void raminit(struct pei_data *pei_data) if (vboot_recovery_mode_enabled()) { /* Recovery mode does not use MRC cache */ printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); - } else if (!mrc_cache_get_current(&cache)) { + } else if (!mrc_cache_get_current(MRC_TRAINING_DATA, 0, &rdev)) { /* MRC cache found */ - pei_data->saved_data_size = cache->size; - pei_data->saved_data = &cache->data[0]; + pei_data->saved_data_size = region_device_sz(&rdev); + pei_data->saved_data = rdev_mmap_full(&rdev); + /* Assume boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); } else if (pei_data->boot_mode == ACPI_S3) { /* Waking from S3 and no cache. */ printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n"); @@ -118,8 +121,9 @@ void raminit(struct pei_data *pei_data) pei_data->data_to_save_size); if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0) - mrc_cache_stash_data(pei_data->data_to_save, - pei_data->data_to_save_size); + mrc_cache_stash_data(MRC_TRAINING_DATA, 0, + pei_data->data_to_save, + pei_data->data_to_save_size); printk(BIOS_DEBUG, "create cbmem for dimm information\n"); mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info)); diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c index e9d670e..a55312d 100644 --- a/src/soc/intel/common/mrc_cache.c +++ b/src/soc/intel/common/mrc_cache.c @@ -14,344 +14,337 @@ */ #include <string.h> +#include <boot_device.h> #include <bootstate.h> #include <console/console.h> #include <cbmem.h> #include <elog.h> #include <fmap.h> #include <ip_checksum.h> +#include <region_file.h> #include <vboot/vboot_common.h> #include "mrc_cache.h" #include "nvm.h" -#define MRC_DATA_ALIGN 0x1000 +#define DEFAULT_MRC_CACHE "RW_MRC_CACHE" +#define VARIABLE_MRC_CACHE "RW_VAR_MRC_CACHE" +#define RECOVERY_MRC_CACHE "RECOVERY_MRC_CACHE" +#define UNIFIED_MRC_CACHE "UNIFIED_MRC_CACHE" + #define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24)) -/* The mrc_data_region describes the larger non-volatile area to store - * mrc_saved_data objects.*/ -struct mrc_data_region { - void *base; - uint32_t size; -}; +struct mrc_metadata { + uint32_t signature; + uint32_t data_size; + uint16_t data_checksum; + uint16_t header_checksum; + uint32_t version; +} __attribute__((packed)); enum result { - WRITE_FAILURE = -1, - ERASE_FAILURE = -2, - OTHER_FAILURE = -3, + UPDATE_FAILURE = -1, UPDATE_SUCCESS = 0, ALREADY_UPTODATE = 1 }; -/* common code */ -static int mrc_cache_get_region(const char *name, - struct mrc_data_region *region) -{ - bool located_by_fmap = true; - struct region_device rdev; - - region->base = NULL; - region->size = 0; +#define NORMAL_FLAG (1 << 0) +#define RECOVERY_FLAG (1 << 1) - if (fmap_locate_area_as_rdev(name, &rdev)) - located_by_fmap = false; +struct cache_region { + const char *name; + uint32_t cbmem_id; + int type; + int elog_slot; + int flags; +}; - /* CHROMEOS builds must get their MRC cache from FMAP. */ - if (IS_ENABLED(CONFIG_CHROMEOS) && !located_by_fmap) - return -1; +static const struct cache_region recovery_training = { + .name = RECOVERY_MRC_CACHE, + .cbmem_id = CBMEM_ID_MRCDATA, + .type = MRC_TRAINING_DATA, + .elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY, +#if IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) + .flags = RECOVERY_FLAG, +#else + .flags = 0, +#endif +}; - if (located_by_fmap) { - region->size = region_device_sz(&rdev); - region->base = rdev_mmap_full(&rdev); +static const struct cache_region normal_training = { + .name = DEFAULT_MRC_CACHE, + .cbmem_id = CBMEM_ID_MRCDATA, + .type = MRC_TRAINING_DATA, + .elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL, + .flags = NORMAL_FLAG | RECOVERY_FLAG, +}; - if (region->base == NULL) - return -1; - } else { - region->base = (void *)CONFIG_MRC_SETTINGS_CACHE_BASE; - region->size = CONFIG_MRC_SETTINGS_CACHE_SIZE; - } +static const struct cache_region variable_data = { + .name = VARIABLE_MRC_CACHE, + .cbmem_id = CBMEM_ID_VAR_MRCDATA, + .type = MRC_VARIABLE_DATA, + .elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE, + .flags = NORMAL_FLAG | RECOVERY_FLAG, +}; - return 0; -} +/* Order matters here for priority in matching. */ +static const struct cache_region *cache_regions[] = { + &recovery_training, + &normal_training, + &variable_data, +}; -/* Protect mrc region with a Protected Range Register */ -static int __protect_mrc_cache(const struct mrc_data_region *region, - const char *name) +static int lookup_region_by_name(const char *name, struct region *r) { - if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + if (fmap_locate_area(name, r) == 0) return 0; - if (nvm_is_write_protected() <= 0) { - printk(BIOS_INFO, "MRC: NOT enabling PRR for %s.\n", name); - return 1; + /* CHROMEOS builds must get their MRC cache from FMAP. */ + if (IS_ENABLED(CONFIG_CHROMEOS)) { + printk(BIOS_ERR, "MRC: Chrome OS lookup failure.\n"); + return -1; } - if (nvm_protect(region->base, region->size) < 0) { - printk(BIOS_ERR, "MRC: ERROR setting PRR for %s.\n", name); + if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) return -1; - } - printk(BIOS_INFO, "MRC: Enabled Protected Range on %s.\n", name); + /* Base is in the form of a pointer. Make it an offset. */ + r->offset = CONFIG_MRC_SETTINGS_CACHE_BASE; + r->offset += CONFIG_ROM_SIZE; + r->size = CONFIG_MRC_SETTINGS_CACHE_SIZE; + return 0; } -static int protect_mrc_cache(const char *name) +static const struct cache_region *lookup_region_type(int type) { - struct mrc_data_region region; - if (mrc_cache_get_region(name, &region) < 0) { - printk(BIOS_ERR, "MRC: Could not find region %s\n", name); - return -1; + int i; + int flags; + + if (vboot_recovery_mode_enabled()) + flags = RECOVERY_FLAG; + else + flags = NORMAL_FLAG; + + for (i = 0; i < ARRAY_SIZE(cache_regions); i++) { + if (cache_regions[i]->type != type) + continue; + if ((cache_regions[i]->flags & flags) == flags) + return cache_regions[i]; } - return __protect_mrc_cache(&region, name); + return NULL; } -static int mrc_cache_in_region(const struct mrc_data_region *region, - const struct mrc_saved_data *cache) +int mrc_cache_stash_data(int type, uint32_t version, const void *data, + size_t size) { - uintptr_t region_end; - uintptr_t cache_end; - - if ((uintptr_t)cache < (uintptr_t)region->base) - return 0; - - region_end = (uintptr_t)region->base; - region_end += region->size; + const struct cache_region *cr; + size_t cbmem_size; + struct mrc_metadata *md; + + cr = lookup_region_type(type); + if (cr == NULL) { + printk(BIOS_ERR, "MRC: failed to add to cbmem for type %d.\n", + type); + return -1; + } - if ((uintptr_t)cache >= region_end) - return 0; + cbmem_size = sizeof(*md) + size; - if ((sizeof(*cache) + (uintptr_t)cache) >= region_end) - return 0; + md = cbmem_add(cr->cbmem_id, cbmem_size); - cache_end = (uintptr_t)cache; - cache_end += cache->size + sizeof(*cache); + if (md == NULL) { + printk(BIOS_ERR, "MRC: failed to add '%s' to cbmem.\n", + cr->name); + return -1; + } - if (cache_end > region_end) - return 0; + memset(md, 0, sizeof(*md)); + md->signature = MRC_DATA_SIGNATURE; + md->data_size = size; + md->version = version; + md->data_checksum = compute_ip_checksum(data, size); + md->header_checksum = compute_ip_checksum(md, sizeof(*md)); + memcpy(&md[1], data, size); - return 1; + return 0; } -static int mrc_cache_valid(const struct mrc_data_region *region, - const struct mrc_saved_data *cache) +static const struct cache_region *lookup_region(struct region *r, int type) { - uint32_t checksum; - - if (cache->signature != MRC_DATA_SIGNATURE) - return 0; - - if (cache->size > region->size) - return 0; - - checksum = compute_ip_checksum((void *)&cache->data[0], cache->size); - - if (cache->checksum != checksum) - return 0; + const struct cache_region *cr; - return 1; -} + cr = lookup_region_type(type); -static const struct mrc_saved_data * -next_cache_block(const struct mrc_saved_data *cache) -{ - uintptr_t next = (uintptr_t)cache; + if (cr == NULL) + return NULL; - next += ALIGN(cache->size + sizeof(*cache), MRC_DATA_ALIGN); + if (lookup_region_by_name(cr->name, r) < 0) + return NULL; - return (const struct mrc_saved_data *)next; + return cr; } -/* Locate the most recently saved MRC data. */ -static int __mrc_cache_get_current(const struct mrc_data_region *region, - const struct mrc_saved_data **cache, - uint32_t version) +static int mrc_header_valid(struct region_device *rdev, struct mrc_metadata *md) { - const struct mrc_saved_data *msd; - const struct mrc_saved_data *verified_cache; - int slot = 0; - - msd = region->base; + uint16_t checksum; + uint16_t checksum_result; + size_t size; - verified_cache = NULL; + if (rdev_readat(rdev, md, 0, sizeof(*md)) < 0) { + printk(BIOS_ERR, "MRC: couldn't read metadata\n"); + return -1; + } - while (mrc_cache_in_region(region, msd) && - mrc_cache_valid(region, msd)) { - verified_cache = msd; - msd = next_cache_block(msd); - slot++; + if (md->signature != MRC_DATA_SIGNATURE) { + printk(BIOS_ERR, "MRC: invalid header signature\n"); + return -1; } - /* - * Update pointer to the most recently saved MRC data before returning - * any error. This ensures that the caller can use next available slot - * if required. - */ - *cache = verified_cache; + /* Compute checksum over header with 0 as the value. */ + checksum = md->header_checksum; + md->header_checksum = 0; + checksum_result = compute_ip_checksum(md, sizeof(*md)); - if (verified_cache == NULL) + if (checksum != checksum_result) { + printk(BIOS_ERR, "MRC: header checksum mismatch: %x vs %x\n", + checksum, checksum_result); return -1; + } - if (verified_cache->version != version) { - printk(BIOS_DEBUG, "MRC: cache version mismatch: %x vs %x\n", - verified_cache->version, version); + /* Put back original. */ + md->header_checksum = checksum; + + /* Re-size the region device according to the metadata as a region_file * does block allocation. */ + size = sizeof(*md) + md->data_size; + if (rdev_chain(rdev, rdev, 0, size) < 0) { + printk(BIOS_ERR, "MRC: size exceeds rdev size: %zx vs %zx\n", + size, region_device_sz(rdev)); return -1; } - printk(BIOS_DEBUG, "MRC: cache slot %d @ %p\n", slot-1, verified_cache); - return 0; } -int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, - uint32_t version, - const char *region_name) +static int mrc_data_valid(const struct region_device *rdev, + struct mrc_metadata *md) { - struct mrc_data_region region; - - if (!region_name) { - printk(BIOS_ERR, "MRC: Requires memory retraining.\n"); + void *data; + uint16_t checksum; + const size_t md_size = sizeof(*md); + const size_t data_size = region_device_sz(rdev) - md_size; + + data = rdev_mmap(rdev, md_size, data_size); + if (data == NULL) { + printk(BIOS_ERR, "MRC: mmap failure on data verification.\n"); return -1; } - printk(BIOS_ERR, "MRC: Using data from %s\n", region_name); - - if (mrc_cache_get_region(region_name, &region) < 0) { - printk(BIOS_ERR, "MRC: Region %s not found. " - "Requires memory retraining.\n", region_name); - return -1; - } + checksum = compute_ip_checksum(data, data_size); - if (__mrc_cache_get_current(&region, cache, version) < 0) { - printk(BIOS_ERR, "MRC: Valid slot not found in %s." - "Requires memory retraining.\n", region_name); + rdev_munmap(rdev, data); + if (md->data_checksum != checksum) { + printk(BIOS_ERR, "MRC: data checksum mismatch: %x vs %x\n", + md->data_checksum, checksum); return -1; } return 0; } -int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, - uint32_t version) +static int mrc_cache_latest(const char *name, + const struct region_device *backing_rdev, + struct mrc_metadata *md, + struct regf *cache_file, + struct region_device *rdev, + bool fail_bad_data) { - return mrc_cache_get_current_from_region(cache, version, - DEFAULT_MRC_CACHE); -} - -int mrc_cache_get_current(const struct mrc_saved_data **cache) -{ - return mrc_cache_get_current_with_version(cache, 0); -} - -int mrc_cache_get_vardata(const struct mrc_saved_data **cache, uint32_t version) -{ - struct mrc_data_region region; - - if (mrc_cache_get_region(VARIABLE_MRC_CACHE, &region) < 0) + /* Init and obtain a handle to the file data. */ + if (regf_init(backing_rdev, cache_file) < 0) { + printk(BIOS_ERR, "MRC: region file invalid in '%s'\n", name); return -1; + } - return __mrc_cache_get_current(&region, cache, version); -} - -/* Fill in mrc_saved_data structure with payload. */ -static void mrc_cache_fill(struct mrc_saved_data *cache, const void *data, - size_t size, uint32_t version) -{ - cache->signature = MRC_DATA_SIGNATURE; - cache->size = size; - cache->version = version; - memcpy(&cache->data[0], data, size); - cache->checksum = compute_ip_checksum((void *)&cache->data[0], - cache->size); -} - -static int _mrc_stash_data(const void *data, size_t size, uint32_t version, - uint32_t cbmem_id) -{ - int cbmem_size; - struct mrc_saved_data *cache; - - cbmem_size = sizeof(*cache) + ALIGN(size, 16); - - cache = cbmem_add(cbmem_id, cbmem_size); + /* Provide a 0 sized region_device from here on out so the caller + * has a valid yet unusable region_device. */ + rdev_chain(rdev, backing_rdev, 0, 0); - if (cache == NULL) { - printk(BIOS_ERR, "MRC: No space in cbmem for training data.\n"); - return -1; + /* No data to return. */ + if (regf_data(cache_file, rdev) < 0) { + printk(BIOS_ERR, "MRC: no data in '%s'\n", name); + return fail_bad_data ? -1 : 0; } - /* Clear alignment padding bytes at end of data. */ - memset(&cache->data[size], 0, cbmem_size - size - sizeof(*cache)); - - printk(BIOS_DEBUG, "MRC: Relocate data from %p to %p (%zu bytes)\n", - data, cache, size); + /* Validate header and resize region to reflect actual usage on the + * saved medium (including metadata and data). */ + if (mrc_header_valid(rdev, md) < 0) { + printk(BIOS_ERR, "MRC: invalid header in '%s'\n", name); + return fail_bad_data ? -1 : 0; + } - mrc_cache_fill(cache, data, size, version); + /* Validate Data */ + if (mrc_data_valid(rdev, md) < 0) { + printk(BIOS_ERR, "MRC: invalid data in '%s'\n", name); + return fail_bad_data ? -1 : 0; + } return 0; } -int mrc_cache_stash_data_with_version(const void *data, size_t size, - uint32_t version) +int mrc_cache_get_current(int type, uint32_t version, + struct region_device *rdev) { - return _mrc_stash_data(data, size, version, CBMEM_ID_MRCDATA); -} + const struct cache_region *cr; + struct region region; + struct region_device read_rdev; + struct regf cache_file; + struct mrc_metadata md; + size_t data_size; + const size_t md_size = sizeof(md); + const bool fail_bad_data = true; + + cr = lookup_region(&region, type); + + if (cr == NULL) + return -1; -int mrc_cache_stash_vardata(const void *data, size_t size, uint32_t version) -{ - return _mrc_stash_data(data, size, version, CBMEM_ID_VAR_MRCDATA); -} + if (boot_device_ro_subregion(&region, &read_rdev) < 0) + return -1; + if (mrc_cache_latest(cr->name, &read_rdev, &md, &cache_file, rdev, + fail_bad_data) < 0) + return -1; -int mrc_cache_stash_data(const void *data, size_t size) -{ - return mrc_cache_stash_data_with_version(data, size, 0); + if (version != md.version) { + printk(BIOS_INFO, "MRC: version mismatch: %x vs %x\n", + md.version, version); + return -1; + } + + /* Re-size rdev to only contain the data. i.e. remove metadata. */ + data_size = region_device_sz(rdev) - md_size; + return rdev_chain(rdev, rdev, md_size, data_size); } -static int mrc_slot_valid(const struct mrc_data_region *region, - const struct mrc_saved_data *slot, - const struct mrc_saved_data *to_save) +static bool mrc_cache_needs_update(const struct region_device *rdev, + const struct cbmem_entry *to_be_updated) { - uintptr_t region_begin; - uintptr_t region_end; - uintptr_t slot_end; - uintptr_t slot_begin; - uint32_t size; - - region_begin = (uintptr_t)region->base; - region_end = region_begin + region->size; - slot_begin = (uintptr_t)slot; - size = to_save->size + sizeof(*to_save); - slot_end = slot_begin + size; - - if (slot_begin < region_begin || slot_begin >= region_end) - return 0; - - if (size > region->size) - return 0; - - if (slot_end > region_end || slot_end < region_begin) - return 0; + void *mapping; + size_t size = region_device_sz(rdev); + bool need_update = false; - if (!nvm_is_erased(slot, size)) - return 0; + if (cbmem_entry_size(to_be_updated) != size) + return true; - return 1; -} + mapping = rdev_mmap_full(rdev); -static const struct mrc_saved_data * -mrc_cache_next_slot(const struct mrc_data_region *region, - const struct mrc_saved_data *current_slot) -{ - const struct mrc_saved_data *next_slot; + if (memcmp(cbmem_entry_start(to_be_updated), mapping, size)) + need_update = true; - if (current_slot == NULL) { - next_slot = region->base; - } else { - next_slot = next_cache_block(current_slot); - } + rdev_munmap(rdev, mapping); - return next_slot; + return need_update; } static void log_event_cache_update(uint8_t slot, enum result res) @@ -363,9 +356,7 @@ static void log_event_cache_update(uint8_t slot, enum result res) /* Filter through interesting events only */ switch (res) { - case WRITE_FAILURE: /* fall-through */ - case ERASE_FAILURE: /* fall-through */ - case OTHER_FAILURE: /* fall-through */ + case UPDATE_FAILURE: event.status = ELOG_MEM_CACHE_UPDATE_STATUS_FAIL; break; case UPDATE_SUCCESS: @@ -379,63 +370,94 @@ static void log_event_cache_update(uint8_t slot, enum result res) printk(BIOS_ERR, "Failed to log mem cache update event.\n"); } -static int update_mrc_cache_type(uint32_t cbmem_id, const char *region_name) +/* During ramstage this code purposefully uses incoherent transactions between + * read and write. The read assumes a memory-mapped boot device that can be used + * to quickly locate and compare the up-to-date data. However, when an update + * is required it uses the writeable region access to perform the update. */ +static void update_mrc_cache_by_type(int type) { - const struct mrc_saved_data *current_boot; - const struct mrc_saved_data *current_saved; - const struct mrc_saved_data *next_slot; - struct mrc_data_region region; - int res; + const struct cache_region *cr; + struct region region; + struct region_device read_rdev; + struct region_device write_rdev; + struct regf cache_file; + struct mrc_metadata md; + const struct cbmem_entry *to_be_updated; + struct incoherent_rdev backing_irdev; + const struct region_device *backing_rdev; + struct region_device latest_rdev; + const bool fail_bad_data = false; + + cr = lookup_region(&region, type); + + if (cr == NULL) + return; - printk(BIOS_DEBUG, "MRC: Updating cache data.\n"); + to_be_updated = cbmem_entry_find(cr->cbmem_id); + if (to_be_updated == NULL) { + printk(BIOS_ERR, "MRC: No data in cbmem for '%s'.\n", + cr->name); + return; + } - printk(BIOS_ERR, "MRC: Cache region selected - %s\n", region_name); + printk(BIOS_DEBUG, "MRC: Checking cached data update for '%s'.\n", + cr->name); - if (mrc_cache_get_region(region_name, &region)) { - printk(BIOS_ERR, "MRC: Could not obtain cache region.\n"); - return OTHER_FAILURE; - } + if (boot_device_ro_subregion(&region, &read_rdev) < 0) + return; - current_boot = cbmem_find(cbmem_id); - if (!current_boot) { - printk(BIOS_ERR, "MRC: No cache in cbmem.\n"); - return OTHER_FAILURE; - } + if (boot_device_rw_subregion(&region, &write_rdev) < 0) + return; + + backing_rdev = incoherent_rdev_init(&backing_irdev, &region, &read_rdev, + &write_rdev); + + if (backing_rdev == NULL) + return; + + if (mrc_cache_latest(cr->name, backing_rdev, &md, &cache_file, + &latest_rdev, fail_bad_data) < 0) + return; - if (!mrc_cache_valid(&region, current_boot)) { - printk(BIOS_ERR, "MRC: Cache data in cbmem invalid.\n"); - return OTHER_FAILURE; + if (!mrc_cache_needs_update(&latest_rdev, to_be_updated)) { + log_event_cache_update(cr->elog_slot, ALREADY_UPTODATE); + return; } - current_saved = NULL; + printk(BIOS_DEBUG, "MRC: cache data '%s' needs update.\n", cr->name); - if (!__mrc_cache_get_current(&region, &current_saved, - current_boot->version)) { - if (current_saved->size == current_boot->size && - !memcmp(&current_saved->data[0], &current_boot->data[0], - current_saved->size)) { - printk(BIOS_DEBUG, "MRC: Cache up to date.\n"); - return ALREADY_UPTODATE; - } + if (regf_update_data(&cache_file, cbmem_entry_start(to_be_updated), + cbmem_entry_size(to_be_updated)) < 0) + log_event_cache_update(cr->elog_slot, UPDATE_FAILURE); + else + log_event_cache_update(cr->elog_slot, UPDATE_SUCCESS); +} + +/* Protect mrc region with a Protected Range Register */ +static int protect_mrc_cache(const char *name) +{ + struct region region; + + if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + return 0; + + if (lookup_region_by_name(name, &region) < 0) { + printk(BIOS_ERR, "MRC: Could not find region '%s'\n", name); + return -1; } - next_slot = mrc_cache_next_slot(&region, current_saved); - - if (!mrc_slot_valid(&region, next_slot, current_boot)) { - printk(BIOS_DEBUG, "MRC: Slot @ %p is invalid.\n", next_slot); - if (!nvm_is_erased(region.base, region.size)) { - if (nvm_erase(region.base, region.size) < 0) { - printk(BIOS_DEBUG, "MRC: Failure erasing " - "region %s.\n", region_name); - return ERASE_FAILURE; - } - } - next_slot = region.base; + if (nvm_is_write_protected() <= 0) { + printk(BIOS_INFO, "MRC: NOT enabling PRR for '%s'.\n", name); + return 0; } - res = nvm_write((void *)next_slot, current_boot, current_boot->size - + sizeof(*current_boot)); - return res < 0 ? WRITE_FAILURE : UPDATE_SUCCESS; + if (nvm_protect(&region) < 0) { + printk(BIOS_ERR, "MRC: ERROR setting PRR for '%s'.\n", name); + return -1; + } + + printk(BIOS_INFO, "MRC: Enabled Protected Range on '%s'.\n", name); + return 0; } static void protect_mrc_region(void) @@ -459,30 +481,10 @@ static void protect_mrc_region(void) static void update_mrc_cache(void *unused) { - uint8_t slot; - const char *region_name; - enum result res; - - /* First update either recovery or default cache */ - if (vboot_recovery_mode_enabled() && - IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) { - region_name = RECOVERY_MRC_CACHE; - slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY; - } else { - region_name = DEFAULT_MRC_CACHE; - slot = ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL; - } - - res = update_mrc_cache_type(CBMEM_ID_MRCDATA, region_name); - log_event_cache_update(slot, res); + update_mrc_cache_by_type(MRC_TRAINING_DATA); - /* Next update variable cache if in use */ - if (IS_ENABLED(CONFIG_MRC_SETTINGS_VARIABLE_DATA)) { - res = update_mrc_cache_type(CBMEM_ID_VAR_MRCDATA, - VARIABLE_MRC_CACHE); - log_event_cache_update(ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE, - res); - } + if (IS_ENABLED(CONFIG_MRC_SETTINGS_VARIABLE_DATA)) + update_mrc_cache_by_type(MRC_VARIABLE_DATA); protect_mrc_region(); } diff --git a/src/soc/intel/common/mrc_cache.h b/src/soc/intel/common/mrc_cache.h index 6414acc..4511fc3 100644 --- a/src/soc/intel/common/mrc_cache.h +++ b/src/soc/intel/common/mrc_cache.h @@ -19,34 +19,25 @@ #include <stddef.h> #include <stdint.h> -#define DEFAULT_MRC_CACHE "RW_MRC_CACHE" -#define VARIABLE_MRC_CACHE "RW_VAR_MRC_CACHE" -#define RECOVERY_MRC_CACHE "RECOVERY_MRC_CACHE" -#define UNIFIED_MRC_CACHE "UNIFIED_MRC_CACHE" +enum { + MRC_TRAINING_DATA, + MRC_VARIABLE_DATA, +}; -/* Wrapper object to save MRC information. */ -struct mrc_saved_data { - uint32_t signature; - uint32_t size; - uint32_t checksum; - uint32_t version; - uint8_t data[0]; -} __attribute__((packed)); - -/* Locate the most recently saved MRC data. */ -int mrc_cache_get_current(const struct mrc_saved_data **cache); -int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, - uint32_t version); -int mrc_cache_get_vardata(const struct mrc_saved_data **cache, - uint32_t version); -int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, - uint32_t version, - const char *region_name); +/* + * It's up to the caller to decide when to retrieve and stash data. There is + * differentiation on recovery mode CONFIG_HAS_RECOVERY_MRC_CACHE, but that's + * only for locating where to retrieve and save the data. If a platform doesn't + * want to update the data then it shouldn't stash the data for saving. + * Similarly, if the platform doesn't need the data for booting because of a + * policy don't request the data. + */ -/* Stash the resulting MRC data to be saved in non-volatile storage later. */ -int mrc_cache_stash_data(const void *data, size_t size); -int mrc_cache_stash_data_with_version(const void *data, size_t size, - uint32_t version); -int mrc_cache_stash_vardata(const void *data, size_t size, uint32_t version); +/* Get and stash data for saving provided the type passed in. The functions + * return < 0 on error, 0 on success. */ +int mrc_cache_get_current(int type, uint32_t version, + struct region_device *rdev); +int mrc_cache_stash_data(int type, uint32_t version, const void *data, + size_t size); #endif /* _COMMON_MRC_CACHE_H_ */ diff --git a/src/soc/intel/common/nvm.c b/src/soc/intel/common/nvm.c index 99a1fbf..b7e0f4e 100644 --- a/src/soc/intel/common/nvm.c +++ b/src/soc/intel/common/nvm.c @@ -24,113 +24,43 @@ #include "nvm.h" #include "spi_flash.h" -/* This module assumes the flash is memory mapped just below 4GiB in the - * address space for reading. Also this module assumes an area it erased - * when all bytes read as all 0xff's. */ - -static struct spi_flash *flash; - -static int nvm_init(void) +/* Read flash status register to determine if write protect is active */ +int nvm_is_write_protected(void) { - if (flash != NULL) - return 0; + u8 sr1; + u8 wp_gpio; + u8 wp_spi; - spi_init(); - flash = spi_flash_probe(0, 0); - if (!flash) { - printk(BIOS_DEBUG, "Could not find SPI device\n"); - return -1; - } - - return 0; -} + if (!IS_ENABLED(CONFIG_CHROMEOS)) + return 0; -/* - * Convert memory mapped pointer to flash offset. - * - * This is weak because not every platforms memory-maps the NVM media in the - * same manner. This is a stop-gap solution. - * - * The root of the problem is that users of this API work in memory space for - * both reads and writes, but erase and write must be done in flash space. This - * also only works when the media is memory-mapped, which is no longer - * universally true. The long-term approach should be to rewrite this and its - * users to work in flash space, while using rdev_read() instead of rdev_mmap(). - */ -__attribute__((weak)) -uint32_t nvm_mmio_to_flash_offset(void *p) -{ - return CONFIG_ROM_SIZE + (uintptr_t)p; -} + if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) + return 0; -int nvm_is_erased(const void *start, size_t size) -{ - const uint8_t *cur = start; - const uint8_t erased_value = 0xff; + /* Read Write Protect GPIO if available */ + wp_gpio = get_write_protect_state(); - while (size > 0) { - if (*cur != erased_value) - return 0; - cur++; - size--; + /* Read Status Register 1 */ + if (spi_flash_status(boot_device_spi_flash(), &sr1) < 0) { + printk(BIOS_ERR, "Failed to read SPI status register 1\n"); + return -1; } - return 1; -} + wp_spi = !!(sr1 & 0x80); -int nvm_erase(void *start, size_t size) -{ - if (nvm_init() < 0) - return -1; - return spi_flash_erase(flash, nvm_mmio_to_flash_offset(start), size); -} + printk(BIOS_DEBUG, "SPI flash protection: WPSW=%d SRP0=%d\n", + wp_gpio, wp_spi); -/* Write data to NVM. Returns 0 on success < 0 on error. */ -int nvm_write(void *start, const void *data, size_t size) -{ - if (nvm_init() < 0) - return -1; - return spi_flash_write(flash, nvm_mmio_to_flash_offset(start), size, - data); + return wp_gpio && wp_spi; } -/* Read flash status register to determine if write protect is active */ -int nvm_is_write_protected(void) +/* Apply protection to a range of flash */ +int nvm_protect(const struct region *r) { - if (nvm_init() < 0) - return -1; - - if (IS_ENABLED(CONFIG_CHROMEOS)) { - u8 sr1; - u8 wp_gpio; - u8 wp_spi; - - /* Read Write Protect GPIO if available */ - wp_gpio = get_write_protect_state(); - - /* Read Status Register 1 */ - if (spi_flash_status(flash, &sr1) < 0) { - printk(BIOS_ERR, - "Failed to read SPI status register 1\n"); - return -1; - } - wp_spi = !!(sr1 & 0x80); - - printk(BIOS_DEBUG, "SPI flash protection: WPSW=%d SRP0=%d\n", - wp_gpio, wp_spi); + if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + return 0; - return wp_gpio && wp_spi; - } - return 0; -} + if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) + return 0; -/* Apply protection to a range of flash */ -int nvm_protect(void *start, size_t size) -{ -#if IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT) - if (nvm_init() < 0) - return -1; - return spi_flash_protect(nvm_mmio_to_flash_offset(start), size); -#else - return -1; -#endif + return spi_flash_protect(region_offset(r), region_sz(r)); } diff --git a/src/soc/intel/common/nvm.h b/src/soc/intel/common/nvm.h index 074a2ce..1e32ed8 100644 --- a/src/soc/intel/common/nvm.h +++ b/src/soc/intel/common/nvm.h @@ -16,24 +16,12 @@ #ifndef _COMMON_NVM_H_ #define _COMMON_NVM_H_ -#include <stddef.h> - -/* Determine if area is erased. returns 1 if erased. 0 otherwise. */ -int nvm_is_erased(const void *start, size_t size); - -/* Erase region according to start and size. Returns < 0 on error else 0. */ -int nvm_erase(void *start, size_t size); - -/* Write data to NVM. Returns 0 on success < 0 on error. */ -int nvm_write(void *start, const void *data, size_t size); +#include <commonlib/region.h> /* Determine if flash device is write protected */ int nvm_is_write_protected(void); /* Apply protection to a range of flash */ -int nvm_protect(void *start, size_t size); - -/* Map MMIO address to actual address in flash */ -uint32_t nvm_mmio_to_flash_offset(void *p); +int nvm_protect(const struct region *region); #endif /* _COMMON_NVM_H_ */

1 0

Patch set updated for coreboot: commonlib: provide incoherent region device
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17716 -gerrit commit ee80c786ec2f45285266c3bf96c82cf5764a5d9f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 17:08:08 2016 -0600 commonlib: provide incoherent region device The MRC cache uses an incoherent mechanism for updating the cache contents in that it assumes memory mapped boot device access for checking against latest data for update. However, it uses another driver for updating the underlying storage area. In order to aid in moving the MRC cache over to using region_devices for updates provide an implementation of a region_device which performs reads and writes to different region_devices so that different drivers can be used transparently. BUG=chrome-os-partner:56151 Change-Id: I30e858245c30cbccd6313aff5ebecd3fd98d7302 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/commonlib/include/commonlib/region.h | 23 ++++++++++ src/commonlib/region.c | 79 ++++++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+) diff --git a/src/commonlib/include/commonlib/region.h b/src/commonlib/include/commonlib/region.h index bc3ded1..3f7d3bd 100644 --- a/src/commonlib/include/commonlib/region.h +++ b/src/commonlib/include/commonlib/region.h @@ -245,4 +245,27 @@ void xlate_region_device_rw_init(struct xlate_region_device *xdev, size_t sub_offset, size_t sub_size, size_t parent_size); +/* This type can be used for incoherent access where the read and write + * operations are backed by separate drivers. An example is x86 systems + * with memory mapped media for reading but use a spi flash driver for + * writing. One needs to ensure using this object is appropriate in context. */ +struct incoherent_rdev { + struct region_device rdev; + const struct region_device *read; + const struct region_device *write; +}; + +/* Initialize an incoherent_rdev based on the region as well as the read and + * write rdevs. The read and write rdevs should match in size to the passed + * in region. If not the initialization will fail returning NULL. Otherwise + * the function will return a pointer to the containing region_device to + * be used for region operations. Therefore, the lifetime of the returned + * pointer matches the lifetime of the incoherent_rdev object. Likewise, + * the lifetime of the read and write rdev need to match the lifetime of + * the incoherent_rdev object. */ +const struct region_device *incoherent_rdev_init(struct incoherent_rdev *irdev, + const struct region *r, + const struct region_device *read, + const struct region_device *write); + #endif /* _REGION_H_ */ diff --git a/src/commonlib/region.c b/src/commonlib/region.c index ac0faf1..bf53b9d 100644 --- a/src/commonlib/region.c +++ b/src/commonlib/region.c @@ -437,3 +437,82 @@ const struct region_device_ops xlate_rdev_rw_ops = { .writeat = xlate_writeat, .eraseat = xlate_eraseat, }; + + +static void *incoherent_mmap(const struct region_device *rd, size_t offset, + size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_mmap(irdev->read, offset, size); +} + +static int incoherent_munmap(const struct region_device *rd, void *mapping) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_munmap(irdev->read, mapping); +} + +static ssize_t incoherent_readat(const struct region_device *rd, void *b, + size_t offset, size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_readat(irdev->read, b, offset, size); +} + +static ssize_t incoherent_writeat(const struct region_device *rd, const void *b, + size_t offset, size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_writeat(irdev->write, b, offset, size); +} + +static ssize_t incoherent_eraseat(const struct region_device *rd, size_t offset, + size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_eraseat(irdev->write, offset, size); +} + +static const struct region_device_ops incoherent_rdev_ops = { + .mmap = incoherent_mmap, + .munmap = incoherent_munmap, + .readat = incoherent_readat, + .writeat = incoherent_writeat, + .eraseat = incoherent_eraseat, +}; + +const struct region_device *incoherent_rdev_init(struct incoherent_rdev *irdev, + const struct region *r, + const struct region_device *read, + const struct region_device *write) +{ + const size_t size = region_sz(r); + + if (size != region_device_sz(read) || size != region_device_sz(write)) + return NULL; + + /* The region is represented as offset 0 to size. That way, the generic + * rdev operations can be called on the read or write implementation + * without any unnecessary translation because the offsets all start + * at 0. */ + region_device_init(&irdev->rdev, &incoherent_rdev_ops, 0, size); + irdev->read = read; + irdev->write = write; + + return &irdev->rdev; +}

1 0

New patch to review for coreboot: soc/intel/common: remove mrc cache assumptions
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17717 -gerrit commit 231edeefaf2b8948017cfd42e37618d9965d4c0b Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 22:08:20 2016 -0600 soc/intel/common: remove mrc cache assumptions Update the mrc cache implementation to use region_file. Instead of relying on memory-mapped access and pointer arithmetic use the region_devices and region_file to obtain the latest data associated with the region. This removes the need for the nvm wrapper as the region_devices can be used directly. Thus, the library is more generic and can be extended to work on different boot mediums. BUG=chrome-os-partner:56151 Change-Id: Ic14e2d2f7339e50256b4a3a297fc33991861ca44 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/intel/fsp1_1/romstage.c | 29 +- src/drivers/intel/fsp2_0/memory_init.c | 58 +-- src/soc/intel/apollolake/mmap_boot.c | 17 - src/soc/intel/apollolake/romstage.c | 15 +- src/soc/intel/baytrail/romstage/raminit.c | 15 +- src/soc/intel/broadwell/romstage/raminit.c | 16 +- src/soc/intel/common/mrc_cache.c | 612 +++++++++++++++-------------- src/soc/intel/common/mrc_cache.h | 45 +-- src/soc/intel/common/nvm.c | 122 ++---- src/soc/intel/common/nvm.h | 16 +- 10 files changed, 426 insertions(+), 519 deletions(-) diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index bb3e96c..73fb66d 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -19,6 +19,7 @@ #include <arch/io.h> #include <arch/cbfs.h> #include <arch/early_variables.h> +#include <assert.h> #include <boardid.h> #include <console/console.h> #include <cbmem.h> @@ -99,7 +100,7 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih) /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { - const struct mrc_saved_data *cache; + struct region_device rdev; struct pei_data *pei_data; post_code(0x32); @@ -127,11 +128,15 @@ void romstage_common(struct romstage_params *params) printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); } else if (IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS) - && (!mrc_cache_get_current_with_version(&cache, - params->fsp_version))) { + && (!mrc_cache_get_current(MRC_TRAINING_DATA, + params->fsp_version, + &rdev))) { /* MRC cache found */ - params->pei_data->saved_data_size = cache->size; - params->pei_data->saved_data = &cache->data[0]; + params->pei_data->saved_data_size = + region_device_sz(&rdev); + params->pei_data->saved_data = rdev_mmap_full(&rdev); + /* Assum boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); } else if (params->pei_data->boot_mode == ACPI_S3) { /* Waking from S3 and no cache. */ printk(BIOS_DEBUG, @@ -155,10 +160,10 @@ void romstage_common(struct romstage_params *params) if ((params->pei_data->boot_mode != ACPI_S3) && (params->pei_data->data_to_save_size != 0) && (params->pei_data->data_to_save != NULL)) - mrc_cache_stash_data_with_version( + mrc_cache_stash_data(MRC_TRAINING_DATA, + params->fsp_version, params->pei_data->data_to_save, - params->pei_data->data_to_save_size, - params->fsp_version); + params->pei_data->data_to_save_size); } /* Save DIMM information */ @@ -355,15 +360,15 @@ __attribute__((weak)) void mainboard_add_dimm_info( } /* Get the memory configuration data */ -__attribute__((weak)) int mrc_cache_get_current_with_version( - const struct mrc_saved_data **cache, uint32_t version) +__attribute__((weak)) int mrc_cache_get_current(int type, uint32_t version, + struct region_device *rdev) { return -1; } /* Save the memory configuration data */ -__attribute__((weak)) int mrc_cache_stash_data_with_version(const void *data, - size_t size, uint32_t version) +__attribute__((weak)) int mrc_cache_stash_data(int type, uint32_t version, + const void *data, size_t size) { return -1; } diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 283b179..fab65f2 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -15,6 +15,7 @@ #include <arch/io.h> #include <arch/cpu.h> #include <arch/symbols.h> +#include <assert.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -107,9 +108,9 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version) * code which saves the data to flash doesn't write if the latest * training data matches this one. */ - if (mrc_cache_stash_data_with_version(mrc_data, mrc_data_size, - fsp_version) < 0) - printk(BIOS_ERR, "Failed to stash MRC data\n"); + if (mrc_cache_stash_data(MRC_TRAINING_DATA, fsp_version, mrc_data, + mrc_data_size) < 0) + printk(BIOS_ERR, "Failed to stash MRC data\n"); mrc_cache_update_tpm_hash(mrc_data, mrc_data_size); } @@ -146,24 +147,6 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) romstage_handoff_init(s3wake); } -static const char *mrc_cache_get_region_name(void) -{ - /* In normal mode, always use DEFAULT_MRC_CACHE */ - if (!vboot_recovery_mode_enabled()) - return DEFAULT_MRC_CACHE; - - /* - * In recovery mode, force retraining by returning NULL if: - * 1. Recovery cache is not supported, or - * 2. Memory retrain switch is set. - */ - if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) || - vboot_recovery_mode_memory_retrain()) - return NULL; - - return RECOVERY_MRC_CACHE; -} - static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) { uint8_t data_hash[VB2_SHA256_DIGEST_SIZE]; @@ -209,29 +192,46 @@ static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size) static void fsp_fill_mrc_cache(FSPM_ARCH_UPD *arch_upd, bool s3wake, uint32_t fsp_version) { - const struct mrc_saved_data *mrc_cache; - const char *name; + struct region_device rdev; + void *data; arch_upd->NvsBufferPtr = NULL; if (!IS_ENABLED(CONFIG_CACHE_MRC_SETTINGS)) return; - name = mrc_cache_get_region_name(); + /* + * In recovery mode, force retraining: + * 1. Recovery cache is not supported, or + * 2. Memory retrain switch is set. + */ + if (vboot_recovery_mode_enabled()) { + if (!IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) + return; + if (vboot_recovery_mode_memory_retrain()) + return; + } + + if (mrc_cache_get_current(MRC_TRAINING_DATA, fsp_version, &rdev) < 0) + return; + + /* Assume boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + data = rdev_mmap_full(&rdev); - if (mrc_cache_get_current_from_region(&mrc_cache, fsp_version, name)) + if (data == NULL) return; - if (!mrc_cache_verify_tpm_hash(mrc_cache->data, mrc_cache->size)) + if (!mrc_cache_verify_tpm_hash(data, region_device_sz(&rdev))) return; /* MRC cache found */ - arch_upd->NvsBufferPtr = (void *)mrc_cache->data; + arch_upd->NvsBufferPtr = data; arch_upd->BootMode = s3wake ? FSP_BOOT_ON_S3_RESUME: FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES; - printk(BIOS_SPEW, "MRC cache found, size %x bootmode:%d\n", - mrc_cache->size, arch_upd->BootMode); + printk(BIOS_SPEW, "MRC cache found, size %zx bootmode:%d\n", + region_device_sz(&rdev), arch_upd->BootMode); } static enum cb_err check_region_overlap(const struct memranges *ranges, diff --git a/src/soc/intel/apollolake/mmap_boot.c b/src/soc/intel/apollolake/mmap_boot.c index bf2e5b9..4617630 100644 --- a/src/soc/intel/apollolake/mmap_boot.c +++ b/src/soc/intel/apollolake/mmap_boot.c @@ -22,7 +22,6 @@ #include <commonlib/region.h> #include <console/console.h> #include <fmap.h> -#include <soc/intel/common/nvm.h> #include <soc/mmap_boot.h> #include <soc/spi.h> @@ -148,22 +147,6 @@ const struct cbfs_locator cbfs_master_header_locator = { .locate = iafw_boot_region_properties, }; -uint32_t nvm_mmio_to_flash_offset(void *p) -{ - bios_mmap_init(); - - size_t start, size; - start = car_get_var(bios_start); - size = car_get_var(bios_size); - - /* - * Returns : - * addr - base of mmaped region in addr space + offset of mmaped region - * start on flash - */ - return (uintptr_t)p - (4ULL * GiB - size) + start; -} - size_t get_bios_size(void) { bios_mmap_init(); diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 039b586..feb566b 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -201,8 +201,9 @@ asmlinkage void car_stage_entry(void) new_var_data = fsp_find_extension_hob_by_guid(hob_variable_guid, &var_size); if (new_var_data) - mrc_cache_stash_vardata(new_var_data, var_size, - car_get_var(fsp_version)); + mrc_cache_stash_data(MRC_VARIABLE_DATA, + car_get_var(fsp_version), new_var_data, + var_size); else printk(BIOS_ERR, "Failed to determine variable data\n"); @@ -257,7 +258,7 @@ static void fill_console_params(FSPM_UPD *mupd) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { - const struct mrc_saved_data *msd; + struct region_device rdev; fill_console_params(mupd); mainboard_memory_init_params(mupd); @@ -292,10 +293,10 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) * wrong/missing key renders DRAM contents useless. */ - if (mrc_cache_get_vardata(&msd, version) < 0) { - printk(BIOS_DEBUG, "MRC variable data missing/invalid\n"); - } else { - mupd->FspmConfig.VariableNvsBufferPtr = (void*) msd->data; + if (mrc_cache_get_current(MRC_VARIABLE_DATA, version, &rdev) == 0) { + /* Assume leaking is ok. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + mupd->FspmConfig.VariableNvsBufferPtr = rdev_mmap_full(&rdev); } car_set_var(fsp_version, version); diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index a79fe95..190231d 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -15,7 +15,7 @@ #include <stddef.h> #include <arch/acpi.h> -#include <arch/io.h> +#include <assert.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -111,7 +111,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) { int ret; mrc_wrapper_entry_t mrc_entry; - const struct mrc_saved_data *cache; + struct region_device rdev; /* Fill in default entries. */ mp->version = MRC_PARAMS_VER; @@ -125,9 +125,11 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) if (vboot_recovery_mode_enabled()) { printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); - } else if (!mrc_cache_get_current(&cache)) { - mp->saved_data_size = cache->size; - mp->saved_data = &cache->data[0]; + } else if (!mrc_cache_get_current(MRC_TRAINING_DATA, 0, &rdev)) { + mp->saved_data_size = region_device_sz(&rdev); + mp->saved_data = rdev_mmap_full(&rdev); + /* Assume boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); } else if (prev_sleep_state == ACPI_S3) { /* If waking from S3 and no cache then. */ printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n"); @@ -178,5 +180,6 @@ void raminit(struct mrc_params *mp, int prev_sleep_state) mp->data_to_save_size); if (mp->data_to_save != NULL && mp->data_to_save_size > 0) - mrc_cache_stash_data(mp->data_to_save, mp->data_to_save_size); + mrc_cache_stash_data(MRC_TRAINING_DATA, 0, mp->data_to_save, + mp->data_to_save_size); } diff --git a/src/soc/intel/broadwell/romstage/raminit.c b/src/soc/intel/broadwell/romstage/raminit.c index 61b1bc9..1185788 100644 --- a/src/soc/intel/broadwell/romstage/raminit.c +++ b/src/soc/intel/broadwell/romstage/raminit.c @@ -15,6 +15,7 @@ #include <arch/cbfs.h> #include <arch/io.h> +#include <assert.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -41,7 +42,7 @@ */ void raminit(struct pei_data *pei_data) { - const struct mrc_saved_data *cache; + struct region_device rdev; struct memory_info* mem_info; pei_wrapper_entry_t entry; int ret; @@ -51,10 +52,12 @@ void raminit(struct pei_data *pei_data) if (vboot_recovery_mode_enabled()) { /* Recovery mode does not use MRC cache */ printk(BIOS_DEBUG, "Recovery mode: not using MRC cache.\n"); - } else if (!mrc_cache_get_current(&cache)) { + } else if (!mrc_cache_get_current(MRC_TRAINING_DATA, 0, &rdev)) { /* MRC cache found */ - pei_data->saved_data_size = cache->size; - pei_data->saved_data = &cache->data[0]; + pei_data->saved_data_size = region_device_sz(&rdev); + pei_data->saved_data = rdev_mmap_full(&rdev); + /* Assume boot device is memory mapped. */ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); } else if (pei_data->boot_mode == ACPI_S3) { /* Waking from S3 and no cache. */ printk(BIOS_DEBUG, "No MRC cache found in S3 resume path.\n"); @@ -118,8 +121,9 @@ void raminit(struct pei_data *pei_data) pei_data->data_to_save_size); if (pei_data->data_to_save != NULL && pei_data->data_to_save_size > 0) - mrc_cache_stash_data(pei_data->data_to_save, - pei_data->data_to_save_size); + mrc_cache_stash_data(MRC_TRAINING_DATA, 0, + pei_data->data_to_save, + pei_data->data_to_save_size); printk(BIOS_DEBUG, "create cbmem for dimm information\n"); mem_info = cbmem_add(CBMEM_ID_MEMINFO, sizeof(struct memory_info)); diff --git a/src/soc/intel/common/mrc_cache.c b/src/soc/intel/common/mrc_cache.c index e9d670e..a55312d 100644 --- a/src/soc/intel/common/mrc_cache.c +++ b/src/soc/intel/common/mrc_cache.c @@ -14,344 +14,337 @@ */ #include <string.h> +#include <boot_device.h> #include <bootstate.h> #include <console/console.h> #include <cbmem.h> #include <elog.h> #include <fmap.h> #include <ip_checksum.h> +#include <region_file.h> #include <vboot/vboot_common.h> #include "mrc_cache.h" #include "nvm.h" -#define MRC_DATA_ALIGN 0x1000 +#define DEFAULT_MRC_CACHE "RW_MRC_CACHE" +#define VARIABLE_MRC_CACHE "RW_VAR_MRC_CACHE" +#define RECOVERY_MRC_CACHE "RECOVERY_MRC_CACHE" +#define UNIFIED_MRC_CACHE "UNIFIED_MRC_CACHE" + #define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24)) -/* The mrc_data_region describes the larger non-volatile area to store - * mrc_saved_data objects.*/ -struct mrc_data_region { - void *base; - uint32_t size; -}; +struct mrc_metadata { + uint32_t signature; + uint32_t data_size; + uint16_t data_checksum; + uint16_t header_checksum; + uint32_t version; +} __attribute__((packed)); enum result { - WRITE_FAILURE = -1, - ERASE_FAILURE = -2, - OTHER_FAILURE = -3, + UPDATE_FAILURE = -1, UPDATE_SUCCESS = 0, ALREADY_UPTODATE = 1 }; -/* common code */ -static int mrc_cache_get_region(const char *name, - struct mrc_data_region *region) -{ - bool located_by_fmap = true; - struct region_device rdev; - - region->base = NULL; - region->size = 0; +#define NORMAL_FLAG (1 << 0) +#define RECOVERY_FLAG (1 << 1) - if (fmap_locate_area_as_rdev(name, &rdev)) - located_by_fmap = false; +struct cache_region { + const char *name; + uint32_t cbmem_id; + int type; + int elog_slot; + int flags; +}; - /* CHROMEOS builds must get their MRC cache from FMAP. */ - if (IS_ENABLED(CONFIG_CHROMEOS) && !located_by_fmap) - return -1; +static const struct cache_region recovery_training = { + .name = RECOVERY_MRC_CACHE, + .cbmem_id = CBMEM_ID_MRCDATA, + .type = MRC_TRAINING_DATA, + .elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY, +#if IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE) + .flags = RECOVERY_FLAG, +#else + .flags = 0, +#endif +}; - if (located_by_fmap) { - region->size = region_device_sz(&rdev); - region->base = rdev_mmap_full(&rdev); +static const struct cache_region normal_training = { + .name = DEFAULT_MRC_CACHE, + .cbmem_id = CBMEM_ID_MRCDATA, + .type = MRC_TRAINING_DATA, + .elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL, + .flags = NORMAL_FLAG | RECOVERY_FLAG, +}; - if (region->base == NULL) - return -1; - } else { - region->base = (void *)CONFIG_MRC_SETTINGS_CACHE_BASE; - region->size = CONFIG_MRC_SETTINGS_CACHE_SIZE; - } +static const struct cache_region variable_data = { + .name = VARIABLE_MRC_CACHE, + .cbmem_id = CBMEM_ID_VAR_MRCDATA, + .type = MRC_VARIABLE_DATA, + .elog_slot = ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE, + .flags = NORMAL_FLAG | RECOVERY_FLAG, +}; - return 0; -} +/* Order matters here for priority in matching. */ +static const struct cache_region *cache_regions[] = { + &recovery_training, + &normal_training, + &variable_data, +}; -/* Protect mrc region with a Protected Range Register */ -static int __protect_mrc_cache(const struct mrc_data_region *region, - const char *name) +static int lookup_region_by_name(const char *name, struct region *r) { - if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + if (fmap_locate_area(name, r) == 0) return 0; - if (nvm_is_write_protected() <= 0) { - printk(BIOS_INFO, "MRC: NOT enabling PRR for %s.\n", name); - return 1; + /* CHROMEOS builds must get their MRC cache from FMAP. */ + if (IS_ENABLED(CONFIG_CHROMEOS)) { + printk(BIOS_ERR, "MRC: Chrome OS lookup failure.\n"); + return -1; } - if (nvm_protect(region->base, region->size) < 0) { - printk(BIOS_ERR, "MRC: ERROR setting PRR for %s.\n", name); + if (!IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)) return -1; - } - printk(BIOS_INFO, "MRC: Enabled Protected Range on %s.\n", name); + /* Base is in the form of a pointer. Make it an offset. */ + r->offset = CONFIG_MRC_SETTINGS_CACHE_BASE; + r->offset += CONFIG_ROM_SIZE; + r->size = CONFIG_MRC_SETTINGS_CACHE_SIZE; + return 0; } -static int protect_mrc_cache(const char *name) +static const struct cache_region *lookup_region_type(int type) { - struct mrc_data_region region; - if (mrc_cache_get_region(name, &region) < 0) { - printk(BIOS_ERR, "MRC: Could not find region %s\n", name); - return -1; + int i; + int flags; + + if (vboot_recovery_mode_enabled()) + flags = RECOVERY_FLAG; + else + flags = NORMAL_FLAG; + + for (i = 0; i < ARRAY_SIZE(cache_regions); i++) { + if (cache_regions[i]->type != type) + continue; + if ((cache_regions[i]->flags & flags) == flags) + return cache_regions[i]; } - return __protect_mrc_cache(&region, name); + return NULL; } -static int mrc_cache_in_region(const struct mrc_data_region *region, - const struct mrc_saved_data *cache) +int mrc_cache_stash_data(int type, uint32_t version, const void *data, + size_t size) { - uintptr_t region_end; - uintptr_t cache_end; - - if ((uintptr_t)cache < (uintptr_t)region->base) - return 0; - - region_end = (uintptr_t)region->base; - region_end += region->size; + const struct cache_region *cr; + size_t cbmem_size; + struct mrc_metadata *md; + + cr = lookup_region_type(type); + if (cr == NULL) { + printk(BIOS_ERR, "MRC: failed to add to cbmem for type %d.\n", + type); + return -1; + } - if ((uintptr_t)cache >= region_end) - return 0; + cbmem_size = sizeof(*md) + size; - if ((sizeof(*cache) + (uintptr_t)cache) >= region_end) - return 0; + md = cbmem_add(cr->cbmem_id, cbmem_size); - cache_end = (uintptr_t)cache; - cache_end += cache->size + sizeof(*cache); + if (md == NULL) { + printk(BIOS_ERR, "MRC: failed to add '%s' to cbmem.\n", + cr->name); + return -1; + } - if (cache_end > region_end) - return 0; + memset(md, 0, sizeof(*md)); + md->signature = MRC_DATA_SIGNATURE; + md->data_size = size; + md->version = version; + md->data_checksum = compute_ip_checksum(data, size); + md->header_checksum = compute_ip_checksum(md, sizeof(*md)); + memcpy(&md[1], data, size); - return 1; + return 0; } -static int mrc_cache_valid(const struct mrc_data_region *region, - const struct mrc_saved_data *cache) +static const struct cache_region *lookup_region(struct region *r, int type) { - uint32_t checksum; - - if (cache->signature != MRC_DATA_SIGNATURE) - return 0; - - if (cache->size > region->size) - return 0; - - checksum = compute_ip_checksum((void *)&cache->data[0], cache->size); - - if (cache->checksum != checksum) - return 0; + const struct cache_region *cr; - return 1; -} + cr = lookup_region_type(type); -static const struct mrc_saved_data * -next_cache_block(const struct mrc_saved_data *cache) -{ - uintptr_t next = (uintptr_t)cache; + if (cr == NULL) + return NULL; - next += ALIGN(cache->size + sizeof(*cache), MRC_DATA_ALIGN); + if (lookup_region_by_name(cr->name, r) < 0) + return NULL; - return (const struct mrc_saved_data *)next; + return cr; } -/* Locate the most recently saved MRC data. */ -static int __mrc_cache_get_current(const struct mrc_data_region *region, - const struct mrc_saved_data **cache, - uint32_t version) +static int mrc_header_valid(struct region_device *rdev, struct mrc_metadata *md) { - const struct mrc_saved_data *msd; - const struct mrc_saved_data *verified_cache; - int slot = 0; - - msd = region->base; + uint16_t checksum; + uint16_t checksum_result; + size_t size; - verified_cache = NULL; + if (rdev_readat(rdev, md, 0, sizeof(*md)) < 0) { + printk(BIOS_ERR, "MRC: couldn't read metadata\n"); + return -1; + } - while (mrc_cache_in_region(region, msd) && - mrc_cache_valid(region, msd)) { - verified_cache = msd; - msd = next_cache_block(msd); - slot++; + if (md->signature != MRC_DATA_SIGNATURE) { + printk(BIOS_ERR, "MRC: invalid header signature\n"); + return -1; } - /* - * Update pointer to the most recently saved MRC data before returning - * any error. This ensures that the caller can use next available slot - * if required. - */ - *cache = verified_cache; + /* Compute checksum over header with 0 as the value. */ + checksum = md->header_checksum; + md->header_checksum = 0; + checksum_result = compute_ip_checksum(md, sizeof(*md)); - if (verified_cache == NULL) + if (checksum != checksum_result) { + printk(BIOS_ERR, "MRC: header checksum mismatch: %x vs %x\n", + checksum, checksum_result); return -1; + } - if (verified_cache->version != version) { - printk(BIOS_DEBUG, "MRC: cache version mismatch: %x vs %x\n", - verified_cache->version, version); + /* Put back original. */ + md->header_checksum = checksum; + + /* Re-size the region device according to the metadata as a region_file * does block allocation. */ + size = sizeof(*md) + md->data_size; + if (rdev_chain(rdev, rdev, 0, size) < 0) { + printk(BIOS_ERR, "MRC: size exceeds rdev size: %zx vs %zx\n", + size, region_device_sz(rdev)); return -1; } - printk(BIOS_DEBUG, "MRC: cache slot %d @ %p\n", slot-1, verified_cache); - return 0; } -int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, - uint32_t version, - const char *region_name) +static int mrc_data_valid(const struct region_device *rdev, + struct mrc_metadata *md) { - struct mrc_data_region region; - - if (!region_name) { - printk(BIOS_ERR, "MRC: Requires memory retraining.\n"); + void *data; + uint16_t checksum; + const size_t md_size = sizeof(*md); + const size_t data_size = region_device_sz(rdev) - md_size; + + data = rdev_mmap(rdev, md_size, data_size); + if (data == NULL) { + printk(BIOS_ERR, "MRC: mmap failure on data verification.\n"); return -1; } - printk(BIOS_ERR, "MRC: Using data from %s\n", region_name); - - if (mrc_cache_get_region(region_name, &region) < 0) { - printk(BIOS_ERR, "MRC: Region %s not found. " - "Requires memory retraining.\n", region_name); - return -1; - } + checksum = compute_ip_checksum(data, data_size); - if (__mrc_cache_get_current(&region, cache, version) < 0) { - printk(BIOS_ERR, "MRC: Valid slot not found in %s." - "Requires memory retraining.\n", region_name); + rdev_munmap(rdev, data); + if (md->data_checksum != checksum) { + printk(BIOS_ERR, "MRC: data checksum mismatch: %x vs %x\n", + md->data_checksum, checksum); return -1; } return 0; } -int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, - uint32_t version) +static int mrc_cache_latest(const char *name, + const struct region_device *backing_rdev, + struct mrc_metadata *md, + struct regf *cache_file, + struct region_device *rdev, + bool fail_bad_data) { - return mrc_cache_get_current_from_region(cache, version, - DEFAULT_MRC_CACHE); -} - -int mrc_cache_get_current(const struct mrc_saved_data **cache) -{ - return mrc_cache_get_current_with_version(cache, 0); -} - -int mrc_cache_get_vardata(const struct mrc_saved_data **cache, uint32_t version) -{ - struct mrc_data_region region; - - if (mrc_cache_get_region(VARIABLE_MRC_CACHE, &region) < 0) + /* Init and obtain a handle to the file data. */ + if (regf_init(backing_rdev, cache_file) < 0) { + printk(BIOS_ERR, "MRC: region file invalid in '%s'\n", name); return -1; + } - return __mrc_cache_get_current(&region, cache, version); -} - -/* Fill in mrc_saved_data structure with payload. */ -static void mrc_cache_fill(struct mrc_saved_data *cache, const void *data, - size_t size, uint32_t version) -{ - cache->signature = MRC_DATA_SIGNATURE; - cache->size = size; - cache->version = version; - memcpy(&cache->data[0], data, size); - cache->checksum = compute_ip_checksum((void *)&cache->data[0], - cache->size); -} - -static int _mrc_stash_data(const void *data, size_t size, uint32_t version, - uint32_t cbmem_id) -{ - int cbmem_size; - struct mrc_saved_data *cache; - - cbmem_size = sizeof(*cache) + ALIGN(size, 16); - - cache = cbmem_add(cbmem_id, cbmem_size); + /* Provide a 0 sized region_device from here on out so the caller + * has a valid yet unusable region_device. */ + rdev_chain(rdev, backing_rdev, 0, 0); - if (cache == NULL) { - printk(BIOS_ERR, "MRC: No space in cbmem for training data.\n"); - return -1; + /* No data to return. */ + if (regf_data(cache_file, rdev) < 0) { + printk(BIOS_ERR, "MRC: no data in '%s'\n", name); + return fail_bad_data ? -1 : 0; } - /* Clear alignment padding bytes at end of data. */ - memset(&cache->data[size], 0, cbmem_size - size - sizeof(*cache)); - - printk(BIOS_DEBUG, "MRC: Relocate data from %p to %p (%zu bytes)\n", - data, cache, size); + /* Validate header and resize region to reflect actual usage on the + * saved medium (including metadata and data). */ + if (mrc_header_valid(rdev, md) < 0) { + printk(BIOS_ERR, "MRC: invalid header in '%s'\n", name); + return fail_bad_data ? -1 : 0; + } - mrc_cache_fill(cache, data, size, version); + /* Validate Data */ + if (mrc_data_valid(rdev, md) < 0) { + printk(BIOS_ERR, "MRC: invalid data in '%s'\n", name); + return fail_bad_data ? -1 : 0; + } return 0; } -int mrc_cache_stash_data_with_version(const void *data, size_t size, - uint32_t version) +int mrc_cache_get_current(int type, uint32_t version, + struct region_device *rdev) { - return _mrc_stash_data(data, size, version, CBMEM_ID_MRCDATA); -} + const struct cache_region *cr; + struct region region; + struct region_device read_rdev; + struct regf cache_file; + struct mrc_metadata md; + size_t data_size; + const size_t md_size = sizeof(md); + const bool fail_bad_data = true; + + cr = lookup_region(&region, type); + + if (cr == NULL) + return -1; -int mrc_cache_stash_vardata(const void *data, size_t size, uint32_t version) -{ - return _mrc_stash_data(data, size, version, CBMEM_ID_VAR_MRCDATA); -} + if (boot_device_ro_subregion(&region, &read_rdev) < 0) + return -1; + if (mrc_cache_latest(cr->name, &read_rdev, &md, &cache_file, rdev, + fail_bad_data) < 0) + return -1; -int mrc_cache_stash_data(const void *data, size_t size) -{ - return mrc_cache_stash_data_with_version(data, size, 0); + if (version != md.version) { + printk(BIOS_INFO, "MRC: version mismatch: %x vs %x\n", + md.version, version); + return -1; + } + + /* Re-size rdev to only contain the data. i.e. remove metadata. */ + data_size = region_device_sz(rdev) - md_size; + return rdev_chain(rdev, rdev, md_size, data_size); } -static int mrc_slot_valid(const struct mrc_data_region *region, - const struct mrc_saved_data *slot, - const struct mrc_saved_data *to_save) +static bool mrc_cache_needs_update(const struct region_device *rdev, + const struct cbmem_entry *to_be_updated) { - uintptr_t region_begin; - uintptr_t region_end; - uintptr_t slot_end; - uintptr_t slot_begin; - uint32_t size; - - region_begin = (uintptr_t)region->base; - region_end = region_begin + region->size; - slot_begin = (uintptr_t)slot; - size = to_save->size + sizeof(*to_save); - slot_end = slot_begin + size; - - if (slot_begin < region_begin || slot_begin >= region_end) - return 0; - - if (size > region->size) - return 0; - - if (slot_end > region_end || slot_end < region_begin) - return 0; + void *mapping; + size_t size = region_device_sz(rdev); + bool need_update = false; - if (!nvm_is_erased(slot, size)) - return 0; + if (cbmem_entry_size(to_be_updated) != size) + return true; - return 1; -} + mapping = rdev_mmap_full(rdev); -static const struct mrc_saved_data * -mrc_cache_next_slot(const struct mrc_data_region *region, - const struct mrc_saved_data *current_slot) -{ - const struct mrc_saved_data *next_slot; + if (memcmp(cbmem_entry_start(to_be_updated), mapping, size)) + need_update = true; - if (current_slot == NULL) { - next_slot = region->base; - } else { - next_slot = next_cache_block(current_slot); - } + rdev_munmap(rdev, mapping); - return next_slot; + return need_update; } static void log_event_cache_update(uint8_t slot, enum result res) @@ -363,9 +356,7 @@ static void log_event_cache_update(uint8_t slot, enum result res) /* Filter through interesting events only */ switch (res) { - case WRITE_FAILURE: /* fall-through */ - case ERASE_FAILURE: /* fall-through */ - case OTHER_FAILURE: /* fall-through */ + case UPDATE_FAILURE: event.status = ELOG_MEM_CACHE_UPDATE_STATUS_FAIL; break; case UPDATE_SUCCESS: @@ -379,63 +370,94 @@ static void log_event_cache_update(uint8_t slot, enum result res) printk(BIOS_ERR, "Failed to log mem cache update event.\n"); } -static int update_mrc_cache_type(uint32_t cbmem_id, const char *region_name) +/* During ramstage this code purposefully uses incoherent transactions between + * read and write. The read assumes a memory-mapped boot device that can be used + * to quickly locate and compare the up-to-date data. However, when an update + * is required it uses the writeable region access to perform the update. */ +static void update_mrc_cache_by_type(int type) { - const struct mrc_saved_data *current_boot; - const struct mrc_saved_data *current_saved; - const struct mrc_saved_data *next_slot; - struct mrc_data_region region; - int res; + const struct cache_region *cr; + struct region region; + struct region_device read_rdev; + struct region_device write_rdev; + struct regf cache_file; + struct mrc_metadata md; + const struct cbmem_entry *to_be_updated; + struct incoherent_rdev backing_irdev; + const struct region_device *backing_rdev; + struct region_device latest_rdev; + const bool fail_bad_data = false; + + cr = lookup_region(&region, type); + + if (cr == NULL) + return; - printk(BIOS_DEBUG, "MRC: Updating cache data.\n"); + to_be_updated = cbmem_entry_find(cr->cbmem_id); + if (to_be_updated == NULL) { + printk(BIOS_ERR, "MRC: No data in cbmem for '%s'.\n", + cr->name); + return; + } - printk(BIOS_ERR, "MRC: Cache region selected - %s\n", region_name); + printk(BIOS_DEBUG, "MRC: Checking cached data update for '%s'.\n", + cr->name); - if (mrc_cache_get_region(region_name, &region)) { - printk(BIOS_ERR, "MRC: Could not obtain cache region.\n"); - return OTHER_FAILURE; - } + if (boot_device_ro_subregion(&region, &read_rdev) < 0) + return; - current_boot = cbmem_find(cbmem_id); - if (!current_boot) { - printk(BIOS_ERR, "MRC: No cache in cbmem.\n"); - return OTHER_FAILURE; - } + if (boot_device_rw_subregion(&region, &write_rdev) < 0) + return; + + backing_rdev = incoherent_rdev_init(&backing_irdev, &region, &read_rdev, + &write_rdev); + + if (backing_rdev == NULL) + return; + + if (mrc_cache_latest(cr->name, backing_rdev, &md, &cache_file, + &latest_rdev, fail_bad_data) < 0) + return; - if (!mrc_cache_valid(&region, current_boot)) { - printk(BIOS_ERR, "MRC: Cache data in cbmem invalid.\n"); - return OTHER_FAILURE; + if (!mrc_cache_needs_update(&latest_rdev, to_be_updated)) { + log_event_cache_update(cr->elog_slot, ALREADY_UPTODATE); + return; } - current_saved = NULL; + printk(BIOS_DEBUG, "MRC: cache data '%s' needs update.\n", cr->name); - if (!__mrc_cache_get_current(&region, &current_saved, - current_boot->version)) { - if (current_saved->size == current_boot->size && - !memcmp(&current_saved->data[0], &current_boot->data[0], - current_saved->size)) { - printk(BIOS_DEBUG, "MRC: Cache up to date.\n"); - return ALREADY_UPTODATE; - } + if (regf_update_data(&cache_file, cbmem_entry_start(to_be_updated), + cbmem_entry_size(to_be_updated)) < 0) + log_event_cache_update(cr->elog_slot, UPDATE_FAILURE); + else + log_event_cache_update(cr->elog_slot, UPDATE_SUCCESS); +} + +/* Protect mrc region with a Protected Range Register */ +static int protect_mrc_cache(const char *name) +{ + struct region region; + + if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + return 0; + + if (lookup_region_by_name(name, &region) < 0) { + printk(BIOS_ERR, "MRC: Could not find region '%s'\n", name); + return -1; } - next_slot = mrc_cache_next_slot(&region, current_saved); - - if (!mrc_slot_valid(&region, next_slot, current_boot)) { - printk(BIOS_DEBUG, "MRC: Slot @ %p is invalid.\n", next_slot); - if (!nvm_is_erased(region.base, region.size)) { - if (nvm_erase(region.base, region.size) < 0) { - printk(BIOS_DEBUG, "MRC: Failure erasing " - "region %s.\n", region_name); - return ERASE_FAILURE; - } - } - next_slot = region.base; + if (nvm_is_write_protected() <= 0) { + printk(BIOS_INFO, "MRC: NOT enabling PRR for '%s'.\n", name); + return 0; } - res = nvm_write((void *)next_slot, current_boot, current_boot->size - + sizeof(*current_boot)); - return res < 0 ? WRITE_FAILURE : UPDATE_SUCCESS; + if (nvm_protect(&region) < 0) { + printk(BIOS_ERR, "MRC: ERROR setting PRR for '%s'.\n", name); + return -1; + } + + printk(BIOS_INFO, "MRC: Enabled Protected Range on '%s'.\n", name); + return 0; } static void protect_mrc_region(void) @@ -459,30 +481,10 @@ static void protect_mrc_region(void) static void update_mrc_cache(void *unused) { - uint8_t slot; - const char *region_name; - enum result res; - - /* First update either recovery or default cache */ - if (vboot_recovery_mode_enabled() && - IS_ENABLED(CONFIG_HAS_RECOVERY_MRC_CACHE)) { - region_name = RECOVERY_MRC_CACHE; - slot = ELOG_MEM_CACHE_UPDATE_SLOT_RECOVERY; - } else { - region_name = DEFAULT_MRC_CACHE; - slot = ELOG_MEM_CACHE_UPDATE_SLOT_NORMAL; - } - - res = update_mrc_cache_type(CBMEM_ID_MRCDATA, region_name); - log_event_cache_update(slot, res); + update_mrc_cache_by_type(MRC_TRAINING_DATA); - /* Next update variable cache if in use */ - if (IS_ENABLED(CONFIG_MRC_SETTINGS_VARIABLE_DATA)) { - res = update_mrc_cache_type(CBMEM_ID_VAR_MRCDATA, - VARIABLE_MRC_CACHE); - log_event_cache_update(ELOG_MEM_CACHE_UPDATE_SLOT_VARIABLE, - res); - } + if (IS_ENABLED(CONFIG_MRC_SETTINGS_VARIABLE_DATA)) + update_mrc_cache_by_type(MRC_VARIABLE_DATA); protect_mrc_region(); } diff --git a/src/soc/intel/common/mrc_cache.h b/src/soc/intel/common/mrc_cache.h index 6414acc..4511fc3 100644 --- a/src/soc/intel/common/mrc_cache.h +++ b/src/soc/intel/common/mrc_cache.h @@ -19,34 +19,25 @@ #include <stddef.h> #include <stdint.h> -#define DEFAULT_MRC_CACHE "RW_MRC_CACHE" -#define VARIABLE_MRC_CACHE "RW_VAR_MRC_CACHE" -#define RECOVERY_MRC_CACHE "RECOVERY_MRC_CACHE" -#define UNIFIED_MRC_CACHE "UNIFIED_MRC_CACHE" +enum { + MRC_TRAINING_DATA, + MRC_VARIABLE_DATA, +}; -/* Wrapper object to save MRC information. */ -struct mrc_saved_data { - uint32_t signature; - uint32_t size; - uint32_t checksum; - uint32_t version; - uint8_t data[0]; -} __attribute__((packed)); - -/* Locate the most recently saved MRC data. */ -int mrc_cache_get_current(const struct mrc_saved_data **cache); -int mrc_cache_get_current_with_version(const struct mrc_saved_data **cache, - uint32_t version); -int mrc_cache_get_vardata(const struct mrc_saved_data **cache, - uint32_t version); -int mrc_cache_get_current_from_region(const struct mrc_saved_data **cache, - uint32_t version, - const char *region_name); +/* + * It's up to the caller to decide when to retrieve and stash data. There is + * differentiation on recovery mode CONFIG_HAS_RECOVERY_MRC_CACHE, but that's + * only for locating where to retrieve and save the data. If a platform doesn't + * want to update the data then it shouldn't stash the data for saving. + * Similarly, if the platform doesn't need the data for booting because of a + * policy don't request the data. + */ -/* Stash the resulting MRC data to be saved in non-volatile storage later. */ -int mrc_cache_stash_data(const void *data, size_t size); -int mrc_cache_stash_data_with_version(const void *data, size_t size, - uint32_t version); -int mrc_cache_stash_vardata(const void *data, size_t size, uint32_t version); +/* Get and stash data for saving provided the type passed in. The functions + * return < 0 on error, 0 on success. */ +int mrc_cache_get_current(int type, uint32_t version, + struct region_device *rdev); +int mrc_cache_stash_data(int type, uint32_t version, const void *data, + size_t size); #endif /* _COMMON_MRC_CACHE_H_ */ diff --git a/src/soc/intel/common/nvm.c b/src/soc/intel/common/nvm.c index 99a1fbf..b7e0f4e 100644 --- a/src/soc/intel/common/nvm.c +++ b/src/soc/intel/common/nvm.c @@ -24,113 +24,43 @@ #include "nvm.h" #include "spi_flash.h" -/* This module assumes the flash is memory mapped just below 4GiB in the - * address space for reading. Also this module assumes an area it erased - * when all bytes read as all 0xff's. */ - -static struct spi_flash *flash; - -static int nvm_init(void) +/* Read flash status register to determine if write protect is active */ +int nvm_is_write_protected(void) { - if (flash != NULL) - return 0; + u8 sr1; + u8 wp_gpio; + u8 wp_spi; - spi_init(); - flash = spi_flash_probe(0, 0); - if (!flash) { - printk(BIOS_DEBUG, "Could not find SPI device\n"); - return -1; - } - - return 0; -} + if (!IS_ENABLED(CONFIG_CHROMEOS)) + return 0; -/* - * Convert memory mapped pointer to flash offset. - * - * This is weak because not every platforms memory-maps the NVM media in the - * same manner. This is a stop-gap solution. - * - * The root of the problem is that users of this API work in memory space for - * both reads and writes, but erase and write must be done in flash space. This - * also only works when the media is memory-mapped, which is no longer - * universally true. The long-term approach should be to rewrite this and its - * users to work in flash space, while using rdev_read() instead of rdev_mmap(). - */ -__attribute__((weak)) -uint32_t nvm_mmio_to_flash_offset(void *p) -{ - return CONFIG_ROM_SIZE + (uintptr_t)p; -} + if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) + return 0; -int nvm_is_erased(const void *start, size_t size) -{ - const uint8_t *cur = start; - const uint8_t erased_value = 0xff; + /* Read Write Protect GPIO if available */ + wp_gpio = get_write_protect_state(); - while (size > 0) { - if (*cur != erased_value) - return 0; - cur++; - size--; + /* Read Status Register 1 */ + if (spi_flash_status(boot_device_spi_flash(), &sr1) < 0) { + printk(BIOS_ERR, "Failed to read SPI status register 1\n"); + return -1; } - return 1; -} + wp_spi = !!(sr1 & 0x80); -int nvm_erase(void *start, size_t size) -{ - if (nvm_init() < 0) - return -1; - return spi_flash_erase(flash, nvm_mmio_to_flash_offset(start), size); -} + printk(BIOS_DEBUG, "SPI flash protection: WPSW=%d SRP0=%d\n", + wp_gpio, wp_spi); -/* Write data to NVM. Returns 0 on success < 0 on error. */ -int nvm_write(void *start, const void *data, size_t size) -{ - if (nvm_init() < 0) - return -1; - return spi_flash_write(flash, nvm_mmio_to_flash_offset(start), size, - data); + return wp_gpio && wp_spi; } -/* Read flash status register to determine if write protect is active */ -int nvm_is_write_protected(void) +/* Apply protection to a range of flash */ +int nvm_protect(const struct region *r) { - if (nvm_init() < 0) - return -1; - - if (IS_ENABLED(CONFIG_CHROMEOS)) { - u8 sr1; - u8 wp_gpio; - u8 wp_spi; - - /* Read Write Protect GPIO if available */ - wp_gpio = get_write_protect_state(); - - /* Read Status Register 1 */ - if (spi_flash_status(flash, &sr1) < 0) { - printk(BIOS_ERR, - "Failed to read SPI status register 1\n"); - return -1; - } - wp_spi = !!(sr1 & 0x80); - - printk(BIOS_DEBUG, "SPI flash protection: WPSW=%d SRP0=%d\n", - wp_gpio, wp_spi); + if (!IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT)) + return 0; - return wp_gpio && wp_spi; - } - return 0; -} + if (!IS_ENABLED(CONFIG_BOOT_DEVICE_SPI_FLASH)) + return 0; -/* Apply protection to a range of flash */ -int nvm_protect(void *start, size_t size) -{ -#if IS_ENABLED(CONFIG_MRC_SETTINGS_PROTECT) - if (nvm_init() < 0) - return -1; - return spi_flash_protect(nvm_mmio_to_flash_offset(start), size); -#else - return -1; -#endif + return spi_flash_protect(region_offset(r), region_sz(r)); } diff --git a/src/soc/intel/common/nvm.h b/src/soc/intel/common/nvm.h index 074a2ce..1e32ed8 100644 --- a/src/soc/intel/common/nvm.h +++ b/src/soc/intel/common/nvm.h @@ -16,24 +16,12 @@ #ifndef _COMMON_NVM_H_ #define _COMMON_NVM_H_ -#include <stddef.h> - -/* Determine if area is erased. returns 1 if erased. 0 otherwise. */ -int nvm_is_erased(const void *start, size_t size); - -/* Erase region according to start and size. Returns < 0 on error else 0. */ -int nvm_erase(void *start, size_t size); - -/* Write data to NVM. Returns 0 on success < 0 on error. */ -int nvm_write(void *start, const void *data, size_t size); +#include <commonlib/region.h> /* Determine if flash device is write protected */ int nvm_is_write_protected(void); /* Apply protection to a range of flash */ -int nvm_protect(void *start, size_t size); - -/* Map MMIO address to actual address in flash */ -uint32_t nvm_mmio_to_flash_offset(void *p); +int nvm_protect(const struct region *region); #endif /* _COMMON_NVM_H_ */

1 0

New patch to review for coreboot: commonlib: provide incoherent region device
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17716 -gerrit commit d5260b5a8d463983472da9de6355cbada80a49bd Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 17:08:08 2016 -0600 commonlib: provide incoherent region device The MRC cache uses an incoherent mechanism for updating the cache contents in that it assumes memory mapped boot device access for checking against latest data for update. However, it uses another driver for updating the underlying storage area. In order to aid in moving the MRC cache over to using region_devices for updates provide an implementation of a region_device which performs reads and writes to different region_devices so that different drivers can be used transparently. BUG=chrome-os-partner:56151 Change-Id: I30e858245c30cbccd6313aff5ebecd3fd98d7302 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/commonlib/include/commonlib/region.h | 23 ++++++++++ src/commonlib/region.c | 79 ++++++++++++++++++++++++++++++++ 2 files changed, 102 insertions(+) diff --git a/src/commonlib/include/commonlib/region.h b/src/commonlib/include/commonlib/region.h index bc3ded1..6b6116f 100644 --- a/src/commonlib/include/commonlib/region.h +++ b/src/commonlib/include/commonlib/region.h @@ -245,4 +245,27 @@ void xlate_region_device_rw_init(struct xlate_region_device *xdev, size_t sub_offset, size_t sub_size, size_t parent_size); +/* This type can be used for incoherent access where the read and write + * operations are backed by separate drivers. An example is x86 systems + * with memory mapped media for reading but use a spi flash driver for + * writing. One needs to ensure using this object is appropriate in context. */ +struct incoherent_rdev { + struct region_device rdev; + const struct region_device *read; + const struct region_device *write; +}; + +/* Initialize an incoherent_rdev based on the region as well as the read and + * write rdevs. The read and write rdevs should match in size to the passed + * in region. If not the initialization will fail returning NULL. Otherwise + * the function will return a pointer to the containing region_device to + * be used for region operations. Therefore, the lifetime of the returned + * pointer matches the lifetime of the incoherent_rdev object. Likewise, + * the lifetime of the read and write rdev need to match the lifetime of + * the incoherent_rdev object. */ +const struct region_device *incoherent_rdev_init(struct incoherent_rdev *irdev, + const struct region *r, + const struct region_device *read, + const struct region_device *write); + #endif /* _REGION_H_ */ diff --git a/src/commonlib/region.c b/src/commonlib/region.c index ac0faf1..ae03f77 100644 --- a/src/commonlib/region.c +++ b/src/commonlib/region.c @@ -437,3 +437,82 @@ const struct region_device_ops xlate_rdev_rw_ops = { .writeat = xlate_writeat, .eraseat = xlate_eraseat, }; + + +static void *incoherent_mmap(const struct region_device *rd, size_t offset, + size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_mmap(irdev->read, offset, size); +} + +static int incoherent_munmap(const struct region_device *rd, void *mapping) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_munmap(irdev->read, mapping); +} + +static ssize_t incoherent_readat(const struct region_device *rd, void *b, + size_t offset, size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_readat(irdev->read, b, offset, size); +} + +static ssize_t incoherent_writeat(const struct region_device *rd, const void *b, + size_t offset, size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_writeat(irdev->write, b, offset, size); +} + +static ssize_t incoherent_eraseat(const struct region_device *rd, size_t offset, + size_t size) +{ + const struct incoherent_rdev *irdev; + + irdev = container_of(rd, const struct incoherent_rdev, rdev); + + return rdev_eraseat(irdev->write, offset, size); +} + +static const struct region_device_ops incoherent_rdev_ops = { + .mmap = incoherent_mmap, + .munmap = incoherent_munmap, + .readat = incoherent_readat, + .writeat = incoherent_writeat, + .eraseat = incoherent_eraseat, +}; + +const struct region_device *incoherent_rdev_init(struct incoherent_rdev *irdev, + const struct region *r, + const struct region_device *read, + const struct region_device *write) +{ + const size_t size = region_sz(r); + + if (size != region_device_sz(read) || size != region_device_sz(write)) + return NULL; + + /* The region is represented as offset 0 to size. That way, the generic + * rdev operations can be called on the read or write implementation + * without any unnecessary translation because the offsets all start + * at 0. */ + region_device_init(&irdev->rdev, &incoherent_rdev_ops, 0, size); + irdev->read = read; + irdev->write = write; + + return &irdev->rdev; +}

1 0

New patch to review for coreboot: drivers/spi: provide a mechanism to obtain the SPI flash boot device
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17715 -gerrit commit adc6af11a45601c10210a4956c37936080a2372a Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 17:04:06 2016 -0600 drivers/spi: provide a mechanism to obtain the SPI flash boot device The MRC cache wants to be able to access the SPI flash boot device. Allow an easy way to provide that so that there isn't duplicate spi_flash objects representing the same device. BUG=chrome-os-partner:56151 Change-Id: Iba92e8bb8a6060cdd327b10f5f8ec23ac61101e7 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/spi/boot_device_rw_nommap.c | 6 ++++++ src/include/spi_flash.h | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/src/drivers/spi/boot_device_rw_nommap.c b/src/drivers/spi/boot_device_rw_nommap.c index a52a7be..e7d9b9a 100644 --- a/src/drivers/spi/boot_device_rw_nommap.c +++ b/src/drivers/spi/boot_device_rw_nommap.c @@ -95,3 +95,9 @@ const struct region_device *boot_device_rw(void) return &spi_rw; } + +const struct spi_flash *boot_device_spi_flash(void) +{ + boot_device_rw_init(); + return car_get_var(sfg); +} diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 8fec484..95b8251 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -87,4 +87,8 @@ int spi_flash_volatile_group_end(const struct spi_flash *flash); int chipset_volatile_group_begin(const struct spi_flash *flash); int chipset_volatile_group_end(const struct spi_flash *flash); +/* Return spi_flash object reference for the boot device. This is only valid + * if CONFIG_BOOT_DEVICE_SPI_FLASH is enabled. */ +const struct spi_flash *boot_device_spi_flash(void); + #endif /* _SPI_FLASH_H_ */

1 0

New patch to review for coreboot: lib/compute_ip_checksum: mark data buffer as const
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17714 -gerrit commit f8efb13093bd4ab2cd2aebf39c8394647317b59b Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 21:05:53 2016 -0600 lib/compute_ip_checksum: mark data buffer as const compute_ip_checksum() doesn't manipulate the data it is passed. Therefore, mark it as const. BUG=chrome-os-partner:56151 Change-Id: I54cff9695a886bacd6314aa441d96aaa7a991101 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/ip_checksum.h | 2 +- src/lib/compute_ip_checksum.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/include/ip_checksum.h b/src/include/ip_checksum.h index a1e0ffa..f6ef560 100644 --- a/src/include/ip_checksum.h +++ b/src/include/ip_checksum.h @@ -1,5 +1,5 @@ #ifndef IP_CHECKSUM_H #define IP_CHECKSUM_H -unsigned long compute_ip_checksum(void *addr, unsigned long length); +unsigned long compute_ip_checksum(const void *addr, unsigned long length); unsigned long add_ip_checksums(unsigned long offset, unsigned long sum, unsigned long new); #endif /* IP_CHECKSUM_H */ diff --git a/src/lib/compute_ip_checksum.c b/src/lib/compute_ip_checksum.c index 58a6bf1..347b83f 100644 --- a/src/lib/compute_ip_checksum.c +++ b/src/lib/compute_ip_checksum.c @@ -1,9 +1,9 @@ #include <stdint.h> #include <ip_checksum.h> -unsigned long compute_ip_checksum(void *addr, unsigned long length) +unsigned long compute_ip_checksum(const void *addr, unsigned long length) { - uint8_t *ptr; + const uint8_t *ptr; volatile union { uint8_t byte[2]; uint16_t word;

1 0

New patch to review for coreboot: lib: add region file support
by Aaron Durbin 04 Dec '16

04 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17713 -gerrit commit 39fe9e5c19fe0f542a65c6301a534f306c8a4f5e Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Nov 19 12:36:09 2016 -0600 lib: add region file support The region file library is added to provide the underpinnings for other libraries that support appending updates when the data changes. The most recent written data is deemed the latest data associated with that "file". A good example is the MRC cache which in a follow up patch utilizes this library. BUG=chrome-os-partner:56151 Change-Id: Ic3caf1edbb6f11dbbe27181a87b7b19d1224fffa Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/region_file.h | 56 ++++++ src/lib/Makefile.inc | 2 + src/lib/region_file.c | 470 ++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 528 insertions(+) diff --git a/src/include/region_file.h b/src/include/region_file.h new file mode 100644 index 0000000..6341b00 --- /dev/null +++ b/src/include/region_file.h @@ -0,0 +1,56 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef REGION_FILE_H +#define REGION_FILE_H + +#include <commonlib/region.h> +#include <stdint.h> + +/* A region file is an abstraction to allow appending updates in a + * region_device where the data returned is the most recently data + * written. It is block based so if you write 2 bytes the data + * region_device could be 16 bytes. */ + +struct regf; + +/* + * Initialize a region file associated with a provided region device. + * Returns < 0 on error, 0 on success. + */ +int regf_init(const struct region_device *p, struct regf *f); + +/* + * Fill in region device associated with latest update of file data. + * Returns < 0 on error, 0 on success. + */ +int regf_data(const struct regf *f, struct region_device *rdev); + +/* Update region file with latest data. Returns < 0 on error, 0 on success. */ +int regf_update_data(struct regf *f, const void *buf, size_t size); + +/* Declared here for easy object allocation. */ +struct regf { + /* Region device covering file */ + struct region_device rdev; + /* Metadata containg blocks of the data stream. */ + struct region_device metadata; + /* Blocks forming data. */ + uint16_t data_blocks[2]; + /* Current slot in metadata marking end of data. */ + int slot; +}; + +#endif /* REGION_FILE_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 55d19d0..2d5aa57 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -87,6 +87,8 @@ romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c +ramstage-y += region_file.c +romstage-y += region_file.c ramstage-y += romstage_handoff.c romstage-y += romstage_handoff.c romstage-y += romstage_stack.c diff --git a/src/lib/region_file.c b/src/lib/region_file.c new file mode 100644 index 0000000..50f4412 --- /dev/null +++ b/src/lib/region_file.c @@ -0,0 +1,470 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <commonlib/helpers.h> +#include <console/console.h> +#include <region_file.h> +#include <string.h> + +/* + * A region file provides generic support for appending new data + * within a storage region. The book keeping is tracked in metadata + * blocks where an offset pointer points to the last byte of a newly + * allocated byte sequence. Thus, by taking 2 block offets one can + * determine start and size of the latest update. The data does not + * have to be the same consistent size, but the data size has be small + * enough to fit a metadata block and one data write within the region. + * + * The granularity of the block offsets are 16 bytes. By using 16-bit + * block offsets a region's total size can be no larger than 1MiB. + * However, the last 32 bytes cannot be used in the 1MiB maximum region + * because one needs to put a block offset indicating last byte written. + * An unused block offset is the value 0xffff or 0xffff0 bytes. The last + * block offset that can be written is 0xfffe or 0xfffe0 byte offset. + * + * The goal of this library is to provide a simple mechanism for + * allocating blocks of data for updates. The metadata is written first + * followed by the data. That means a power event between the block offset + * write and the data write results in blocks being allocated but not + * entirely written. It's up to the user of the library to sanity check + * data stored. + */ + +#define REGF_BLOCK_SHIFT 4 +#define REGF_BLOCK_GRANULARITY (1 << REGF_BLOCK_SHIFT) +#define REGF_METADATA_BLOCK_SIZE REGF_BLOCK_GRANULARITY +#define REGF_UNALLOCATED_BLOCK 0xffff +#define REGF_UPDATES_PER_METADATA_BLOCK \ + (REGF_METADATA_BLOCK_SIZE / sizeof(uint16_t)) + +enum { + RF_ONLY_METADATA = 0, + RF_EMPTY = -1, + RF_NEED_TO_EMPTY = -2, + RF_FATAL = -3, +}; + +struct metadata_block { + uint16_t blocks[REGF_UPDATES_PER_METADATA_BLOCK]; +}; + +static size_t block_to_bytes(uint16_t offset) +{ + return (size_t)offset << REGF_BLOCK_SHIFT; +} + +static size_t bytes_to_block(size_t bytes) +{ + return bytes >> REGF_BLOCK_SHIFT; +} + +static inline int block_offset_unallocated(uint16_t offset) +{ + return offset == REGF_UNALLOCATED_BLOCK; +} + +static inline size_t regf_data_begin(const struct regf *f) +{ + return f->data_blocks[0]; +} + +static inline size_t regf_data_end(const struct regf *f) +{ + return f->data_blocks[1]; +} + +static int all_block_offsets_unallocated(const struct metadata_block *mb) +{ + size_t i; + + for (i = 0; i < ARRAY_SIZE(mb->blocks); i++) + if (!block_offset_unallocated(mb->blocks[i])) + return 0; + + return 1; +} + +/* Read metadata block at block i. */ +static int read_mb(size_t i, struct metadata_block *mb, const struct regf *f) +{ + size_t offset = block_to_bytes(i); + + if (rdev_readat(&f->metadata, mb, offset, sizeof(*mb)) < 0) + return -1; + + return 0; +} + +/* Locate metadata block with the latest update */ +static int find_latest_mb(struct metadata_block *mb, size_t num_mb_blocks, + struct regf *f) +{ + size_t l = 0; + size_t r = num_mb_blocks; + + while (l + 1 < r) { + size_t mid = (l + r) / 2; + + if (read_mb(mid, mb, f) < 0) + return -1; + if (all_block_offsets_unallocated(mb)) + r = mid; + else + l = mid; + } + + /* Set the base block slot. */ + f->slot = l * REGF_UPDATES_PER_METADATA_BLOCK; + + /* Re-read metadata block with the latest update. */ + if (read_mb(l, mb, f) < 0) + return -1; + + return 0; +} + +static void find_latest_slot(struct metadata_block *mb, struct regf *f) +{ + size_t i; + + for (i = REGF_UPDATES_PER_METADATA_BLOCK - 1; i > 0; i--) { + if (!block_offset_unallocated(mb->blocks[i])) + break; + } + + f->slot += i; +} + +static int fill_data_boundaries(struct regf *f) +{ + struct region_device slots; + size_t offset; + size_t size = sizeof(f->data_blocks); + + if (f->slot == RF_ONLY_METADATA) { + size_t start = bytes_to_block(region_device_sz(&f->metadata)); + f->data_blocks[0] = start; + f->data_blocks[1] = start; + return 0; + } + + /* Sanity check the 2 slot sequence to read. If it's out of the + * metadata blocks' bounds then one needs to empty. This is done + * to uniquely identify I/O vs data errors in the readat() below. */ + offset = (f->slot - 1) * sizeof(f->data_blocks[0]); + if (rdev_chain(&slots, &f->metadata, offset, size)) { + f->slot = RF_NEED_TO_EMPTY; + return 0; + } + + if (rdev_readat(&slots, &f->data_blocks, 0, size) < 0) { + printk(BIOS_ERR, "REGF failed to read data boundaries.\n"); + return -1; + } + + /* All used blocks should be incrementing from previous write. */ + if (regf_data_begin(f) >= regf_data_end(f)) { + printk(BIOS_ERR, "REGF data boundaries wrong. [%zd,%zd) Need to empty.\n", + regf_data_begin(f), regf_data_end(f)); + f->slot = RF_NEED_TO_EMPTY; + return 0; + } + + /* Ensure data doesn't exceed the region. */ + if (regf_data_end(f) > bytes_to_block(region_device_sz(&f->rdev))) { + printk(BIOS_ERR, "REGF data exceeds region %zd > %zd\n", + regf_data_end(f), + bytes_to_block(region_device_sz(&f->rdev))); + f->slot = RF_NEED_TO_EMPTY; + } + + return 0; +} + +int regf_init(const struct region_device *p, struct regf *f) +{ + struct metadata_block mb; + + /* Total number of metadata blocks is found by reading the first + * block offset as the metadata is allocated first. At least one + * metadata block is available. */ + + memset(f, 0, sizeof(*f)); + f->slot = RF_FATAL; + + /* Keep parent around for accessing data later. */ + if (rdev_chain(&f->rdev, p, 0, region_device_sz(p))) + return -1; + + if (rdev_readat(p, &mb, 0, sizeof(mb)) < 0) { + printk(BIOS_ERR, "REGF fail reading first metadata block.\n"); + return -1; + } + + /* No metadata has been allocated. Assume region is empty. */ + if (block_offset_unallocated(mb.blocks[0])) { + f->slot = RF_EMPTY; + return 0; + } + + /* If metadata block is 0 in size then need to empty. */ + if (mb.blocks[0] == 0) { + f->slot = RF_NEED_TO_EMPTY; + return 0; + } + + /* The region needs to be emptied as the metadata is broken. */ + if (rdev_chain(&f->metadata, p, 0, block_to_bytes(mb.blocks[0]))) { + f->slot = RF_NEED_TO_EMPTY; + return 0; + } + + /* Locate latest metadata block with latest update. */ + if (find_latest_mb(&mb, mb.blocks[0], f)) { + printk(BIOS_ERR, "REGF fail locating latest metadata block.\n"); + f->slot = RF_FATAL; + return -1; + } + + find_latest_slot(&mb, f); + + /* Fill in the data blocks marking the latest upate. */ + if (fill_data_boundaries(f)) { + printk(BIOS_ERR, "REGF fail locating data boundaries.\n"); + f->slot = RF_FATAL; + return -1; + } + + return 0; +} + +int regf_data(const struct regf *f, struct region_device *rdev) +{ + + size_t offset; + size_t size; + + /* Slot indicates if any data is available. */ + if (f->slot <= RF_ONLY_METADATA) + return -1; + + offset = block_to_bytes(regf_data_begin(f)); + size = block_to_bytes(regf_data_end(f)) - offset; + + return rdev_chain(rdev, &f->rdev, offset, size); +} + +/* + * Allocate enough metadata blocks to maximize data updates. Do this in + * terms of blocks. To solve the balance of metadata vs data, 2 linear + * equations are solved in terms of blocks where 'x' is number of + * data updates and 'y' is number of metadata blocks: + * + * x = number of data updates + * y = number of metadata blocks + * T = total blocks in region + * D = data size in blocks + * M = metadata size in blocks + * A = updates accounted for in each metadata block + * + * T = D * x + M * y + * y = x / A + * ----------------- + * T = D * x + M * x / A = x * (D + M / A) + * T * A = x * (D * A + M) + * x = T * A / (D * A + M) + */ +static int allocate_metadata(struct regf *f, size_t data_blks) +{ + size_t t, m; + size_t x, y; + uint16_t tot_metadata; + const size_t a = REGF_UPDATES_PER_METADATA_BLOCK; + const size_t d = data_blks; + + t = bytes_to_block(ALIGN_DOWN(region_device_sz(&f->rdev), + REGF_BLOCK_GRANULARITY)); + m = bytes_to_block(ALIGN_UP(REGF_METADATA_BLOCK_SIZE, + REGF_BLOCK_GRANULARITY)); + + /* Ensure at least one data update can fit with 1 metadata block + * within the region. */ + if (d > t - m) + return -1; + + /* Maximize number of updates by aligning up to the number updates in + * a metadata block. May not really be able to achieve the number of + * updates in practice, but it ensures enough metata blocks are + * allocated. */ + x = ALIGN_UP(t * a / (d * a + m), a); + + /* One data block has to fit. */ + if (x == 0) + x = 1; + + /* Now calculate how many metadata blocks are needed. */ + y = ALIGN_UP(x, a) / a; + + /* Need to commit the metadata allocation. */ + tot_metadata = m * y; + if (rdev_writeat(&f->rdev, &tot_metadata, 0, sizeof(tot_metadata)) < 0) + return -1; + + if (rdev_chain(&f->metadata, &f->rdev, 0, + block_to_bytes(tot_metadata))) + return -1; + + /* Initialize a 0 data block to start appending from. */ + f->data_blocks[0] = tot_metadata; + f->data_blocks[1] = tot_metadata; + + return 0; +} + +static int update_can_fit(const struct regf *f, size_t data_blks) +{ + size_t metadata_slots; + size_t end_blk; + + metadata_slots = region_device_sz(&f->metadata) / sizeof(uint16_t); + + /* No more slots. */ + if ((size_t)f->slot + 1 >= metadata_slots) + return 0; + + /* See where the last block lies from the curent one. */ + end_blk = data_blks + regf_data_end(f); + + /* Update would have exceded block addressing. */ + if (end_blk >= REGF_UNALLOCATED_BLOCK) + return 0; + + /* End block exceeds size of region. */ + if (end_blk > bytes_to_block(region_device_sz(&f->rdev))) + return 0; + + return 1; +} + +static int commit_data_allocation(struct regf *f, size_t data_blks) +{ + size_t offset; + + f->slot++; + + offset = f->slot * sizeof(uint16_t); + f->data_blocks[0] = regf_data_end(f); + f->data_blocks[1] = regf_data_begin(f) + data_blks; + + if (rdev_writeat(&f->metadata, &f->data_blocks[1], offset, + sizeof(f->data_blocks[1])) < 0) + return -1; + + return 0; +} + +static int commit_data(const struct regf *f, const void *buf, size_t size) +{ + size_t offset = block_to_bytes(regf_data_begin(f)); + if (rdev_writeat(&f->rdev, buf, offset, size) < 0) + return -1; + return 0; +} + +static int handle_empty(struct regf *f, size_t data_blks) +{ + if (allocate_metadata(f, data_blks)) { + printk(BIOS_ERR, "REGF metadata allocation failed: %zd data blocks %zd total blocks\n", + data_blks, bytes_to_block(region_device_sz(&f->rdev))); + return -1; + } + + f->slot = RF_ONLY_METADATA; + + return 0; +} + +static int handle_need_to_empty(struct regf *f) +{ + if (rdev_eraseat(&f->rdev, 0, region_device_sz(&f->rdev)) < 0) { + printk(BIOS_ERR, "REGF empty failed.\n"); + return -1; + } + + f->slot = RF_EMPTY; + + return 0; +} + +static int handle_update(struct regf *f, size_t blocks, const void *buf, + size_t size) +{ + if (!update_can_fit(f, blocks)) { + printk(BIOS_INFO, "REGF update can't fit. Will empty.\n"); + f->slot = RF_NEED_TO_EMPTY; + return 0; + } + + if (commit_data_allocation(f, blocks)) { + printk(BIOS_ERR, "REGF failed to commit data allocation.\n"); + return -1; + } + + if (commit_data(f, buf, size)) { + printk(BIOS_ERR, "REGF failed to commit data.\n"); + return -1; + } + + return 0; +} + +int regf_update_data(struct regf *f, const void *buf, size_t size) +{ + int ret; + size_t blocks; + + blocks = bytes_to_block(ALIGN_UP(size, REGF_BLOCK_GRANULARITY)); + + while (1) { + int prev_slot = f->slot; + + switch (f->slot) { + case RF_EMPTY: + ret = handle_empty(f, blocks); + break; + case RF_NEED_TO_EMPTY: + ret = handle_need_to_empty(f); + break; + case RF_FATAL: + ret = -1; + break; + default: + ret = handle_update(f, blocks, buf, size); + break; + } + + /* Failing case. No more updates allowed to be attempted. */ + if (ret) { + f->slot = RF_FATAL; + break; + } + + /* No more state changes and data commited. */ + if (f->slot > RF_ONLY_METADATA && prev_slot != f->slot) + break; + } + + return ret; +}

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coreboot-gerrit December 2016