coreboot-gerrit November 2016

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Patch set updated for coreboot: lib: put romstage_handoff implementation in own compilation unit
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17648 -gerrit commit 63d00242505d19361d2cc403038d054ecdfd74b9 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 21:37:42 2016 -0600 lib: put romstage_handoff implementation in own compilation unit Instead of putting all the functions inline just put the current implementation into a C file. That way all the implementation innards are not exposed. Lastly, fix up the fall out of compilation units not including the headers they actually use. Change-Id: I01fd25d158c0d5016405b73a4d4df3721c281b04 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/intel/fsp1_1/romstage.c | 1 + src/include/romstage_handoff.h | 89 +--------------------------------- src/lib/Makefile.inc | 3 ++ src/lib/romstage_handoff.c | 95 +++++++++++++++++++++++++++++++++++++ src/mainboard/google/gru/romstage.c | 2 + 5 files changed, 103 insertions(+), 87 deletions(-) diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index b222082..bb3e96c 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -34,6 +34,7 @@ #include <smbios.h> #include <soc/intel/common/mrc_cache.h> #include <stage_cache.h> +#include <string.h> #include <timestamp.h> #include <tpm.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index b36ff9f..1a6bbf7 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -15,95 +15,10 @@ #ifndef ROMSTAGE_HANDOFF_H #define ROMSTAGE_HANDOFF_H -#include <stdint.h> -#include <string.h> -#include <cbmem.h> -#include <console/console.h> -#include <rules.h> - -/* It is the chipset's responsibility for maintaining the integrity of this - * structure in CBMEM. For instance, if chipset code adds this structure - * using the CBMEM_ID_ROMSTAGE_INFO id it needs to ensure it doesn't clobber - * fields it doesn't own. */ -struct romstage_handoff { - /* Indicate if the current boot is an S3 resume. If - * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is - * responsible for initializing this variable. Otherwise, ramstage - * will be re-loaded from cbfs (which can be slower since it lives - * in flash). */ - uint8_t s3_resume; - uint8_t reboot_required; - uint8_t reserved[2]; -}; - -static inline int cbmem_available(void) -{ - /* No cbmem available prior to ramstage on non-early cbmem platforms. */ - if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) - return 0; - - return 1; -} - -/* The romstage_handoff_find_or_add() function provides the necessary logic - * for initializing the romstage_handoff structure in cbmem. Different components - * of the romstage may be responsible for setting up different fields. Therefore - * that same logic flow should be used for allocating and initializing the - * structure. A newly allocated structure will be memset to 0. */ -static inline struct romstage_handoff *romstage_handoff_find_or_add(void) -{ - struct romstage_handoff *handoff; - - if (!cbmem_available()) - return NULL; - - /* cbmem_add() first does a find and uses the old location before the - * real add. However, it is important to know when the structure is not - * found so it can be initialized to 0. */ - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff) - return handoff; - - handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); - - if (handoff != NULL) - memset(handoff, 0, sizeof(*handoff)); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - - return handoff; -} - /* Returns 0 if initialized. Else < 0 if handoff structure not added. */ -static inline int romstage_handoff_init(int is_s3_resume) -{ - struct romstage_handoff *handoff; - - handoff = romstage_handoff_find_or_add(); - - if (handoff == NULL) - return -1; - - handoff->s3_resume = is_s3_resume; - - return 0; -} +int romstage_handoff_init(int is_s3_resume); /* Return 1 if resuming or 0 if not. */ -static inline int romstage_handoff_is_resume(void) -{ - struct romstage_handoff *handoff; - - if (!cbmem_available()) - return 0; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) - return 0; - - return handoff->s3_resume; -} +int romstage_handoff_is_resume(void); #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index ddade2b..4157091 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -87,6 +87,8 @@ romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c +ramstage-y += romstage_handoff.c +romstage-y += romstage_handoff.c romstage-y += romstage_stack.c ramstage-y += romstage_stack.c romstage-y += stack.c @@ -153,6 +155,7 @@ postcar-y += cbmem_common.c postcar-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c postcar-y += imd_cbmem.c postcar-y += imd.c +postcar-y += romstage_handoff.c bootblock-y += hexdump.c ramstage-y += hexdump.c diff --git a/src/lib/romstage_handoff.c b/src/lib/romstage_handoff.c new file mode 100644 index 0000000..ccabd8a --- /dev/null +++ b/src/lib/romstage_handoff.c @@ -0,0 +1,95 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> +#include <romstage_handoff.h> +#include <rules.h> + +struct romstage_handoff { + /* Indicate if the current boot is an S3 resume. If + * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is + * responsible for initializing this variable. Otherwise, ramstage + * will be re-loaded from cbfs (which can be slower since it lives + * in flash). */ + uint8_t s3_resume; + uint8_t reboot_required; + uint8_t reserved[2]; +}; + +static inline int cbmem_available(void) +{ + /* No cbmem available prior to ramstage on non-early cbmem platforms. */ + if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + return 0; + + return 1; +} + +static struct romstage_handoff *romstage_handoff_find_or_add(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return NULL; + + /* cbmem_add() first does a find and uses the old location before the + * real add. However, it is important to know when the structure is not + * found so it can be initialized to 0. */ + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff) + return handoff; + + handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); + + if (handoff != NULL) + memset(handoff, 0, sizeof(*handoff)); + else + printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + + return handoff; +} + +int romstage_handoff_init(int is_s3_resume) +{ + struct romstage_handoff *handoff; + + handoff = romstage_handoff_find_or_add(); + + if (handoff == NULL) + return -1; + + handoff->s3_resume = is_s3_resume; + + return 0; +} + +int romstage_handoff_is_resume(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return 0; + + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return 0; + + return handoff->s3_resume; +} diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c index 1e2507a..55ed79a 100644 --- a/src/mainboard/google/gru/romstage.c +++ b/src/mainboard/google/gru/romstage.c @@ -19,6 +19,7 @@ #include <arch/exception.h> #include <arch/mmu.h> #include <cbfs.h> +#include <cbmem.h> #include <console/console.h> #include <program_loading.h> #include <romstage_handoff.h> @@ -28,6 +29,7 @@ #include <soc/sdram.h> #include <symbols.h> #include <soc/usb.h> +#include <stdlib.h> #include "pwm_regulator.h"

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Patch set updated for coreboot: arch/x86: cache postcar in stage cache
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17649 -gerrit commit 5a8c744a5f1463baebde11fb220a2342834b902c Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 15:52:08 2016 -0600 arch/x86: cache postcar in stage cache Stash and reload postcar stage in the stage cache for increased S3 resume speed. It's impact is small (2 ms or so), but there's no need to go to the boot media on resume to reload something that was already loaded. This aligns with the same paths we take on ramstage as well. Change-Id: I4313794826120853163c7366e81346858747ed0a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/postcar_loader.c | 28 +++++++++++++++++++++------- src/include/stage_cache.h | 1 + 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index d9719ff..948e445 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -20,6 +20,8 @@ #include <cpu/x86/mtrr.h> #include <program_loading.h> #include <rmodule.h> +#include <romstage_handoff.h> +#include <stage_cache.h> static inline void stack_push(struct postcar_frame *pcf, uint32_t val) { @@ -110,18 +112,14 @@ void *postcar_commit_mtrrs(struct postcar_frame *pcf) return (void *) pcf->stack; } -void run_postcar_phase(struct postcar_frame *pcf) +static void load_postcar_cbfs(struct prog *prog, struct postcar_frame *pcf) { - struct prog prog = - PROG_INIT(PROG_UNKNOWN, CONFIG_CBFS_PREFIX "/postcar"); struct rmod_stage_load rsl = { .cbmem_id = CBMEM_ID_AFTER_CAR, - .prog = &prog, + .prog = prog, }; - postcar_commit_mtrrs(pcf); - - if (prog_locate(&prog)) + if (prog_locate(prog)) die("Failed to locate after CAR program.\n"); if (rmodule_stage_load(&rsl)) die("Failed to load after CAR program.\n"); @@ -139,5 +137,21 @@ void run_postcar_phase(struct postcar_frame *pcf) prog_segment_loaded((uintptr_t)rsl.params, sizeof(uintptr_t), SEG_FINAL); + if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE)) + stage_cache_add(STAGE_POSTCAR, prog); +} + +void run_postcar_phase(struct postcar_frame *pcf) +{ + struct prog prog = + PROG_INIT(PROG_UNKNOWN, CONFIG_CBFS_PREFIX "/postcar"); + + postcar_commit_mtrrs(pcf); + + if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE) && romstage_handoff_is_resume()) + stage_cache_load_stage(STAGE_POSTCAR, &prog); + else + load_postcar_cbfs(&prog, pcf); + prog_run(&prog); } diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h index a24ea71..fbf9c46 100644 --- a/src/include/stage_cache.h +++ b/src/include/stage_cache.h @@ -23,6 +23,7 @@ enum { STAGE_RAMSTAGE, STAGE_REFCODE, + STAGE_POSTCAR, }; /* Cache the loaded stage provided according to the parameters. */

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Patch set updated for coreboot: lib: put romstage_handoff implementation in own compilation unit
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17648 -gerrit commit 0a8e2217ae5d5f93afaa2b273afa7729589e5e07 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 21:37:42 2016 -0600 lib: put romstage_handoff implementation in own compilation unit Instead of putting all the functions inline just put the current implementation into a C file. That way all the implementation innards are not exposed. Lastly, fix up the fall out of compilation units not including the headers they actually use. Change-Id: I01fd25d158c0d5016405b73a4d4df3721c281b04 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/drivers/intel/fsp1_1/romstage.c | 1 + src/include/romstage_handoff.h | 89 +--------------------------------- src/lib/Makefile.inc | 3 ++ src/lib/romstage_handoff.c | 95 +++++++++++++++++++++++++++++++++++++ src/mainboard/google/gru/romstage.c | 3 ++ 5 files changed, 104 insertions(+), 87 deletions(-) diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index b222082..bb3e96c 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -34,6 +34,7 @@ #include <smbios.h> #include <soc/intel/common/mrc_cache.h> #include <stage_cache.h> +#include <string.h> #include <timestamp.h> #include <tpm.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index b36ff9f..1a6bbf7 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -15,95 +15,10 @@ #ifndef ROMSTAGE_HANDOFF_H #define ROMSTAGE_HANDOFF_H -#include <stdint.h> -#include <string.h> -#include <cbmem.h> -#include <console/console.h> -#include <rules.h> - -/* It is the chipset's responsibility for maintaining the integrity of this - * structure in CBMEM. For instance, if chipset code adds this structure - * using the CBMEM_ID_ROMSTAGE_INFO id it needs to ensure it doesn't clobber - * fields it doesn't own. */ -struct romstage_handoff { - /* Indicate if the current boot is an S3 resume. If - * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is - * responsible for initializing this variable. Otherwise, ramstage - * will be re-loaded from cbfs (which can be slower since it lives - * in flash). */ - uint8_t s3_resume; - uint8_t reboot_required; - uint8_t reserved[2]; -}; - -static inline int cbmem_available(void) -{ - /* No cbmem available prior to ramstage on non-early cbmem platforms. */ - if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) - return 0; - - return 1; -} - -/* The romstage_handoff_find_or_add() function provides the necessary logic - * for initializing the romstage_handoff structure in cbmem. Different components - * of the romstage may be responsible for setting up different fields. Therefore - * that same logic flow should be used for allocating and initializing the - * structure. A newly allocated structure will be memset to 0. */ -static inline struct romstage_handoff *romstage_handoff_find_or_add(void) -{ - struct romstage_handoff *handoff; - - if (!cbmem_available()) - return NULL; - - /* cbmem_add() first does a find and uses the old location before the - * real add. However, it is important to know when the structure is not - * found so it can be initialized to 0. */ - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff) - return handoff; - - handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); - - if (handoff != NULL) - memset(handoff, 0, sizeof(*handoff)); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - - return handoff; -} - /* Returns 0 if initialized. Else < 0 if handoff structure not added. */ -static inline int romstage_handoff_init(int is_s3_resume) -{ - struct romstage_handoff *handoff; - - handoff = romstage_handoff_find_or_add(); - - if (handoff == NULL) - return -1; - - handoff->s3_resume = is_s3_resume; - - return 0; -} +int romstage_handoff_init(int is_s3_resume); /* Return 1 if resuming or 0 if not. */ -static inline int romstage_handoff_is_resume(void) -{ - struct romstage_handoff *handoff; - - if (!cbmem_available()) - return 0; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) - return 0; - - return handoff->s3_resume; -} +int romstage_handoff_is_resume(void); #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index ddade2b..4157091 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -87,6 +87,8 @@ romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c +ramstage-y += romstage_handoff.c +romstage-y += romstage_handoff.c romstage-y += romstage_stack.c ramstage-y += romstage_stack.c romstage-y += stack.c @@ -153,6 +155,7 @@ postcar-y += cbmem_common.c postcar-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c postcar-y += imd_cbmem.c postcar-y += imd.c +postcar-y += romstage_handoff.c bootblock-y += hexdump.c ramstage-y += hexdump.c diff --git a/src/lib/romstage_handoff.c b/src/lib/romstage_handoff.c new file mode 100644 index 0000000..ccabd8a --- /dev/null +++ b/src/lib/romstage_handoff.c @@ -0,0 +1,95 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> +#include <romstage_handoff.h> +#include <rules.h> + +struct romstage_handoff { + /* Indicate if the current boot is an S3 resume. If + * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is + * responsible for initializing this variable. Otherwise, ramstage + * will be re-loaded from cbfs (which can be slower since it lives + * in flash). */ + uint8_t s3_resume; + uint8_t reboot_required; + uint8_t reserved[2]; +}; + +static inline int cbmem_available(void) +{ + /* No cbmem available prior to ramstage on non-early cbmem platforms. */ + if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + return 0; + + return 1; +} + +static struct romstage_handoff *romstage_handoff_find_or_add(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return NULL; + + /* cbmem_add() first does a find and uses the old location before the + * real add. However, it is important to know when the structure is not + * found so it can be initialized to 0. */ + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff) + return handoff; + + handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); + + if (handoff != NULL) + memset(handoff, 0, sizeof(*handoff)); + else + printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + + return handoff; +} + +int romstage_handoff_init(int is_s3_resume) +{ + struct romstage_handoff *handoff; + + handoff = romstage_handoff_find_or_add(); + + if (handoff == NULL) + return -1; + + handoff->s3_resume = is_s3_resume; + + return 0; +} + +int romstage_handoff_is_resume(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return 0; + + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return 0; + + return handoff->s3_resume; +} diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c index 1e2507a..0e197bb 100644 --- a/src/mainboard/google/gru/romstage.c +++ b/src/mainboard/google/gru/romstage.c @@ -19,6 +19,7 @@ #include <arch/exception.h> #include <arch/mmu.h> #include <cbfs.h> +#include <cbmem.h> #include <console/console.h> #include <program_loading.h> #include <romstage_handoff.h> @@ -28,6 +29,8 @@ #include <soc/sdram.h> #include <symbols.h> #include <soc/usb.h> +#include <stdlib.h> +#include <string.h.h> #include "pwm_regulator.h"

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Patch set updated for coreboot: romstage_handoff: add helper to determine resume status
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17647 -gerrit commit 69746967afd6cf4d517e8063386fbfdb1fcc277f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 21:22:42 2016 -0600 romstage_handoff: add helper to determine resume status Instead of having callers query the romstage handoff resume status by inspecing the object themselves add romstage_handoff_is_resume() so that the same information can be queried easily. Change-Id: I40f3769b7646bf296ee4bc323a9ab1d5e5691e21 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/acpi_s3.c | 9 +-------- src/include/romstage_handoff.h | 16 ++++++++++++++++ src/lib/prog_loaders.c | 25 ++++++++++++------------- src/soc/intel/apollolake/chip.c | 4 +--- src/soc/intel/quark/chip.c | 5 +---- src/soc/intel/skylake/chip_fsp20.c | 7 +------ 6 files changed, 32 insertions(+), 34 deletions(-) diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c index ffec64d..f3cb097 100644 --- a/src/arch/x86/acpi_s3.c +++ b/src/arch/x86/acpi_s3.c @@ -32,14 +32,7 @@ int acpi_slp_type = -1; #if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) int acpi_get_sleep_type(void) { - struct romstage_handoff *handoff; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) { - printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); - return ACPI_S0; - } else if (handoff->s3_resume) { + if (romstage_handoff_is_resume()) { printk(BIOS_DEBUG, "S3 Resume.\n"); return ACPI_S3; } else { diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 175cf09..b36ff9f 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -90,4 +90,20 @@ static inline int romstage_handoff_init(int is_s3_resume) return 0; } +/* Return 1 if resuming or 0 if not. */ +static inline int romstage_handoff_is_resume(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return 0; + + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return 0; + + return handoff->s3_resume; +} + #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 3a6f2e2..58c1a8a 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -85,19 +85,19 @@ static void ramstage_cache_invalid(void) } } -static void run_ramstage_from_resume(struct romstage_handoff *handoff, - struct prog *ramstage) +static void run_ramstage_from_resume(struct prog *ramstage) { - if (handoff != NULL && handoff->s3_resume) { - /* Load the cached ramstage to runtime location. */ - stage_cache_load_stage(STAGE_RAMSTAGE, ramstage); - - if (prog_entry(ramstage) != NULL) { - printk(BIOS_DEBUG, "Jumping to image.\n"); - prog_run(ramstage); - } - ramstage_cache_invalid(); + if (!romstage_handoff_is_resume()) + return; + + /* Load the cached ramstage to runtime location. */ + stage_cache_load_stage(STAGE_RAMSTAGE, ramstage); + + if (prog_entry(ramstage) != NULL) { + printk(BIOS_DEBUG, "Jumping to image.\n"); + prog_run(ramstage); } + ramstage_cache_invalid(); } static int load_relocatable_ramstage(struct prog *ramstage) @@ -136,8 +136,7 @@ void run_ramstage(void) if (IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_NO_STAGE_CACHE) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) - run_ramstage_from_resume(romstage_handoff_find_or_add(), - &ramstage); + run_ramstage_from_resume(&ramstage); if (prog_locate(&ramstage)) goto fail; diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index ef5908c..32d68cc 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -260,7 +260,6 @@ static void set_power_limits(void) static void soc_init(void *data) { struct global_nvs_t *gnvs; - struct romstage_handoff *handoff; /* Save VBT info and mapping */ vbt = vbt_get(&vbt_rdev); @@ -269,8 +268,7 @@ static void soc_init(void *data) * default policy that doesn't honor boards' requirements. */ itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); - handoff = romstage_handoff_find_or_add(); - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); /* Restore GPIO IRQ polarities back to previous settings. */ itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c index 150df12..5e80463 100644 --- a/src/soc/intel/quark/chip.c +++ b/src/soc/intel/quark/chip.c @@ -102,8 +102,6 @@ static const struct reg_script thermal_init_script[] = { static void chip_init(void *chip_info) { - struct romstage_handoff *handoff; - /* Validate the temperature settings */ ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS <= 255); ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS @@ -120,8 +118,7 @@ static void chip_init(void *chip_info) | TS_LOCK_AUX_TRIP_PT_REGS_ENABLE)); /* Perform silicon specific init. */ - handoff = romstage_handoff_find_or_add(); - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); } static void pci_domain_set_resources(device_t dev) diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index f90f6bc..0768779 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -35,13 +35,8 @@ void soc_init_pre_device(void *chip_info) { - struct romstage_handoff *handoff; - - /* Get S3 status to pass to silicon init. */ - handoff = romstage_handoff_find_or_add(); - /* Perform silicon specific init. */ - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); } static void pci_domain_set_resources(device_t dev)

1 0

Patch set updated for coreboot: romstage_handoff: remove code duplication
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17646 -gerrit commit 21ad886755af4e7bf7343ac09e59be51596600f9 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 17:43:04 2016 -0600 romstage_handoff: remove code duplication The same pattern was being used throughout the code base for initializing the romstage handoff structure. Provide a helper function to initialize the structure with the S3 resume state then utilize it at all the existing call sites. Change-Id: I1e9d588ab6b9ace67757387dbb5963ae31ceb252 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/amd/car/post_cache_as_ram.c | 9 +----- src/cpu/intel/haswell/romstage.c | 7 +---- src/drivers/intel/fsp1_1/romstage.c | 10 ++---- src/drivers/intel/fsp2_0/memory_init.c | 7 +---- src/include/romstage_handoff.h | 43 +++++++++++++++++++++++--- src/northbridge/intel/sandybridge/early_init.c | 8 +---- src/soc/intel/baytrail/romstage/romstage.c | 7 +---- src/soc/intel/broadwell/romstage/romstage.c | 9 +----- src/soc/intel/fsp_baytrail/romstage/romstage.c | 7 +---- 9 files changed, 47 insertions(+), 60 deletions(-) diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 296adc9..88b8637 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -129,14 +129,7 @@ void post_cache_as_ram(void) prepare_romstage_ramstack(s3resume); - if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) { - struct romstage_handoff *handoff; - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = s3resume; - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - } + romstage_handoff_init(s3resume); /* from here don't store more data in CAR */ if (family >= 0x1f && family <= 0x3f) { diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 48920b3..7eb115c 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -172,7 +172,6 @@ void romstage_common(const struct romstage_params *params) { int boot_mode; int wake_from_s3; - struct romstage_handoff *handoff; timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); @@ -245,11 +244,7 @@ void romstage_common(const struct romstage_params *params) #endif } - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = wake_from_s3; - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(wake_from_s3); post_code(0x3f); if (IS_ENABLED(CONFIG_LPC_TPM)) { diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 97379b2..b222082 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -99,7 +99,6 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih) void romstage_common(struct romstage_params *params) { const struct mrc_saved_data *cache; - struct romstage_handoff *handoff; struct pei_data *pei_data; post_code(0x32); @@ -165,14 +164,9 @@ void romstage_common(struct romstage_params *params) mainboard_save_dimm_info(params); /* Create romstage handof information */ - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (params->power_state->prev_sleep_state == - ACPI_S3); - else { - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + if (romstage_handoff_init( + params->power_state->prev_sleep_state == ACPI_S3) < 0) hard_reset(); - } /* * Initialize the TPM, unless the TPM was already initialized diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index b833561..c0cb5d3 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -117,7 +117,6 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version) static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) { struct range_entry fsp_mem; - struct romstage_handoff *handoff; if (fsp_find_reserved_memory(&fsp_mem)) die("Failed to find FSP_RESERVED_MEMORY_RESOURCE_HOB!\n"); @@ -144,11 +143,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) save_memory_training_data(s3wake, fsp_version); /* Create romstage handof information */ - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = s3wake; - else - printk(BIOS_SPEW, "Romstage handoff structure not added!\n"); + romstage_handoff_init(s3wake); } static const char *mrc_cache_get_region_name(void) diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 4aba2ce..175cf09 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -18,6 +18,8 @@ #include <stdint.h> #include <string.h> #include <cbmem.h> +#include <console/console.h> +#include <rules.h> /* It is the chipset's responsibility for maintaining the integrity of this * structure in CBMEM. For instance, if chipset code adds this structure @@ -34,6 +36,15 @@ struct romstage_handoff { uint8_t reserved[2]; }; +static inline int cbmem_available(void) +{ + /* No cbmem available prior to ramstage on non-early cbmem platforms. */ + if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + return 0; + + return 1; +} + /* The romstage_handoff_find_or_add() function provides the necessary logic * for initializing the romstage_handoff structure in cbmem. Different components * of the romstage may be responsible for setting up different fields. Therefore @@ -43,18 +54,40 @@ static inline struct romstage_handoff *romstage_handoff_find_or_add(void) { struct romstage_handoff *handoff; + if (!cbmem_available()) + return NULL; + /* cbmem_add() first does a find and uses the old location before the * real add. However, it is important to know when the structure is not * found so it can be initialized to 0. */ handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - if (handoff == NULL) { - handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); - if (handoff != NULL) - memset(handoff, 0, sizeof(*handoff)); - } + if (handoff) + return handoff; + + handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); + + if (handoff != NULL) + memset(handoff, 0, sizeof(*handoff)); + else + printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); return handoff; } +/* Returns 0 if initialized. Else < 0 if handoff structure not added. */ +static inline int romstage_handoff_init(int is_s3_resume) +{ + struct romstage_handoff *handoff; + + handoff = romstage_handoff_find_or_add(); + + if (handoff == NULL) + return -1; + + handoff->s3_resume = is_s3_resume; + + return 0; +} + #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index ef97a1a..16ea29d 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -227,13 +227,7 @@ void sandybridge_early_initialization(int chipset_type) void northbridge_romstage_finalize(int s3resume) { - struct romstage_handoff *handoff; - MCHBAR16(SSKPD) = 0xCAFE; - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = s3resume; - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(s3resume); } diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index a61b571..124eb6e 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -210,7 +210,6 @@ static int chipset_prev_sleep_state(struct chipset_power_state *ps) /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { - struct romstage_handoff *handoff; struct chipset_power_state *ps; int prev_sleep_state; @@ -232,11 +231,7 @@ void romstage_common(struct romstage_params *params) timestamp_add_now(TS_AFTER_INITRAM); - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (prev_sleep_state == ACPI_S3); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(prev_sleep_state == ACPI_S3); if (IS_ENABLED(CONFIG_LPC_TPM)) { init_tpm(prev_sleep_state == ACPI_S3); diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 44df88c..849c55d 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -89,8 +89,6 @@ void * asmlinkage romstage_main(unsigned long bist, /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { - struct romstage_handoff *handoff; - post_code(0x32); timestamp_add_now(TS_BEFORE_INITRAM); @@ -114,12 +112,7 @@ void romstage_common(struct romstage_params *params) timestamp_add_now(TS_AFTER_INITRAM); - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (params->power_state->prev_sleep_state == - ACPI_S3); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(params->power_state->prev_sleep_state == ACPI_S3); #if CONFIG_LPC_TPM init_tpm(params->power_state->prev_sleep_state == ACPI_S3); diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index a7ed414..9d204d1 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -218,7 +218,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) int cbmem_was_initted; void *cbmem_hob_ptr; uint32_t prev_sleep_state; - struct romstage_handoff *handoff; timestamp_add_now(TS_AFTER_INITRAM); @@ -257,11 +256,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) *(u32*)cbmem_hob_ptr = (u32)hob_list_ptr; post_code(0x4e); - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (prev_sleep_state == ACPI_S3); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(prev_sleep_state == ACPI_S3); post_code(0x4f);

1 0

Patch set updated for coreboot: arch/x86: cache postcar in stage cache
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17649 -gerrit commit 629d29395b035a16d87139b88d0dc34e3953ecd2 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 15:52:08 2016 -0600 arch/x86: cache postcar in stage cache Stash and reload postcar stage in the stage cache for increased S3 resume speed. It's impact is small (2 ms or so), but there's no need to go to the boot media on resume to reload something that was already loaded. This aligns with the same paths we take on ramstage as well. Change-Id: I4313794826120853163c7366e81346858747ed0a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/postcar_loader.c | 28 +++++++++++++++++++++------- src/include/stage_cache.h | 1 + 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index d9719ff..948e445 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -20,6 +20,8 @@ #include <cpu/x86/mtrr.h> #include <program_loading.h> #include <rmodule.h> +#include <romstage_handoff.h> +#include <stage_cache.h> static inline void stack_push(struct postcar_frame *pcf, uint32_t val) { @@ -110,18 +112,14 @@ void *postcar_commit_mtrrs(struct postcar_frame *pcf) return (void *) pcf->stack; } -void run_postcar_phase(struct postcar_frame *pcf) +static void load_postcar_cbfs(struct prog *prog, struct postcar_frame *pcf) { - struct prog prog = - PROG_INIT(PROG_UNKNOWN, CONFIG_CBFS_PREFIX "/postcar"); struct rmod_stage_load rsl = { .cbmem_id = CBMEM_ID_AFTER_CAR, - .prog = &prog, + .prog = prog, }; - postcar_commit_mtrrs(pcf); - - if (prog_locate(&prog)) + if (prog_locate(prog)) die("Failed to locate after CAR program.\n"); if (rmodule_stage_load(&rsl)) die("Failed to load after CAR program.\n"); @@ -139,5 +137,21 @@ void run_postcar_phase(struct postcar_frame *pcf) prog_segment_loaded((uintptr_t)rsl.params, sizeof(uintptr_t), SEG_FINAL); + if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE)) + stage_cache_add(STAGE_POSTCAR, prog); +} + +void run_postcar_phase(struct postcar_frame *pcf) +{ + struct prog prog = + PROG_INIT(PROG_UNKNOWN, CONFIG_CBFS_PREFIX "/postcar"); + + postcar_commit_mtrrs(pcf); + + if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE) && romstage_handoff_is_resume()) + stage_cache_load_stage(STAGE_POSTCAR, &prog); + else + load_postcar_cbfs(&prog, pcf); + prog_run(&prog); } diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h index a24ea71..fbf9c46 100644 --- a/src/include/stage_cache.h +++ b/src/include/stage_cache.h @@ -23,6 +23,7 @@ enum { STAGE_RAMSTAGE, STAGE_REFCODE, + STAGE_POSTCAR, }; /* Cache the loaded stage provided according to the parameters. */

1 0

Patch set updated for coreboot: lib: put romstage_handoff implementation in own compilation unit
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17648 -gerrit commit 4388c55f6bff347a37f85d484e06eead02650fce Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 21:37:42 2016 -0600 lib: put romstage_handoff implementation in own compilation unit Instead of putting all the functions inline just put the current implementation into a C file. That way all the implementation innards are not exposed. Change-Id: I01fd25d158c0d5016405b73a4d4df3721c281b04 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/romstage_handoff.h | 89 +-------------------------------------- src/lib/Makefile.inc | 3 ++ src/lib/romstage_handoff.c | 95 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 100 insertions(+), 87 deletions(-) diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index b36ff9f..1a6bbf7 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -15,95 +15,10 @@ #ifndef ROMSTAGE_HANDOFF_H #define ROMSTAGE_HANDOFF_H -#include <stdint.h> -#include <string.h> -#include <cbmem.h> -#include <console/console.h> -#include <rules.h> - -/* It is the chipset's responsibility for maintaining the integrity of this - * structure in CBMEM. For instance, if chipset code adds this structure - * using the CBMEM_ID_ROMSTAGE_INFO id it needs to ensure it doesn't clobber - * fields it doesn't own. */ -struct romstage_handoff { - /* Indicate if the current boot is an S3 resume. If - * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is - * responsible for initializing this variable. Otherwise, ramstage - * will be re-loaded from cbfs (which can be slower since it lives - * in flash). */ - uint8_t s3_resume; - uint8_t reboot_required; - uint8_t reserved[2]; -}; - -static inline int cbmem_available(void) -{ - /* No cbmem available prior to ramstage on non-early cbmem platforms. */ - if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) - return 0; - - return 1; -} - -/* The romstage_handoff_find_or_add() function provides the necessary logic - * for initializing the romstage_handoff structure in cbmem. Different components - * of the romstage may be responsible for setting up different fields. Therefore - * that same logic flow should be used for allocating and initializing the - * structure. A newly allocated structure will be memset to 0. */ -static inline struct romstage_handoff *romstage_handoff_find_or_add(void) -{ - struct romstage_handoff *handoff; - - if (!cbmem_available()) - return NULL; - - /* cbmem_add() first does a find and uses the old location before the - * real add. However, it is important to know when the structure is not - * found so it can be initialized to 0. */ - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff) - return handoff; - - handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); - - if (handoff != NULL) - memset(handoff, 0, sizeof(*handoff)); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - - return handoff; -} - /* Returns 0 if initialized. Else < 0 if handoff structure not added. */ -static inline int romstage_handoff_init(int is_s3_resume) -{ - struct romstage_handoff *handoff; - - handoff = romstage_handoff_find_or_add(); - - if (handoff == NULL) - return -1; - - handoff->s3_resume = is_s3_resume; - - return 0; -} +int romstage_handoff_init(int is_s3_resume); /* Return 1 if resuming or 0 if not. */ -static inline int romstage_handoff_is_resume(void) -{ - struct romstage_handoff *handoff; - - if (!cbmem_available()) - return 0; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) - return 0; - - return handoff->s3_resume; -} +int romstage_handoff_is_resume(void); #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index ddade2b..4157091 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -87,6 +87,8 @@ romstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c ramstage-$(CONFIG_PRIMITIVE_MEMTEST) += primitive_memtest.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c +ramstage-y += romstage_handoff.c +romstage-y += romstage_handoff.c romstage-y += romstage_stack.c ramstage-y += romstage_stack.c romstage-y += stack.c @@ -153,6 +155,7 @@ postcar-y += cbmem_common.c postcar-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c postcar-y += imd_cbmem.c postcar-y += imd.c +postcar-y += romstage_handoff.c bootblock-y += hexdump.c ramstage-y += hexdump.c diff --git a/src/lib/romstage_handoff.c b/src/lib/romstage_handoff.c new file mode 100644 index 0000000..ccabd8a --- /dev/null +++ b/src/lib/romstage_handoff.c @@ -0,0 +1,95 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <stdint.h> +#include <string.h> +#include <cbmem.h> +#include <console/console.h> +#include <romstage_handoff.h> +#include <rules.h> + +struct romstage_handoff { + /* Indicate if the current boot is an S3 resume. If + * CONFIG_RELOCTABLE_RAMSTAGE is enabled the chipset code is + * responsible for initializing this variable. Otherwise, ramstage + * will be re-loaded from cbfs (which can be slower since it lives + * in flash). */ + uint8_t s3_resume; + uint8_t reboot_required; + uint8_t reserved[2]; +}; + +static inline int cbmem_available(void) +{ + /* No cbmem available prior to ramstage on non-early cbmem platforms. */ + if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + return 0; + + return 1; +} + +static struct romstage_handoff *romstage_handoff_find_or_add(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return NULL; + + /* cbmem_add() first does a find and uses the old location before the + * real add. However, it is important to know when the structure is not + * found so it can be initialized to 0. */ + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff) + return handoff; + + handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); + + if (handoff != NULL) + memset(handoff, 0, sizeof(*handoff)); + else + printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + + return handoff; +} + +int romstage_handoff_init(int is_s3_resume) +{ + struct romstage_handoff *handoff; + + handoff = romstage_handoff_find_or_add(); + + if (handoff == NULL) + return -1; + + handoff->s3_resume = is_s3_resume; + + return 0; +} + +int romstage_handoff_is_resume(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return 0; + + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return 0; + + return handoff->s3_resume; +}

1 0

Patch set updated for coreboot: romstage_handoff: add helper to determine resume status
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17647 -gerrit commit 11b7718b94f4cc94481af19b61e529b68f6fbe17 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 21:22:42 2016 -0600 romstage_handoff: add helper to determine resume status Instead of having callers query the romstage handoff resume status by inspecing the object themselves add romstage_handoff_is_resume() so that the same information can be queried easily. Change-Id: I40f3769b7646bf296ee4bc323a9ab1d5e5691e21 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/acpi_s3.c | 9 +-------- src/include/romstage_handoff.h | 16 ++++++++++++++++ src/lib/prog_loaders.c | 25 ++++++++++++------------- src/soc/intel/apollolake/chip.c | 4 +--- src/soc/intel/quark/chip.c | 5 +---- src/soc/intel/skylake/chip_fsp20.c | 7 +------ 6 files changed, 32 insertions(+), 34 deletions(-) diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c index ffec64d..f3cb097 100644 --- a/src/arch/x86/acpi_s3.c +++ b/src/arch/x86/acpi_s3.c @@ -32,14 +32,7 @@ int acpi_slp_type = -1; #if IS_ENABLED(CONFIG_EARLY_CBMEM_INIT) int acpi_get_sleep_type(void) { - struct romstage_handoff *handoff; - - handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - - if (handoff == NULL) { - printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n"); - return ACPI_S0; - } else if (handoff->s3_resume) { + if (romstage_handoff_is_resume()) { printk(BIOS_DEBUG, "S3 Resume.\n"); return ACPI_S3; } else { diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 175cf09..b36ff9f 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -90,4 +90,20 @@ static inline int romstage_handoff_init(int is_s3_resume) return 0; } +/* Return 1 if resuming or 0 if not. */ +static inline int romstage_handoff_is_resume(void) +{ + struct romstage_handoff *handoff; + + if (!cbmem_available()) + return 0; + + handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); + + if (handoff == NULL) + return 0; + + return handoff->s3_resume; +} + #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 3a6f2e2..58c1a8a 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -85,19 +85,19 @@ static void ramstage_cache_invalid(void) } } -static void run_ramstage_from_resume(struct romstage_handoff *handoff, - struct prog *ramstage) +static void run_ramstage_from_resume(struct prog *ramstage) { - if (handoff != NULL && handoff->s3_resume) { - /* Load the cached ramstage to runtime location. */ - stage_cache_load_stage(STAGE_RAMSTAGE, ramstage); - - if (prog_entry(ramstage) != NULL) { - printk(BIOS_DEBUG, "Jumping to image.\n"); - prog_run(ramstage); - } - ramstage_cache_invalid(); + if (!romstage_handoff_is_resume()) + return; + + /* Load the cached ramstage to runtime location. */ + stage_cache_load_stage(STAGE_RAMSTAGE, ramstage); + + if (prog_entry(ramstage) != NULL) { + printk(BIOS_DEBUG, "Jumping to image.\n"); + prog_run(ramstage); } + ramstage_cache_invalid(); } static int load_relocatable_ramstage(struct prog *ramstage) @@ -136,8 +136,7 @@ void run_ramstage(void) if (IS_ENABLED(CONFIG_ARCH_X86) && !IS_ENABLED(CONFIG_NO_STAGE_CACHE) && IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) - run_ramstage_from_resume(romstage_handoff_find_or_add(), - &ramstage); + run_ramstage_from_resume(&ramstage); if (prog_locate(&ramstage)) goto fail; diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index ef5908c..32d68cc 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -260,7 +260,6 @@ static void set_power_limits(void) static void soc_init(void *data) { struct global_nvs_t *gnvs; - struct romstage_handoff *handoff; /* Save VBT info and mapping */ vbt = vbt_get(&vbt_rdev); @@ -269,8 +268,7 @@ static void soc_init(void *data) * default policy that doesn't honor boards' requirements. */ itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); - handoff = romstage_handoff_find_or_add(); - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); /* Restore GPIO IRQ polarities back to previous settings. */ itss_restore_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); diff --git a/src/soc/intel/quark/chip.c b/src/soc/intel/quark/chip.c index 150df12..5e80463 100644 --- a/src/soc/intel/quark/chip.c +++ b/src/soc/intel/quark/chip.c @@ -102,8 +102,6 @@ static const struct reg_script thermal_init_script[] = { static void chip_init(void *chip_info) { - struct romstage_handoff *handoff; - /* Validate the temperature settings */ ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS <= 255); ASSERT(PLATFORM_CATASTROPHIC_TRIP_CELSIUS @@ -120,8 +118,7 @@ static void chip_init(void *chip_info) | TS_LOCK_AUX_TRIP_PT_REGS_ENABLE)); /* Perform silicon specific init. */ - handoff = romstage_handoff_find_or_add(); - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); } static void pci_domain_set_resources(device_t dev) diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index f90f6bc..0768779 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -35,13 +35,8 @@ void soc_init_pre_device(void *chip_info) { - struct romstage_handoff *handoff; - - /* Get S3 status to pass to silicon init. */ - handoff = romstage_handoff_find_or_add(); - /* Perform silicon specific init. */ - fsp_silicon_init(handoff->s3_resume); + fsp_silicon_init(romstage_handoff_is_resume()); } static void pci_domain_set_resources(device_t dev)

1 0

Patch set updated for coreboot: romstage_handoff: remove code duplication
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17646 -gerrit commit bce9568d1fcab46188c73262bd1466a4078cc554 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 17:43:04 2016 -0600 romstage_handoff: remove code duplication The same pattern was being used throughout the code base for initializing the romstage handoff structure. Provide a helper function to initialize the structure with the S3 resume state then utilize it at all the existing call sites. Change-Id: I1e9d588ab6b9ace67757387dbb5963ae31ceb252 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/amd/car/post_cache_as_ram.c | 9 +----- src/cpu/intel/haswell/romstage.c | 7 +---- src/drivers/intel/fsp1_1/romstage.c | 10 ++---- src/drivers/intel/fsp2_0/memory_init.c | 7 +---- src/include/romstage_handoff.h | 43 +++++++++++++++++++++++--- src/northbridge/intel/sandybridge/early_init.c | 8 +---- src/soc/intel/baytrail/romstage/romstage.c | 7 +---- src/soc/intel/broadwell/romstage/romstage.c | 9 +----- src/soc/intel/fsp_baytrail/romstage/romstage.c | 7 +---- 9 files changed, 47 insertions(+), 60 deletions(-) diff --git a/src/cpu/amd/car/post_cache_as_ram.c b/src/cpu/amd/car/post_cache_as_ram.c index 296adc9..e0ee93c 100644 --- a/src/cpu/amd/car/post_cache_as_ram.c +++ b/src/cpu/amd/car/post_cache_as_ram.c @@ -129,14 +129,7 @@ void post_cache_as_ram(void) prepare_romstage_ramstack(s3resume); - if (IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) { - struct romstage_handoff *handoff; - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = s3resume; - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - } + romstage_handoff_init(s3resume) /* from here don't store more data in CAR */ if (family >= 0x1f && family <= 0x3f) { diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 48920b3..7eb115c 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -172,7 +172,6 @@ void romstage_common(const struct romstage_params *params) { int boot_mode; int wake_from_s3; - struct romstage_handoff *handoff; timestamp_init(get_initial_timestamp()); timestamp_add_now(TS_START_ROMSTAGE); @@ -245,11 +244,7 @@ void romstage_common(const struct romstage_params *params) #endif } - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = wake_from_s3; - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(wake_from_s3); post_code(0x3f); if (IS_ENABLED(CONFIG_LPC_TPM)) { diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 97379b2..b222082 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -99,7 +99,6 @@ void *cache_as_ram_stage_main(FSP_INFO_HEADER *fih) void romstage_common(struct romstage_params *params) { const struct mrc_saved_data *cache; - struct romstage_handoff *handoff; struct pei_data *pei_data; post_code(0x32); @@ -165,14 +164,9 @@ void romstage_common(struct romstage_params *params) mainboard_save_dimm_info(params); /* Create romstage handof information */ - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (params->power_state->prev_sleep_state == - ACPI_S3); - else { - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + if (romstage_handoff_init( + params->power_state->prev_sleep_state == ACPI_S3) < 0) hard_reset(); - } /* * Initialize the TPM, unless the TPM was already initialized diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index b833561..c0cb5d3 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -117,7 +117,6 @@ static void save_memory_training_data(bool s3wake, uint32_t fsp_version) static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) { struct range_entry fsp_mem; - struct romstage_handoff *handoff; if (fsp_find_reserved_memory(&fsp_mem)) die("Failed to find FSP_RESERVED_MEMORY_RESOURCE_HOB!\n"); @@ -144,11 +143,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version) save_memory_training_data(s3wake, fsp_version); /* Create romstage handof information */ - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = s3wake; - else - printk(BIOS_SPEW, "Romstage handoff structure not added!\n"); + romstage_handoff_init(s3wake); } static const char *mrc_cache_get_region_name(void) diff --git a/src/include/romstage_handoff.h b/src/include/romstage_handoff.h index 4aba2ce..175cf09 100644 --- a/src/include/romstage_handoff.h +++ b/src/include/romstage_handoff.h @@ -18,6 +18,8 @@ #include <stdint.h> #include <string.h> #include <cbmem.h> +#include <console/console.h> +#include <rules.h> /* It is the chipset's responsibility for maintaining the integrity of this * structure in CBMEM. For instance, if chipset code adds this structure @@ -34,6 +36,15 @@ struct romstage_handoff { uint8_t reserved[2]; }; +static inline int cbmem_available(void) +{ + /* No cbmem available prior to ramstage on non-early cbmem platforms. */ + if (!ENV_RAMSTAGE && !IS_ENABLED(CONFIG_EARLY_CBMEM_INIT)) + return 0; + + return 1; +} + /* The romstage_handoff_find_or_add() function provides the necessary logic * for initializing the romstage_handoff structure in cbmem. Different components * of the romstage may be responsible for setting up different fields. Therefore @@ -43,18 +54,40 @@ static inline struct romstage_handoff *romstage_handoff_find_or_add(void) { struct romstage_handoff *handoff; + if (!cbmem_available()) + return NULL; + /* cbmem_add() first does a find and uses the old location before the * real add. However, it is important to know when the structure is not * found so it can be initialized to 0. */ handoff = cbmem_find(CBMEM_ID_ROMSTAGE_INFO); - if (handoff == NULL) { - handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); - if (handoff != NULL) - memset(handoff, 0, sizeof(*handoff)); - } + if (handoff) + return handoff; + + handoff = cbmem_add(CBMEM_ID_ROMSTAGE_INFO, sizeof(*handoff)); + + if (handoff != NULL) + memset(handoff, 0, sizeof(*handoff)); + else + printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); return handoff; } +/* Returns 0 if initialized. Else < 0 if handoff structure not added. */ +static inline int romstage_handoff_init(int is_s3_resume) +{ + struct romstage_handoff *handoff; + + handoff = romstage_handoff_find_or_add(); + + if (handoff == NULL) + return -1; + + handoff->s3_resume = is_s3_resume; + + return 0; +} + #endif /* ROMSTAGE_HANDOFF_H */ diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index ef97a1a..16ea29d 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -227,13 +227,7 @@ void sandybridge_early_initialization(int chipset_type) void northbridge_romstage_finalize(int s3resume) { - struct romstage_handoff *handoff; - MCHBAR16(SSKPD) = 0xCAFE; - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = s3resume; - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(s3resume); } diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index a61b571..124eb6e 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -210,7 +210,6 @@ static int chipset_prev_sleep_state(struct chipset_power_state *ps) /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { - struct romstage_handoff *handoff; struct chipset_power_state *ps; int prev_sleep_state; @@ -232,11 +231,7 @@ void romstage_common(struct romstage_params *params) timestamp_add_now(TS_AFTER_INITRAM); - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (prev_sleep_state == ACPI_S3); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(prev_sleep_state == ACPI_S3); if (IS_ENABLED(CONFIG_LPC_TPM)) { init_tpm(prev_sleep_state == ACPI_S3); diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 44df88c..849c55d 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -89,8 +89,6 @@ void * asmlinkage romstage_main(unsigned long bist, /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) { - struct romstage_handoff *handoff; - post_code(0x32); timestamp_add_now(TS_BEFORE_INITRAM); @@ -114,12 +112,7 @@ void romstage_common(struct romstage_params *params) timestamp_add_now(TS_AFTER_INITRAM); - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (params->power_state->prev_sleep_state == - ACPI_S3); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(params->power_state->prev_sleep_state == ACPI_S3); #if CONFIG_LPC_TPM init_tpm(params->power_state->prev_sleep_state == ACPI_S3); diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c index a7ed414..9d204d1 100644 --- a/src/soc/intel/fsp_baytrail/romstage/romstage.c +++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c @@ -218,7 +218,6 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) int cbmem_was_initted; void *cbmem_hob_ptr; uint32_t prev_sleep_state; - struct romstage_handoff *handoff; timestamp_add_now(TS_AFTER_INITRAM); @@ -257,11 +256,7 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) *(u32*)cbmem_hob_ptr = (u32)hob_list_ptr; post_code(0x4e); - handoff = romstage_handoff_find_or_add(); - if (handoff != NULL) - handoff->s3_resume = (prev_sleep_state == ACPI_S3); - else - printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); + romstage_handoff_init(prev_sleep_state == ACPI_S3); post_code(0x4f);

1 0

New patch to review for coreboot: arch/x86: cache postcar in stage cache
by Aaron Durbin 30 Nov '16

30 Nov '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17649 -gerrit commit a3925e71ebd47006d4c5c7f5101e352f1bd3f63f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Nov 29 15:52:08 2016 -0600 arch/x86: cache postcar in stage cache Stash and reload postcar stage in the stage cache for increased S3 resume speed. It's impact is small (2 ms or so), but there's no need to go to the boot media on resume to reload something that was already loaded. This aligns with the same paths we take on ramstage as well. Change-Id: I4313794826120853163c7366e81346858747ed0a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/x86/postcar_loader.c | 28 +++++++++++++++++++++------- src/include/stage_cache.h | 1 + 2 files changed, 22 insertions(+), 7 deletions(-) diff --git a/src/arch/x86/postcar_loader.c b/src/arch/x86/postcar_loader.c index d9719ff..948e445 100644 --- a/src/arch/x86/postcar_loader.c +++ b/src/arch/x86/postcar_loader.c @@ -20,6 +20,8 @@ #include <cpu/x86/mtrr.h> #include <program_loading.h> #include <rmodule.h> +#include <romstage_handoff.h> +#include <stage_cache.h> static inline void stack_push(struct postcar_frame *pcf, uint32_t val) { @@ -110,18 +112,14 @@ void *postcar_commit_mtrrs(struct postcar_frame *pcf) return (void *) pcf->stack; } -void run_postcar_phase(struct postcar_frame *pcf) +static void load_postcar_cbfs(struct prog *prog, struct postcar_frame *pcf) { - struct prog prog = - PROG_INIT(PROG_UNKNOWN, CONFIG_CBFS_PREFIX "/postcar"); struct rmod_stage_load rsl = { .cbmem_id = CBMEM_ID_AFTER_CAR, - .prog = &prog, + .prog = prog, }; - postcar_commit_mtrrs(pcf); - - if (prog_locate(&prog)) + if (prog_locate(prog)) die("Failed to locate after CAR program.\n"); if (rmodule_stage_load(&rsl)) die("Failed to load after CAR program.\n"); @@ -139,5 +137,21 @@ void run_postcar_phase(struct postcar_frame *pcf) prog_segment_loaded((uintptr_t)rsl.params, sizeof(uintptr_t), SEG_FINAL); + if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE)) + stage_cache_add(STAGE_POSTCAR, prog); +} + +void run_postcar_phase(struct postcar_frame *pcf) +{ + struct prog prog = + PROG_INIT(PROG_UNKNOWN, CONFIG_CBFS_PREFIX "/postcar"); + + postcar_commit_mtrrs(pcf); + + if (!IS_ENABLED(CONFIG_NO_STAGE_CACHE) && romstage_handoff_is_resume()) + stage_cache_load_stage(STAGE_POSTCAR, &prog); + else + load_postcar_cbfs(&prog, pcf); + prog_run(&prog); } diff --git a/src/include/stage_cache.h b/src/include/stage_cache.h index a24ea71..fbf9c46 100644 --- a/src/include/stage_cache.h +++ b/src/include/stage_cache.h @@ -23,6 +23,7 @@ enum { STAGE_RAMSTAGE, STAGE_REFCODE, + STAGE_POSTCAR, }; /* Cache the loaded stage provided according to the parameters. */

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coreboot-gerrit November 2016