the following patch was just integrated into master:
commit 46fef017227c8695c988188976d17935809bcc73
Author: Arthur Heymans <arthur(a)aheymans.xyz>
Date: Mon Nov 14 09:58:20 2016 +0100
mb/gigabyte/ga-945gcm-s2c: Add mainboard using variants
This mainboard is identical to ga-945gcm-s2l except for NIC
which is a Realtek RTL 8101E chip (10/100 Mbit).
The schematics of ga-945gcm-s2l mention multiple NICs and ga-945gcm-s2c
and ga-945gcm-s2l have a common manual further indicating that those
boards are close to identical.
Change-Id: Iba3d401efcf208154e639c3237b201830a5151aa
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Reviewed-on: https://review.coreboot.org/17416
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/17416 for details.
-gerrit
the following patch was just integrated into master:
commit 358b2b379bc5d25c8a150485ce252e27c338f3af
Author: Naresh G Solanki <naresh.solanki(a)intel.com>
Date: Thu Oct 27 23:13:37 2016 +0530
util/lint: Exclude devicetree files with custom name from license check
As devicetree files can have different name followed by extension cb
Exclude all .cb file from the license header check.
Change-Id: I37b651eedd77cbf3d3e65ff0f027f971b0a2d2ac
Signed-off-by: Naresh G Solanki <naresh.solanki(a)intel.com>
Reviewed-on: https://review.coreboot.org/17186
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/17186 for details.
-gerrit
the following patch was just integrated into master:
commit 6d4a34156498f997b9f9ce71a686c07aa8147a03
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Wed Oct 19 13:41:42 2016 +0200
mb/kontron/ktqm77: Enable native gfx init through libgfxinit
Change-Id: Ie16b3236e7378a2062b3081e4530d7a4791b4b66
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/17074
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See https://review.coreboot.org/17074 for details.
-gerrit
the following patch was just integrated into master:
commit 88c6487c34b72d2355c7ce0e322e8c8365a2c567
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Wed Oct 5 18:02:01 2016 +0200
nb/intel/nehalem,sandybridge: Hook up libgfxinit
Change-Id: I4288193c022cc0963b926b4b43834c222e41bb0d
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/16953
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See https://review.coreboot.org/16953 for details.
-gerrit
the following patch was just integrated into master:
commit 542e9488bd3f084c373e89e869aeca84aaa8c66c
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Wed Oct 5 17:47:32 2016 +0200
drivers/intel/gma: Hook up libgfxinit
Add `libgfxinit` as another option for native graphics initialization.
For that, the function gma_gfxinit() (see drivers/intel/gma/i915.h) has
to be called by the respective northbridge/soc code.
A mainboard port needs to select `CONFIG_MAINBOARD_HAS_LIBGFXINIT` and
implement the Ada package `GMA.Mainboard` with a single function `ports`
that returns a list of ports to be probed for displays.
v2: Update 3rdparty/libgfxinit to its latest master commit to make
things buildable within coreboot.
v3: Another update to 3rdparty/libgfxinit. Including support to select
the I2C port for VGA.
Change-Id: I4c7be3745f32853797d3f3689396dde07d4ca950
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/16952
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See https://review.coreboot.org/16952 for details.
-gerrit
the following patch was just integrated into master:
commit c83239eabc3b09273294a013c4dcb84f09ab0241
Author: Nico Huber <nico.huber(a)secunet.com>
Date: Wed Oct 5 17:46:49 2016 +0200
Hook up libhwbase in ramstage
It's hidden behind a configuration option `CONFIG_RAMSTAGE_LIBHWBASE`.
This also adds some glue code to use the coreboot console for debug
output and our monotonic timer framework as timer backend.
v2: Also update 3rdparty/libhwbase to the latest master commit.
Change-Id: I8e8d50271b46aac1141f95ab55ad323ac0889a8d
Signed-off-by: Nico Huber <nico.huber(a)secunet.com>
Reviewed-on: https://review.coreboot.org/16951
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See https://review.coreboot.org/16951 for details.
-gerrit
Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17644
-gerrit
commit cc9395d6cc9985e8183a3ae3cb3bdb4f6876b267
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Tue Nov 29 21:02:04 2016 +0100
lib/edid.c: Remove trailing space from detailed mode output
When the bit for interlaced mode is not set, a trailing space is added
to the end.
As the space is already accounted for in `" interlaced"`, remove that
space.
TEST=Boot on Lenovo X60t, and verify the trailing space in the detailed
mode is gone.
Change-Id: I4114c9e61a040fa005c806404ec51c12e2f02f4d
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
---
src/lib/edid.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 23b6503..edc2af1 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -585,7 +585,7 @@ detailed_block(struct edid *result_edid, unsigned char *x, int in_extension,
"Detailed mode (IN HEX): Clock %d KHz, %x mm x %x mm\n"
" %04x %04x %04x %04x hborder %x\n"
" %04x %04x %04x %04x vborder %x\n"
- " %chsync %cvsync%s%s %s\n", out->mode.pixel_clock,
+ " %chsync %cvsync%s%s%s\n", out->mode.pixel_clock,
extra_info.x_mm, extra_info.y_mm, out->mode.ha,
out->mode.ha + out->mode.hso,
out->mode.ha + out->mode.hso + out->mode.hspw,