coreboot-gerrit July 2015

coreboot-gerrit@coreboot.org

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Patch set updated for filo: filo: Fix compilation with latest libpayload changes
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10745 -gerrit commit 4e8dd5ebb550e0a09affbcf36ce9a01f2a83c8f5 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 17:03:19 2015 -0700 filo: Fix compilation with latest libpayload changes The use of IS_ENABLED() requires that kconfig.h from libpayload is included by all files. Change-Id: I53b9ec8cac9c0a409b1e7290e9b81e06f2ce29e5 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile | 2 +- drivers/hdreg.h | 8 ++++---- drivers/ide_new.c | 18 +++++++++--------- drivers/ide_new.h | 4 ++-- drivers/usb.c | 2 +- fs/blockdev.c | 34 +++++++++++++++++----------------- main/filo.c | 18 +++++++++--------- main/grub/builtins.c | 2 +- main/grub/md5.c | 2 -- x86/linux_load.c | 14 +++++++------- 10 files changed, 51 insertions(+), 53 deletions(-) diff --git a/Makefile b/Makefile index a860236..7b45e6d 100644 --- a/Makefile +++ b/Makefile @@ -93,7 +93,7 @@ ARCHDIR-$(CONFIG_TARGET_I386) := x86 CPPFLAGS := -nostdinc -imacros $(obj)/config.h CPPFLAGS += -I$(INCPAYLOAD) -I$(INCPAYLOAD)/$(ARCHDIR-y) CPPFLAGS += -I$(ARCHDIR-y)/include -Iinclude -I$(obj) -CPPFLAGS += -I$(GCCINCDIR) +CPPFLAGS += -I$(GCCINCDIR) -include $(INCPAYLOAD)/kconfig.h CFLAGS := -Wall -Wshadow -Os -pipe CFLAGS += -fomit-frame-pointer -fno-common -ffreestanding -fno-strict-aliasing diff --git a/drivers/hdreg.h b/drivers/hdreg.h index 9666ddf..38c5dc9 100644 --- a/drivers/hdreg.h +++ b/drivers/hdreg.h @@ -257,20 +257,20 @@ struct hd_driveid { }; struct request_sense { -#if defined(CONFIG_LP_BIG_ENDIAN) +#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) u8 valid : 1; u8 error_code : 7; -#elif defined(CONFIG_LP_LITTLE_ENDIAN) +#elif IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) u8 error_code : 7; u8 valid : 1; #endif u8 segment_number; -#if defined(CONFIG_LP_BIG_ENDIAN) +#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) u8 reserved1 : 2; u8 ili : 1; u8 reserved2 : 1; u8 sense_key : 4; -#elif defined(CONFIG_LP_LITTLE_ENDIAN) +#elif IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) u8 sense_key : 4; u8 reserved2 : 1; u8 ili : 1; diff --git a/drivers/ide_new.c b/drivers/ide_new.c index de4f733..3e0221a 100644 --- a/drivers/ide_new.c +++ b/drivers/ide_new.c @@ -23,7 +23,7 @@ #include "ide_new.h" #include "hdreg.h" -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) #include <pci.h> #endif @@ -55,7 +55,7 @@ static const int ctl_ports[IDE_MAX_CHANNELS] = { 0x3f6, 0x376, 0x3ee, 0x36e }; #undef ATA_PEDANTIC // debug function currently not used. -#if defined(CONFIG_DEBUG_IDE) && 0 +#if IS_ENABLED(CONFIG_DEBUG_IDE) && 0 static void dump_drive(struct ide_drive *drive) { debug("IDE DRIVE @%lx:\n", (unsigned long)drive); @@ -861,7 +861,7 @@ ob_ide_fixup_string(unsigned char *s, unsigned int len) /* * if little endian arch, byte swap the string */ -#ifdef CONFIG_LP_LITTLE_ENDIAN +#if IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) for (p = end ; p != s;) { unsigned short *pp = (unsigned short *) (p -= 2); *pp = be16toh(*pp); @@ -930,7 +930,7 @@ ob_ide_identify_drive(struct ide_drive *drive) drive->bs = 512; drive->max_sectors = 255; -#ifdef CONFIG_IDE_LBA48 +#if IS_ENABLED(CONFIG_IDE_LBA48) if ((id.command_set_2 & 0x0400) && (id.cfs_enable_2 & 0x0400)) { drive->addressing = ide_lba48; drive->max_sectors = 65535; @@ -1149,7 +1149,7 @@ ob_ide_read_blocks(struct ide_drive *drive, int n, u32 blk, unsigned char* dest) return (cnt); } -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) static int pci_find_ata_device_on_bus(int bus, pcidev_t * dev, int *index, int sata, int pata) { int slot, func; @@ -1223,14 +1223,14 @@ static void fixupregs(struct ide_channel *chan) static int find_ide_controller_compat(struct ide_channel *chan, int index) { -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) int skip, i, pci_index = index / 2; pcidev_t dev; #else if (index >= IDE_MAX_CHANNELS) return -1; #endif -#ifdef CONFIG_PCMCIA_CF +#if IS_ENABLED(CONFIG_PCMCIA_CF) if (index == 2) { chan->io_regs[0] = 0x1e0; chan->io_regs[8] = 0x1ec; @@ -1238,7 +1238,7 @@ static int find_ide_controller_compat(struct ide_channel *chan, int index) return 0; } #endif -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) /* skip any SATA and PATA PCI controllers in native mode */ for (skip = i = 0; i < pci_index && index; i++) { int devidx = i; @@ -1269,7 +1269,7 @@ static int find_ide_controller_compat(struct ide_channel *chan, int index) return 0; } -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) static int find_ide_controller(struct ide_channel *chan, int chan_index) { int pci_index; diff --git a/drivers/ide_new.h b/drivers/ide_new.h index 0598993..1ed8f0b 100644 --- a/drivers/ide_new.h +++ b/drivers/ide_new.h @@ -211,11 +211,11 @@ enum { struct ata_sector { u16 all; union { -#ifdef CONFIG_LP_BIG_ENDIAN +#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) u8 high; u8 low; #endif -#ifdef CONFIG_LP_LITTLE_ENDIAN +#if IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) u8 low; u8 high; #endif diff --git a/drivers/usb.c b/drivers/usb.c index 2edf811..d6d8809 100644 --- a/drivers/usb.c +++ b/drivers/usb.c @@ -20,7 +20,7 @@ #include <libpayload-config.h> /* Only use this code if libpayload is compiled with USB stack */ -#ifdef CONFIG_LP_USB +#if IS_ENABLED(CONFIG_LP_USB) #include <fs.h> #include <usb/usb.h> #include <usb/usbmsc.h> diff --git a/fs/blockdev.c b/fs/blockdev.c index e112ad2..4bf5805 100644 --- a/fs/blockdev.c +++ b/fs/blockdev.c @@ -21,7 +21,7 @@ #include <endian.h> #include <libpayload.h> #include <libpayload-config.h> -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) #include <storage/storage.h> #endif #include <config.h> @@ -251,10 +251,10 @@ int devopen(const char *name, int *reopen) int tmp_drive = drive; switch (type) { -#if (defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE)) || \ - defined(CONFIG_IDE_DISK) || defined(CONFIG_IDE_NEW_DISK) +#if (IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE)) || \ + IS_ENABLED(CONFIG_IDE_DISK) || IS_ENABLED(CONFIG_IDE_NEW_DISK) case DISK_IDE: -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) if (drive < storage_device_count()) { if (storage_probe(drive) != POLL_MEDIUM_PRESENT) return 0; @@ -264,7 +264,7 @@ int devopen(const char *name, int *reopen) tmp_drive -= storage_device_count(); } #endif -#if defined(CONFIG_IDE_DISK) || defined(CONFIG_IDE_NEW_DISK) +#if IS_ENABLED(CONFIG_IDE_DISK) || IS_ENABLED(CONFIG_IDE_NEW_DISK) if (ide_probe(tmp_drive) != 0) { debug("Failed to open IDE.\n"); return 0; @@ -273,7 +273,7 @@ int devopen(const char *name, int *reopen) #endif break; #endif -#ifdef CONFIG_USB_DISK +#if IS_ENABLED(CONFIG_USB_DISK) case DISK_USB: if (usb_probe(drive) != 0) { debug("Failed to open USB.\n"); @@ -283,7 +283,7 @@ int devopen(const char *name, int *reopen) break; #endif -#ifdef CONFIG_FLASH_DISK +#if IS_ENABLED(CONFIG_FLASH_DISK) case DISK_FLASH: if (flash_probe(drive) != 0) { debug("Failed to open FLASH.\n"); @@ -363,7 +363,7 @@ int devopen(const char *name, int *reopen) void devclose(void) { -#ifdef CONFIG_FLASH_DISK +#if IS_ENABLED(CONFIG_FLASH_DISK) /* Try to close NAND if it was left open */ if (dev_type == DISK_FLASH) NAND_close(); @@ -391,12 +391,12 @@ static void *read_sector(unsigned long sector) if (cache_sect[hash] != sector) { cache_sect[hash] = (unsigned long) -1; switch (dev_type) { -#if (defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE)) || \ - defined(CONFIG_IDE_DISK) || defined(CONFIG_IDE_NEW_DISK) +#if (IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE)) || \ + IS_ENABLED(CONFIG_IDE_DISK) || IS_ENABLED(CONFIG_IDE_NEW_DISK) case DISK_IDE: { int tmp_drive = dev_drive; -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) if (dev_drive < storage_device_count()) { int count = (NUM_CACHE-hash>8)?8:(NUM_CACHE-hash); if (storage_probe(tmp_drive) == POLL_NO_MEDIUM) { @@ -414,10 +414,10 @@ static void *read_sector(unsigned long sector) tmp_drive -= storage_device_count(); } #endif -#if defined(CONFIG_IDE_DISK) +#if IS_ENABLED(CONFIG_IDE_DISK) if (ide_read(tmp_drive, sector, buf) != 0) goto readerr; -#elif defined(CONFIG_IDE_NEW_DISK) +#elif IS_ENABLED(CONFIG_IDE_NEW_DISK) int count = (NUM_CACHE-hash>8)?8:(NUM_CACHE-hash); int ret; ret = ide_read_blocks(tmp_drive, sector, count, buf); @@ -434,7 +434,7 @@ static void *read_sector(unsigned long sector) break; } #endif -#ifdef CONFIG_USB_DISK +#if IS_ENABLED(CONFIG_USB_DISK) case DISK_USB: { int count = (NUM_CACHE-hash>8)?8:(NUM_CACHE-hash); @@ -447,7 +447,7 @@ static void *read_sector(unsigned long sector) } #endif -#ifdef CONFIG_FLASH_DISK +#if IS_ENABLED(CONFIG_FLASH_DISK) case DISK_FLASH: if (flash_read(dev_drive, sector, buf) != 0) return 0; @@ -465,8 +465,8 @@ static void *read_sector(unsigned long sector) readerr: printf("Disk read error dev=%d drive=%d sector=%lu\n", dev_type, dev_drive, sector); -#if defined(CONFIG_IDE_NEW_DISK) || \ - (defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE)) +#if IS_ENABLED(CONFIG_IDE_NEW_DISK) || \ + (IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE)) err_out: #endif flush_cache(); diff --git a/main/filo.c b/main/filo.c index 4f26780..9d69386 100644 --- a/main/filo.c +++ b/main/filo.c @@ -77,25 +77,25 @@ static void init(void) after relocation. Therefore, run lib_get_sysinfo(), again. */ lib_get_sysinfo(); -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) /* libpayload storage drivers */ storage_initialize(); #endif -#if defined(CONFIG_USB_DISK) -#if defined(CONFIG_LP_USB) +#if IS_ENABLED(CONFIG_USB_DISK) +#if IS_ENABLED(CONFIG_LP_USB) /* libpayload USB stack is there */ usb_initialize(); #else printf("No USB stack in libpayload.\n"); #endif #endif -#if defined(CONFIG_LP_PC_KEYBOARD) || defined(CONFIG_LP_USB_HID) +#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) || IS_ENABLED(CONFIG_LP_USB_HID) add_reset_handler(filo_reset_handler); #endif -#ifdef CONFIG_SUPPORT_SOUND +#if IS_ENABLED(CONFIG_SUPPORT_SOUND) sound_init(); #endif -#ifdef CONFIG_SLOW_SATA +#if IS_ENABLED(CONFIG_SLOW_SATA) delay(5); #endif } @@ -165,7 +165,7 @@ int main(void) #ifdef CONFIG_AUTOBOOT_FILE #ifdef CONFIG_AUTOBOOT_DELAY -#ifdef CONFIG_NON_INTERACTIVE +#if IS_ENABLED(CONFIG_NON_INTERACTIVE) #error "autoboot delay is not supported for non-interactive builds" #define autoboot_delay() 0 /* success */ #else @@ -207,7 +207,7 @@ static inline int autoboot_delay(void) static void autoboot(void) { -#ifndef CONFIG_NON_INTERACTIVE +#if !IS_ENABLED(CONFIG_NON_INTERACTIVE) /* If Escape key is pressed already, skip autoboot */ if (havechar() && getchar()==ESCAPE) return; @@ -231,7 +231,7 @@ int main(void) /* Try default image */ autoboot(); -#ifndef CONFIG_NON_INTERACTIVE +#if !IS_ENABLED(CONFIG_NON_INTERACTIVE) /* The above didn't work, ask user */ while (havechar()) getchar(); diff --git a/main/grub/builtins.c b/main/grub/builtins.c index cd079d1..8784be6 100644 --- a/main/grub/builtins.c +++ b/main/grub/builtins.c @@ -1838,7 +1838,7 @@ static struct builtin builtin_timeout = { static int keymap_func(char *arg, int flags) { -#ifdef CONFIG_LP_PC_KEYBOARD +#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) if (keyboard_set_layout(arg)) { errnum = ERR_BAD_ARGUMENT; return 1; diff --git a/main/grub/md5.c b/main/grub/md5.c index 1987714..b3cd362 100644 --- a/main/grub/md5.c +++ b/main/grub/md5.c @@ -41,8 +41,6 @@ #ifdef USE_MD5 -#define htole32(x) (x) -#define le32toh(x) htole32(x) typedef unsigned int UINT4; /* F, G, H and I are basic MD5 functions. diff --git a/x86/linux_load.c b/x86/linux_load.c index e003634..4e41393 100644 --- a/x86/linux_load.c +++ b/x86/linux_load.c @@ -350,7 +350,7 @@ static void set_memory_size(struct linux_params *params) /* Video mode */ static void set_video_mode(struct linux_params *params) { -#if CONFIG_LP_COREBOOT_VIDEO_CONSOLE +#if IS_ENABLED(CONFIG_LP_COREBOOT_VIDEO_CONSOLE) /* Are we running on a framebuffer console? */ if (!lib_sysinfo.framebuffer) return; @@ -677,7 +677,7 @@ static void hardware_setup(void) outb(0xFF, 0xA1); /* mask off all interrupts for now */ outb(0xFB, 0x21); /* mask all irq's but irq2 which is cascaded */ -#ifdef CONFIG_FLASHROM_LOCKDOWN +#if IS_ENABLED(CONFIG_FLASHROM_LOCKDOWN) /* lockdown flashROM */ extern int flashrom_lockdown; extern int intel_lockdown_flash(void); @@ -704,10 +704,10 @@ static int start_linux(u32 kern_addr, struct linux_params *params) { struct segment_desc *linux_gdt; struct context *ctx; -#ifdef CONFIG_LP_VGA_VIDEO_CONSOLE +#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) unsigned int cursor_x, cursor_y, cursor_en; #endif -#ifdef CONFIG_PCMCIA_CF +#if IS_ENABLED(CONFIG_PCMCIA_CF) unsigned char *cf_bar; int i; #endif @@ -747,7 +747,7 @@ static int start_linux(u32 kern_addr, struct linux_params *params) debug("EIP=%#x\n", kern_addr); printf("Jumping to entry point...\n"); -#ifdef CONFIG_LP_VGA_VIDEO_CONSOLE +#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) /* Update VGA cursor position. * This must be here because the printf changes the value! */ video_console_get_cursor(&cursor_x, &cursor_y, &cursor_en); @@ -755,7 +755,7 @@ static int start_linux(u32 kern_addr, struct linux_params *params) params->orig_y = cursor_y; #endif -#ifdef CONFIG_PCMCIA_CF +#if IS_ENABLED(CONFIG_PCMCIA_CF) cf_bar = phys_to_virt(pci_read_config32(PCI_DEV(0, 0xa, 1), 0x10)); for (i = 0x836; i < 0x840; i++) { cf_bar[i] = 0; @@ -813,7 +813,7 @@ int linux_load(const char *file, const char *cmdline) } file_close(); -#if defined(CONFIG_LP_USB) +#if IS_ENABLED(CONFIG_LP_USB) usb_exit(); #endif

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Patch merged into coreboot/master: payloads: Reorganize Makefile.incs for external payloads
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit 0fa5d8f219a016d58e4592c268730d0f45a2835b Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 17:09:17 2015 -0700 payloads: Reorganize Makefile.incs for external payloads This is not going as far as I would like it to go, but some of the external payloads have to be fixed up first. Long term, I would like to directly add payloads/external/* to subdirs-y and remove one layer of indirection from the build process. For now, moving the payload Makefile targets into payloads/ is already a small improvement. Change-Id: Ie4eb492eb804e0aaaf1a4d90af2f876f27a32a75 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10829 Reviewed-by: Martin Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10829 for details. -gerrit

1 0

Patch merged into coreboot/master: payloads: Reorganize Kconfig for external payloads
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit 1a8b7bfe506c39ee595eef84f19d8c75245e27de Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 15:58:56 2015 -0700 payloads: Reorganize Kconfig for external payloads The integration of external payloads in coreboot is a bit messy. You have to change the to level Kconfig file for every payload (something that we recently fixed for mainboards and chipsets). This means that updating e.g. the SeaBIOS version requires a change outside of the SeaBIOS directory. With this patch you can create a new directory under payloads/external and place a Kconfig and Kconfig.name file in there, and the payload will automatically show up when you do "make menuconfig". Change-Id: I293abcb8eae581d4b3934e64897c0d339a27e7c1 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10828 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10828 for details. -gerrit

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Patch set updated for coreboot: azalia: fix up and clean up shrinkage of boilerplate code
by Jonathan A. Kollasch 07 Jul '15

07 Jul '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10826 -gerrit commit 4a4486e835cfa18e3b7207ee87cc3cefe7b9d7be Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jul 7 12:57:46 2015 -0500 azalia: fix up and clean up shrinkage of boilerplate code Should fix regressions in HDA verb setup on nvidia mcp55 and intel sch southbridges. Intel broadwell and sp_bd82x6x seemed to have not gotten the boilerplate shrink, so apply it to those too. Followup-to: Ib3e09644c0ee71aacb067adaa85653d151b52078 Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/asus/m2n-e/hda_verb.c | 2 + src/mainboard/gigabyte/m57sli/hda_verb.c | 7 ++ src/mainboard/google/auron/hda_verb.c | 123 ++++++++++++++++++++++++ src/mainboard/google/auron/hda_verb.h | 122 ----------------------- src/mainboard/google/auron/mainboard.c | 18 ---- src/mainboard/google/jecht/hda_verb.c | 113 ++++++++++++++++++++++ src/mainboard/google/jecht/hda_verb.h | 112 --------------------- src/mainboard/google/jecht/mainboard.c | 18 ---- src/mainboard/intel/cougar_canyon2/hda_verb.c | 3 + src/mainboard/iwave/iWRainbowG6/hda_verb.c | 7 +- src/mainboard/msi/ms7260/hda_verb.c | 7 ++ src/mainboard/msi/ms9652_fam10/hda_verb.c | 7 ++ src/mainboard/nvidia/l1_2pvv/hda_verb.c | 7 +- src/mainboard/supermicro/h8dme/hda_verb.c | 7 ++ src/mainboard/supermicro/h8dmr/hda_verb.c | 7 ++ src/mainboard/supermicro/h8dmr_fam10/hda_verb.c | 7 ++ src/soc/intel/broadwell/Makefile.inc | 2 + src/soc/intel/broadwell/hda.c | 8 +- src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 + src/southbridge/intel/fsp_bd82x6x/azalia.c | 6 +- src/southbridge/intel/sch/Makefile.inc | 1 + src/southbridge/intel/sch/audio.c | 4 +- src/southbridge/nvidia/mcp55/Makefile.inc | 4 + src/southbridge/nvidia/mcp55/azalia.c | 11 ++- 24 files changed, 315 insertions(+), 290 deletions(-) diff --git a/src/mainboard/asus/m2n-e/hda_verb.c b/src/mainboard/asus/m2n-e/hda_verb.c index 58bb983..7e9a53c 100644 --- a/src/mainboard/asus/m2n-e/hda_verb.c +++ b/src/mainboard/asus/m2n-e/hda_verb.c @@ -78,4 +78,6 @@ const u32 cim_verb_data[] = { AZALIA_PIN_CFG(0x0, 0x25, 0x01012014), }; +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/gigabyte/m57sli/hda_verb.c b/src/mainboard/gigabyte/m57sli/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/gigabyte/m57sli/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/auron/hda_verb.c b/src/mainboard/google/auron/hda_verb.c new file mode 100644 index 0000000..e015a83 --- /dev/null +++ b/src/mainboard/google/auron/hda_verb.c @@ -0,0 +1,123 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000d, // Number of jacks (NID entries) + + 0x0017ff00, // Function Reset + 0x0017ff00, // Double Function Reset + 0x000F0000, // Pad - get vendor id + 0x000F0002, // Pad - get revision id + + /* Bits 31:28 - Codec Address */ + /* Bits 27:20 - NID */ + /* Bits 19:8 - Verb ID */ + /* Bits 7:0 - Payload */ + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC - Disabled */ + 0x01271cf0, // + 0x01271d11, // + 0x01271e11, // + 0x01271f41, // + + /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */ + 0x01471c10, // group 1, cap 0 + 0x01471d01, // no connector, no jack detect + 0x01471e17, // speaker out, analog + 0x01471f90, // fixed function, internal, Location N/A + + /* Pin Complex (NID 0x17) MONO Out - Disabled */ + 0x01771cf0, // + 0x01771d11, // + 0x01771e11, // + 0x01771f41, // + + /* Pin Complex (NID 0x18) Disabled */ + 0x01871cf0, // + 0x01871d11, // + 0x01871e11, // + 0x01871f41, // + + /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */ + 0x01971c20, // group2, cap 0 + 0x01971d10, // black, jack detect + 0x01971ea1, // Mic in, 3.5mm Jack + 0x01971f03, // connector, External left panel + + /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */ + 0x01a71c11, // group 1, cap 1 + 0x01a71d01, // no connector, no jack detect + 0x01a71ea7, // mic in, analog connection + 0x01a71f90, // Fixed function, internal, Location N/A + + /* Pin Complex (NID 0x1B) LINE2 - Disabled */ + 0x01b71cf0, // + 0x01b71d11, // + 0x01b71e11, // + 0x01b71f41, // + + /* Pin Complex (NID 0x1D) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, Internal, Location N/A + + /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/ + 0x01e71cf0, // + 0x01e71d11, // + 0x01e71e11, // + 0x01e71f41, // + + /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/ + 0x02171c21, // group2, cap 1 + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 3.5mm Jack + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +const u32 pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/auron/hda_verb.h b/src/mainboard/google/auron/hda_verb.h deleted file mode 100644 index 275ee3a..0000000 --- a/src/mainboard/google/auron/hda_verb.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static const u32 mainboard_cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 - 0x10ec0283, // Subsystem ID - 0x0000000d, // Number of jacks (NID entries) - - 0x0017ff00, // Function Reset - 0x0017ff00, // Double Function Reset - 0x000F0000, // Pad - get vendor id - 0x000F0002, // Pad - get revision id - - /* Bits 31:28 - Codec Address */ - /* Bits 27:20 - NID */ - /* Bits 19:8 - Verb ID */ - /* Bits 7:0 - Payload */ - - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ - 0x00172083, - 0x00172102, - 0x001722ec, - 0x00172310, - - /* Pin Widget Verb Table */ - - /* Pin Complex (NID 0x12) DMIC - Disabled */ - 0x01271cf0, // - 0x01271d11, // - 0x01271e11, // - 0x01271f41, // - - /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */ - 0x01471c10, // group 1, cap 0 - 0x01471d01, // no connector, no jack detect - 0x01471e17, // speaker out, analog - 0x01471f90, // fixed function, internal, Location N/A - - /* Pin Complex (NID 0x17) MONO Out - Disabled */ - 0x01771cf0, // - 0x01771d11, // - 0x01771e11, // - 0x01771f41, // - - /* Pin Complex (NID 0x18) Disabled */ - 0x01871cf0, // - 0x01871d11, // - 0x01871e11, // - 0x01871f41, // - - /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */ - 0x01971c20, // group2, cap 0 - 0x01971d10, // black, jack detect - 0x01971ea1, // Mic in, 3.5mm Jack - 0x01971f03, // connector, External left panel - - /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */ - 0x01a71c11, // group 1, cap 1 - 0x01a71d01, // no connector, no jack detect - 0x01a71ea7, // mic in, analog connection - 0x01a71f90, // Fixed function, internal, Location N/A - - /* Pin Complex (NID 0x1B) LINE2 - Disabled */ - 0x01b71cf0, // - 0x01b71d11, // - 0x01b71e11, // - 0x01b71f41, // - - /* Pin Complex (NID 0x1D) PCBeep */ - 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable - 0x01d71d81, // mute spkr on hpout - 0x01d71e15, // pcbeep en able, checksum - 0x01d71f40, // no physical, Internal, Location N/A - - /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/ - 0x01e71cf0, // - 0x01e71d11, // - 0x01e71e11, // - 0x01e71f41, // - - /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/ - 0x02171c21, // group2, cap 1 - 0x02171d10, // black, jack detect - 0x02171e21, // HPOut, 3.5mm Jack - 0x02171f03, // connector, left panel - - /* Undocumented settings from Realtek (needed for beep_gen) */ - /* Widget node 0x20 */ - 0x02050010, - 0x02040c20, - 0x0205001b, - 0x0204081b, -}; - -static const u32 mainboard_pc_beep_verbs[] = { - 0x00170500, /* power up everything (codec, dac, adc, mixers) */ - 0x01470740, /* enable speaker out */ - 0x01470c02, /* set speaker EAPD pin */ - 0x0143b01f, /* unmute speaker */ - 0x00c37100, /* unmute mixer nid 0xc input 1 */ - 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ -}; - -static const u32 mainboard_pc_beep_verbs_size = - sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/auron/mainboard.c b/src/mainboard/google/auron/mainboard.c index cc9907e..13eec7e 100644 --- a/src/mainboard/google/auron/mainboard.c +++ b/src/mainboard/google/auron/mainboard.c @@ -32,27 +32,10 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> -#include "hda_verb.h" #include "ec.h" #include "onboard.h" -/* Audio Setup */ - -extern const u32 *cim_verb_data; -extern u32 cim_verb_data_size; -extern const u32 *pc_beep_verbs; -extern u32 pc_beep_verbs_size; - -static void verb_setup(void) -{ - cim_verb_data = mainboard_cim_verb_data; - cim_verb_data_size = sizeof(mainboard_cim_verb_data); - pc_beep_verbs = mainboard_pc_beep_verbs; - pc_beep_verbs_size = mainboard_pc_beep_verbs_size; - -} - static void mainboard_init(device_t dev) { mainboard_ec_init(); @@ -110,7 +93,6 @@ static void mainboard_enable(device_t dev) dev->ops->init = mainboard_init; dev->ops->get_smbios_data = mainboard_smbios_data; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); - verb_setup(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/jecht/hda_verb.c b/src/mainboard/google/jecht/hda_verb.c new file mode 100644 index 0000000..f4b5982 --- /dev/null +++ b/src/mainboard/google/jecht/hda_verb.c @@ -0,0 +1,113 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000c, // Number of jacks (NID entries) + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC */ + 0x01271cf0, + 0x01271d11, + 0x01271e11, + 0x01271f41, + + /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ + 0x01471cf0, + 0x01471d11, + 0x01471e11, + 0x01471f40, + + /* Pin Complex (NID 0x17) */ + 0x01771cf0, + 0x01771d11, + 0x01771e11, + 0x01771f41, + + /* Pin Complex (NID 0x18) MIC1 PORTB */ + 0x01971c11, // group 1, cap 1 + 0x01971d10, // black, jack detect + 0x01971ea7, // mic in, analog + 0x01971f03, // connector, left panel + + /* Pin Complex (NID 0x19) MIC2 PORTF */ + 0x01871cf0, + 0x01871d11, + 0x01871e11, + 0x01871f41, + + /* Pin Complex (NID 0x1A) LINE1 PORTC */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1B) LINE2 PORTE */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1d) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, internal + + /* Pin Complex (NID 0x1E) SPDIF-OUT */ + 0x01e71cf0, + 0x01e71d11, + 0x01e71e11, + 0x01e71f41, + + /* Pin Complex (NID 0x21) HPOUT PORT-I */ + 0x02171c1f, // group1, + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 1/8 stereo + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +const u32 pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/jecht/hda_verb.h b/src/mainboard/google/jecht/hda_verb.h deleted file mode 100644 index bc7cf1d..0000000 --- a/src/mainboard/google/jecht/hda_verb.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static const u32 mainboard_cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 - 0x10ec0283, // Subsystem ID - 0x0000000c, // Number of jacks (NID entries) - - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ - 0x00172083, - 0x00172102, - 0x001722ec, - 0x00172310, - - /* Pin Widget Verb Table */ - - /* Pin Complex (NID 0x12) DMIC */ - 0x01271cf0, - 0x01271d11, - 0x01271e11, - 0x01271f41, - - /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ - 0x01471cf0, - 0x01471d11, - 0x01471e11, - 0x01471f40, - - /* Pin Complex (NID 0x17) */ - 0x01771cf0, - 0x01771d11, - 0x01771e11, - 0x01771f41, - - /* Pin Complex (NID 0x18) MIC1 PORTB */ - 0x01971c11, // group 1, cap 1 - 0x01971d10, // black, jack detect - 0x01971ea7, // mic in, analog - 0x01971f03, // connector, left panel - - /* Pin Complex (NID 0x19) MIC2 PORTF */ - 0x01871cf0, - 0x01871d11, - 0x01871e11, - 0x01871f41, - - /* Pin Complex (NID 0x1A) LINE1 PORTC */ - 0x01a71cf0, - 0x01a71d11, - 0x01a71e11, - 0x01a71f41, - - /* Pin Complex (NID 0x1B) LINE2 PORTE */ - 0x01a71cf0, - 0x01a71d11, - 0x01a71e11, - 0x01a71f41, - - /* Pin Complex (NID 0x1d) PCBeep */ - 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable - 0x01d71d81, // mute spkr on hpout - 0x01d71e15, // pcbeep en able, checksum - 0x01d71f40, // no physical, internal - - /* Pin Complex (NID 0x1E) SPDIF-OUT */ - 0x01e71cf0, - 0x01e71d11, - 0x01e71e11, - 0x01e71f41, - - /* Pin Complex (NID 0x21) HPOUT PORT-I */ - 0x02171c1f, // group1, - 0x02171d10, // black, jack detect - 0x02171e21, // HPOut, 1/8 stereo - 0x02171f03, // connector, left panel - - /* Undocumented settings from Realtek (needed for beep_gen) */ - /* Widget node 0x20 */ - 0x02050010, - 0x02040c20, - 0x0205001b, - 0x0204081b, -}; - -static const u32 mainboard_pc_beep_verbs[] = { - 0x00170500, /* power up everything (codec, dac, adc, mixers) */ - 0x01470740, /* enable speaker out */ - 0x01470c02, /* set speaker EAPD pin */ - 0x0143b01f, /* unmute speaker */ - 0x00c37100, /* unmute mixer nid 0xc input 1 */ - 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ -}; - -static const u32 mainboard_pc_beep_verbs_size = - sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/jecht/mainboard.c b/src/mainboard/google/jecht/mainboard.c index 8b3363c..f0b2e37 100644 --- a/src/mainboard/google/jecht/mainboard.c +++ b/src/mainboard/google/jecht/mainboard.c @@ -34,7 +34,6 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> -#include "hda_verb.h" #include "onboard.h" void mainboard_suspend_resume(void) @@ -129,22 +128,6 @@ static int int15_handler(void) } #endif -/* Audio Setup */ - -extern const u32 *cim_verb_data; -extern u32 cim_verb_data_size; -extern const u32 *pc_beep_verbs; -extern u32 pc_beep_verbs_size; - -static void verb_setup(void) -{ - cim_verb_data = mainboard_cim_verb_data; - cim_verb_data_size = sizeof(mainboard_cim_verb_data); - pc_beep_verbs = mainboard_pc_beep_verbs; - pc_beep_verbs_size = mainboard_pc_beep_verbs_size; - -} - static void mainboard_init(device_t dev) { lan_init(); @@ -160,7 +143,6 @@ static void mainboard_enable(device_t dev) /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler); #endif - verb_setup(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/cougar_canyon2/hda_verb.c b/src/mainboard/intel/cougar_canyon2/hda_verb.c index 51b6356..a110246 100644 --- a/src/mainboard/intel/cougar_canyon2/hda_verb.c +++ b/src/mainboard/intel/cougar_canyon2/hda_verb.c @@ -37,4 +37,7 @@ const u32 cim_verb_data[] = { /* Pin Complex (NID 0x07) Digital Out at Int HDMI */ AZALIA_PIN_CFG(0x3, 0x07, 0x18560030) }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/iwave/iWRainbowG6/hda_verb.c b/src/mainboard/iwave/iWRainbowG6/hda_verb.c index effc22e..21b230b 100644 --- a/src/mainboard/iwave/iWRainbowG6/hda_verb.c +++ b/src/mainboard/iwave/iWRainbowG6/hda_verb.c @@ -17,7 +17,9 @@ * Foundation, Inc. */ -static u32 mainboard_cim_verb_data[] = { +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { /* coreboot specific header */ 0x111d76d5, // Codec Vendor / Device ID: IDT 92HD81 0x00000000, // Subsystem ID @@ -89,4 +91,7 @@ static u32 mainboard_cim_verb_data[] = { /* BTL Gain */ 0x017F417, /* Gain = 16.79dB */ }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/msi/ms7260/hda_verb.c b/src/mainboard/msi/ms7260/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/msi/ms7260/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/msi/ms9652_fam10/hda_verb.c b/src/mainboard/msi/ms9652_fam10/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/msi/ms9652_fam10/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/nvidia/l1_2pvv/hda_verb.c b/src/mainboard/nvidia/l1_2pvv/hda_verb.c index bb20c2b..68076f9 100644 --- a/src/mainboard/nvidia/l1_2pvv/hda_verb.c +++ b/src/mainboard/nvidia/l1_2pvv/hda_verb.c @@ -19,7 +19,9 @@ * Foundation, Inc. */ -static u32 mainboard_cim_verb_data[] = { +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { /* coreboot specific header */ 0x10ec0880, // Codec Vendor / Device ID: Realtek ALC880 0x00000000, // Subsystem ID @@ -64,4 +66,7 @@ static u32 mainboard_cim_verb_data[] = { /* NID 0x1f, S/PDIF-IN */ AZALIA_PIN_CFG(0x0, 0x1f, 0x01c59150), }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dme/hda_verb.c b/src/mainboard/supermicro/h8dme/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dme/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dmr/hda_verb.c b/src/mainboard/supermicro/h8dmr/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c b/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index d7845e6..4b14ff8 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -66,6 +66,8 @@ ramstage-y += ehci.c ramstage-y += xhci.c smm-y += xhci.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + ifeq ($(CONFIG_USBDEBUG),y) ramstage-y += usbdebug.c romstage-y += usbdebug.c diff --git a/src/soc/intel/broadwell/hda.c b/src/soc/intel/broadwell/hda.c index 28b3df7..43321b7 100644 --- a/src/soc/intel/broadwell/hda.c +++ b/src/soc/intel/broadwell/hda.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -31,11 +32,6 @@ #include <soc/ramstage.h> #include <soc/rcba.h> -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static void codecs_init(u8 *base, u32 codec_mask) { int i; @@ -48,7 +44,7 @@ static void codecs_init(u8 *base, u32 codec_mask) cim_verb_data); } - if (pc_beep_verbs_size && pc_beep_verbs) + if (pc_beep_verbs_size) hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs); } diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index d96e641..228b6eb 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -39,6 +39,8 @@ smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c early_init.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/fsp_bd82x6x/azalia.c b/src/southbridge/intel/fsp_bd82x6x/azalia.c index e6c9b27..b6f728c 100644 --- a/src/southbridge/intel/fsp_bd82x6x/azalia.c +++ b/src/southbridge/intel/fsp_bd82x6x/azalia.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -91,11 +92,6 @@ no_codec: return 0; } -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { int idx=0; diff --git a/src/southbridge/intel/sch/Makefile.inc b/src/southbridge/intel/sch/Makefile.inc index db876a1..0b21801 100644 --- a/src/southbridge/intel/sch/Makefile.inc +++ b/src/southbridge/intel/sch/Makefile.inc @@ -36,6 +36,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_CMC) += cmc.bin diff --git a/src/southbridge/intel/sch/audio.c b/src/southbridge/intel/sch/audio.c index 770bb75..bba2f7b 100644 --- a/src/southbridge/intel/sch/audio.c +++ b/src/southbridge/intel/sch/audio.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -112,9 +113,6 @@ no_codec: return 0; } -const u32 *cim_verb_data = NULL; -u32 cim_verb_data_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { printk(BIOS_DEBUG, "sch_audio: dev=%s\n", dev_path(dev)); diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index 3e24f1c..fb9c3fb 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -20,6 +20,10 @@ ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ifeq ($(CONFIG_MCP55_USE_AZA),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c +endif + chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc bootblock-y += romstrap.ld diff --git a/src/southbridge/nvidia/mcp55/azalia.c b/src/southbridge/nvidia/mcp55/azalia.c index 8285749..bb4376f 100644 --- a/src/southbridge/nvidia/mcp55/azalia.c +++ b/src/southbridge/nvidia/mcp55/azalia.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -27,6 +28,7 @@ #include <delay.h> #include "mcp55.h" +#if IS_ENABLED(CONFIG_MCP55_USE_AZA) #define HDA_ICII_REG 0x68 #define HDA_ICII_BUSY (1 << 0) #define HDA_ICII_VALID (1 << 1) @@ -86,10 +88,8 @@ no_codec: return 0; } -u32 *cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -static u32 find_verb(struct device *dev, u32 viddid, u32 **verb) +static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb) { int idx = 0; @@ -155,7 +155,7 @@ static int wait_for_valid(u8 *base) static void codec_init(struct device *dev, u8 *base, int addr) { u32 reg32, verb_size; - u32 *verb; + const u32 *verb; int i; printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr); @@ -203,9 +203,11 @@ static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) codec_init(dev, base, i); } } +#endif static void azalia_init(struct device *dev) { +#if IS_ENABLED(CONFIG_MCP55_USE_AZA) u8 *base; u32 codec_mask, reg32; struct resource *res; @@ -253,6 +255,7 @@ static void azalia_init(struct device *dev) printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); codecs_init(dev, base, codec_mask); } +#endif } static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device)

1 0

Patch set updated for coreboot: payloads: Reorganize Makefile.incs for external payloads
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10829 -gerrit commit 2d82b32526dbc72461cae0a1f989c798c83a7b73 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 17:09:17 2015 -0700 payloads: Reorganize Makefile.incs for external payloads This is not going as far as I would like it to go, but some of the external payloads have to be fixed up first. Long term, I would like to directly add payloads/external/* to subdirs-y and remove one layer of indirection from the build process. For now, moving the payload Makefile targets into payloads/ is already a small improvement. Change-Id: Ie4eb492eb804e0aaaf1a4d90af2f876f27a32a75 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile.inc | 1 + payloads/external/Makefile.inc | 52 ++++++++++++++++++++++++++++++++++++++++++ src/arch/x86/Makefile.inc | 32 -------------------------- 3 files changed, 53 insertions(+), 32 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 2f1fe82..2963ebe 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -59,6 +59,7 @@ subdirs-y += src/superio $(wildcard src/drivers/*) src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom subdirs-y += $(wildcard src/arch/*) subdirs-y += src/mainboard/$(MAINBOARDDIR) +subdirs-y += payloads/external subdirs-y += site-local diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc new file mode 100644 index 0000000..33ed47f --- /dev/null +++ b/payloads/external/Makefile.inc @@ -0,0 +1,52 @@ +################################################################################ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009-2010 coresystems GmbH +## Copyright (C) 2015 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc. +## + +seabios: + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ + HOSTCC="$(HOSTCC)" \ + CC=$(word 1,$(CC_x86_32)) CFLAGS="$(patsubst $(word 1,$(CC_x86_32))%,,$(CC_x86_32))" \ + LD=$(word 1,$(LD_x86_32)) LDFLAGS="$(patsubst $(word 1,$(LD_x86_32))%,,$(LD_x86_32))" \ + OBJDUMP="$(OBJDUMP_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ + AS="$(AS_x86_32)" IASL="$(IASL)" \ + CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ + CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ + CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ + CONFIG_SEABIOS_VGA_COREBOOT=$(CONFIG_SEABIOS_VGA_COREBOOT) \ + CONFIG_CONSOLE_SERIAL=$(CONFIG_CONSOLE_SERIAL) \ + CONFIG_TTYS0_BASE=$(CONFIG_TTYS0_BASE) \ + CONFIG_SEABIOS_MALLOC_UPPERMEMORY=$(CONFIG_SEABIOS_MALLOC_UPPERMEMORY) + +filo: + $(MAKE) -C payloads/external/FILO -f Makefile.inc \ + HOSTCC="$(HOSTCC)" \ + CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ + CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ + CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) + + +grub2: + $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ + HOSTCC="$(HOSTCC)" \ + CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ + CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index f502bbe..4549c82 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -334,36 +334,4 @@ endif endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64 -################################################################################ -seabios: - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ - HOSTCC="$(HOSTCC)" \ - CC=$(word 1,$(CC_x86_32)) CFLAGS="$(patsubst $(word 1,$(CC_x86_32))%,,$(CC_x86_32))" \ - LD=$(word 1,$(LD_x86_32)) LDFLAGS="$(patsubst $(word 1,$(LD_x86_32))%,,$(LD_x86_32))" \ - OBJDUMP="$(OBJDUMP_x86_32)" \ - OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ - AS="$(AS_x86_32)" IASL="$(IASL)" \ - CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ - CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ - CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ - CONFIG_SEABIOS_VGA_COREBOOT=$(CONFIG_SEABIOS_VGA_COREBOOT) \ - CONFIG_CONSOLE_SERIAL=$(CONFIG_CONSOLE_SERIAL) \ - CONFIG_TTYS0_BASE=$(CONFIG_TTYS0_BASE) \ - CONFIG_SEABIOS_MALLOC_UPPERMEMORY=$(CONFIG_SEABIOS_MALLOC_UPPERMEMORY) - -filo: - $(MAKE) -C payloads/external/FILO -f Makefile.inc \ - HOSTCC="$(HOSTCC)" \ - CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ - OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ - CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ - CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) - - -grub2: - $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ - HOSTCC="$(HOSTCC)" \ - CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ - OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ - CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER)

1 0

Patch set updated for coreboot: payloads: Reorganize Kconfig for external payloads
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10828 -gerrit commit 9024e654f8f37a5b2c93594b7207b2d24e3625c9 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 15:58:56 2015 -0700 payloads: Reorganize Kconfig for external payloads The integration of external payloads in coreboot is a bit messy. You have to change the to level Kconfig file for every payload (something that we recently fixed for mainboards and chipsets). This means that updating e.g. the SeaBIOS version requires a change outside of the SeaBIOS directory. With this patch you can create a new directory under payloads/external and place a Kconfig and Kconfig.name file in there, and the payload will automatically show up when you do "make menuconfig". Change-Id: I293abcb8eae581d4b3934e64897c0d339a27e7c1 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/external/FILO/Kconfig | 22 ++++ payloads/external/FILO/Kconfig.name | 8 ++ payloads/external/GRUB2/Kconfig | 17 +++ payloads/external/GRUB2/Kconfig.name | 8 ++ payloads/external/SeaBIOS/Kconfig | 70 ++++++++++++ payloads/external/SeaBIOS/Kconfig.name | 9 ++ payloads/external/linux/Kconfig | 21 ++++ payloads/external/linux/Kconfig.name | 9 ++ payloads/external/tianocore/Kconfig | 9 ++ payloads/external/tianocore/Kconfig.name | 8 ++ src/Kconfig | 184 +------------------------------ 11 files changed, 184 insertions(+), 181 deletions(-) diff --git a/payloads/external/FILO/Kconfig b/payloads/external/FILO/Kconfig new file mode 100644 index 0000000..94d5e18 --- /dev/null +++ b/payloads/external/FILO/Kconfig @@ -0,0 +1,22 @@ +if PAYLOAD_FILO + +choice + prompt "FILO version" + default FILO_STABLE + +config FILO_STABLE + bool "0.6.0" + help + Stable FILO version + +config FILO_MASTER + bool "HEAD" + help + Newest FILO version + +endchoice + +config PAYLOAD_FILE + default "payloads/external/FILO/filo/build/filo.elf" + +endif diff --git a/payloads/external/FILO/Kconfig.name b/payloads/external/FILO/Kconfig.name new file mode 100644 index 0000000..244077d --- /dev/null +++ b/payloads/external/FILO/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_FILO + bool "FILO" + help + Select this option if you want to build a coreboot image + with a FILO payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/GRUB2/Kconfig b/payloads/external/GRUB2/Kconfig new file mode 100644 index 0000000..3d0fa6c --- /dev/null +++ b/payloads/external/GRUB2/Kconfig @@ -0,0 +1,17 @@ +if PAYLOAD_GRUB2 + +choice + prompt "GRUB2 version" + default GRUB2_MASTER + +config GRUB2_MASTER + bool "HEAD" + help + Newest GRUB2 version + +endchoice + +config PAYLOAD_FILE + default "payloads/external/GRUB2/grub2/build/default_payload.elf" + +endif diff --git a/payloads/external/GRUB2/Kconfig.name b/payloads/external/GRUB2/Kconfig.name new file mode 100644 index 0000000..c3a8ddf --- /dev/null +++ b/payloads/external/GRUB2/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_GRUB2 + bool "GRUB2" + help + Select this option if you want to build a coreboot image + with a GRUB2 payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig new file mode 100644 index 0000000..b2ff21e --- /dev/null +++ b/payloads/external/SeaBIOS/Kconfig @@ -0,0 +1,70 @@ +if PAYLOAD_SEABIOS + +choice + prompt "SeaBIOS version" + default SEABIOS_STABLE + +config SEABIOS_STABLE + bool "1.7.5" + help + Stable SeaBIOS version +config SEABIOS_MASTER + bool "master" + help + Newest SeaBIOS version + +endchoice + +config SEABIOS_PS2_TIMEOUT + prompt "PS/2 keyboard controller initialization timeout (milliseconds)" + default 0 + depends on EXPERT + int + help + Some PS/2 keyboard controllers don't respond to commands immediately + after powering on. This specifies how long SeaBIOS will wait for the + keyboard controller to become ready before giving up. + +config SEABIOS_THREAD_OPTIONROMS + prompt "Hardware init during option ROM execution" + default n + bool + help + Allow hardware init to run in parallel with optionrom execution. + + This can reduce boot time, but can cause some timing + variations during option ROM code execution. It is not + known if all option ROMs will behave properly with this option. + +config SEABIOS_MALLOC_UPPERMEMORY + bool + default y + help + Use the "Upper Memory Block" area (0xc0000-0xf0000) for internal + "low memory" allocations. If this is not selected, the memory is + instead allocated from the "9-segment" (0x90000-0xa0000). + This is not typically needed, but may be required on some platforms + to allow USB and SATA buffers to be written correctly by the + hardware. In general, if this is desired, the option will be + set to 'N' by the chipset Kconfig. + +config SEABIOS_VGA_COREBOOT + prompt "Include generated option rom that implements legacy VGA BIOS compatibility" + default n + depends on !VGA_BIOS && (MAINBOARD_DO_NATIVE_VGA_INIT || MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG) + bool + help + Coreboot can initialize the GPU of some mainboards. + + After initializing the GPU, the information about it can be passed to the payload. + Provide an option rom that implements this legacy VGA BIOS compatibility requirement. + +config PAYLOAD_FILE + default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf" + +config PAYLOAD_VGABIOS_FILE + string + depends on SEABIOS_VGA_COREBOOT + default "payloads/external/SeaBIOS/seabios/out/vgabios.bin" + +endif diff --git a/payloads/external/SeaBIOS/Kconfig.name b/payloads/external/SeaBIOS/Kconfig.name new file mode 100644 index 0000000..9ab235d --- /dev/null +++ b/payloads/external/SeaBIOS/Kconfig.name @@ -0,0 +1,9 @@ +config PAYLOAD_SEABIOS + bool "SeaBIOS" + depends on ARCH_X86 + help + Select this option if you want to build a coreboot image + with a SeaBIOS payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/linux/Kconfig b/payloads/external/linux/Kconfig new file mode 100644 index 0000000..8b15f99 --- /dev/null +++ b/payloads/external/linux/Kconfig @@ -0,0 +1,21 @@ +if PAYLOAD_LINUX + +config PAYLOAD_FILE + string "Linux path and filename" + default "bzImage" + help + The path and filename of the bzImage kernel to use as payload. + +config LINUX_COMMAND_LINE + string "Linux command line" + default "" + help + A command line to add to the Linux kernel. + +config LINUX_INITRD + string "Linux initrd" + default "" + help + An initrd image to add to the Linux kernel. + +endif diff --git a/payloads/external/linux/Kconfig.name b/payloads/external/linux/Kconfig.name new file mode 100644 index 0000000..ae1d906 --- /dev/null +++ b/payloads/external/linux/Kconfig.name @@ -0,0 +1,9 @@ +config PAYLOAD_LINUX + bool "A Linux payload" + help + Select this option if you have a Linux bzImage which coreboot + should run as soon as the basic hardware initialization + is completed. + + You will be able to specify the location and file name of the + payload image later. diff --git a/payloads/external/tianocore/Kconfig b/payloads/external/tianocore/Kconfig new file mode 100644 index 0000000..8a98bd3 --- /dev/null +++ b/payloads/external/tianocore/Kconfig @@ -0,0 +1,9 @@ +if PAYLOAD_TIANOCORE + +config PAYLOAD_FILE + string "Tianocore firmware volume" + default "COREBOOT.fd" + help + The result of a corebootPkg build + +endif diff --git a/payloads/external/tianocore/Kconfig.name b/payloads/external/tianocore/Kconfig.name new file mode 100644 index 0000000..d57f7e1 --- /dev/null +++ b/payloads/external/tianocore/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_TIANOCORE + bool "Tiano Core" + help + Select this option if you want to build a coreboot image + with a Tiano Core payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/src/Kconfig b/src/Kconfig index 94b3508..a2129ad 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -667,144 +667,11 @@ config PAYLOAD_ELF You will be able to specify the location and file name of the payload image later. -config PAYLOAD_LINUX - bool "A Linux payload" - help - Select this option if you have a Linux bzImage which coreboot - should run as soon as the basic hardware initialization - is completed. - - You will be able to specify the location and file name of the - payload image later. - -config PAYLOAD_SEABIOS - bool "SeaBIOS" - depends on ARCH_X86 - help - Select this option if you want to build a coreboot image - with a SeaBIOS payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -config PAYLOAD_FILO - bool "FILO" - help - Select this option if you want to build a coreboot image - with a FILO payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -config PAYLOAD_GRUB2 - bool "GRUB2" - help - Select this option if you want to build a coreboot image - with a GRUB2 payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -config PAYLOAD_TIANOCORE - bool "Tiano Core" - help - Select this option if you want to build a coreboot image - with a Tiano Core payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -endchoice - -choice - prompt "SeaBIOS version" - default SEABIOS_STABLE - depends on PAYLOAD_SEABIOS - -config SEABIOS_STABLE - bool "1.7.5" - help - Stable SeaBIOS version -config SEABIOS_MASTER - bool "master" - help - Newest SeaBIOS version - -endchoice - -config SEABIOS_PS2_TIMEOUT - prompt "PS/2 keyboard controller initialization timeout (milliseconds)" if PAYLOAD_SEABIOS - default 0 - depends on EXPERT - int - help - Some PS/2 keyboard controllers don't respond to commands immediately - after powering on. This specifies how long SeaBIOS will wait for the - keyboard controller to become ready before giving up. - -config SEABIOS_THREAD_OPTIONROMS - prompt "Hardware init during option ROM execution" if PAYLOAD_SEABIOS - default n - bool - help - Allow hardware init to run in parallel with optionrom execution. - - This can reduce boot time, but can cause some timing - variations during option ROM code execution. It is not - known if all option ROMs will behave properly with this option. - -config SEABIOS_MALLOC_UPPERMEMORY - bool - default y - depends on PAYLOAD_SEABIOS - help - Use the "Upper Memory Block" area (0xc0000-0xf0000) for internal - "low memory" allocations. If this is not selected, the memory is - instead allocated from the "9-segment" (0x90000-0xa0000). - This is not typically needed, but may be required on some platforms - to allow USB and SATA buffers to be written correctly by the - hardware. In general, if this is desired, the option will be - set to 'N' by the chipset Kconfig. - -config SEABIOS_VGA_COREBOOT - prompt "Include generated option rom that implements legacy VGA BIOS compatibility" if PAYLOAD_SEABIOS - default n - depends on !VGA_BIOS && (MAINBOARD_DO_NATIVE_VGA_INIT || MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG) - bool - help - Coreboot can initialize the GPU of some mainboards. - - After initializing the GPU, the information about it can be passed to the payload. - Provide an option rom that implements this legacy VGA BIOS compatibility requirement. - -choice - prompt "GRUB2 version" - default GRUB2_MASTER - depends on PAYLOAD_GRUB2 - -config GRUB2_MASTER - bool "HEAD" - help - Newest GRUB2 version +source "payloads/external/*/Kconfig.name" endchoice -choice - prompt "FILO version" - default FILO_STABLE - depends on PAYLOAD_FILO - -config FILO_STABLE - bool "0.6.0" - help - Stable FILO version - -config FILO_MASTER - bool "HEAD" - help - Newest FILO version - -endchoice +source "payloads/external/*/Kconfig" config PAYLOAD_FILE string "Payload path and filename" @@ -813,60 +680,15 @@ config PAYLOAD_FILE help The path and filename of the ELF executable file to use as payload. -config PAYLOAD_FILE - string "Linux path and filename" - depends on PAYLOAD_LINUX - default "bzImage" - help - The path and filename of the bzImage kernel to use as payload. - -config PAYLOAD_FILE - depends on PAYLOAD_SEABIOS - default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf" - -config PAYLOAD_VGABIOS_FILE - string - depends on PAYLOAD_SEABIOS && SEABIOS_VGA_COREBOOT - default "payloads/external/SeaBIOS/seabios/out/vgabios.bin" - -config PAYLOAD_FILE - depends on PAYLOAD_FILO - default "payloads/external/FILO/filo/build/filo.elf" - -config PAYLOAD_FILE - depends on PAYLOAD_GRUB2 - default "payloads/external/GRUB2/grub2/build/default_payload.elf" - -config PAYLOAD_FILE - string "Tianocore firmware volume" - depends on PAYLOAD_TIANOCORE - default "COREBOOT.fd" - help - The result of a corebootPkg build - # TODO: Defined if no payload? Breaks build? config COMPRESSED_PAYLOAD_LZMA bool "Use LZMA compression for payloads" default y - depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO || PAYLOAD_TIANOCORE || PAYLOAD_GRUB2 + depends on !PAYLOAD_NONE && !PAYLOAD_LINUX help In order to reduce the size payloads take up in the ROM chip coreboot can compress them using the LZMA algorithm. -config LINUX_COMMAND_LINE - string "Linux command line" - depends on PAYLOAD_LINUX - default "" - help - A command line to add to the Linux kernel. - -config LINUX_INITRD - string "Linux initrd" - depends on PAYLOAD_LINUX - default "" - help - An initrd image to add to the Linux kernel. - endmenu menu "Debugging"

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Patch set updated for coreboot: azalia: fix up and clean up shrinkage of boilerplate code
by Jonathan A. Kollasch 07 Jul '15

07 Jul '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10826 -gerrit commit f58d67fb4a0b0332d99db1497ad50c96edcab729 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jul 7 12:57:46 2015 -0500 azalia: fix up and clean up shrinkage of boilerplate code Should fix regressions in HDA verb setup on nvidia mcp55 and intel sch southbridges. Intel broadwell and sp_bd82x6x seemed to have not gotten the boilerplate shrink, so apply it to those too. Followup-to: Ib3e09644c0ee71aacb067adaa85653d151b52078 Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/asus/m2n-e/hda_verb.c | 2 + src/mainboard/gigabyte/m57sli/hda_verb.c | 7 ++ src/mainboard/google/auron/hda_verb.c | 123 ++++++++++++++++++++++++ src/mainboard/google/auron/hda_verb.h | 122 ----------------------- src/mainboard/google/auron/mainboard.c | 17 ---- src/mainboard/google/jecht/hda_verb.c | 113 ++++++++++++++++++++++ src/mainboard/google/jecht/hda_verb.h | 112 --------------------- src/mainboard/google/jecht/mainboard.c | 18 ---- src/mainboard/intel/cougar_canyon2/hda_verb.c | 3 + src/mainboard/iwave/iWRainbowG6/hda_verb.c | 7 +- src/mainboard/msi/ms7260/hda_verb.c | 7 ++ src/mainboard/msi/ms9652_fam10/hda_verb.c | 7 ++ src/mainboard/nvidia/l1_2pvv/hda_verb.c | 7 +- src/mainboard/supermicro/h8dme/hda_verb.c | 7 ++ src/mainboard/supermicro/h8dmr/hda_verb.c | 7 ++ src/mainboard/supermicro/h8dmr_fam10/hda_verb.c | 7 ++ src/soc/intel/broadwell/Makefile.inc | 2 + src/soc/intel/broadwell/hda.c | 8 +- src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 + src/southbridge/intel/fsp_bd82x6x/azalia.c | 6 +- src/southbridge/intel/sch/Makefile.inc | 1 + src/southbridge/intel/sch/audio.c | 4 +- src/southbridge/nvidia/mcp55/Makefile.inc | 4 + src/southbridge/nvidia/mcp55/azalia.c | 11 ++- 24 files changed, 315 insertions(+), 289 deletions(-) diff --git a/src/mainboard/asus/m2n-e/hda_verb.c b/src/mainboard/asus/m2n-e/hda_verb.c index 58bb983..7e9a53c 100644 --- a/src/mainboard/asus/m2n-e/hda_verb.c +++ b/src/mainboard/asus/m2n-e/hda_verb.c @@ -78,4 +78,6 @@ const u32 cim_verb_data[] = { AZALIA_PIN_CFG(0x0, 0x25, 0x01012014), }; +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/gigabyte/m57sli/hda_verb.c b/src/mainboard/gigabyte/m57sli/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/gigabyte/m57sli/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/auron/hda_verb.c b/src/mainboard/google/auron/hda_verb.c new file mode 100644 index 0000000..e015a83 --- /dev/null +++ b/src/mainboard/google/auron/hda_verb.c @@ -0,0 +1,123 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000d, // Number of jacks (NID entries) + + 0x0017ff00, // Function Reset + 0x0017ff00, // Double Function Reset + 0x000F0000, // Pad - get vendor id + 0x000F0002, // Pad - get revision id + + /* Bits 31:28 - Codec Address */ + /* Bits 27:20 - NID */ + /* Bits 19:8 - Verb ID */ + /* Bits 7:0 - Payload */ + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC - Disabled */ + 0x01271cf0, // + 0x01271d11, // + 0x01271e11, // + 0x01271f41, // + + /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */ + 0x01471c10, // group 1, cap 0 + 0x01471d01, // no connector, no jack detect + 0x01471e17, // speaker out, analog + 0x01471f90, // fixed function, internal, Location N/A + + /* Pin Complex (NID 0x17) MONO Out - Disabled */ + 0x01771cf0, // + 0x01771d11, // + 0x01771e11, // + 0x01771f41, // + + /* Pin Complex (NID 0x18) Disabled */ + 0x01871cf0, // + 0x01871d11, // + 0x01871e11, // + 0x01871f41, // + + /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */ + 0x01971c20, // group2, cap 0 + 0x01971d10, // black, jack detect + 0x01971ea1, // Mic in, 3.5mm Jack + 0x01971f03, // connector, External left panel + + /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */ + 0x01a71c11, // group 1, cap 1 + 0x01a71d01, // no connector, no jack detect + 0x01a71ea7, // mic in, analog connection + 0x01a71f90, // Fixed function, internal, Location N/A + + /* Pin Complex (NID 0x1B) LINE2 - Disabled */ + 0x01b71cf0, // + 0x01b71d11, // + 0x01b71e11, // + 0x01b71f41, // + + /* Pin Complex (NID 0x1D) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, Internal, Location N/A + + /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/ + 0x01e71cf0, // + 0x01e71d11, // + 0x01e71e11, // + 0x01e71f41, // + + /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/ + 0x02171c21, // group2, cap 1 + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 3.5mm Jack + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +const u32 pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/auron/hda_verb.h b/src/mainboard/google/auron/hda_verb.h deleted file mode 100644 index 275ee3a..0000000 --- a/src/mainboard/google/auron/hda_verb.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static const u32 mainboard_cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 - 0x10ec0283, // Subsystem ID - 0x0000000d, // Number of jacks (NID entries) - - 0x0017ff00, // Function Reset - 0x0017ff00, // Double Function Reset - 0x000F0000, // Pad - get vendor id - 0x000F0002, // Pad - get revision id - - /* Bits 31:28 - Codec Address */ - /* Bits 27:20 - NID */ - /* Bits 19:8 - Verb ID */ - /* Bits 7:0 - Payload */ - - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ - 0x00172083, - 0x00172102, - 0x001722ec, - 0x00172310, - - /* Pin Widget Verb Table */ - - /* Pin Complex (NID 0x12) DMIC - Disabled */ - 0x01271cf0, // - 0x01271d11, // - 0x01271e11, // - 0x01271f41, // - - /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */ - 0x01471c10, // group 1, cap 0 - 0x01471d01, // no connector, no jack detect - 0x01471e17, // speaker out, analog - 0x01471f90, // fixed function, internal, Location N/A - - /* Pin Complex (NID 0x17) MONO Out - Disabled */ - 0x01771cf0, // - 0x01771d11, // - 0x01771e11, // - 0x01771f41, // - - /* Pin Complex (NID 0x18) Disabled */ - 0x01871cf0, // - 0x01871d11, // - 0x01871e11, // - 0x01871f41, // - - /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */ - 0x01971c20, // group2, cap 0 - 0x01971d10, // black, jack detect - 0x01971ea1, // Mic in, 3.5mm Jack - 0x01971f03, // connector, External left panel - - /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */ - 0x01a71c11, // group 1, cap 1 - 0x01a71d01, // no connector, no jack detect - 0x01a71ea7, // mic in, analog connection - 0x01a71f90, // Fixed function, internal, Location N/A - - /* Pin Complex (NID 0x1B) LINE2 - Disabled */ - 0x01b71cf0, // - 0x01b71d11, // - 0x01b71e11, // - 0x01b71f41, // - - /* Pin Complex (NID 0x1D) PCBeep */ - 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable - 0x01d71d81, // mute spkr on hpout - 0x01d71e15, // pcbeep en able, checksum - 0x01d71f40, // no physical, Internal, Location N/A - - /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/ - 0x01e71cf0, // - 0x01e71d11, // - 0x01e71e11, // - 0x01e71f41, // - - /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/ - 0x02171c21, // group2, cap 1 - 0x02171d10, // black, jack detect - 0x02171e21, // HPOut, 3.5mm Jack - 0x02171f03, // connector, left panel - - /* Undocumented settings from Realtek (needed for beep_gen) */ - /* Widget node 0x20 */ - 0x02050010, - 0x02040c20, - 0x0205001b, - 0x0204081b, -}; - -static const u32 mainboard_pc_beep_verbs[] = { - 0x00170500, /* power up everything (codec, dac, adc, mixers) */ - 0x01470740, /* enable speaker out */ - 0x01470c02, /* set speaker EAPD pin */ - 0x0143b01f, /* unmute speaker */ - 0x00c37100, /* unmute mixer nid 0xc input 1 */ - 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ -}; - -static const u32 mainboard_pc_beep_verbs_size = - sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/auron/mainboard.c b/src/mainboard/google/auron/mainboard.c index cc9907e..715db40 100644 --- a/src/mainboard/google/auron/mainboard.c +++ b/src/mainboard/google/auron/mainboard.c @@ -37,22 +37,6 @@ #include "onboard.h" -/* Audio Setup */ - -extern const u32 *cim_verb_data; -extern u32 cim_verb_data_size; -extern const u32 *pc_beep_verbs; -extern u32 pc_beep_verbs_size; - -static void verb_setup(void) -{ - cim_verb_data = mainboard_cim_verb_data; - cim_verb_data_size = sizeof(mainboard_cim_verb_data); - pc_beep_verbs = mainboard_pc_beep_verbs; - pc_beep_verbs_size = mainboard_pc_beep_verbs_size; - -} - static void mainboard_init(device_t dev) { mainboard_ec_init(); @@ -110,7 +94,6 @@ static void mainboard_enable(device_t dev) dev->ops->init = mainboard_init; dev->ops->get_smbios_data = mainboard_smbios_data; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); - verb_setup(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/jecht/hda_verb.c b/src/mainboard/google/jecht/hda_verb.c new file mode 100644 index 0000000..f4b5982 --- /dev/null +++ b/src/mainboard/google/jecht/hda_verb.c @@ -0,0 +1,113 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000c, // Number of jacks (NID entries) + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC */ + 0x01271cf0, + 0x01271d11, + 0x01271e11, + 0x01271f41, + + /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ + 0x01471cf0, + 0x01471d11, + 0x01471e11, + 0x01471f40, + + /* Pin Complex (NID 0x17) */ + 0x01771cf0, + 0x01771d11, + 0x01771e11, + 0x01771f41, + + /* Pin Complex (NID 0x18) MIC1 PORTB */ + 0x01971c11, // group 1, cap 1 + 0x01971d10, // black, jack detect + 0x01971ea7, // mic in, analog + 0x01971f03, // connector, left panel + + /* Pin Complex (NID 0x19) MIC2 PORTF */ + 0x01871cf0, + 0x01871d11, + 0x01871e11, + 0x01871f41, + + /* Pin Complex (NID 0x1A) LINE1 PORTC */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1B) LINE2 PORTE */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1d) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, internal + + /* Pin Complex (NID 0x1E) SPDIF-OUT */ + 0x01e71cf0, + 0x01e71d11, + 0x01e71e11, + 0x01e71f41, + + /* Pin Complex (NID 0x21) HPOUT PORT-I */ + 0x02171c1f, // group1, + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 1/8 stereo + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +const u32 pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/jecht/hda_verb.h b/src/mainboard/google/jecht/hda_verb.h deleted file mode 100644 index bc7cf1d..0000000 --- a/src/mainboard/google/jecht/hda_verb.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static const u32 mainboard_cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 - 0x10ec0283, // Subsystem ID - 0x0000000c, // Number of jacks (NID entries) - - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ - 0x00172083, - 0x00172102, - 0x001722ec, - 0x00172310, - - /* Pin Widget Verb Table */ - - /* Pin Complex (NID 0x12) DMIC */ - 0x01271cf0, - 0x01271d11, - 0x01271e11, - 0x01271f41, - - /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ - 0x01471cf0, - 0x01471d11, - 0x01471e11, - 0x01471f40, - - /* Pin Complex (NID 0x17) */ - 0x01771cf0, - 0x01771d11, - 0x01771e11, - 0x01771f41, - - /* Pin Complex (NID 0x18) MIC1 PORTB */ - 0x01971c11, // group 1, cap 1 - 0x01971d10, // black, jack detect - 0x01971ea7, // mic in, analog - 0x01971f03, // connector, left panel - - /* Pin Complex (NID 0x19) MIC2 PORTF */ - 0x01871cf0, - 0x01871d11, - 0x01871e11, - 0x01871f41, - - /* Pin Complex (NID 0x1A) LINE1 PORTC */ - 0x01a71cf0, - 0x01a71d11, - 0x01a71e11, - 0x01a71f41, - - /* Pin Complex (NID 0x1B) LINE2 PORTE */ - 0x01a71cf0, - 0x01a71d11, - 0x01a71e11, - 0x01a71f41, - - /* Pin Complex (NID 0x1d) PCBeep */ - 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable - 0x01d71d81, // mute spkr on hpout - 0x01d71e15, // pcbeep en able, checksum - 0x01d71f40, // no physical, internal - - /* Pin Complex (NID 0x1E) SPDIF-OUT */ - 0x01e71cf0, - 0x01e71d11, - 0x01e71e11, - 0x01e71f41, - - /* Pin Complex (NID 0x21) HPOUT PORT-I */ - 0x02171c1f, // group1, - 0x02171d10, // black, jack detect - 0x02171e21, // HPOut, 1/8 stereo - 0x02171f03, // connector, left panel - - /* Undocumented settings from Realtek (needed for beep_gen) */ - /* Widget node 0x20 */ - 0x02050010, - 0x02040c20, - 0x0205001b, - 0x0204081b, -}; - -static const u32 mainboard_pc_beep_verbs[] = { - 0x00170500, /* power up everything (codec, dac, adc, mixers) */ - 0x01470740, /* enable speaker out */ - 0x01470c02, /* set speaker EAPD pin */ - 0x0143b01f, /* unmute speaker */ - 0x00c37100, /* unmute mixer nid 0xc input 1 */ - 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ -}; - -static const u32 mainboard_pc_beep_verbs_size = - sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/jecht/mainboard.c b/src/mainboard/google/jecht/mainboard.c index 8b3363c..f0b2e37 100644 --- a/src/mainboard/google/jecht/mainboard.c +++ b/src/mainboard/google/jecht/mainboard.c @@ -34,7 +34,6 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> -#include "hda_verb.h" #include "onboard.h" void mainboard_suspend_resume(void) @@ -129,22 +128,6 @@ static int int15_handler(void) } #endif -/* Audio Setup */ - -extern const u32 *cim_verb_data; -extern u32 cim_verb_data_size; -extern const u32 *pc_beep_verbs; -extern u32 pc_beep_verbs_size; - -static void verb_setup(void) -{ - cim_verb_data = mainboard_cim_verb_data; - cim_verb_data_size = sizeof(mainboard_cim_verb_data); - pc_beep_verbs = mainboard_pc_beep_verbs; - pc_beep_verbs_size = mainboard_pc_beep_verbs_size; - -} - static void mainboard_init(device_t dev) { lan_init(); @@ -160,7 +143,6 @@ static void mainboard_enable(device_t dev) /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler); #endif - verb_setup(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/cougar_canyon2/hda_verb.c b/src/mainboard/intel/cougar_canyon2/hda_verb.c index 51b6356..a110246 100644 --- a/src/mainboard/intel/cougar_canyon2/hda_verb.c +++ b/src/mainboard/intel/cougar_canyon2/hda_verb.c @@ -37,4 +37,7 @@ const u32 cim_verb_data[] = { /* Pin Complex (NID 0x07) Digital Out at Int HDMI */ AZALIA_PIN_CFG(0x3, 0x07, 0x18560030) }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/iwave/iWRainbowG6/hda_verb.c b/src/mainboard/iwave/iWRainbowG6/hda_verb.c index effc22e..21b230b 100644 --- a/src/mainboard/iwave/iWRainbowG6/hda_verb.c +++ b/src/mainboard/iwave/iWRainbowG6/hda_verb.c @@ -17,7 +17,9 @@ * Foundation, Inc. */ -static u32 mainboard_cim_verb_data[] = { +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { /* coreboot specific header */ 0x111d76d5, // Codec Vendor / Device ID: IDT 92HD81 0x00000000, // Subsystem ID @@ -89,4 +91,7 @@ static u32 mainboard_cim_verb_data[] = { /* BTL Gain */ 0x017F417, /* Gain = 16.79dB */ }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/msi/ms7260/hda_verb.c b/src/mainboard/msi/ms7260/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/msi/ms7260/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/msi/ms9652_fam10/hda_verb.c b/src/mainboard/msi/ms9652_fam10/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/msi/ms9652_fam10/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/nvidia/l1_2pvv/hda_verb.c b/src/mainboard/nvidia/l1_2pvv/hda_verb.c index bb20c2b..68076f9 100644 --- a/src/mainboard/nvidia/l1_2pvv/hda_verb.c +++ b/src/mainboard/nvidia/l1_2pvv/hda_verb.c @@ -19,7 +19,9 @@ * Foundation, Inc. */ -static u32 mainboard_cim_verb_data[] = { +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { /* coreboot specific header */ 0x10ec0880, // Codec Vendor / Device ID: Realtek ALC880 0x00000000, // Subsystem ID @@ -64,4 +66,7 @@ static u32 mainboard_cim_verb_data[] = { /* NID 0x1f, S/PDIF-IN */ AZALIA_PIN_CFG(0x0, 0x1f, 0x01c59150), }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dme/hda_verb.c b/src/mainboard/supermicro/h8dme/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dme/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dmr/hda_verb.c b/src/mainboard/supermicro/h8dmr/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c b/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index d7845e6..4b14ff8 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -66,6 +66,8 @@ ramstage-y += ehci.c ramstage-y += xhci.c smm-y += xhci.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + ifeq ($(CONFIG_USBDEBUG),y) ramstage-y += usbdebug.c romstage-y += usbdebug.c diff --git a/src/soc/intel/broadwell/hda.c b/src/soc/intel/broadwell/hda.c index 28b3df7..43321b7 100644 --- a/src/soc/intel/broadwell/hda.c +++ b/src/soc/intel/broadwell/hda.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -31,11 +32,6 @@ #include <soc/ramstage.h> #include <soc/rcba.h> -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static void codecs_init(u8 *base, u32 codec_mask) { int i; @@ -48,7 +44,7 @@ static void codecs_init(u8 *base, u32 codec_mask) cim_verb_data); } - if (pc_beep_verbs_size && pc_beep_verbs) + if (pc_beep_verbs_size) hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs); } diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index d96e641..228b6eb 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -39,6 +39,8 @@ smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c early_init.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/fsp_bd82x6x/azalia.c b/src/southbridge/intel/fsp_bd82x6x/azalia.c index e6c9b27..b6f728c 100644 --- a/src/southbridge/intel/fsp_bd82x6x/azalia.c +++ b/src/southbridge/intel/fsp_bd82x6x/azalia.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -91,11 +92,6 @@ no_codec: return 0; } -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { int idx=0; diff --git a/src/southbridge/intel/sch/Makefile.inc b/src/southbridge/intel/sch/Makefile.inc index db876a1..0b21801 100644 --- a/src/southbridge/intel/sch/Makefile.inc +++ b/src/southbridge/intel/sch/Makefile.inc @@ -36,6 +36,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_CMC) += cmc.bin diff --git a/src/southbridge/intel/sch/audio.c b/src/southbridge/intel/sch/audio.c index 770bb75..bba2f7b 100644 --- a/src/southbridge/intel/sch/audio.c +++ b/src/southbridge/intel/sch/audio.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -112,9 +113,6 @@ no_codec: return 0; } -const u32 *cim_verb_data = NULL; -u32 cim_verb_data_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { printk(BIOS_DEBUG, "sch_audio: dev=%s\n", dev_path(dev)); diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index 3e24f1c..fb9c3fb 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -20,6 +20,10 @@ ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ifeq ($(CONFIG_MCP55_USE_AZA),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c +endif + chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc bootblock-y += romstrap.ld diff --git a/src/southbridge/nvidia/mcp55/azalia.c b/src/southbridge/nvidia/mcp55/azalia.c index 8285749..bb4376f 100644 --- a/src/southbridge/nvidia/mcp55/azalia.c +++ b/src/southbridge/nvidia/mcp55/azalia.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -27,6 +28,7 @@ #include <delay.h> #include "mcp55.h" +#if IS_ENABLED(CONFIG_MCP55_USE_AZA) #define HDA_ICII_REG 0x68 #define HDA_ICII_BUSY (1 << 0) #define HDA_ICII_VALID (1 << 1) @@ -86,10 +88,8 @@ no_codec: return 0; } -u32 *cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -static u32 find_verb(struct device *dev, u32 viddid, u32 **verb) +static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb) { int idx = 0; @@ -155,7 +155,7 @@ static int wait_for_valid(u8 *base) static void codec_init(struct device *dev, u8 *base, int addr) { u32 reg32, verb_size; - u32 *verb; + const u32 *verb; int i; printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr); @@ -203,9 +203,11 @@ static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) codec_init(dev, base, i); } } +#endif static void azalia_init(struct device *dev) { +#if IS_ENABLED(CONFIG_MCP55_USE_AZA) u8 *base; u32 codec_mask, reg32; struct resource *res; @@ -253,6 +255,7 @@ static void azalia_init(struct device *dev) printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); codecs_init(dev, base, codec_mask); } +#endif } static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device)

1 0

Patch set updated for filo: filo: Fix compilation with latest libpayload changes
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10745 -gerrit commit 20019234d2c66f4381f55375e6de248e6b030db7 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 17:03:19 2015 -0700 filo: Fix compilation with latest libpayload changes The use of IS_ENABLED() requires that kconfig.h from libpayload is included by all files. Change-Id: I53b9ec8cac9c0a409b1e7290e9b81e06f2ce29e5 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile | 2 +- drivers/hdreg.h | 8 ++++---- drivers/ide_new.c | 18 +++++++++--------- drivers/ide_new.h | 4 ++-- drivers/usb.c | 2 +- fs/blockdev.c | 34 +++++++++++++++++----------------- main/filo.c | 18 +++++++++--------- main/grub/builtins.c | 2 +- main/grub/md5.c | 2 -- x86/linux_load.c | 14 +++++++------- 10 files changed, 51 insertions(+), 53 deletions(-) diff --git a/Makefile b/Makefile index a860236..5afa63e 100644 --- a/Makefile +++ b/Makefile @@ -93,7 +93,7 @@ ARCHDIR-$(CONFIG_TARGET_I386) := x86 CPPFLAGS := -nostdinc -imacros $(obj)/config.h CPPFLAGS += -I$(INCPAYLOAD) -I$(INCPAYLOAD)/$(ARCHDIR-y) CPPFLAGS += -I$(ARCHDIR-y)/include -Iinclude -I$(obj) -CPPFLAGS += -I$(GCCINCDIR) +CPPFLAGS += -I$(GCCINCDIR) --include $(INCPAYLOAD)/kconfig.h CFLAGS := -Wall -Wshadow -Os -pipe CFLAGS += -fomit-frame-pointer -fno-common -ffreestanding -fno-strict-aliasing diff --git a/drivers/hdreg.h b/drivers/hdreg.h index 9666ddf..38c5dc9 100644 --- a/drivers/hdreg.h +++ b/drivers/hdreg.h @@ -257,20 +257,20 @@ struct hd_driveid { }; struct request_sense { -#if defined(CONFIG_LP_BIG_ENDIAN) +#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) u8 valid : 1; u8 error_code : 7; -#elif defined(CONFIG_LP_LITTLE_ENDIAN) +#elif IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) u8 error_code : 7; u8 valid : 1; #endif u8 segment_number; -#if defined(CONFIG_LP_BIG_ENDIAN) +#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) u8 reserved1 : 2; u8 ili : 1; u8 reserved2 : 1; u8 sense_key : 4; -#elif defined(CONFIG_LP_LITTLE_ENDIAN) +#elif IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) u8 sense_key : 4; u8 reserved2 : 1; u8 ili : 1; diff --git a/drivers/ide_new.c b/drivers/ide_new.c index de4f733..3e0221a 100644 --- a/drivers/ide_new.c +++ b/drivers/ide_new.c @@ -23,7 +23,7 @@ #include "ide_new.h" #include "hdreg.h" -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) #include <pci.h> #endif @@ -55,7 +55,7 @@ static const int ctl_ports[IDE_MAX_CHANNELS] = { 0x3f6, 0x376, 0x3ee, 0x36e }; #undef ATA_PEDANTIC // debug function currently not used. -#if defined(CONFIG_DEBUG_IDE) && 0 +#if IS_ENABLED(CONFIG_DEBUG_IDE) && 0 static void dump_drive(struct ide_drive *drive) { debug("IDE DRIVE @%lx:\n", (unsigned long)drive); @@ -861,7 +861,7 @@ ob_ide_fixup_string(unsigned char *s, unsigned int len) /* * if little endian arch, byte swap the string */ -#ifdef CONFIG_LP_LITTLE_ENDIAN +#if IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) for (p = end ; p != s;) { unsigned short *pp = (unsigned short *) (p -= 2); *pp = be16toh(*pp); @@ -930,7 +930,7 @@ ob_ide_identify_drive(struct ide_drive *drive) drive->bs = 512; drive->max_sectors = 255; -#ifdef CONFIG_IDE_LBA48 +#if IS_ENABLED(CONFIG_IDE_LBA48) if ((id.command_set_2 & 0x0400) && (id.cfs_enable_2 & 0x0400)) { drive->addressing = ide_lba48; drive->max_sectors = 65535; @@ -1149,7 +1149,7 @@ ob_ide_read_blocks(struct ide_drive *drive, int n, u32 blk, unsigned char* dest) return (cnt); } -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) static int pci_find_ata_device_on_bus(int bus, pcidev_t * dev, int *index, int sata, int pata) { int slot, func; @@ -1223,14 +1223,14 @@ static void fixupregs(struct ide_channel *chan) static int find_ide_controller_compat(struct ide_channel *chan, int index) { -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) int skip, i, pci_index = index / 2; pcidev_t dev; #else if (index >= IDE_MAX_CHANNELS) return -1; #endif -#ifdef CONFIG_PCMCIA_CF +#if IS_ENABLED(CONFIG_PCMCIA_CF) if (index == 2) { chan->io_regs[0] = 0x1e0; chan->io_regs[8] = 0x1ec; @@ -1238,7 +1238,7 @@ static int find_ide_controller_compat(struct ide_channel *chan, int index) return 0; } #endif -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) /* skip any SATA and PATA PCI controllers in native mode */ for (skip = i = 0; i < pci_index && index; i++) { int devidx = i; @@ -1269,7 +1269,7 @@ static int find_ide_controller_compat(struct ide_channel *chan, int index) return 0; } -#ifdef CONFIG_SUPPORT_PCI +#if IS_ENABLED(CONFIG_SUPPORT_PCI) static int find_ide_controller(struct ide_channel *chan, int chan_index) { int pci_index; diff --git a/drivers/ide_new.h b/drivers/ide_new.h index 0598993..1ed8f0b 100644 --- a/drivers/ide_new.h +++ b/drivers/ide_new.h @@ -211,11 +211,11 @@ enum { struct ata_sector { u16 all; union { -#ifdef CONFIG_LP_BIG_ENDIAN +#if IS_ENABLED(CONFIG_LP_BIG_ENDIAN) u8 high; u8 low; #endif -#ifdef CONFIG_LP_LITTLE_ENDIAN +#if IS_ENABLED(CONFIG_LP_LITTLE_ENDIAN) u8 low; u8 high; #endif diff --git a/drivers/usb.c b/drivers/usb.c index 2edf811..d6d8809 100644 --- a/drivers/usb.c +++ b/drivers/usb.c @@ -20,7 +20,7 @@ #include <libpayload-config.h> /* Only use this code if libpayload is compiled with USB stack */ -#ifdef CONFIG_LP_USB +#if IS_ENABLED(CONFIG_LP_USB) #include <fs.h> #include <usb/usb.h> #include <usb/usbmsc.h> diff --git a/fs/blockdev.c b/fs/blockdev.c index e112ad2..4bf5805 100644 --- a/fs/blockdev.c +++ b/fs/blockdev.c @@ -21,7 +21,7 @@ #include <endian.h> #include <libpayload.h> #include <libpayload-config.h> -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) #include <storage/storage.h> #endif #include <config.h> @@ -251,10 +251,10 @@ int devopen(const char *name, int *reopen) int tmp_drive = drive; switch (type) { -#if (defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE)) || \ - defined(CONFIG_IDE_DISK) || defined(CONFIG_IDE_NEW_DISK) +#if (IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE)) || \ + IS_ENABLED(CONFIG_IDE_DISK) || IS_ENABLED(CONFIG_IDE_NEW_DISK) case DISK_IDE: -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) if (drive < storage_device_count()) { if (storage_probe(drive) != POLL_MEDIUM_PRESENT) return 0; @@ -264,7 +264,7 @@ int devopen(const char *name, int *reopen) tmp_drive -= storage_device_count(); } #endif -#if defined(CONFIG_IDE_DISK) || defined(CONFIG_IDE_NEW_DISK) +#if IS_ENABLED(CONFIG_IDE_DISK) || IS_ENABLED(CONFIG_IDE_NEW_DISK) if (ide_probe(tmp_drive) != 0) { debug("Failed to open IDE.\n"); return 0; @@ -273,7 +273,7 @@ int devopen(const char *name, int *reopen) #endif break; #endif -#ifdef CONFIG_USB_DISK +#if IS_ENABLED(CONFIG_USB_DISK) case DISK_USB: if (usb_probe(drive) != 0) { debug("Failed to open USB.\n"); @@ -283,7 +283,7 @@ int devopen(const char *name, int *reopen) break; #endif -#ifdef CONFIG_FLASH_DISK +#if IS_ENABLED(CONFIG_FLASH_DISK) case DISK_FLASH: if (flash_probe(drive) != 0) { debug("Failed to open FLASH.\n"); @@ -363,7 +363,7 @@ int devopen(const char *name, int *reopen) void devclose(void) { -#ifdef CONFIG_FLASH_DISK +#if IS_ENABLED(CONFIG_FLASH_DISK) /* Try to close NAND if it was left open */ if (dev_type == DISK_FLASH) NAND_close(); @@ -391,12 +391,12 @@ static void *read_sector(unsigned long sector) if (cache_sect[hash] != sector) { cache_sect[hash] = (unsigned long) -1; switch (dev_type) { -#if (defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE)) || \ - defined(CONFIG_IDE_DISK) || defined(CONFIG_IDE_NEW_DISK) +#if (IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE)) || \ + IS_ENABLED(CONFIG_IDE_DISK) || IS_ENABLED(CONFIG_IDE_NEW_DISK) case DISK_IDE: { int tmp_drive = dev_drive; -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) if (dev_drive < storage_device_count()) { int count = (NUM_CACHE-hash>8)?8:(NUM_CACHE-hash); if (storage_probe(tmp_drive) == POLL_NO_MEDIUM) { @@ -414,10 +414,10 @@ static void *read_sector(unsigned long sector) tmp_drive -= storage_device_count(); } #endif -#if defined(CONFIG_IDE_DISK) +#if IS_ENABLED(CONFIG_IDE_DISK) if (ide_read(tmp_drive, sector, buf) != 0) goto readerr; -#elif defined(CONFIG_IDE_NEW_DISK) +#elif IS_ENABLED(CONFIG_IDE_NEW_DISK) int count = (NUM_CACHE-hash>8)?8:(NUM_CACHE-hash); int ret; ret = ide_read_blocks(tmp_drive, sector, count, buf); @@ -434,7 +434,7 @@ static void *read_sector(unsigned long sector) break; } #endif -#ifdef CONFIG_USB_DISK +#if IS_ENABLED(CONFIG_USB_DISK) case DISK_USB: { int count = (NUM_CACHE-hash>8)?8:(NUM_CACHE-hash); @@ -447,7 +447,7 @@ static void *read_sector(unsigned long sector) } #endif -#ifdef CONFIG_FLASH_DISK +#if IS_ENABLED(CONFIG_FLASH_DISK) case DISK_FLASH: if (flash_read(dev_drive, sector, buf) != 0) return 0; @@ -465,8 +465,8 @@ static void *read_sector(unsigned long sector) readerr: printf("Disk read error dev=%d drive=%d sector=%lu\n", dev_type, dev_drive, sector); -#if defined(CONFIG_IDE_NEW_DISK) || \ - (defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE)) +#if IS_ENABLED(CONFIG_IDE_NEW_DISK) || \ + (IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE)) err_out: #endif flush_cache(); diff --git a/main/filo.c b/main/filo.c index 4f26780..9d69386 100644 --- a/main/filo.c +++ b/main/filo.c @@ -77,25 +77,25 @@ static void init(void) after relocation. Therefore, run lib_get_sysinfo(), again. */ lib_get_sysinfo(); -#if defined(CONFIG_LIBPAYLOAD_STORAGE) && defined(CONFIG_LP_STORAGE) +#if IS_ENABLED(CONFIG_LIBPAYLOAD_STORAGE) && IS_ENABLED(CONFIG_LP_STORAGE) /* libpayload storage drivers */ storage_initialize(); #endif -#if defined(CONFIG_USB_DISK) -#if defined(CONFIG_LP_USB) +#if IS_ENABLED(CONFIG_USB_DISK) +#if IS_ENABLED(CONFIG_LP_USB) /* libpayload USB stack is there */ usb_initialize(); #else printf("No USB stack in libpayload.\n"); #endif #endif -#if defined(CONFIG_LP_PC_KEYBOARD) || defined(CONFIG_LP_USB_HID) +#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) || IS_ENABLED(CONFIG_LP_USB_HID) add_reset_handler(filo_reset_handler); #endif -#ifdef CONFIG_SUPPORT_SOUND +#if IS_ENABLED(CONFIG_SUPPORT_SOUND) sound_init(); #endif -#ifdef CONFIG_SLOW_SATA +#if IS_ENABLED(CONFIG_SLOW_SATA) delay(5); #endif } @@ -165,7 +165,7 @@ int main(void) #ifdef CONFIG_AUTOBOOT_FILE #ifdef CONFIG_AUTOBOOT_DELAY -#ifdef CONFIG_NON_INTERACTIVE +#if IS_ENABLED(CONFIG_NON_INTERACTIVE) #error "autoboot delay is not supported for non-interactive builds" #define autoboot_delay() 0 /* success */ #else @@ -207,7 +207,7 @@ static inline int autoboot_delay(void) static void autoboot(void) { -#ifndef CONFIG_NON_INTERACTIVE +#if !IS_ENABLED(CONFIG_NON_INTERACTIVE) /* If Escape key is pressed already, skip autoboot */ if (havechar() && getchar()==ESCAPE) return; @@ -231,7 +231,7 @@ int main(void) /* Try default image */ autoboot(); -#ifndef CONFIG_NON_INTERACTIVE +#if !IS_ENABLED(CONFIG_NON_INTERACTIVE) /* The above didn't work, ask user */ while (havechar()) getchar(); diff --git a/main/grub/builtins.c b/main/grub/builtins.c index cd079d1..8784be6 100644 --- a/main/grub/builtins.c +++ b/main/grub/builtins.c @@ -1838,7 +1838,7 @@ static struct builtin builtin_timeout = { static int keymap_func(char *arg, int flags) { -#ifdef CONFIG_LP_PC_KEYBOARD +#if IS_ENABLED(CONFIG_LP_PC_KEYBOARD) if (keyboard_set_layout(arg)) { errnum = ERR_BAD_ARGUMENT; return 1; diff --git a/main/grub/md5.c b/main/grub/md5.c index 1987714..b3cd362 100644 --- a/main/grub/md5.c +++ b/main/grub/md5.c @@ -41,8 +41,6 @@ #ifdef USE_MD5 -#define htole32(x) (x) -#define le32toh(x) htole32(x) typedef unsigned int UINT4; /* F, G, H and I are basic MD5 functions. diff --git a/x86/linux_load.c b/x86/linux_load.c index e003634..4e41393 100644 --- a/x86/linux_load.c +++ b/x86/linux_load.c @@ -350,7 +350,7 @@ static void set_memory_size(struct linux_params *params) /* Video mode */ static void set_video_mode(struct linux_params *params) { -#if CONFIG_LP_COREBOOT_VIDEO_CONSOLE +#if IS_ENABLED(CONFIG_LP_COREBOOT_VIDEO_CONSOLE) /* Are we running on a framebuffer console? */ if (!lib_sysinfo.framebuffer) return; @@ -677,7 +677,7 @@ static void hardware_setup(void) outb(0xFF, 0xA1); /* mask off all interrupts for now */ outb(0xFB, 0x21); /* mask all irq's but irq2 which is cascaded */ -#ifdef CONFIG_FLASHROM_LOCKDOWN +#if IS_ENABLED(CONFIG_FLASHROM_LOCKDOWN) /* lockdown flashROM */ extern int flashrom_lockdown; extern int intel_lockdown_flash(void); @@ -704,10 +704,10 @@ static int start_linux(u32 kern_addr, struct linux_params *params) { struct segment_desc *linux_gdt; struct context *ctx; -#ifdef CONFIG_LP_VGA_VIDEO_CONSOLE +#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) unsigned int cursor_x, cursor_y, cursor_en; #endif -#ifdef CONFIG_PCMCIA_CF +#if IS_ENABLED(CONFIG_PCMCIA_CF) unsigned char *cf_bar; int i; #endif @@ -747,7 +747,7 @@ static int start_linux(u32 kern_addr, struct linux_params *params) debug("EIP=%#x\n", kern_addr); printf("Jumping to entry point...\n"); -#ifdef CONFIG_LP_VGA_VIDEO_CONSOLE +#if IS_ENABLED(CONFIG_LP_VGA_VIDEO_CONSOLE) /* Update VGA cursor position. * This must be here because the printf changes the value! */ video_console_get_cursor(&cursor_x, &cursor_y, &cursor_en); @@ -755,7 +755,7 @@ static int start_linux(u32 kern_addr, struct linux_params *params) params->orig_y = cursor_y; #endif -#ifdef CONFIG_PCMCIA_CF +#if IS_ENABLED(CONFIG_PCMCIA_CF) cf_bar = phys_to_virt(pci_read_config32(PCI_DEV(0, 0xa, 1), 0x10)); for (i = 0x836; i < 0x840; i++) { cf_bar[i] = 0; @@ -813,7 +813,7 @@ int linux_load(const char *file, const char *cmdline) } file_close(); -#if defined(CONFIG_LP_USB) +#if IS_ENABLED(CONFIG_LP_USB) usb_exit(); #endif

1 0

Patch set updated for coreboot: payloads: Reorganize Makefile.incs for external payloads
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10829 -gerrit commit 1cd1bd1903a46f8f319fe1ba58bca2ad0b18e924 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 17:09:17 2015 -0700 payloads: Reorganize Makefile.incs for external payloads This is not going as far as I would like it to go, but some of the external payloads have to be fixed up first. Long term, I would like to directly add payloads/external/* to subdirs-y and remove one layer of indirection from the build process. For now, moving the payload Makefile targets into payloads/ is already a small improvement. Change-Id: Ie4eb492eb804e0aaaf1a4d90af2f876f27a32a75 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- Makefile.inc | 1 + payloads/external/Makefile.inc | 52 ++++++++++++++++++++++++++++++++++++++++++ src/arch/x86/Makefile.inc | 32 -------------------------- 3 files changed, 53 insertions(+), 32 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 2f1fe82..2963ebe 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -59,6 +59,7 @@ subdirs-y += src/superio $(wildcard src/drivers/*) src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool util/broadcom subdirs-y += $(wildcard src/arch/*) subdirs-y += src/mainboard/$(MAINBOARDDIR) +subdirs-y += payloads/external subdirs-y += site-local diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc new file mode 100644 index 0000000..33ed47f --- /dev/null +++ b/payloads/external/Makefile.inc @@ -0,0 +1,52 @@ +################################################################################ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2009-2010 coresystems GmbH +## Copyright (C) 2015 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc. +## + +seabios: + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ + HOSTCC="$(HOSTCC)" \ + CC=$(word 1,$(CC_x86_32)) CFLAGS="$(patsubst $(word 1,$(CC_x86_32))%,,$(CC_x86_32))" \ + LD=$(word 1,$(LD_x86_32)) LDFLAGS="$(patsubst $(word 1,$(LD_x86_32))%,,$(LD_x86_32))" \ + OBJDUMP="$(OBJDUMP_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ + AS="$(AS_x86_32)" IASL="$(IASL)" \ + CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ + CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ + CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ + CONFIG_SEABIOS_VGA_COREBOOT=$(CONFIG_SEABIOS_VGA_COREBOOT) \ + CONFIG_CONSOLE_SERIAL=$(CONFIG_CONSOLE_SERIAL) \ + CONFIG_TTYS0_BASE=$(CONFIG_TTYS0_BASE) \ + CONFIG_SEABIOS_MALLOC_UPPERMEMORY=$(CONFIG_SEABIOS_MALLOC_UPPERMEMORY) + +filo: + $(MAKE) -C payloads/external/FILO -f Makefile.inc \ + HOSTCC="$(HOSTCC)" \ + CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ + CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ + CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) + + +grub2: + $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ + HOSTCC="$(HOSTCC)" \ + CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ + OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ + CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index f502bbe..4549c82 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -334,36 +334,4 @@ endif endif # CONFIG_ARCH_RAMSTAGE_X86_32 / CONFIG_ARCH_RAMSTAGE_X86_64 -################################################################################ -seabios: - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ - HOSTCC="$(HOSTCC)" \ - CC=$(word 1,$(CC_x86_32)) CFLAGS="$(patsubst $(word 1,$(CC_x86_32))%,,$(CC_x86_32))" \ - LD=$(word 1,$(LD_x86_32)) LDFLAGS="$(patsubst $(word 1,$(LD_x86_32))%,,$(LD_x86_32))" \ - OBJDUMP="$(OBJDUMP_x86_32)" \ - OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ - AS="$(AS_x86_32)" IASL="$(IASL)" \ - CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ - CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ - CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ - CONFIG_SEABIOS_VGA_COREBOOT=$(CONFIG_SEABIOS_VGA_COREBOOT) \ - CONFIG_CONSOLE_SERIAL=$(CONFIG_CONSOLE_SERIAL) \ - CONFIG_TTYS0_BASE=$(CONFIG_TTYS0_BASE) \ - CONFIG_SEABIOS_MALLOC_UPPERMEMORY=$(CONFIG_SEABIOS_MALLOC_UPPERMEMORY) - -filo: - $(MAKE) -C payloads/external/FILO -f Makefile.inc \ - HOSTCC="$(HOSTCC)" \ - CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ - OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ - CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ - CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) - - -grub2: - $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ - HOSTCC="$(HOSTCC)" \ - CC="$(CC_x86_32)" LD="$(LD_x86_32)" OBJDUMP="$(OBJDUMP_x86_32)" \ - OBJCOPY="$(OBJCOPY_x86_32)" STRIP="$(STRIP_x86_32)" \ - CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER)

1 0

Patch set updated for coreboot: payloads: Reorganize Kconfig for external payloads
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10828 -gerrit commit c75d22e1966f18f0bc0b2c385a321d515a0a6e18 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jun 30 15:58:56 2015 -0700 payloads: Reorganize Kconfig for external payloads The integration of external payloads in coreboot is a bit messy. You have to change the to level Kconfig file for every payload (something that we recently fixed for mainboards and chipsets). This means that updating e.g. the SeaBIOS version requires a change outside of the SeaBIOS directory. With this patch you can create a new directory under payloads/external and place a Kconfig and Kconfig.name file in there, and the payload will automatically show up when you do "make menuconfig". Change-Id: I293abcb8eae581d4b3934e64897c0d339a27e7c1 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- payloads/external/FILO/Kconfig | 22 ++++ payloads/external/FILO/Kconfig.name | 8 ++ payloads/external/FILO/Makefile.inc | 18 +-- payloads/external/GRUB2/Kconfig | 17 +++ payloads/external/GRUB2/Kconfig.name | 8 ++ payloads/external/SeaBIOS/Kconfig | 70 ++++++++++++ payloads/external/SeaBIOS/Kconfig.name | 9 ++ payloads/external/linux/Kconfig | 21 ++++ payloads/external/linux/Kconfig.name | 9 ++ payloads/external/tianocore/Kconfig | 9 ++ payloads/external/tianocore/Kconfig.name | 8 ++ src/Kconfig | 184 +------------------------------ 12 files changed, 193 insertions(+), 190 deletions(-) diff --git a/payloads/external/FILO/Kconfig b/payloads/external/FILO/Kconfig new file mode 100644 index 0000000..94d5e18 --- /dev/null +++ b/payloads/external/FILO/Kconfig @@ -0,0 +1,22 @@ +if PAYLOAD_FILO + +choice + prompt "FILO version" + default FILO_STABLE + +config FILO_STABLE + bool "0.6.0" + help + Stable FILO version + +config FILO_MASTER + bool "HEAD" + help + Newest FILO version + +endchoice + +config PAYLOAD_FILE + default "payloads/external/FILO/filo/build/filo.elf" + +endif diff --git a/payloads/external/FILO/Kconfig.name b/payloads/external/FILO/Kconfig.name new file mode 100644 index 0000000..244077d --- /dev/null +++ b/payloads/external/FILO/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_FILO + bool "FILO" + help + Select this option if you want to build a coreboot image + with a FILO payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/FILO/Makefile.inc b/payloads/external/FILO/Makefile.inc index 6a96a22..5c2fba3 100644 --- a/payloads/external/FILO/Makefile.inc +++ b/payloads/external/FILO/Makefile.inc @@ -1,6 +1,6 @@ TAG-$(CONFIG_FILO_MASTER)=origin/master NAME-$(CONFIG_FILO_MASTER)=MASTER -TAG-$(CONFIG_FILO_STABLE)=4dbb31a64fe5b1c7e3025ab34619220609897646 +TAG-$(CONFIG_FILO_STABLE)=d374899254735e30eada3b79075ce7d7a673b6af NAME-$(CONFIG_FILO_STABLE)=STABLE unexport KCONFIG_AUTOHEADER @@ -14,14 +14,14 @@ all: filo checkout: echo " GIT FILO $(NAME-y)" - test -d filo || \ - git clone http://review.coreboot.org/p/filo.git - cd filo && \ - git checkout master && \ - git remote update && \ - test -n $(TAG-y) && \ - git branch -f $(NAME-y) $(TAG-y) && \ - git checkout $(NAME-y) +# test -d filo || \ +# git clone http://review.coreboot.org/p/filo.git +#cd filo && \ +# git checkout master && \ +# git remote update && \ +# test -n $(TAG-y) && \ +# git branch -f $(NAME-y) $(TAG-y) && \ +# git checkout $(NAME-y) config: libpayload echo " CONFIG FILO $(NAME-y)" diff --git a/payloads/external/GRUB2/Kconfig b/payloads/external/GRUB2/Kconfig new file mode 100644 index 0000000..3d0fa6c --- /dev/null +++ b/payloads/external/GRUB2/Kconfig @@ -0,0 +1,17 @@ +if PAYLOAD_GRUB2 + +choice + prompt "GRUB2 version" + default GRUB2_MASTER + +config GRUB2_MASTER + bool "HEAD" + help + Newest GRUB2 version + +endchoice + +config PAYLOAD_FILE + default "payloads/external/GRUB2/grub2/build/default_payload.elf" + +endif diff --git a/payloads/external/GRUB2/Kconfig.name b/payloads/external/GRUB2/Kconfig.name new file mode 100644 index 0000000..c3a8ddf --- /dev/null +++ b/payloads/external/GRUB2/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_GRUB2 + bool "GRUB2" + help + Select this option if you want to build a coreboot image + with a GRUB2 payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig new file mode 100644 index 0000000..b2ff21e --- /dev/null +++ b/payloads/external/SeaBIOS/Kconfig @@ -0,0 +1,70 @@ +if PAYLOAD_SEABIOS + +choice + prompt "SeaBIOS version" + default SEABIOS_STABLE + +config SEABIOS_STABLE + bool "1.7.5" + help + Stable SeaBIOS version +config SEABIOS_MASTER + bool "master" + help + Newest SeaBIOS version + +endchoice + +config SEABIOS_PS2_TIMEOUT + prompt "PS/2 keyboard controller initialization timeout (milliseconds)" + default 0 + depends on EXPERT + int + help + Some PS/2 keyboard controllers don't respond to commands immediately + after powering on. This specifies how long SeaBIOS will wait for the + keyboard controller to become ready before giving up. + +config SEABIOS_THREAD_OPTIONROMS + prompt "Hardware init during option ROM execution" + default n + bool + help + Allow hardware init to run in parallel with optionrom execution. + + This can reduce boot time, but can cause some timing + variations during option ROM code execution. It is not + known if all option ROMs will behave properly with this option. + +config SEABIOS_MALLOC_UPPERMEMORY + bool + default y + help + Use the "Upper Memory Block" area (0xc0000-0xf0000) for internal + "low memory" allocations. If this is not selected, the memory is + instead allocated from the "9-segment" (0x90000-0xa0000). + This is not typically needed, but may be required on some platforms + to allow USB and SATA buffers to be written correctly by the + hardware. In general, if this is desired, the option will be + set to 'N' by the chipset Kconfig. + +config SEABIOS_VGA_COREBOOT + prompt "Include generated option rom that implements legacy VGA BIOS compatibility" + default n + depends on !VGA_BIOS && (MAINBOARD_DO_NATIVE_VGA_INIT || MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG) + bool + help + Coreboot can initialize the GPU of some mainboards. + + After initializing the GPU, the information about it can be passed to the payload. + Provide an option rom that implements this legacy VGA BIOS compatibility requirement. + +config PAYLOAD_FILE + default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf" + +config PAYLOAD_VGABIOS_FILE + string + depends on SEABIOS_VGA_COREBOOT + default "payloads/external/SeaBIOS/seabios/out/vgabios.bin" + +endif diff --git a/payloads/external/SeaBIOS/Kconfig.name b/payloads/external/SeaBIOS/Kconfig.name new file mode 100644 index 0000000..9ab235d --- /dev/null +++ b/payloads/external/SeaBIOS/Kconfig.name @@ -0,0 +1,9 @@ +config PAYLOAD_SEABIOS + bool "SeaBIOS" + depends on ARCH_X86 + help + Select this option if you want to build a coreboot image + with a SeaBIOS payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/payloads/external/linux/Kconfig b/payloads/external/linux/Kconfig new file mode 100644 index 0000000..8b15f99 --- /dev/null +++ b/payloads/external/linux/Kconfig @@ -0,0 +1,21 @@ +if PAYLOAD_LINUX + +config PAYLOAD_FILE + string "Linux path and filename" + default "bzImage" + help + The path and filename of the bzImage kernel to use as payload. + +config LINUX_COMMAND_LINE + string "Linux command line" + default "" + help + A command line to add to the Linux kernel. + +config LINUX_INITRD + string "Linux initrd" + default "" + help + An initrd image to add to the Linux kernel. + +endif diff --git a/payloads/external/linux/Kconfig.name b/payloads/external/linux/Kconfig.name new file mode 100644 index 0000000..ae1d906 --- /dev/null +++ b/payloads/external/linux/Kconfig.name @@ -0,0 +1,9 @@ +config PAYLOAD_LINUX + bool "A Linux payload" + help + Select this option if you have a Linux bzImage which coreboot + should run as soon as the basic hardware initialization + is completed. + + You will be able to specify the location and file name of the + payload image later. diff --git a/payloads/external/tianocore/Kconfig b/payloads/external/tianocore/Kconfig new file mode 100644 index 0000000..8a98bd3 --- /dev/null +++ b/payloads/external/tianocore/Kconfig @@ -0,0 +1,9 @@ +if PAYLOAD_TIANOCORE + +config PAYLOAD_FILE + string "Tianocore firmware volume" + default "COREBOOT.fd" + help + The result of a corebootPkg build + +endif diff --git a/payloads/external/tianocore/Kconfig.name b/payloads/external/tianocore/Kconfig.name new file mode 100644 index 0000000..d57f7e1 --- /dev/null +++ b/payloads/external/tianocore/Kconfig.name @@ -0,0 +1,8 @@ +config PAYLOAD_TIANOCORE + bool "Tiano Core" + help + Select this option if you want to build a coreboot image + with a Tiano Core payload. If you don't know what this is + about, just leave it enabled. + + See http://coreboot.org/Payloads for more information. diff --git a/src/Kconfig b/src/Kconfig index 94b3508..a2129ad 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -667,144 +667,11 @@ config PAYLOAD_ELF You will be able to specify the location and file name of the payload image later. -config PAYLOAD_LINUX - bool "A Linux payload" - help - Select this option if you have a Linux bzImage which coreboot - should run as soon as the basic hardware initialization - is completed. - - You will be able to specify the location and file name of the - payload image later. - -config PAYLOAD_SEABIOS - bool "SeaBIOS" - depends on ARCH_X86 - help - Select this option if you want to build a coreboot image - with a SeaBIOS payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -config PAYLOAD_FILO - bool "FILO" - help - Select this option if you want to build a coreboot image - with a FILO payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -config PAYLOAD_GRUB2 - bool "GRUB2" - help - Select this option if you want to build a coreboot image - with a GRUB2 payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -config PAYLOAD_TIANOCORE - bool "Tiano Core" - help - Select this option if you want to build a coreboot image - with a Tiano Core payload. If you don't know what this is - about, just leave it enabled. - - See http://coreboot.org/Payloads for more information. - -endchoice - -choice - prompt "SeaBIOS version" - default SEABIOS_STABLE - depends on PAYLOAD_SEABIOS - -config SEABIOS_STABLE - bool "1.7.5" - help - Stable SeaBIOS version -config SEABIOS_MASTER - bool "master" - help - Newest SeaBIOS version - -endchoice - -config SEABIOS_PS2_TIMEOUT - prompt "PS/2 keyboard controller initialization timeout (milliseconds)" if PAYLOAD_SEABIOS - default 0 - depends on EXPERT - int - help - Some PS/2 keyboard controllers don't respond to commands immediately - after powering on. This specifies how long SeaBIOS will wait for the - keyboard controller to become ready before giving up. - -config SEABIOS_THREAD_OPTIONROMS - prompt "Hardware init during option ROM execution" if PAYLOAD_SEABIOS - default n - bool - help - Allow hardware init to run in parallel with optionrom execution. - - This can reduce boot time, but can cause some timing - variations during option ROM code execution. It is not - known if all option ROMs will behave properly with this option. - -config SEABIOS_MALLOC_UPPERMEMORY - bool - default y - depends on PAYLOAD_SEABIOS - help - Use the "Upper Memory Block" area (0xc0000-0xf0000) for internal - "low memory" allocations. If this is not selected, the memory is - instead allocated from the "9-segment" (0x90000-0xa0000). - This is not typically needed, but may be required on some platforms - to allow USB and SATA buffers to be written correctly by the - hardware. In general, if this is desired, the option will be - set to 'N' by the chipset Kconfig. - -config SEABIOS_VGA_COREBOOT - prompt "Include generated option rom that implements legacy VGA BIOS compatibility" if PAYLOAD_SEABIOS - default n - depends on !VGA_BIOS && (MAINBOARD_DO_NATIVE_VGA_INIT || MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG) - bool - help - Coreboot can initialize the GPU of some mainboards. - - After initializing the GPU, the information about it can be passed to the payload. - Provide an option rom that implements this legacy VGA BIOS compatibility requirement. - -choice - prompt "GRUB2 version" - default GRUB2_MASTER - depends on PAYLOAD_GRUB2 - -config GRUB2_MASTER - bool "HEAD" - help - Newest GRUB2 version +source "payloads/external/*/Kconfig.name" endchoice -choice - prompt "FILO version" - default FILO_STABLE - depends on PAYLOAD_FILO - -config FILO_STABLE - bool "0.6.0" - help - Stable FILO version - -config FILO_MASTER - bool "HEAD" - help - Newest FILO version - -endchoice +source "payloads/external/*/Kconfig" config PAYLOAD_FILE string "Payload path and filename" @@ -813,60 +680,15 @@ config PAYLOAD_FILE help The path and filename of the ELF executable file to use as payload. -config PAYLOAD_FILE - string "Linux path and filename" - depends on PAYLOAD_LINUX - default "bzImage" - help - The path and filename of the bzImage kernel to use as payload. - -config PAYLOAD_FILE - depends on PAYLOAD_SEABIOS - default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf" - -config PAYLOAD_VGABIOS_FILE - string - depends on PAYLOAD_SEABIOS && SEABIOS_VGA_COREBOOT - default "payloads/external/SeaBIOS/seabios/out/vgabios.bin" - -config PAYLOAD_FILE - depends on PAYLOAD_FILO - default "payloads/external/FILO/filo/build/filo.elf" - -config PAYLOAD_FILE - depends on PAYLOAD_GRUB2 - default "payloads/external/GRUB2/grub2/build/default_payload.elf" - -config PAYLOAD_FILE - string "Tianocore firmware volume" - depends on PAYLOAD_TIANOCORE - default "COREBOOT.fd" - help - The result of a corebootPkg build - # TODO: Defined if no payload? Breaks build? config COMPRESSED_PAYLOAD_LZMA bool "Use LZMA compression for payloads" default y - depends on PAYLOAD_ELF || PAYLOAD_SEABIOS || PAYLOAD_FILO || PAYLOAD_TIANOCORE || PAYLOAD_GRUB2 + depends on !PAYLOAD_NONE && !PAYLOAD_LINUX help In order to reduce the size payloads take up in the ROM chip coreboot can compress them using the LZMA algorithm. -config LINUX_COMMAND_LINE - string "Linux command line" - depends on PAYLOAD_LINUX - default "" - help - A command line to add to the Linux kernel. - -config LINUX_INITRD - string "Linux initrd" - depends on PAYLOAD_LINUX - default "" - help - An initrd image to add to the Linux kernel. - endmenu menu "Debugging"

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coreboot-gerrit July 2015