the following patch was just integrated into master:
commit 741a0dd89ce67d0fed9a7907bb77ed3ea9afba81
Author: zbao <fishbaozi(a)gmail.com>
Date: Thu Jun 25 16:58:53 2015 -0400
x86 realmode: Set up the 8254 timer before running option rom
If the 8254 is not set up, the external graphics option rom
hangs and never returns.
The code is tested on AMD/bettong.
Change-Id: I0022de9d9a275a7d4b7a331ae7fcf793b9f4c5f5
Signed-off-by: Zheng Bao <zheng.bao(a)amd.com>
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
Reviewed-on: http://review.coreboot.org/10903
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones(a)se-eng.com>
See http://review.coreboot.org/10903 for details.
-gerrit
the following patch was just integrated into master:
commit fe234c4d2a6ce0e1279597566336fe9277b8aa3b
Author: zbao <fishbaozi(a)gmail.com>
Date: Thu Jul 2 16:53:09 2015 -0400
AMD Merlin Falcon: Mask bit 31 of BIST while doing BIST check
This is a result of the Silcon Observation. On warm reset, the BIST
is 0x80000000, which causes BIST error. We skip checking this bit.
The update will be in CZ BKDG 1.05.
The code is tested on AMD/bettong.
Change-Id: I51c3f3567f758766079f7c8789f1ff072e1a7c53
Signed-off-by: Zheng Bao <zheng.bao(a)amd.com>
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
Reviewed-on: http://review.coreboot.org/10902
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones(a)se-eng.com>
See http://review.coreboot.org/10902 for details.
-gerrit
Tobias Diedrich (ranma+coreboot(a)tdiedrich.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10940
-gerrit
commit 80cabf9a87f331f105aa0b8d87f3cf9d05af9a19
Author: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de>
Date: Sun Jun 21 18:25:38 2015 +0200
pcengines/apu1: Add k10temp thermal zone.
Change-Id: Id9c5b783ba424246816677099ec6651814e59f21
Signed-off-by: Tobias Diedrich <ranma+coreboot(a)tdiedrich.de>
---
src/mainboard/pcengines/apu1/acpi/thermal.asl | 10 ++++++----
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mainboard/pcengines/apu1/acpi/thermal.asl b/src/mainboard/pcengines/apu1/acpi/thermal.asl
index baa4043..3e89ebf 100644
--- a/src/mainboard/pcengines/apu1/acpi/thermal.asl
+++ b/src/mainboard/pcengines/apu1/acpi/thermal.asl
@@ -15,7 +15,9 @@
* Foundation, Inc.
*/
-/* Thermal Zones have been #if 0 for a long time.
- * Removing it for now because it doesn't seem to
- * do anything when enabled anyway.
- */
+Scope (\_SB.PCI0) {
+ Device (K10M) {
+ Name (_ADR, 0x00180003)
+ #include <northbridge/amd/amdfam10/thermal_mixin.asl>
+ }
+}
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10939
-gerrit
commit 097f43cb760b1911f2b9598a37cb36d41d4fb5ca
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Jul 15 21:36:58 2015 +0200
cbfs: mirror cbfs file attributes for compression
Even if coreboot doesn't use them at this time, but keep the structures in
sync.
Change-Id: I92f21edc3bbac6be419b1593d8e13d6055c94efa
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
src/include/cbfs_serialized.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/include/cbfs_serialized.h b/src/include/cbfs_serialized.h
index 7fa8dbb..ed848c8 100644
--- a/src/include/cbfs_serialized.h
+++ b/src/include/cbfs_serialized.h
@@ -138,6 +138,8 @@ struct cbfs_file {
struct cbfs_file_attributes {
uint32_t len;
+ uint32_t compression;
+ uint32_t decompressed_size;
} __attribute__((packed));
#define CBFS_FILE_ATTRIBUTES(_p) (((_p)->attributes == 0) ? NULL : \
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10936
-gerrit
commit bd58b42af92cbd183dbb8226a5c4b0edce420469
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Jul 15 21:18:10 2015 +0200
cbfs: Add support for cbfs_file_attributes as far as required so far
Change-Id: I808a529b18c2e43e4ab83f30259f73e66635b83d
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
src/include/cbfs_serialized.h | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/include/cbfs_serialized.h b/src/include/cbfs_serialized.h
index f672095..7fa8dbb 100644
--- a/src/include/cbfs_serialized.h
+++ b/src/include/cbfs_serialized.h
@@ -132,10 +132,17 @@ struct cbfs_file {
char magic[8];
uint32_t len;
uint32_t type;
- uint32_t checksum;
+ uint32_t attributes;
uint32_t offset;
} __attribute__((packed));
+struct cbfs_file_attributes {
+ uint32_t len;
+} __attribute__((packed));
+
+#define CBFS_FILE_ATTRIBUTES(_p) (((_p)->attributes == 0) ? NULL : \
+ (struct cbfs_file_attributes *)(((uint8_t *)(_p)) + ntohl((_p)->attributes)))
+
/*
* ROMCC does not understand uint64_t, so we hide future definitions as they are
* unlikely to be ever needed from ROMCC