coreboot-gerrit May 2015

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 428130e nehalem native gfx init: Adjust state to be compatible with OPROM.
by gerrit＠coreboot.org 19 May '15

19 May '15

the following patch was just integrated into master: commit 428130e83955795592563393edd360fa0b17199a Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Tue May 19 09:45:22 2015 +0200 nehalem native gfx init: Adjust state to be compatible with OPROM. My main payload is GRUB and I load SeaBIOS as secondary payload when for some reason I want to boot windows. In this scenario SeaBIOS runs VGA oprom (SeaVGABIOS is not good enough with intel gfx). VGA oprom expects either completely uninited gfx or some special state in gmbus and software scratch registers. Provide this state. The only alternative without this patch for such usecase is to use oprom and I'd like to avoid doing so when going my main boot path to GNU/Linux. Change-Id: Ic157a6a580d7a5048ac28155e0d6b3433bbd1f2c Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10239 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10239 for details. -gerrit

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Patch merged into coreboot/master: 38cf94b ivybridge native gfx init: Adjust state to be compatible with OPROM.
by gerrit＠coreboot.org 19 May '15

19 May '15

the following patch was just integrated into master: commit 38cf94b25098e4aee1f4ea16df2110140eca8222 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed May 13 09:30:09 2015 +0200 ivybridge native gfx init: Adjust state to be compatible with OPROM. My main payload is GRUB and I load SeaBIOS as secondary payload when for some reason I want to boot windows. In this scenario SeaBIOS runs VGA oprom (SeaVGABIOS is not good enough with intel gfx). VGA oprom expects either completely uninited gfx or some special state in gmbus and software scratch registers. Provide this state. The only alternative without this patch for such usecase is to use oprom and I'd like to avoid doing so when going my main boot path to GNU/Linux. Change-Id: I38e78fb845e43b81df084cd4d65f4618bfb2506d Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10205 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10205 for details. -gerrit

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Patch merged into coreboot/master: 3387e4e gma/edid: Fix gma register access.
by gerrit＠coreboot.org 19 May '15

19 May '15

the following patch was just integrated into master: commit 3387e4e770a37bc09289ffa59fa3c781d8970126 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Mon May 18 13:13:48 2015 +0200 gma/edid: Fix gma register access. 0x20 was incorrectly represented as 4 * 5 while in fact it's 4 * 8 Change-Id: I6053a3baa6de0da9f1d648009353bc1fe542f81f Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10237 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10237 for details. -gerrit

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Patch merged into coreboot/master: 4679c41 Move smi trap sample to documentation, don't keep it in every mobo.
by gerrit＠coreboot.org 19 May '15

19 May '15

the following patch was just integrated into master: commit 4679c41db292b80ce51c7d923e2f22258145522b Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat May 16 16:32:45 2015 +0200 Move smi trap sample to documentation, don't keep it in every mobo. Sample code belongs to documentation, not copied 100x over prodcution code. Change-Id: I6bb318d76057d02bd6ac5641d12d56ab6d60b745 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10229 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10229 for details. -gerrit

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Patch merged into coreboot/master: a5dc9f1 Remove useless extern gnvs declaration in smi handlers.
by gerrit＠coreboot.org 19 May '15

19 May '15

the following patch was just integrated into master: commit a5dc9f1be86ad419a07b95640addf871a3c03ec6 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sat May 16 16:36:17 2015 +0200 Remove useless extern gnvs declaration in smi handlers. Change-Id: I3047badea8d4f61155f4e4f7d3d078426948162a Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-on: http://review.coreboot.org/10228 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10228 for details. -gerrit

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Patch set updated for coreboot: 59f45a9 pistashio: bump up romstage size
by Aaron Durbin 19 May '15

19 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10220 -gerrit commit 59f45a97b6b13629c4f36fb8c78bda3033999284 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 16:54:17 2015 -0500 pistashio: bump up romstage size Making large changes in pieces is leading to a little bloat. Bump up the romstage size temporarily so that jenkins will be happy. Change-Id: I6f9facb4ca488cf41741a3ed6d0ed7f66d4778b3 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/imgtec/pistachio/include/soc/memlayout.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld index bc67447..ad1d1c5 100644 --- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld +++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld @@ -38,8 +38,8 @@ SECTIONS * and then through the identity mapping in ROM stage. */ SRAM_START(0x1a000000) - ROMSTAGE(0x1a005000, 36K) - PRERAM_CBFS_CACHE(0x1a00e000, 72K) + ROMSTAGE(0x1a005000, 40K) + PRERAM_CBFS_CACHE(0x1a00f000, 68K) SRAM_END(0x1a020000) /* Bootblock executes out of KSEG0 and sets up the identity mapping.

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Patch set updated for coreboot: a109013 vboot: use only offsets for tracking firmware components
by Aaron Durbin 19 May '15

19 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10221 -gerrit commit a1090133f3b9ce22a990eec67ba6979c3dc07c9d Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 15:57:51 2015 -0500 vboot: use only offsets for tracking firmware components Because of the fmap API returning pointers to represent regions within the boot device a vboot_region structure was used to track the case where offsets could be pointers on x86 but not on !x86. Normalize this tracking to use offsets only as it provides consistency in the code. Change-Id: I63c08b31ace3bd0e66ebc17e308f87eb5f857c86 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/vendorcode/google/chromeos/vbnv_flash.c | 14 ++--- src/vendorcode/google/chromeos/vboot2/misc.h | 12 ++-- .../google/chromeos/vboot2/vboot_handoff.c | 4 +- .../google/chromeos/vboot2/vboot_loader.c | 73 ++++++++++++---------- src/vendorcode/google/chromeos/vboot2/verstage.c | 21 +++---- src/vendorcode/google/chromeos/vboot_common.c | 64 ++++++++++--------- src/vendorcode/google/chromeos/vboot_common.h | 12 ++-- 7 files changed, 105 insertions(+), 95 deletions(-) diff --git a/src/vendorcode/google/chromeos/vbnv_flash.c b/src/vendorcode/google/chromeos/vbnv_flash.c index 4cc87b6..c0d0fe2 100644 --- a/src/vendorcode/google/chromeos/vbnv_flash.c +++ b/src/vendorcode/google/chromeos/vbnv_flash.c @@ -32,7 +32,7 @@ #define BLOB_SIZE VB2_NVDATA_SIZE /* FMAP descriptor of the NVRAM area */ -static struct vboot_region nvram_region; +static struct region nvram_region; /* offset of the current nvdata in SPI flash */ static int blob_offset = -1; @@ -74,7 +74,7 @@ static int init_vbnv(void) int i; vboot_locate_region("RW_NVRAM", &nvram_region); - if (nvram_region.size < BLOB_SIZE) { + if (region_sz(&nvram_region) < BLOB_SIZE) { printk(BIOS_ERR, "%s: failed to locate NVRAM\n", __func__); return 1; } @@ -83,8 +83,8 @@ static int init_vbnv(void) for (i = 0; i < BLOB_SIZE; i++) empty_blob[i] = erase_value(); - offset = nvram_region.offset_addr; - top_offset = nvram_region.offset_addr + nvram_region.size - BLOB_SIZE; + offset = region_offset(&nvram_region); + top_offset = offset + region_sz(&nvram_region) - BLOB_SIZE; /* * after the loop, offset is supposed to point the blob right before @@ -130,8 +130,8 @@ static int erase_nvram(void) if (vbnv_flash_probe()) return 1; - if (spi_flash->erase(spi_flash, nvram_region.offset_addr, - nvram_region.size)) { + if (spi_flash->erase(spi_flash, region_offset(&nvram_region), + region_sz(&nvram_region))) { printk(BIOS_ERR, "failed to erase nvram\n"); return 1; } @@ -171,7 +171,7 @@ void save_vbnv(const uint8_t *vbnv_copy) if (new_offset > top_offset) { if (erase_nvram()) return; /* error */ - new_offset = nvram_region.offset_addr; + new_offset = region_offset(&nvram_region); } break; } diff --git a/src/vendorcode/google/chromeos/vboot2/misc.h b/src/vendorcode/google/chromeos/vboot2/misc.h index 175e2c2..edeaf19 100644 --- a/src/vendorcode/google/chromeos/vboot2/misc.h +++ b/src/vendorcode/google/chromeos/vboot2/misc.h @@ -25,7 +25,7 @@ void vboot_fill_handoff(void); void verstage_main(void); void *vboot_load_stage(int stage_index, - struct vboot_region *fw_main, + struct region *fw_main, struct vboot_components *fw_info); /* @@ -47,17 +47,17 @@ size_t vb2_working_data_size(void); void *vboot_get_work_buffer(struct vb2_working_data *wd); static inline void vb2_get_selected_region(struct vb2_working_data *wd, - struct vboot_region *region) + struct region *region) { - region->offset_addr = wd->selected_region_offset; + region->offset = wd->selected_region_offset; region->size = wd->selected_region_size; } static inline void vb2_set_selected_region(struct vb2_working_data *wd, - struct vboot_region *region) + struct region *region) { - wd->selected_region_offset = region->offset_addr; - wd->selected_region_size = region->size; + wd->selected_region_offset = region_offset(region); + wd->selected_region_size = region_sz(region); } static inline int vboot_is_slot_selected(struct vb2_working_data *wd) diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c index 417a496..9952c00 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_handoff.c @@ -127,7 +127,7 @@ void vboot_fill_handoff(void) int i; struct vboot_handoff *vh; struct vb2_shared_data *sd; - struct vboot_region fw_main; + struct region fw_main; struct vboot_components *fw_info; struct vb2_working_data *wd = vboot_get_working_data(); @@ -159,7 +159,7 @@ void vboot_fill_handoff(void) /* these offset & size are used to load a rw boot loader */ for (i = 0; i < fw_info->num_components; i++) { vh->components[i].address = - fw_main.offset_addr + fw_info->entries[i].offset; + region_offset(&fw_main) + fw_info->entries[i].offset; vh->components[i].size = fw_info->entries[i].size; } } diff --git a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c index fd64798..1129cd1 100644 --- a/src/vendorcode/google/chromeos/vboot2/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot2/vboot_loader.c @@ -121,10 +121,10 @@ static int vboot_loader_active(struct prog *prog) if (IS_ENABLED(CONFIG_MULTIPLE_CBFS_INSTANCES) && run_verification) { /* RW A or B */ - struct vboot_region fw_main; + struct region fw_main; vb2_get_selected_region(wd, &fw_main); - cbfs_set_header_offset(fw_main.offset_addr); + cbfs_set_header_offset(region_offset(&fw_main)); } return 1; } @@ -132,27 +132,30 @@ static int vboot_loader_active(struct prog *prog) return 0; } -static uintptr_t vboot_fw_region(int fw_index, struct vboot_region *fw_main, - struct vboot_components *fw_info, size_t *size) +static int vboot_fw_region(int fw_index, struct region *fw_main, + struct vboot_components *fw_info, + struct region *fc) { - uintptr_t fc_addr; - uint32_t fc_size; + size_t fw_main_end; + size_t fc_end; if (fw_index >= fw_info->num_components) { printk(BIOS_INFO, "invalid stage index: %d\n", fw_index); - return 0; + return -1; } - fc_addr = fw_main->offset_addr + fw_info->entries[fw_index].offset; - fc_size = fw_info->entries[fw_index].size; - if (fc_size == 0 || - fc_addr + fc_size > fw_main->offset_addr + fw_main->size) { + fc->offset = region_offset(fw_main) + fw_info->entries[fw_index].offset; + fc->size = fw_info->entries[fw_index].size; + + fw_main_end = region_offset(fw_main) + region_sz(fw_main); + fc_end = region_offset(fc) + region_sz(fc); + + if (region_sz(fc) == 0 || fc_end > fw_main_end) { printk(BIOS_INFO, "invalid stage address or size\n"); - return 0; + return -1; } - *size = fc_size; - return fc_addr; + return 0; } /* This function is only called when vboot_loader_active() returns 1. That @@ -160,7 +163,7 @@ static uintptr_t vboot_fw_region(int fw_index, struct vboot_region *fw_main, static int vboot_prepare(struct prog *prog) { struct vb2_working_data *wd; - struct vboot_region fw_main; + struct region fw_main; struct vboot_components *fw_info; /* Code size optimization. We'd never actually get called under the @@ -202,25 +205,22 @@ static int vboot_prepare(struct prog *prog) /* Load payload in ramstage. */ if (ENV_RAMSTAGE) { - uintptr_t payload; + struct region payload; void *payload_ptr; - size_t size; - - payload = vboot_fw_region(CONFIG_VBOOT_BOOT_LOADER_INDEX, - &fw_main, fw_info, &size); - if (payload == 0) + if (vboot_fw_region(CONFIG_VBOOT_BOOT_LOADER_INDEX, + &fw_main, fw_info, &payload)) die("Couldn't load payload."); - payload_ptr = vboot_get_region(payload, size, NULL); + payload_ptr = vboot_get_region(region_offset(&payload), + region_sz(&payload), NULL); if (payload_ptr == NULL) die("Couldn't load payload."); - prog_set_area(prog, payload_ptr, size); + prog_set_area(prog, payload_ptr, region_sz(&payload)); } else { - uintptr_t stage; - size_t size; + struct region stage; int stage_index = 0; if (prog->type == PROG_ROMSTAGE) @@ -230,22 +230,31 @@ static int vboot_prepare(struct prog *prog) else die("Invalid program type for vboot."); - stage = vboot_fw_region(stage_index, &fw_main, fw_info, &size); - - if (stage == 0) + if (vboot_fw_region(stage_index, &fw_main, fw_info, &stage)) die("Vboot stage load failed."); if (ENV_ROMSTAGE && IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) { + void *stage_ptr; struct rmod_stage_load rmod_ram = { .cbmem_id = CBMEM_ID_RAMSTAGE, .prog = prog, }; - if (rmodule_stage_load(&rmod_ram, (void *)stage)) + stage_ptr = vboot_get_region(region_offset(&stage), + region_sz(&stage), NULL); + + if (stage_ptr == NULL) + die("Vboot couldn't load stage."); + + if (rmodule_stage_load(&rmod_ram, stage_ptr)) die("Vboot couldn't load stage"); - } else if (cbfs_load_prog_stage_by_offset(CBFS_DEFAULT_MEDIA, - prog, stage) < 0) - die("Vboot couldn't load stage"); + } else { + size_t offset = region_offset(&stage); + + if (cbfs_load_prog_stage_by_offset(CBFS_DEFAULT_MEDIA, + prog, offset)) + die("Vboot couldn't load stage"); + } } return 0; diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c index 019208d..59ead4d 100644 --- a/src/vendorcode/google/chromeos/vboot2/verstage.c +++ b/src/vendorcode/google/chromeos/vboot2/verstage.c @@ -67,7 +67,7 @@ int vb2ex_read_resource(struct vb2_context *ctx, void *buf, uint32_t size) { - struct vboot_region region; + struct region region; switch (index) { case VB2_RES_GBB: @@ -83,10 +83,10 @@ int vb2ex_read_resource(struct vb2_context *ctx, return VB2_ERROR_EX_READ_RESOURCE_INDEX; } - if (offset + size > region.size) + if (offset + size > region_sz(&region)) return VB2_ERROR_EX_READ_RESOURCE_SIZE; - if (vboot_get_region(region.offset_addr + offset, size, buf) == NULL) + if (vboot_get_region(region_offset(&region) + offset, size, buf) == NULL) return VB2_ERROR_UNKNOWN; return VB2_SUCCESS; @@ -114,13 +114,13 @@ int vb2ex_hwcrypto_digest_finalize(uint8_t *digest, uint32_t digest_size) return VB2_ERROR_UNKNOWN; } -static int hash_body(struct vb2_context *ctx, struct vboot_region *fw_main) +static int hash_body(struct vb2_context *ctx, struct region *fw_main) { uint64_t load_ts; uint32_t expected_size; MAYBE_STATIC uint8_t block[TODO_BLOCK_SIZE]; size_t block_size = sizeof(block); - uintptr_t offset; + size_t offset; int rv; /* @@ -132,8 +132,8 @@ static int hash_body(struct vb2_context *ctx, struct vboot_region *fw_main) load_ts = timestamp_get(); timestamp_add(TS_START_HASH_BODY, load_ts); - expected_size = fw_main->size; - offset = fw_main->offset_addr; + expected_size = region_sz(fw_main); + offset = region_offset(fw_main); /* Start the body hash */ rv = vb2api_init_hash(ctx, VB2_HASH_TAG_FW_BODY, &expected_size); @@ -174,15 +174,14 @@ static int hash_body(struct vb2_context *ctx, struct vboot_region *fw_main) return VB2_SUCCESS; } -static int locate_firmware(struct vb2_context *ctx, - struct vboot_region *fw_main) +static int locate_firmware(struct vb2_context *ctx, struct region *fw_main) { if (is_slot_a(ctx)) vboot_locate_region("FW_MAIN_A", fw_main); else vboot_locate_region("FW_MAIN_B", fw_main); - if (fw_main->size < 0) + if (region_sz(fw_main) == 0) return 1; return 0; @@ -220,7 +219,7 @@ static uint32_t extend_pcrs(struct vb2_context *ctx) void verstage_main(void) { struct vb2_context ctx; - struct vboot_region fw_main; + struct region fw_main; struct vb2_working_data *wd = vboot_get_working_data(); int rv; timestamp_add_now(TS_START_VBOOT); diff --git a/src/vendorcode/google/chromeos/vboot_common.c b/src/vendorcode/google/chromeos/vboot_common.c index d3a939c..67e52a7 100644 --- a/src/vendorcode/google/chromeos/vboot_common.c +++ b/src/vendorcode/google/chromeos/vboot_common.c @@ -18,7 +18,7 @@ */ #include <boot/coreboot_tables.h> -#include <cbfs.h> +#include <boot_device.h> #include <cbmem.h> #include <console/cbmem_console.h> #include <console/console.h> @@ -31,36 +31,42 @@ #include "vboot_common.h" #include "vboot_handoff.h" -void vboot_locate_region(const char *name, struct vboot_region *region) +void vboot_locate_region(const char *name, struct region *region) { - region->size = find_fmap_entry(name, (void **)&region->offset_addr); + const struct fmap_area *area; + + region->size = 0; + + area = find_fmap_area(fmap_find(), name); + + if (area != NULL) { + region->offset = area->offset; + region->size = area->size; + } } -void *vboot_get_region(uintptr_t offset_addr, size_t size, void *dest) +void *vboot_get_region(size_t offset, size_t size, void *dest) { - if (IS_ENABLED(CONFIG_SPI_FLASH_MEMORY_MAPPED)) { - if (dest != NULL) - return memcpy(dest, (void *)offset_addr, size); - else - return (void *)offset_addr; - } else { - struct cbfs_media default_media, *media = &default_media; - void *cache; - - init_default_cbfs_media(media); - media->open(media); - if (dest != NULL) { - cache = dest; - if (media->read(media, dest, offset_addr, size) != size) - cache = NULL; - } else { - cache = media->map(media, offset_addr, size); - if (cache == CBFS_MEDIA_INVALID_MAP_ADDRESS) - cache = NULL; - } - media->close(media); - return cache; - } + const struct region_device *boot_dev; + struct region_device rdev; + + boot_device_init(); + boot_dev = boot_device_ro(); + + if (boot_dev == NULL) + return NULL; + + if (rdev_chain(&rdev, boot_dev, offset, size)) + return NULL; + + /* Each call will leak a mapping. */ + if (dest == NULL) + return rdev_mmap_full(&rdev); + + if (rdev_readat(&rdev, dest, 0, size) != size) + return NULL; + + return dest; } int vboot_get_handoff_info(void **addr, uint32_t *size) @@ -78,7 +84,7 @@ int vboot_get_handoff_info(void **addr, uint32_t *size) } /* This will leak a mapping of a fw region */ -struct vboot_components *vboot_locate_components(struct vboot_region *region) +struct vboot_components *vboot_locate_components(struct region *region) { size_t req_size; struct vboot_components *vbc; @@ -87,7 +93,7 @@ struct vboot_components *vboot_locate_components(struct vboot_region *region) req_size += sizeof(struct vboot_component_entry) * MAX_PARSED_FW_COMPONENTS; - vbc = vboot_get_region(region->offset_addr, req_size, NULL); + vbc = vboot_get_region(region_offset(region), req_size, NULL); if (vbc && vbc->num_components > MAX_PARSED_FW_COMPONENTS) vbc = NULL; diff --git a/src/vendorcode/google/chromeos/vboot_common.h b/src/vendorcode/google/chromeos/vboot_common.h index c6c9b50..3430fbe 100644 --- a/src/vendorcode/google/chromeos/vboot_common.h +++ b/src/vendorcode/google/chromeos/vboot_common.h @@ -20,11 +20,7 @@ #define VBOOT_COMMON_H #include <stdint.h> - -struct vboot_region { - uintptr_t offset_addr; - int32_t size; -}; +#include <region.h> /* The FW areas consist of multiple components. At the beginning of * each area is the number of total compoments as well as the size and @@ -40,9 +36,9 @@ struct vboot_components { struct vboot_component_entry entries[0]; } __attribute__((packed)); -void vboot_locate_region(const char *name, struct vboot_region *region); +void vboot_locate_region(const char *name, struct region *region); -struct vboot_components *vboot_locate_components(struct vboot_region *region); +struct vboot_components *vboot_locate_components(struct region *region); /* * This is a dual purpose routine. If dest is non-NULL the region at @@ -50,6 +46,6 @@ struct vboot_components *vboot_locate_components(struct vboot_region *region); * is NULL,the region will be mapped to a memory location. NULL is * returned on error else the location of the requested region. */ -void *vboot_get_region(uintptr_t offset_addr, size_t size, void *dest); +void *vboot_get_region(size_t offset, size_t size, void *dest); #endif /* VBOOT_COMMON_H */

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Patch set updated for coreboot: e52a1ac Revert "pistashio: bump up romstage size"
by Aaron Durbin 19 May '15

19 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10222 -gerrit commit e52a1ac6f0bdf9dc59a9f2bbdb755b7beb416f6f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 16:56:27 2015 -0500 Revert "pistashio: bump up romstage size" This reverts commit 701211a6e57a17ea861b4ad682dca7416fc9050e. Change-Id: Ib3e573548bff5c17ab30cfab3d833a2065d689c9 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/imgtec/pistachio/include/soc/memlayout.ld | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld index ad1d1c5..bc67447 100644 --- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld +++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld @@ -38,8 +38,8 @@ SECTIONS * and then through the identity mapping in ROM stage. */ SRAM_START(0x1a000000) - ROMSTAGE(0x1a005000, 40K) - PRERAM_CBFS_CACHE(0x1a00f000, 68K) + ROMSTAGE(0x1a005000, 36K) + PRERAM_CBFS_CACHE(0x1a00e000, 72K) SRAM_END(0x1a020000) /* Bootblock executes out of KSEG0 and sets up the identity mapping.

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Patch set updated for coreboot: 45943ef coreboot: introduce boot_device
by Aaron Durbin 19 May '15

19 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10216 -gerrit commit 45943efda9b23a3e2beac18cf682e7bb0fb4415d Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 13:15:34 2015 -0500 coreboot: introduce boot_device The boot_device is a region_device that represents the device from which coreboot retrieves and boots its stages. The existing cbfs implementations use the boot_device as the intermediary for accessing the CBFS region. Also, there's currently only support for a read-only view of the boot_device. i.e. one cannot write to the boot_device using this view. However, a writable boot_device could be added in the future. Change-Id: Ic0da796ab161b8025c90631be3423ba6473ad31c Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/riscv/rom_media.c | 66 +++++++-------- src/arch/x86/lib/Makefile.inc | 3 + src/arch/x86/lib/mmap_boot.c | 31 +++++++ src/arch/x86/lib/rom_media.c | 57 ++++++------- src/cpu/allwinner/a10/bootblock_media.c | 8 +- src/cpu/ti/am335x/bootblock_media.c | 47 ++++++++--- src/cpu/ti/am335x/nand.c | 10 ++- src/include/boot_device.h | 41 ++++++++++ src/lib/Makefile.inc | 6 ++ src/lib/boot_device.c | 38 +++++++++ src/lib/cbfs_spi.c | 97 +++++++++++++++------- src/mainboard/emulation/qemu-armv7/media.c | 45 +++++++--- src/soc/nvidia/tegra124/Makefile.inc | 4 - src/soc/nvidia/tegra124/cbfs.c | 29 ------- src/soc/nvidia/tegra124/include/soc/spi.h | 5 -- src/soc/nvidia/tegra124/spi.c | 116 +++++++++++++++++--------- src/soc/nvidia/tegra132/Makefile.inc | 4 - src/soc/nvidia/tegra132/cbfs.c | 28 ------- src/soc/nvidia/tegra132/include/soc/spi.h | 5 -- src/soc/nvidia/tegra132/spi.c | 116 +++++++++++++++++--------- src/soc/samsung/exynos5250/alternate_cbfs.c | 118 ++++++++++++++++++--------- src/soc/samsung/exynos5250/include/soc/spi.h | 9 +- src/soc/samsung/exynos5250/spi.c | 85 ++++++++----------- src/soc/samsung/exynos5420/alternate_cbfs.c | 118 ++++++++++++++++++--------- src/soc/samsung/exynos5420/include/soc/spi.h | 9 +- src/soc/samsung/exynos5420/spi.c | 78 ++++++------------ 26 files changed, 713 insertions(+), 460 deletions(-) diff --git a/src/arch/riscv/rom_media.c b/src/arch/riscv/rom_media.c index e00e0fb..484f1ee 100644 --- a/src/arch/riscv/rom_media.c +++ b/src/arch/riscv/rom_media.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * Copyright 2015 Google Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -18,40 +18,59 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, * MA 02110-1301 USA */ +#include <boot_device.h> #include <cbfs.h> +#include <console/console.h> #include <string.h> -#ifdef LIBPAYLOAD -# define printk(x...) -# define init_default_cbfs_media libpayload_init_default_cbfs_media - extern int libpayload_init_default_cbfs_media(struct cbfs_media *media); -#else -# include <console/console.h> -#endif +/* This assumes that the CBFS resides at 0x0, which is true for the default + * configuration. */ +static const struct mem_region_device gboot_dev = + MEM_REGION_DEV_INIT(NULL, CONFIG_ROM_SIZE); -// Implementation of memory-mapped ROM media source on X86. +const struct region_device *boot_device_ro(void) +{ + return &gboot_dev.rdev; +} static int rom_media_open(struct cbfs_media *media) { return 0; } static void *rom_media_map(struct cbfs_media *media, size_t offset, size_t count) { + const struct region_device *boot_dev; void *ptr; + printk(BIOS_INFO, "%s: media %p, offset %lx, size %ld.\n", __func__, media, offset, count); + boot_dev = media->context; + + ptr = rdev_mmap(boot_dev, offset, count); + + if (ptr == NULL) + return (void *)-1; - ptr = (void*)offset; return ptr; } static void *rom_media_unmap(struct cbfs_media *media, const void *address) { + const struct region_device *boot_dev; + + boot_dev = media->context; + + rdev_munmap(boot_dev, (void *)address); + return NULL; } static size_t rom_media_read(struct cbfs_media *media, void *dest, size_t offset, size_t count) { - void *ptr = rom_media_map(media, offset, count); - memcpy(dest, ptr, count); - rom_media_unmap(media, ptr); + const struct region_device *boot_dev; + + boot_dev = media->context; + + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; + return count; } @@ -60,25 +79,8 @@ static int rom_media_close(struct cbfs_media *media) { } static int init_rom_media_cbfs(struct cbfs_media *media) { - /* this assumes that the CBFS resides at 0x0, - * which is true for the default configuration - */ - int32_t *cbfs_header_ptr = (int32_t*)(uintptr_t)(CONFIG_CBFS_SIZE - 4); - uint64_t cbfs_header_offset = CONFIG_CBFS_SIZE + *cbfs_header_ptr; - struct cbfs_header *header = (struct cbfs_header*) cbfs_header_offset; - if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { - printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header); - printk(BIOS_ERR, "Expected %08lx and got %08lx\n", (unsigned long) CBFS_HEADER_MAGIC, (unsigned long) ntohl(header->magic)); - return -1; - } else { - uint32_t romsize = ntohl(header->romsize); - media->context = (void*)(uintptr_t)romsize; -#if defined(CONFIG_ROM_SIZE) - if (CONFIG_ROM_SIZE != romsize) - printk(BIOS_INFO, "Warning: rom size unmatch (%d/%d)\n", - CONFIG_ROM_SIZE, romsize); -#endif - } + boot_device_init(); + media->context = (void *)boot_device_ro(); media->open = rom_media_open; media->close = rom_media_close; media->map = rom_media_map; diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index c7e8b62..e308be9 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -6,6 +6,7 @@ romstage-y += memset.c romstage-y += memcpy.c romstage-y += memmove.c romstage-y += rom_media.c +romstage-y += mmap_boot.c endif # CONFIG_ARCH_ROMSTAGE_X86_32 @@ -22,6 +23,7 @@ ramstage-y += memcpy.c ramstage-y += memmove.c ramstage-y += ebda.c ramstage-y += rom_media.c +ramstage-y += mmap_boot.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c @@ -32,6 +34,7 @@ smm-y += memset.c smm-y += memcpy.c smm-y += memmove.c smm-y += rom_media.c +smm-y += mmap_boot.c rmodules_x86_32-y += memset.c rmodules_x86_32-y += memcpy.c diff --git a/src/arch/x86/lib/mmap_boot.c b/src/arch/x86/lib/mmap_boot.c new file mode 100644 index 0000000..eb7b23e --- /dev/null +++ b/src/arch/x86/lib/mmap_boot.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <boot_device.h> + +/* The ROM is memory mapped just below 4GiB. Form a pointer for the base. */ +#define rom_base ((void *)(uintptr_t)(-(int32_t)CONFIG_ROM_SIZE)) + +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_INIT(rom_base, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &boot_dev.rdev; +} diff --git a/src/arch/x86/lib/rom_media.c b/src/arch/x86/lib/rom_media.c index ed2122c..c2c4721 100644 --- a/src/arch/x86/lib/rom_media.c +++ b/src/arch/x86/lib/rom_media.c @@ -18,6 +18,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, * MA 02110-1301 USA */ + +#include <boot_device.h> #include <cbfs.h> #include <string.h> @@ -37,14 +39,19 @@ static int x86_rom_open(struct cbfs_media *media) { static void *x86_rom_map(struct cbfs_media *media, size_t offset, size_t count) { void *ptr; - // Some address (ex, pointer to master header) may be given in memory - // mapped location. To workaround that, we handle >0xf0000000 as real - // memory pointer. + const struct region_device *boot_dev; + + boot_dev = media->context; + /* Extremely large offsets are considered relative to end of region. */ if ((uint32_t)offset > (uint32_t)0xf0000000) - ptr = (void*)offset; - else - ptr = (void*)(0 - (uint32_t)media->context + offset); + offset += region_device_sz(boot_dev); + + ptr = rdev_mmap(boot_dev, offset, count); + + if (ptr == NULL) + return (void *)-1; + return ptr; } @@ -54,7 +61,13 @@ static void *x86_rom_unmap(struct cbfs_media *media, const void *address) { static size_t x86_rom_read(struct cbfs_media *media, void *dest, size_t offset, size_t count) { - void *ptr = x86_rom_map(media, offset, count); + void *ptr; + + ptr = x86_rom_map(media, offset, count); + + if (ptr == (void *)-1) + return 0; + memcpy(dest, ptr, count); x86_rom_unmap(media, ptr); return count; @@ -64,30 +77,14 @@ static int x86_rom_close(struct cbfs_media *media) { return 0; } -int init_x86rom_cbfs_media(struct cbfs_media *media); -int init_x86rom_cbfs_media(struct cbfs_media *media) { - // On X86, we always keep a reference of pointer to CBFS header in - // 0xfffffffc, and the pointer is still a memory-mapped address. - // Since the CBFS core always use ROM offset, we need to figure out - // header->romsize even before media is initialized. - struct cbfs_header *header = (struct cbfs_header*) - *(uint32_t*)(0xfffffffc); - if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { -#if defined(CONFIG_ROM_SIZE) - printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header); - media->context = (void*)CONFIG_ROM_SIZE; -#else +static int init_x86rom_cbfs_media(struct cbfs_media *media) { + boot_device_init(); + + media->context = (void *)boot_device_ro(); + + if (media->context == NULL) return -1; -#endif - } else { - uint32_t romsize = ntohl(header->romsize); - media->context = (void*)romsize; -#if defined(CONFIG_ROM_SIZE) - if (CONFIG_ROM_SIZE != romsize) - printk(BIOS_INFO, "Warning: rom size unmatch (%d/%d)\n", - CONFIG_ROM_SIZE, romsize); -#endif - } + media->open = x86_rom_open; media->close = x86_rom_close; media->map = x86_rom_map; diff --git a/src/cpu/allwinner/a10/bootblock_media.c b/src/cpu/allwinner/a10/bootblock_media.c index a5863b6..a585bca 100644 --- a/src/cpu/allwinner/a10/bootblock_media.c +++ b/src/cpu/allwinner/a10/bootblock_media.c @@ -4,11 +4,17 @@ * Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> * Subject to the GNU GPL v2, or (at your option) any later version. */ +#include <boot_device.h> #include <cbfs.h> #include <console/console.h> +const struct region_device *boot_device_ro(void) +{ + return NULL; +} + int init_default_cbfs_media(struct cbfs_media *media) { printk(BIOS_ERR, "Oh my! I don't know how to access CBFS yet."); - return 0; + return -1; } diff --git a/src/cpu/ti/am335x/bootblock_media.c b/src/cpu/ti/am335x/bootblock_media.c index 93a2d18..702d91a 100644 --- a/src/cpu/ti/am335x/bootblock_media.c +++ b/src/cpu/ti/am335x/bootblock_media.c @@ -17,11 +17,21 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <boot_device.h> #include <cbfs.h> #include <console/console.h> #include <string.h> #include <symbols.h> +/* FIXME: No idea how big the internal SRAM actually is. */ +static const struct mem_region_device gboot_dev = + MEM_REGION_DEV_INIT(_dram, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &gboot_dev.rdev; +} + static int dummy_open(struct cbfs_media *media) { return 0; @@ -35,33 +45,48 @@ static int dummy_close(struct cbfs_media *media) static void * on_chip_memory_map(struct cbfs_media *media, size_t offset, size_t count) { - return _dram + offset; + const struct region_device *boot_dev; + void *ptr; + + boot_dev = media->context; + + ptr = rdev_mmap(boot_dev, offset, count); + + if (ptr == NULL) + return (void *)-1; + + return ptr; } static void * dummy_unmap(struct cbfs_media *media, const void *address) { + const struct region_device *boot_dev; + + boot_dev = media->context; + + rdev_munmap(boot_dev, (void *)address); + return NULL; } static size_t on_chip_memory_read(struct cbfs_media *media, void *dest, size_t offset, size_t count) { - void *ptr = media->map(media, offset, count); - memcpy(dest, ptr, count); - media->unmap(media, ptr); + const struct region_device *boot_dev; + + boot_dev = media->context; + + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; + return count; } int init_default_cbfs_media(struct cbfs_media *media) { - struct cbfs_header *header = - (struct cbfs_header *)(_dram + CONFIG_CBFS_HEADER_ROM_OFFSET); - - if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { - printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header); - return -1; - } + boot_device_init(); + media->context = (void *)boot_device_ro(); media->open = dummy_open; media->close = dummy_close; media->map = on_chip_memory_map; diff --git a/src/cpu/ti/am335x/nand.c b/src/cpu/ti/am335x/nand.c index ddab389..7e67e97 100644 --- a/src/cpu/ti/am335x/nand.c +++ b/src/cpu/ti/am335x/nand.c @@ -17,10 +17,16 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <boot_device.h> #include <cbfs.h> +const struct region_device *boot_device_ro(void) +{ + return NULL; +} + int init_default_cbfs_media(struct cbfs_media *media) { - /* FIXME: add support for reading coreboot from NAND */ - return 0; + /* FIXME: add support for reading coreboot from NAND */ + return -1; } diff --git a/src/include/boot_device.h b/src/include/boot_device.h new file mode 100644 index 0000000..0848ea5 --- /dev/null +++ b/src/include/boot_device.h @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef _BOOT_DEVICE_H_ +#define _BOOT_DEVICE_H_ + +#include <region.h> + +/* Return the region_device for the read-only boot device. */ +const struct region_device *boot_device_ro(void); + +/* + * Create a sub-region of the read-only boot device. + * Returns 0 on success, < 0 on error. + */ +int boot_device_ro_subregion(const struct region *sub, + struct region_device *subrd); + +/* + * Initialize the boot device. This may be called multiple times within + * a stage so boot device implementations should account for this behavior. + **/ +void boot_device_init(void); + +#endif /* _BOOT_DEVICE_H_ */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 88254b9..11725c4 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -31,6 +31,7 @@ bootblock-y += memchr.c bootblock-y += memcmp.c bootblock-y += mem_pool.c bootblock-y += region.c +bootblock-y += boot_device.c verstage-y += prog_ops.c verstage-y += delay.c @@ -40,6 +41,7 @@ verstage-y += halt.c verstage-y += memcmp.c verstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c verstage-y += region.c +verstage-y += boot_device.c verstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c verstage-$(CONFIG_COMMON_CBFS_SPI_WRAPPER) += cbfs_spi.c @@ -141,7 +143,11 @@ ramstage-y += mem_pool.c romstage-y += region.c ramstage-y += region.c +romstage-y += boot_device.c +ramstage-y += boot_device.c +smm-y += region.c +smm-y += boot_device.c smm-y += cbfs.c cbfs_core.c memcmp.c smm-$(CONFIG_COMPILER_GCC) += gcc.c diff --git a/src/lib/boot_device.c b/src/lib/boot_device.c new file mode 100644 index 0000000..e0353fc --- /dev/null +++ b/src/lib/boot_device.c @@ -0,0 +1,38 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <boot_device.h> + +void __attribute__((weak)) boot_device_init(void) +{ + /* Provide weak do-nothing init. */ +} + +int boot_device_ro_subregion(const struct region *sub, + struct region_device *subrd) +{ + const struct region_device *boot_dev; + + boot_dev = boot_device_ro(); + + if (boot_dev == NULL) + return -1; + + return rdev_chain(subrd, boot_dev, region_offset(sub), region_sz(sub)); +} diff --git a/src/lib/cbfs_spi.c b/src/lib/cbfs_spi.c index 81e6ec3..6637cdc 100644 --- a/src/lib/cbfs_spi.c +++ b/src/lib/cbfs_spi.c @@ -23,17 +23,52 @@ * SPI. */ +#include <boot_device.h> #include <cbfs.h> +#include <region.h> #include <spi_flash.h> #include <symbols.h> -/* SPI flash as CBFS media. */ -struct cbfs_spi_context { - struct spi_flash *spi_flash_info; - struct cbfs_simple_buffer buffer; +static struct spi_flash *spi_flash_info; + +static ssize_t spi_readat(const struct region_device *rd, void *b, + size_t offset, size_t size) +{ + if (spi_flash_info->read(spi_flash_info, offset, size, b)) + return -1; + return size; +} + +static const struct region_device_ops spi_ops = { + .mmap = mmap_helper_rdev_mmap, + .munmap = mmap_helper_rdev_munmap, + .readat = spi_readat, }; -static struct cbfs_spi_context spi_context; +static struct mmap_helper_region_device mdev = + MMAP_HELPER_REGION_INIT(&spi_ops, 0, CONFIG_ROM_SIZE); + +void boot_device_init(void) +{ + int bus = CONFIG_BOOT_MEDIA_SPI_BUS; + int cs = 0; + + if (spi_flash_info != NULL) + return; + + spi_flash_info = spi_flash_probe(bus, cs); + + mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size); +} + +/* Return the CBFS boot device. */ +const struct region_device *boot_device_ro(void) +{ + if (spi_flash_info == NULL) + return NULL; + + return &mdev.rdev; +} static int cbfs_media_open(struct cbfs_media *media) { @@ -49,52 +84,58 @@ static size_t cbfs_media_read(struct cbfs_media *media, void *dest, size_t offset, size_t count) { - struct cbfs_spi_context *context = media->context; + const struct region_device *boot_dev; - return context->spi_flash_info->read - (context->spi_flash_info, offset, count, dest) ? 0 : count; + boot_dev = media->context; + + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; + + return count; } static void *cbfs_media_map(struct cbfs_media *media, size_t offset, size_t count) { - struct cbfs_spi_context *context = media->context; + const struct region_device *boot_dev; + void *ptr; + + boot_dev = media->context; + + ptr = rdev_mmap(boot_dev, offset, count); - return cbfs_simple_buffer_map(&context->buffer, media, offset, count); + if (ptr == NULL) + return (void *)-1; + + return ptr; } static void *cbfs_media_unmap(struct cbfs_media *media, const void *address) { - struct cbfs_spi_context *context = media->context; + const struct region_device *boot_dev; + + boot_dev = media->context; + + rdev_munmap(boot_dev, (void *)address); - return cbfs_simple_buffer_unmap(&context->buffer, address); + return NULL; } -static int init_cbfs_media_context(void) +int init_default_cbfs_media(struct cbfs_media *media) { - if (!spi_context.spi_flash_info) { - - spi_context.spi_flash_info = spi_flash_probe - (CONFIG_BOOT_MEDIA_SPI_BUS, 0); + boot_device_init(); - if (!spi_context.spi_flash_info) - return -1; + media->context = (void *)boot_device_ro(); - spi_context.buffer.buffer = (void *)_cbfs_cache; - spi_context.buffer.size = _cbfs_cache_size; - } - return 0; + if (media->context == NULL) + return -1; -} -int init_default_cbfs_media(struct cbfs_media *media) -{ - media->context = &spi_context; media->open = cbfs_media_open; media->close = cbfs_media_close; media->read = cbfs_media_read; media->map = cbfs_media_map; media->unmap = cbfs_media_unmap; - return init_cbfs_media_context(); + return 0; } diff --git a/src/mainboard/emulation/qemu-armv7/media.c b/src/mainboard/emulation/qemu-armv7/media.c index 8c71263..e0f2251 100644 --- a/src/mainboard/emulation/qemu-armv7/media.c +++ b/src/mainboard/emulation/qemu-armv7/media.c @@ -12,12 +12,20 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ +#include <boot_device.h> #include <cbfs.h> #include <string.h> #include <symbols.h> #include <console/console.h> -/* Simple memory-mapped ROM emulation. */ +/* Maps directly to qemu memory mapped space of 0x10000 up to rom size. */ +static const struct mem_region_device gboot_dev = + MEM_REGION_DEV_INIT((void *)0x10000, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &gboot_dev.rdev; +} static int emu_rom_open(struct cbfs_media *media) { @@ -26,26 +34,40 @@ static int emu_rom_open(struct cbfs_media *media) static void *emu_rom_map(struct cbfs_media *media, size_t offset, size_t count) { - if (offset + count > CONFIG_ROM_SIZE) - return (void *)-1; - return (void*)(offset + 0x10000); + const struct region_device *boot_dev; + void *ptr; + + boot_dev = media->context; + + ptr = rdev_mmap(boot_dev, offset, count); + + if (ptr == NULL) + return (void *)-1; + + return ptr; } static void *emu_rom_unmap(struct cbfs_media *media, const void *address) { + const struct region_device *boot_dev; + + boot_dev = media->context; + + rdev_munmap(boot_dev, (void *)address); + return NULL; } static size_t emu_rom_read(struct cbfs_media *media, void *dest, size_t offset, size_t count) { - void *ptr = emu_rom_map(media, offset, count); + const struct region_device *boot_dev; - if (ptr == (void *)-1) + boot_dev = media->context; + + if (rdev_readat(boot_dev, dest, offset, count) < 0) return 0; - memcpy(dest, ptr, count); - emu_rom_unmap(media, ptr); return count; } @@ -54,10 +76,11 @@ static int emu_rom_close(struct cbfs_media *media) return 0; } -int init_emu_rom_cbfs_media(struct cbfs_media *media); - -int init_emu_rom_cbfs_media(struct cbfs_media *media) +static int init_emu_rom_cbfs_media(struct cbfs_media *media) { + boot_device_init(); + + media->context = (void *)boot_device_ro(); media->open = emu_rom_open; media->close = emu_rom_close; media->map = emu_rom_map; diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc index 78054f4..46ce59d 100644 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ b/src/soc/nvidia/tegra124/Makefile.inc @@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_NVIDIA_TEGRA124),y) bootblock-y += bootblock.c bootblock-y += bootblock_asm.S -bootblock-y += cbfs.c bootblock-y += clock.c bootblock-y += dma.c bootblock-y += i2c.c @@ -22,7 +21,6 @@ bootblock-$(CONFIG_DRIVERS_UART) += uart.c endif verstage-y += verstage.c -verstage-y += cbfs.c verstage-y += dma.c verstage-y += monotonic_timer.c verstage-y += spi.c @@ -34,7 +32,6 @@ verstage-y += clock.c verstage-y += i2c.c verstage-y += cache.c -romstage-y += cbfs.c romstage-y += cbmem.c romstage-y += clock.c romstage-y += dma.c @@ -51,7 +48,6 @@ romstage-y += ../tegra/pinmux.c romstage-y += cache.c romstage-$(CONFIG_DRIVERS_UART) += uart.c -ramstage-y += cbfs.c ramstage-y += cbmem.c ramstage-y += clock.c ramstage-y += display.c diff --git a/src/soc/nvidia/tegra124/cbfs.c b/src/soc/nvidia/tegra124/cbfs.c deleted file mode 100644 index 33a7258..0000000 --- a/src/soc/nvidia/tegra124/cbfs.c +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - - -#include <cbfs.h> /* This driver serves as a CBFS media source. */ -#include <soc/spi.h> -#include <symbols.h> - -int init_default_cbfs_media(struct cbfs_media *media) -{ - return initialize_tegra_spi_cbfs_media(media, - _cbfs_cache, _cbfs_cache_size); -} diff --git a/src/soc/nvidia/tegra124/include/soc/spi.h b/src/soc/nvidia/tegra124/include/soc/spi.h index ab04632..cfa3cd2 100644 --- a/src/soc/nvidia/tegra124/include/soc/spi.h +++ b/src/soc/nvidia/tegra124/include/soc/spi.h @@ -61,11 +61,6 @@ struct tegra_spi_channel { enum spi_xfer_mode xfer_mode; }; -struct cbfs_media; -int initialize_tegra_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size); - struct tegra_spi_channel *tegra_spi_init(unsigned int bus); #endif /* __NVIDIA_TEGRA124_SPI_H__ */ diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c index e1d022a..6fbb3c4 100644 --- a/src/soc/nvidia/tegra124/spi.c +++ b/src/soc/nvidia/tegra124/spi.c @@ -21,6 +21,7 @@ #include <arch/cache.h> #include <arch/io.h> #include <assert.h> +#include <boot_device.h> #include <console/console.h> #include <cbfs.h> #include <delay.h> @@ -33,6 +34,7 @@ #include <stdint.h> #include <stdlib.h> #include <string.h> +#include <symbols.h> #include <timer.h> @@ -800,12 +802,6 @@ int spi_xfer(struct spi_slave *slave, const void *dout, return ret; } -/* SPI as CBFS media. */ -struct tegra_spi_media { - struct spi_slave *slave; - struct cbfs_simple_buffer buffer; -}; - static int tegra_spi_cbfs_open(struct cbfs_media *media) { DEBUG_SPI("tegra_spi_cbfs_open\n"); @@ -823,16 +819,17 @@ static int tegra_spi_cbfs_close(struct cbfs_media *media) #define JEDEC_FAST_READ_DUAL 0x3b #define JEDEC_FAST_READ_DUAL_OUTSIZE 0x05 -static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, - size_t offset, size_t count) +static struct spi_slave *boot_slave; + +static ssize_t tegra_spi_readat(const struct region_device *rdev, void *dest, + size_t offset, size_t count) { - struct tegra_spi_media *spi = (struct tegra_spi_media *)media->context; u8 spi_read_cmd[JEDEC_FAST_READ_DUAL_OUTSIZE]; unsigned int read_cmd_bytes; int ret = count; struct tegra_spi_channel *channel; - channel = to_tegra_spi(spi->slave->bus); + channel = to_tegra_spi(boot_slave->bus); if (channel->dual_mode) { /* @@ -853,9 +850,9 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, spi_read_cmd[2] = (offset >> 8) & 0xff; spi_read_cmd[3] = offset & 0xff; - spi_claim_bus(spi->slave); + spi_claim_bus(boot_slave); - if (spi_xfer(spi->slave, spi_read_cmd, + if (spi_xfer(boot_slave, spi_read_cmd, read_cmd_bytes, NULL, 0) < 0) { ret = -1; printk(BIOS_ERR, "%s: Failed to transfer %u bytes\n", @@ -866,7 +863,7 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, if (channel->dual_mode) { setbits_le32(&channel->regs->command1, SPI_CMD1_BOTH_EN_BIT); } - if (spi_xfer(spi->slave, NULL, 0, dest, count)) { + if (spi_xfer(boot_slave, NULL, 0, dest, count)) { ret = -1; printk(BIOS_ERR, "%s: Failed to transfer %u bytes\n", __func__, count); @@ -876,56 +873,70 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, tegra_spi_cbfs_read_exit: /* de-assert /CS */ - spi_release_bus(spi->slave); - return (ret < 0) ? 0 : ret; + spi_release_bus(boot_slave); + return ret; +} + +static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, + size_t offset, size_t count) +{ + const struct region_device *boot_dev; + + boot_dev = media->context; + + printk(BIOS_ERR, "%s: reading %zx bytes from %zx\n", + __func__, count, offset); + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; + + return count; } static void *tegra_spi_cbfs_map(struct cbfs_media *media, size_t offset, size_t count) { - struct tegra_spi_media *spi = (struct tegra_spi_media*)media->context; + const struct region_device *boot_dev; void *map; + DEBUG_SPI("tegra_spi_cbfs_map\n"); - map = cbfs_simple_buffer_map(&spi->buffer, media, offset, count); + + boot_dev = media->context; + + map = rdev_mmap(boot_dev, offset, count); + + if (map == NULL) + map = (void *)-1; + return map; } static void *tegra_spi_cbfs_unmap(struct cbfs_media *media, const void *address) { - struct tegra_spi_media *spi = (struct tegra_spi_media*)media->context; + const struct region_device *boot_dev; + DEBUG_SPI("tegra_spi_cbfs_unmap\n"); - return cbfs_simple_buffer_unmap(&spi->buffer, address); -} -int initialize_tegra_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size) -{ - // TODO Replace static variable to support multiple streams. - static struct tegra_spi_media context; - static struct tegra_spi_channel *channel; + boot_dev = media->context; - channel = &tegra_spi_channels[CONFIG_BOOT_MEDIA_SPI_BUS - 1]; - channel->slave.cs = CONFIG_BOOT_MEDIA_SPI_CHIP_SELECT; + rdev_munmap(boot_dev, (void *)address); + return NULL; +} + +int init_default_cbfs_media(struct cbfs_media *media) +{ DEBUG_SPI("Initializing CBFS media on SPI\n"); - context.slave = &channel->slave; - context.buffer.allocated = context.buffer.last_allocate = 0; - context.buffer.buffer = buffer_address; - context.buffer.size = buffer_size; - media->context = (void*)&context; + boot_device_init(); + + media->context = (void *)boot_device_ro(); media->open = tegra_spi_cbfs_open; media->close = tegra_spi_cbfs_close; media->read = tegra_spi_cbfs_read; media->map = tegra_spi_cbfs_map; media->unmap = tegra_spi_cbfs_unmap; -#if CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B == 1 - channel->dual_mode = 1; -#endif - return 0; } @@ -937,3 +948,32 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs) return &channel->slave; } + +static const struct region_device_ops tegra_spi_ops = { + .mmap = mmap_helper_rdev_mmap, + .munmap = mmap_helper_rdev_munmap, + .readat = tegra_spi_readat, +}; + +static struct mmap_helper_region_device mdev = + MMAP_HELPER_REGION_INIT(&tegra_spi_ops, 0, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &mdev.rdev; +} + +void boot_device_init(void) +{ + struct tegra_spi_channel *boot_chan; + + boot_chan = &tegra_spi_channels[CONFIG_BOOT_MEDIA_SPI_BUS - 1]; + boot_chan->slave.cs = CONFIG_BOOT_MEDIA_SPI_CHIP_SELECT; + +#if CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B == 1 + boot_chan->dual_mode = 1; +#endif + boot_slave = &boot_chan->slave; + + mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size); +} diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc index 44976d1..e8c8d83 100644 --- a/src/soc/nvidia/tegra132/Makefile.inc +++ b/src/soc/nvidia/tegra132/Makefile.inc @@ -2,7 +2,6 @@ ifeq ($(CONFIG_SOC_NVIDIA_TEGRA132),y) bootblock-y += bootblock.c bootblock-y += bootblock_asm.S -bootblock-y += cbfs.c bootblock-y += clock.c bootblock-y += spi.c bootblock-y += i2c.c @@ -23,7 +22,6 @@ bootblock-$(CONFIG_DRIVERS_UART) += uart.c endif verstage-y += verstage.c -verstage-y += cbfs.c verstage-y += dma.c verstage-y += monotonic_timer.c verstage-y += spi.c @@ -39,7 +37,6 @@ verstage-y += i2c.c romstage-y += 32bit_reset.S romstage-y += romstage_asm.S romstage-y += addressmap.c -romstage-y += cbfs.c romstage-y += cbmem.c romstage-y += ccplex.c romstage-y += clock.c @@ -63,7 +60,6 @@ romstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += 32bit_reset.S ramstage-y += addressmap.c -ramstage-y += cbfs.c ramstage-y += cbmem.c ramstage-y += cpu.c ramstage-y += cpu_lib.S diff --git a/src/soc/nvidia/tegra132/cbfs.c b/src/soc/nvidia/tegra132/cbfs.c deleted file mode 100644 index 2efd48b..0000000 --- a/src/soc/nvidia/tegra132/cbfs.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <cbfs.h> /* This driver serves as a CBFS media source. */ -#include <soc/spi.h> -#include <symbols.h> - -int init_default_cbfs_media(struct cbfs_media *media) -{ - return initialize_tegra_spi_cbfs_media(media, - _cbfs_cache, _cbfs_cache_size); -} diff --git a/src/soc/nvidia/tegra132/include/soc/spi.h b/src/soc/nvidia/tegra132/include/soc/spi.h index 2fd9562..4c91c27 100644 --- a/src/soc/nvidia/tegra132/include/soc/spi.h +++ b/src/soc/nvidia/tegra132/include/soc/spi.h @@ -62,11 +62,6 @@ struct tegra_spi_channel { enum spi_xfer_mode xfer_mode; }; -struct cbfs_media; -int initialize_tegra_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size); - struct tegra_spi_channel *tegra_spi_init(unsigned int bus); #endif /* __NVIDIA_TEGRA132_SPI_H__ */ diff --git a/src/soc/nvidia/tegra132/spi.c b/src/soc/nvidia/tegra132/spi.c index 6d9fa1f..746e96e 100644 --- a/src/soc/nvidia/tegra132/spi.c +++ b/src/soc/nvidia/tegra132/spi.c @@ -21,6 +21,7 @@ #include <arch/cache.h> #include <arch/io.h> #include <assert.h> +#include <boot_device.h> #include <cbfs.h> #include <console/console.h> #include <delay.h> @@ -33,6 +34,7 @@ #include <stdint.h> #include <stdlib.h> #include <string.h> +#include <symbols.h> #include <timer.h> @@ -815,12 +817,6 @@ int spi_xfer(struct spi_slave *slave, const void *dout, return ret; } -/* SPI as CBFS media. */ -struct tegra_spi_media { - struct spi_slave *slave; - struct cbfs_simple_buffer buffer; -}; - static int tegra_spi_cbfs_open(struct cbfs_media *media) { DEBUG_SPI("tegra_spi_cbfs_open\n"); @@ -838,16 +834,17 @@ static int tegra_spi_cbfs_close(struct cbfs_media *media) #define JEDEC_FAST_READ_DUAL 0x3b #define JEDEC_FAST_READ_DUAL_OUTSIZE 0x05 -static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, - size_t offset, size_t count) +static struct spi_slave *boot_slave; + +static ssize_t tegra_spi_readat(const struct region_device *rdev, void *dest, + size_t offset, size_t count) { - struct tegra_spi_media *spi = (struct tegra_spi_media *)media->context; u8 spi_read_cmd[JEDEC_FAST_READ_DUAL_OUTSIZE]; unsigned int read_cmd_bytes; int ret = count; struct tegra_spi_channel *channel; - channel = to_tegra_spi(spi->slave->bus); + channel = to_tegra_spi(boot_slave->bus); if (channel->dual_mode) { /* @@ -868,9 +865,9 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, spi_read_cmd[2] = (offset >> 8) & 0xff; spi_read_cmd[3] = offset & 0xff; - spi_claim_bus(spi->slave); + spi_claim_bus(boot_slave); - if (spi_xfer(spi->slave, spi_read_cmd, + if (spi_xfer(boot_slave, spi_read_cmd, read_cmd_bytes, NULL, 0) < 0) { ret = -1; printk(BIOS_ERR, "%s: Failed to transfer %zu bytes\n", @@ -881,7 +878,7 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, if (channel->dual_mode) { setbits_le32(&channel->regs->command1, SPI_CMD1_BOTH_EN_BIT); } - if (spi_xfer(spi->slave, NULL, 0, dest, count)) { + if (spi_xfer(boot_slave, NULL, 0, dest, count)) { ret = -1; printk(BIOS_ERR, "%s: Failed to transfer %zu bytes\n", __func__, count); @@ -891,56 +888,70 @@ static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, tegra_spi_cbfs_read_exit: /* de-assert /CS */ - spi_release_bus(spi->slave); - return (ret < 0) ? 0 : ret; + spi_release_bus(boot_slave); + return ret; +} + +static size_t tegra_spi_cbfs_read(struct cbfs_media *media, void *dest, + size_t offset, size_t count) +{ + const struct region_device *boot_dev; + + boot_dev = media->context; + + DEBUG_SPI("%s: reading %zx bytes from %zx\n", __func__, count, offset); + + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; + + return count; } static void *tegra_spi_cbfs_map(struct cbfs_media *media, size_t offset, size_t count) { - struct tegra_spi_media *spi = (struct tegra_spi_media*)media->context; + const struct region_device *boot_dev; void *map; + DEBUG_SPI("tegra_spi_cbfs_map\n"); - map = cbfs_simple_buffer_map(&spi->buffer, media, offset, count); + + boot_dev = media->context; + + map = rdev_mmap(boot_dev, offset, count); + + if (map == NULL) + map = (void *)-1; + return map; } static void *tegra_spi_cbfs_unmap(struct cbfs_media *media, const void *address) { - struct tegra_spi_media *spi = (struct tegra_spi_media*)media->context; + const struct region_device *boot_dev; + DEBUG_SPI("tegra_spi_cbfs_unmap\n"); - return cbfs_simple_buffer_unmap(&spi->buffer, address); -} -int initialize_tegra_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size) -{ - // TODO Replace static variable to support multiple streams. - static struct tegra_spi_media context; - static struct tegra_spi_channel *channel; + boot_dev = media->context; - channel = &tegra_spi_channels[CONFIG_BOOT_MEDIA_SPI_BUS - 1]; - channel->slave.cs = CONFIG_BOOT_MEDIA_SPI_CHIP_SELECT; + rdev_munmap(boot_dev, (void *)address); + return NULL; +} + +int init_default_cbfs_media(struct cbfs_media *media) +{ DEBUG_SPI("Initializing CBFS media on SPI\n"); - context.slave = &channel->slave; - context.buffer.allocated = context.buffer.last_allocate = 0; - context.buffer.buffer = buffer_address; - context.buffer.size = buffer_size; - media->context = (void*)&context; + boot_device_init(); + + media->context = (void *)boot_device_ro(); media->open = tegra_spi_cbfs_open; media->close = tegra_spi_cbfs_close; media->read = tegra_spi_cbfs_read; media->map = tegra_spi_cbfs_map; media->unmap = tegra_spi_cbfs_unmap; -#if CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B == 1 - channel->dual_mode = 1; -#endif - return 0; } @@ -952,3 +963,32 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs) return &channel->slave; } + +static const struct region_device_ops tegra_spi_ops = { + .mmap = mmap_helper_rdev_mmap, + .munmap = mmap_helper_rdev_munmap, + .readat = tegra_spi_readat, +}; + +static struct mmap_helper_region_device mdev = + MMAP_HELPER_REGION_INIT(&tegra_spi_ops, 0, CONFIG_ROM_SIZE); + +const struct region_device *boot_device_ro(void) +{ + return &mdev.rdev; +} + +void boot_device_init(void) +{ + struct tegra_spi_channel *boot_chan; + + boot_chan = &tegra_spi_channels[CONFIG_BOOT_MEDIA_SPI_BUS - 1]; + boot_chan->slave.cs = CONFIG_BOOT_MEDIA_SPI_CHIP_SELECT; + +#if CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B == 1 + boot_chan->dual_mode = 1; +#endif + boot_slave = &boot_chan->slave; + + mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size); +} diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.c b/src/soc/samsung/exynos5250/alternate_cbfs.c index 9f873bf..d6aa6e6 100644 --- a/src/soc/samsung/exynos5250/alternate_cbfs.c +++ b/src/soc/samsung/exynos5250/alternate_cbfs.c @@ -19,6 +19,7 @@ #include <assert.h> +#include <boot_device.h> #include <cbfs.h> /* This driver serves as a CBFS media source. */ #include <console/console.h> #include <soc/alternate_cbfs.h> @@ -45,7 +46,7 @@ * rest of the firmware's lifetime and all subsequent stages (which will not * have __PRE_RAM__ defined) can just directly reference it there. */ -static int usb_cbfs_open(struct cbfs_media *media) +static int usb_cbfs_open(void) { #ifdef __PRE_RAM__ static int first_run = 1; @@ -80,7 +81,7 @@ static int usb_cbfs_open(struct cbfs_media *media) * this seems like a safer approach. It also makes it easy to pass our image * down to payloads. */ -static int sdmmc_cbfs_open(struct cbfs_media *media) +static int sdmmc_cbfs_open(void) { #ifdef __PRE_RAM__ /* @@ -111,66 +112,109 @@ static int sdmmc_cbfs_open(struct cbfs_media *media) return 0; } -static int alternate_cbfs_close(struct cbfs_media *media) { return 0; } +static int exynos_cbfs_open(struct cbfs_media *media) { + return 0; +} + +static int exynos_cbfs_close(struct cbfs_media *media) { + return 0; +} + +static size_t exynos_cbfs_read(struct cbfs_media *media, void *dest, + size_t offset, size_t count) { + const struct region_device *boot_dev; + + boot_dev = media->context; + + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; -static size_t alternate_cbfs_read(struct cbfs_media *media, void *dest, - size_t offset, size_t count) -{ - ASSERT(offset + count < _cbfs_cache_size); - memcpy(dest, _cbfs_cache + offset, count); return count; } -static void *alternate_cbfs_map(struct cbfs_media *media, size_t offset, - size_t count) -{ - ASSERT(offset + count < _cbfs_cache_size); - return _cbfs_cache + offset; +static void *exynos_cbfs_map(struct cbfs_media *media, size_t offset, + size_t count) { + const struct region_device *boot_dev; + void *ptr; + + boot_dev = media->context; + + ptr = rdev_mmap(boot_dev, offset, count); + + if (ptr == NULL) + return (void *)-1; + + return ptr; } -static void *alternate_cbfs_unmap(struct cbfs_media *media, - const void *buffer) { return 0; } +static void *exynos_cbfs_unmap(struct cbfs_media *media, + const void *address) { + const struct region_device *boot_dev; -static int initialize_exynos_sdmmc_cbfs_media(struct cbfs_media *media) -{ - printk(BIOS_DEBUG, "Using Exynos alternate boot mode SDMMC\n"); + boot_dev = media->context; - media->open = sdmmc_cbfs_open; - media->close = alternate_cbfs_close; - media->read = alternate_cbfs_read; - media->map = alternate_cbfs_map; - media->unmap = alternate_cbfs_unmap; + rdev_munmap(boot_dev, (void *)address); - return 0; + return NULL; } -static int initialize_exynos_usb_cbfs_media(struct cbfs_media *media) +int init_default_cbfs_media(struct cbfs_media *media) { - printk(BIOS_DEBUG, "Using Exynos alternate boot mode USB A-A\n"); + boot_device_init(); - media->open = usb_cbfs_open; - media->close = alternate_cbfs_close; - media->read = alternate_cbfs_read; - media->map = alternate_cbfs_map; - media->unmap = alternate_cbfs_unmap; + media->context = (void *)boot_device_ro(); + + if (media->context == NULL) + return -1; + + media->open = exynos_cbfs_open; + media->close = exynos_cbfs_close; + media->read = exynos_cbfs_read; + media->map = exynos_cbfs_map; + media->unmap = exynos_cbfs_unmap; return 0; } -int init_default_cbfs_media(struct cbfs_media *media) +static struct mem_region_device alternate_rdev = MEM_REGION_DEV_INIT(NULL, 0); + +const struct region_device *boot_device_ro(void) { if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) - return initialize_exynos_usb_cbfs_media(media); + return &alternate_rdev.rdev; + + switch (exynos_power->om_stat & OM_STAT_MASK) { + case OM_STAT_SDMMC: + return &alternate_rdev.rdev; + case OM_STAT_SPI: + return exynos_spi_boot_device(); + default: + printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", + exynos_power->om_stat); + return NULL; + } +} + +void boot_device_init(void) +{ + mem_region_device_init(&alternate_rdev, _cbfs_cache, _cbfs_cache_size); + + if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) { + printk(BIOS_DEBUG, "Using Exynos alternate boot mode USB A-A\n"); + usb_cbfs_open(); + return; + } switch (exynos_power->om_stat & OM_STAT_MASK) { case OM_STAT_SDMMC: - return initialize_exynos_sdmmc_cbfs_media(media); + printk(BIOS_DEBUG, "Using Exynos alternate boot mode SDMMC\n"); + sdmmc_cbfs_open(); + break; case OM_STAT_SPI: - return initialize_exynos_spi_cbfs_media(media, - _cbfs_cache, _cbfs_cache_size); + exynos_init_spi_boot_device(); + break; default: printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", exynos_power->om_stat); - return 1; } } diff --git a/src/soc/samsung/exynos5250/include/soc/spi.h b/src/soc/samsung/exynos5250/include/soc/spi.h index 4301d42..95045b5 100644 --- a/src/soc/samsung/exynos5250/include/soc/spi.h +++ b/src/soc/samsung/exynos5250/include/soc/spi.h @@ -20,8 +20,7 @@ #ifndef CPU_SAMSUNG_EXYNOS5250_SPI_H #define CPU_SAMSUNG_EXYNOS5250_SPI_H -/* This driver serves as a CBFS media source. */ -#include <cbfs.h> +#include <boot_device.h> /* SPI peripheral register map; padded to 64KB */ struct exynos_spi { @@ -92,8 +91,6 @@ int exynos_spi_open(struct exynos_spi *regs); int exynos_spi_read(struct exynos_spi *regs, void *dest, u32 len, u32 off); int exynos_spi_close(struct exynos_spi *regs); -/* Serve as CBFS media source */ -int initialize_exynos_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size); +void exynos_init_spi_boot_device(void); +const struct region_device *exynos_spi_boot_device(void); #endif diff --git a/src/soc/samsung/exynos5250/spi.c b/src/soc/samsung/exynos5250/spi.c index fed3aa7..5cef916 100644 --- a/src/soc/samsung/exynos5250/spi.c +++ b/src/soc/samsung/exynos5250/spi.c @@ -20,11 +20,13 @@ #include <arch/io.h> #include <assert.h> +#include <boot_device.h> #include <console/console.h> #include <soc/clk.h> #include <soc/gpio.h> #include <soc/spi.h> #include <stdlib.h> +#include <symbols.h> #if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI # define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "EXYNOS_SPI: " x) @@ -144,70 +146,47 @@ int exynos_spi_close(struct exynos_spi *regs) return 0; } -// SPI as CBFS media. -struct exynos_spi_media { - struct exynos_spi *regs; - struct cbfs_simple_buffer buffer; -}; - -static int exynos_spi_cbfs_open(struct cbfs_media *media) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - DEBUG_SPI("exynos_spi_cbfs_open\n"); - return exynos_spi_open(spi->regs); -} - -static int exynos_spi_cbfs_close(struct cbfs_media *media) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - DEBUG_SPI("exynos_spi_cbfs_close\n"); - return exynos_spi_close(spi->regs); -} +static struct exynos_spi *boot_slave_regs; -static size_t exynos_spi_cbfs_read(struct cbfs_media *media, void *dest, - size_t offset, size_t count) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; +static ssize_t exynos_spi_readat(const struct region_device *rdev, void *dest, + size_t offset, size_t count) +{ int bytes; DEBUG_SPI("exynos_spi_cbfs_read(%u)\n", count); - bytes = exynos_spi_read(spi->regs, dest, count, offset); - // Flush and re-open the device. - exynos_spi_close(spi->regs); - exynos_spi_open(spi->regs); + exynos_spi_open(boot_slave_regs); + bytes = exynos_spi_read(boot_slave_regs, dest, count, offset); + exynos_spi_close(boot_slave_regs); return bytes; } -static void *exynos_spi_cbfs_map(struct cbfs_media *media, size_t offset, - size_t count) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; +static void *exynos_spi_map(const struct region_device *rdev, + size_t offset, size_t count) +{ DEBUG_SPI("exynos_spi_cbfs_map\n"); - // See exynos_spi_rx_tx for I/O alignment limitation. + // exynos: spi_rx_tx may work in 4 byte-width-transmission mode and + // requires buffer memory address to be aligned. if (count % 4) count += 4 - (count % 4); - return cbfs_simple_buffer_map(&spi->buffer, media, offset, count); + return mmap_helper_rdev_mmap(rdev, offset, count); } -static void *exynos_spi_cbfs_unmap(struct cbfs_media *media, - const void *address) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - DEBUG_SPI("exynos_spi_cbfs_unmap\n"); - return cbfs_simple_buffer_unmap(&spi->buffer, address); -} +static const struct region_device_ops exynos_spi_ops = { + .mmap = exynos_spi_map, + .munmap = mmap_helper_rdev_munmap, + .readat = exynos_spi_readat, +}; -int initialize_exynos_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size) { - // TODO Replace static variable to support multiple streams. - static struct exynos_spi_media context; - DEBUG_SPI("initialize_exynos_spi_cbfs_media\n"); - - context.regs = (void*)EXYNOS5_SPI1_BASE; - context.buffer.allocated = context.buffer.last_allocate = 0; - context.buffer.buffer = buffer_address; - context.buffer.size = buffer_size; - media->context = (void*)&context; - media->open = exynos_spi_cbfs_open; - media->close = exynos_spi_cbfs_close; - media->read = exynos_spi_cbfs_read; - media->map = exynos_spi_cbfs_map; - media->unmap = exynos_spi_cbfs_unmap; +static struct mmap_helper_region_device mdev = + MMAP_HELPER_REGION_INIT(&exynos_spi_ops, 0, CONFIG_ROM_SIZE); - return 0; +void exynos_init_spi_boot_device(void) +{ + boot_slave_regs = (void *)EXYNOS5_SPI1_BASE; + + mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size); +} + +const struct region_device *exynos_spi_boot_device(void) +{ + return &mdev.rdev; } diff --git a/src/soc/samsung/exynos5420/alternate_cbfs.c b/src/soc/samsung/exynos5420/alternate_cbfs.c index 45489f1..9e1d323 100644 --- a/src/soc/samsung/exynos5420/alternate_cbfs.c +++ b/src/soc/samsung/exynos5420/alternate_cbfs.c @@ -20,6 +20,7 @@ #include <arch/cache.h> #include <assert.h> +#include <boot_device.h> #include <cbfs.h> /* This driver serves as a CBFS media source. */ #include <console/console.h> #include <soc/alternate_cbfs.h> @@ -46,7 +47,7 @@ * rest of the firmware's lifetime and all subsequent stages (which will not * have __PRE_RAM__ defined) can just directly reference it there. */ -static int usb_cbfs_open(struct cbfs_media *media) +static int usb_cbfs_open(void) { #ifdef __PRE_RAM__ static int first_run = 1; @@ -84,7 +85,7 @@ static int usb_cbfs_open(struct cbfs_media *media) * this seems like a safer approach. It also makes it easy to pass our image * down to payloads. */ -static int sdmmc_cbfs_open(struct cbfs_media *media) +static int sdmmc_cbfs_open(void) { #ifdef __PRE_RAM__ /* @@ -118,66 +119,109 @@ static int sdmmc_cbfs_open(struct cbfs_media *media) return 0; } -static int alternate_cbfs_close(struct cbfs_media *media) { return 0; } +static int exynos_cbfs_open(struct cbfs_media *media) { + return 0; +} + +static int exynos_cbfs_close(struct cbfs_media *media) { + return 0; +} + +static size_t exynos_cbfs_read(struct cbfs_media *media, void *dest, + size_t offset, size_t count) { + const struct region_device *boot_dev; + + boot_dev = media->context; + + if (rdev_readat(boot_dev, dest, offset, count) < 0) + return 0; -static size_t alternate_cbfs_read(struct cbfs_media *media, void *dest, - size_t offset, size_t count) -{ - ASSERT(offset + count < _cbfs_cache_size); - memcpy(dest, _cbfs_cache + offset, count); return count; } -static void *alternate_cbfs_map(struct cbfs_media *media, size_t offset, - size_t count) -{ - ASSERT(offset + count < _cbfs_cache_size); - return _cbfs_cache + offset; +static void *exynos_cbfs_map(struct cbfs_media *media, size_t offset, + size_t count) { + const struct region_device *boot_dev; + void *ptr; + + boot_dev = media->context; + + ptr = rdev_mmap(boot_dev, offset, count); + + if (ptr == NULL) + return (void *)-1; + + return ptr; } -static void *alternate_cbfs_unmap(struct cbfs_media *media, - const void *buffer) { return 0; } +static void *exynos_cbfs_unmap(struct cbfs_media *media, + const void *address) { + const struct region_device *boot_dev; -static int initialize_exynos_sdmmc_cbfs_media(struct cbfs_media *media) -{ - printk(BIOS_DEBUG, "Using Exynos alternate boot mode SDMMC\n"); + boot_dev = media->context; - media->open = sdmmc_cbfs_open; - media->close = alternate_cbfs_close; - media->read = alternate_cbfs_read; - media->map = alternate_cbfs_map; - media->unmap = alternate_cbfs_unmap; + rdev_munmap(boot_dev, (void *)address); - return 0; + return NULL; } -static int initialize_exynos_usb_cbfs_media(struct cbfs_media *media) +int init_default_cbfs_media(struct cbfs_media *media) { - printk(BIOS_DEBUG, "Using Exynos alternate boot mode USB A-A\n"); + boot_device_init(); - media->open = usb_cbfs_open; - media->close = alternate_cbfs_close; - media->read = alternate_cbfs_read; - media->map = alternate_cbfs_map; - media->unmap = alternate_cbfs_unmap; + media->context = (void *)boot_device_ro(); + + if (media->context == NULL) + return -1; + + media->open = exynos_cbfs_open; + media->close = exynos_cbfs_close; + media->read = exynos_cbfs_read; + media->map = exynos_cbfs_map; + media->unmap = exynos_cbfs_unmap; return 0; } -int init_default_cbfs_media(struct cbfs_media *media) +static struct mem_region_device alternate_rdev = MEM_REGION_DEV_INIT(NULL, 0); + +const struct region_device *boot_device_ro(void) { if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) - return initialize_exynos_usb_cbfs_media(media); + return &alternate_rdev.rdev; + + switch (exynos_power->om_stat & OM_STAT_MASK) { + case OM_STAT_SDMMC: + return &alternate_rdev.rdev; + case OM_STAT_SPI: + return exynos_spi_boot_device(); + default: + printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", + exynos_power->om_stat); + return NULL; + } +} + +void boot_device_init(void) +{ + mem_region_device_init(&alternate_rdev, _cbfs_cache, _cbfs_cache_size); + + if (*iram_secondary_base == SECONDARY_BASE_BOOT_USB) { + printk(BIOS_DEBUG, "Using Exynos alternate boot mode USB A-A\n"); + usb_cbfs_open(); + return; + } switch (exynos_power->om_stat & OM_STAT_MASK) { case OM_STAT_SDMMC: - return initialize_exynos_sdmmc_cbfs_media(media); + printk(BIOS_DEBUG, "Using Exynos alternate boot mode SDMMC\n"); + sdmmc_cbfs_open(); + break; case OM_STAT_SPI: - return initialize_exynos_spi_cbfs_media(media, - _cbfs_cache, _cbfs_cache_size); + exynos_init_spi_boot_device(); + break; default: printk(BIOS_EMERG, "Exynos OM_STAT value 0x%x not supported!\n", exynos_power->om_stat); - return 1; } } diff --git a/src/soc/samsung/exynos5420/include/soc/spi.h b/src/soc/samsung/exynos5420/include/soc/spi.h index 78cca6f..17e6083 100644 --- a/src/soc/samsung/exynos5420/include/soc/spi.h +++ b/src/soc/samsung/exynos5420/include/soc/spi.h @@ -20,8 +20,7 @@ #ifndef CPU_SAMSUNG_EXYNOS5420_SPI_H #define CPU_SAMSUNG_EXYNOS5420_SPI_H -/* This driver serves as a CBFS media source. */ -#include <cbfs.h> +#include <boot_device.h> /* SPI peripheral register map; padded to 64KB */ struct exynos_spi { @@ -91,8 +90,6 @@ check_member(exynos_spi, fb_clk, 0x2c); #define SPI_RX_BYTE_SWAP (1 << 6) #define SPI_RX_HWORD_SWAP (1 << 7) -/* Serve as CBFS media source */ -int initialize_exynos_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size); +void exynos_init_spi_boot_device(void); +const struct region_device *exynos_spi_boot_device(void); #endif diff --git a/src/soc/samsung/exynos5420/spi.c b/src/soc/samsung/exynos5420/spi.c index 3d71f79..056dfe2 100644 --- a/src/soc/samsung/exynos5420/spi.c +++ b/src/soc/samsung/exynos5420/spi.c @@ -26,6 +26,7 @@ #include <spi_flash.h> #include <stdlib.h> #include <string.h> +#include <symbols.h> #define EXYNOS_SPI_MAX_TRANSFER_BYTES (65535) @@ -242,76 +243,43 @@ static int exynos_spi_read(struct spi_slave *slave, void *dest, uint32_t len, return len; } -// SPI as CBFS media. -struct exynos_spi_media { - struct spi_slave *slave; - struct cbfs_simple_buffer buffer; -}; - -static int exynos_spi_cbfs_open(struct cbfs_media *media) -{ - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - DEBUG_SPI("exynos_spi_cbfs_open\n"); - return spi_claim_bus(spi->slave); -} - -static int exynos_spi_cbfs_close(struct cbfs_media *media) -{ - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - DEBUG_SPI("exynos_spi_cbfs_close\n"); - spi_release_bus(spi->slave); - return 0; -} +static struct exynos_spi_slave *boot_slave; -static size_t exynos_spi_cbfs_read(struct cbfs_media *media, void *dest, - size_t offset, size_t count) +static ssize_t exynos_spi_readat(const struct region_device *rdev, void *dest, + size_t offset, size_t count) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - int bytes; DEBUG_SPI("exynos_spi_cbfs_read(%u)\n", count); - bytes = exynos_spi_read(spi->slave, dest, count, offset); - return bytes; + return exynos_spi_read(&boot_slave->slave, dest, count, offset); } -static void *exynos_spi_cbfs_map(struct cbfs_media *media, size_t offset, - size_t count) +static void *exynos_spi_map(const struct region_device *rdev, + size_t offset, size_t count) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; DEBUG_SPI("exynos_spi_cbfs_map\n"); // exynos: spi_rx_tx may work in 4 byte-width-transmission mode and // requires buffer memory address to be aligned. if (count % 4) count += 4 - (count % 4); - return cbfs_simple_buffer_map(&spi->buffer, media, offset, count); + return mmap_helper_rdev_mmap(rdev, offset, count); } -static void *exynos_spi_cbfs_unmap(struct cbfs_media *media, - const void *address) +static const struct region_device_ops exynos_spi_ops = { + .mmap = exynos_spi_map, + .munmap = mmap_helper_rdev_munmap, + .readat = exynos_spi_readat, +}; + +static struct mmap_helper_region_device mdev = + MMAP_HELPER_REGION_INIT(&exynos_spi_ops, 0, CONFIG_ROM_SIZE); + +void exynos_init_spi_boot_device(void) { - struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; - DEBUG_SPI("exynos_spi_cbfs_unmap\n"); - return cbfs_simple_buffer_unmap(&spi->buffer, address); + boot_slave = &exynos_spi_slaves[1]; + + mmap_helper_device_init(&mdev, _cbfs_cache, _cbfs_cache_size); } -int initialize_exynos_spi_cbfs_media(struct cbfs_media *media, - void *buffer_address, - size_t buffer_size) +const struct region_device *exynos_spi_boot_device(void) { - // TODO Replace static variable to support multiple streams. - static struct exynos_spi_media context; - static struct exynos_spi_slave *eslave = &exynos_spi_slaves[1]; - DEBUG_SPI("initialize_exynos_spi_cbfs_media\n"); - - context.slave = &eslave->slave; - context.buffer.allocated = context.buffer.last_allocate = 0; - context.buffer.buffer = buffer_address; - context.buffer.size = buffer_size; - media->context = (void*)&context; - media->open = exynos_spi_cbfs_open; - media->close = exynos_spi_cbfs_close; - media->read = exynos_spi_cbfs_read; - media->map = exynos_spi_cbfs_map; - media->unmap = exynos_spi_cbfs_unmap; - - return 0; + return &mdev.rdev; }

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Patch set updated for coreboot: a69f157 cbfs: remove unused CBFS_HEADER_ROM_OFFSET option
by Aaron Durbin 19 May '15

19 May '15

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10217 -gerrit commit a69f157a5875b63aef4aa3ce5711cfa0b07113a6 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri May 15 13:55:08 2015 -0500 cbfs: remove unused CBFS_HEADER_ROM_OFFSET option The CBFS_HEADER_ROM_OFFSET went away. Remove remaining defintions that are not used. Change-Id: Ibedce988143f0b7167cea1b27de5b33698b5d82b Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/allwinner/a10/Kconfig | 6 ------ src/mainboard/ti/beaglebone/Kconfig | 4 ---- 2 files changed, 10 deletions(-) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index e481af0..3500c5d 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -15,10 +15,4 @@ config CPU_SPECIFIC_OPTIONS select BOOTBLOCK_CONSOLE select CPU_HAS_BOOTBLOCK_INIT -## TODO Change this to some better address not overlapping bootblock when -## cbfstool supports creating header in arbitrary location. -config CBFS_HEADER_ROM_OFFSET - hex "offset of master CBFS header in ROM" - default 0x40 - endif # if CPU_ALLWINNER_A10 diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig index 57ed9bc..bb20765 100644 --- a/src/mainboard/ti/beaglebone/Kconfig +++ b/src/mainboard/ti/beaglebone/Kconfig @@ -53,10 +53,6 @@ config BOOTBLOCK_ROM_OFFSET hex default 0x0 -config CBFS_HEADER_ROM_OFFSET - hex - default 0x10 - config UART_FOR_CONSOLE int default 0

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coreboot-gerrit May 2015