coreboot-gerrit April 2015

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: 0782eff armv7-m: add empty cache routines
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9383 -gerrit commit 0782effa1af7bf9ce2d0d312d89916f199bb63df Author: Daisuke Nojiri <dnojiri(a)chromium.org> Date: Thu Oct 23 12:39:11 2014 -0700 armv7-m: add empty cache routines armv7-m does not have cache but adding empty cache functions allow us to transparently use code handling entering and leaving stages. BUG=none BRANCH=ToT TEST=Built coreboot for cosmos Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Change-Id: I23415b273c90401cd81f2bc94b2d69958f134c6a Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 960453bf5d5fbf7dc75343b1cccaa62b6b8ec30c Original-Change-Id: Ief0c8a949e7e14d68473e7a093a8642d6058ccc6 Original-Reviewed-on: https://chromium-review.googlesource.com/225206 Original-Commit-Queue: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/arm/armv7/Makefile.inc | 1 + src/arch/arm/armv7/cache_m.c | 79 +++++++++++++++++++++++++++++++++++++++++ 2 files changed, 80 insertions(+) diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc index 5917216..ba962e9 100644 --- a/src/arch/arm/armv7/Makefile.inc +++ b/src/arch/arm/armv7/Makefile.inc @@ -55,6 +55,7 @@ bootblock-y += bootblock_m.S bootblock-y += bootblock_simple.c endif bootblock-y += exception_m.c +bootblock-y += cache_m.c endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 diff --git a/src/arch/arm/armv7/cache_m.c b/src/arch/arm/armv7/cache_m.c new file mode 100644 index 0000000..ec8a970 --- /dev/null +++ b/src/arch/arm/armv7/cache_m.c @@ -0,0 +1,79 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * cache.c: Cache maintenance routines for ARMv7-M + */ + +#include <stdint.h> + +#include <arch/cache.h> + +void tlb_invalidate_all(void) +{ +} + +void dcache_clean_all(void) +{ +} + +void dcache_clean_invalidate_all(void) +{ +} + +void dcache_invalidate_all(void) +{ +} + +unsigned int dcache_line_bytes(void) +{ + return 0; +} + +void dcache_clean_by_mva(void const *addr, size_t len) +{ +} + +void dcache_clean_invalidate_by_mva(void const *addr, size_t len) +{ +} + +void dcache_invalidate_by_mva(void const *addr, size_t len) +{ +} + +void dcache_mmu_disable(void) +{ +} + +void dcache_mmu_enable(void) +{ +} + +void cache_sync_instructions(void) +{ +}

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New patch to review for coreboot: 077e4af armv7-m: add bootblock entry point
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9382 -gerrit commit 077e4af3e741e9b1c49ab4e893f32b2a430ab122 Author: Daisuke Nojiri <dnojiri(a)chromium.org> Date: Thu Oct 23 11:51:18 2014 -0700 armv7-m: add bootblock entry point this adds an entry point jumping to main for the bootblock. BUG=None BRANCH=ToT TEST=Built coreboot for cosmos Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Change-Id: I1c9ea6ba63a1058e09613d969fe00308260037be Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 662d0083f25008b55b9bc5fbce9e30e6b80c2c65 Original-Change-Id: I74f2f5e3b3961ab54a7913e6b3a3ab0e6fd813a3 Original-Reviewed-on: https://chromium-review.googlesource.com/225205 Original-Commit-Queue: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Reviewed-by: Vadim Bendebury <vbendeb(a)chromium.org> --- src/arch/arm/armv7/Makefile.inc | 3 ++- src/arch/arm/armv7/bootblock_m.S | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc index 951118a..5917216 100644 --- a/src/arch/arm/armv7/Makefile.inc +++ b/src/arch/arm/armv7/Makefile.inc @@ -51,9 +51,10 @@ bootblock-c-ccopts += $(armv7-m_flags) bootblock-S-ccopts += $(armv7-m_asm_flags) ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y) +bootblock-y += bootblock_m.S bootblock-y += bootblock_simple.c -bootblock-y += exception_m.c endif +bootblock-y += exception_m.c endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 diff --git a/src/arch/arm/armv7/bootblock_m.S b/src/arch/arm/armv7/bootblock_m.S new file mode 100644 index 0000000..0a29a0b --- /dev/null +++ b/src/arch/arm/armv7/bootblock_m.S @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + */ + +#include <arch/asm.h> + +ENTRY(_start) + bl main +ENDPROC(_start)

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New patch to review for coreboot: fc1b211 bg4cd: set bootblock and verstage architecture to armv7-m
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9381 -gerrit commit fc1b211bc107f08232d39c0878c4dd4159a99f7b Author: Daisuke Nojiri <dnojiri(a)chromium.org> Date: Tue Oct 21 11:22:54 2014 -0700 bg4cd: set bootblock and verstage architecture to armv7-m this sets the proper architecture for bg4cd's bcm, which is armv7-m. BUG=none TEST=built cosmos BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Change-Id: I6af25080c10a245a1fc884acb2a705f0b5d96309 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: fc04fd26f1f2634115fc9bcefd6eee5611c80659 Original-Change-Id: I3334c3ba27a3582ce0fe5b484a5a22c8441a4c11 Original-Reviewed-on: https://chromium-review.googlesource.com/224773 Original-Reviewed-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> --- src/soc/marvell/bg4cd/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig index f8bf0b9..1d51ebd 100644 --- a/src/soc/marvell/bg4cd/Kconfig +++ b/src/soc/marvell/bg4cd/Kconfig @@ -20,10 +20,10 @@ config SOC_MARVELL_BG4CD bool default n - select ARCH_BOOTBLOCK_ARMV7 + select ARCH_BOOTBLOCK_ARMV7_M select ARCH_RAMSTAGE_ARMV7 select ARCH_ROMSTAGE_ARMV7 - select ARCH_VERSTAGE_ARMV7 + select ARCH_VERSTAGE_ARMV7_M select BOOTBLOCK_CONSOLE select CPU_HAS_BOOTBLOCK_INIT select DYNAMIC_CBMEM

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New patch to review for coreboot: b0e169f abuild: also consider verstage architecture
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9380 -gerrit commit b0e169f81e7ea8827a5576d69a44f41cee3beea6 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Wed Apr 8 11:36:45 2015 +0200 abuild: also consider verstage architecture We have another stage which we need to test for. Not a problem right now, because it always matches either bootblock or romstage, but future proof the test. Change-Id: Id0a16d9bc1270516f2c00f9f8fd049420c9ba354 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- util/abuild/abuild | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/abuild/abuild b/util/abuild/abuild index 2f87767..2f6d497 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -288,7 +288,7 @@ function build_target stime=`perl -e 'print time();' 2>/dev/null || date +%s` create_buildenv $VENDOR $MAINBOARD $CONFIG - required_arches=`egrep "^CONFIG_ARCH_(BOOTBLOCK|R.MSTAGE)" $TARGET/${VENDOR}_${MAINBOARD}/config.build | \ + required_arches=`egrep "^CONFIG_ARCH_(BOOTBLOCK|R.MSTAGE|VERSTAGE)" $TARGET/${VENDOR}_${MAINBOARD}/config.build | \ sed "s,^CONFIG_ARCH_[^_]*_$[^=]*$=.*$,\1," |sort -u |tr 'A-Z\n\r' 'a-z '` missing_arches=`printf 'include .xcompile\nall: ; @echo $(foreach arch,'"$required_arches"',$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))' | make --no-print-directory -f -` if [ -n "$missing_arches" ]; then

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New patch to review for coreboot: 1d70c87 armv7-m: add armv7-m configuration
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9379 -gerrit commit 1d70c87101cd214e7bfd6e4a5b417f3d7490cb85 Author: Daisuke Nojiri <dnojiri(a)chromium.org> Date: Tue Oct 21 11:18:20 2014 -0700 armv7-m: add armv7-m configuration this change adds armv7-m configuration for bootblock and verstage. BUG=none TEST=Built cosmos, daisy_spring, falco, lumpy, nyan, nyan_blaze, rush_ryu, storm, veyron_pinky BRANCH=none Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Change-Id: Ib2496e33d5690c91c8fff0f101ec31837c8809bc Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 34b838ebdcb0506799d86b64204f54a171114304 Original-Change-Id: I1c899d8969b1f8d0fa4cff617099d222bc4b4f4b Original-Reviewed-on: https://chromium-review.googlesource.com/224772 Original-Reviewed-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> --- src/arch/arm/armv7/Kconfig | 6 ++++ src/arch/arm/armv7/Makefile.inc | 57 ++++++++++++++++++++++------------- src/arch/arm/armv7/bootblock_simple.c | 1 - src/arch/arm/armv7/exception_m.c | 36 ++++++++++++++++++++++ util/xcompile/xcompile | 2 +- 5 files changed, 79 insertions(+), 23 deletions(-) diff --git a/src/arch/arm/armv7/Kconfig b/src/arch/arm/armv7/Kconfig index aa188e2..0ab3542 100644 --- a/src/arch/arm/armv7/Kconfig +++ b/src/arch/arm/armv7/Kconfig @@ -13,3 +13,9 @@ config ARCH_ROMSTAGE_ARMV7 config ARCH_RAMSTAGE_ARMV7 def_bool n select ARCH_RAMSTAGE_ARM +config ARCH_BOOTBLOCK_ARMV7_M + def_bool n + select ARCH_BOOTBLOCK_ARM +config ARCH_VERSTAGE_ARMV7_M + def_bool n + select ARCH_VERSTAGE_ARM diff --git a/src/arch/arm/armv7/Makefile.inc b/src/arch/arm/armv7/Makefile.inc index dac4276..951118a 100644 --- a/src/arch/arm/armv7/Makefile.inc +++ b/src/arch/arm/armv7/Makefile.inc @@ -19,16 +19,21 @@ ## ############################################################################### -armv7_flags = -march=armv7-a -mthumb \ - -I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7 -armv7_asm_flags = $(armv7_flags) -Wa,-mthumb -Wa,-mimplicit-it=always \ - -Wa,-mno-warn-deprecated +armv7_flags = -mthumb -I$(src)/arch/arm/include/armv7/ -D__COREBOOT_ARM_ARCH__=7 +armv7-a_flags = -march=armv7-a $(armv7_flags) +armv7-m_flags = -march=armv7-m $(armv7_flags) + +armv7_asm_flags = -Wa,-mthumb -Wa,-mimplicit-it=always -Wa,-mno-warn-deprecated +armv7-a_asm_flags = $(armv7-a_flags) $(armv7_asm_flags) +armv7-m_asm_flags = $(armv7-m_flags) $(armv7_asm_flags) ############################################################################### # bootblock ############################################################################### ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y) +bootblock-c-ccopts += $(armv7-a_flags) +bootblock-S-ccopts += $(armv7-a_asm_flags) ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y) bootblock-y += bootblock.S @@ -41,8 +46,14 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += exception_asm.S bootblock-y += mmu.c -bootblock-c-ccopts += $(armv7_flags) -bootblock-S-ccopts += $(armv7_asm_flags) +else ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7_M),y) +bootblock-c-ccopts += $(armv7-m_flags) +bootblock-S-ccopts += $(armv7-m_asm_flags) + +ifneq ($(CONFIG_ARM_BOOTBLOCK_CUSTOM),y) +bootblock-y += bootblock_simple.c +bootblock-y += exception_m.c +endif endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 @@ -50,23 +61,27 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 ## verification stage ################################################################################ -ifeq ($(CONFIG_ARCH_VERSTAGE_ARM_V7),y) +ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7),y) +verstage-c-ccopts += $(armv7-a_flags) +verstage-S-ccopts += $(armv7-a_asm_flags) -verstage-c-ccopts += $(armv7_flags) -verstage-S-ccopts += $(armv7_asm_flags) verstage-y += cache.c verstage-y += cpu.S verstage-y += exception.c verstage-y += exception_asm.S verstage-y += mmu.c -endif # CONFIG_ARCH_VERSTAGE_ARMV7 +else ifeq ($(CONFIG_ARCH_VERSTAGE_ARMV7_M),y) +verstage-c-ccopts += $(armv7-m_flags) +verstage-S-ccopts += $(armv7-m_asm_flags) -############################################################################### -# romstage -############################################################################### +endif # CONFIG_ARCH_VERSTAGE_ARMV7_M +################################################################################ +## ROM stage +################################################################################ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y) +>>>>>>> 34b838e... armv7-m: add armv7-m configuration romstage-y += cache.c romstage-y += cpu.S @@ -75,11 +90,11 @@ romstage-y += exception_asm.S romstage-y += mmu.c romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c -romstage-c-ccopts += $(armv7_flags) -romstage-S-ccopts += $(armv7_asm_flags) +romstage-c-ccopts += $(armv7-a_flags) +romstage-S-ccopts += $(armv7-a_asm_flags) -rmodules_arm-c-ccopts += $(armv7_flags) -rmodules_arm-S-ccopts += $(armv7_asm_flags) +rmodules_arm-c-ccopts += $(armv7-a_flags) +rmodules_arm-S-ccopts += $(armv7-a_asm_flags) endif # CONFIG_ARCH_ROMSTAGE_ARMV7 @@ -96,10 +111,10 @@ ramstage-y += exception_asm.S ramstage-y += mmu.c ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c -ramstage-c-ccopts += $(armv7_flags) -ramstage-S-ccopts += $(armv7_asm_flags) +ramstage-c-ccopts += $(armv7-a_flags) +ramstage-S-ccopts += $(armv7-a_asm_flags) # All rmodule code is armv7 if ramstage is armv7. -rmodules_arm-c-ccopts += $(armv7_flags) -rmodules_arm-S-ccopts += $(armv7_asm_flags) +rmodules_arm-c-ccopts += $(armv7-a_flags) +rmodules_arm-S-ccopts += $(armv7-a_asm_flags) endif # CONFIG_ARCH_RAMSTAGE_ARMV7 diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c index 96f2445..450e5b4 100644 --- a/src/arch/arm/armv7/bootblock_simple.c +++ b/src/arch/arm/armv7/bootblock_simple.c @@ -19,7 +19,6 @@ * MA 02110-1301 USA */ -#include <arch/cache.h> #include <arch/exception.h> #include <arch/stages.h> #include <bootblock_common.h> diff --git a/src/arch/arm/armv7/exception_m.c b/src/arch/arm/armv7/exception_m.c new file mode 100644 index 0000000..d76cc6a --- /dev/null +++ b/src/arch/arm/armv7/exception_m.c @@ -0,0 +1,36 @@ +/* + * This file is part of the libpayload project. + * + * Copyright 2013 Google Inc. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <arch/exception.h> +#include <console/console.h> + +void exception_init(void) +{ + printk(BIOS_DEBUG, "Exception handlers not installed.\n"); +} diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index 5809ec0..c4bab81 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -179,7 +179,7 @@ arch_config_arm() { TBFDARCHS="littlearm" TCLIST="armv7a armv7-a" TWIDTH="32" - TSUPP="arm armv4 armv7" + TSUPP="arm armv4 armv7 armv7_m" TABI="eabi" }

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Patch set updated for coreboot: 89169cf bg4cd, cosmos: use SPI_WRAPPER configuration mode
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9356 -gerrit commit 89169cfd74487519eebf31cbaa859bddc5913224 Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu Oct 16 11:20:15 2014 -0700 bg4cd, cosmos: use SPI_WRAPPER configuration mode The SOC code should include the SPI controller driver when configured. Enable SPI support for cosmos. BRANCH=none BUG=chrome-os-partner:32631 TEST=cosmos builds Change-Id: I8212f191b7d80f0bee86f746813edaf8e5ee6db1 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: fd4853be5157247bb73fc22b9d4f8300228fe6ce Original-Change-Id: If7e12e2fb04e63c36d9696d13e08397b91a77a8c Original-Commit-Id: 7b1d095e5df6a864d3564bbf7a20cc211f75629a Original-Change-Id: If9dd80cb96120d34a0865f7882cd62e45fed749d Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/223750 Original-Reviewed-on: https://chromium-review.googlesource.com/223752 --- src/mainboard/google/cosmos/Kconfig | 7 +++++-- src/soc/marvell/bg4cd/Makefile.inc | 8 ++++---- src/soc/marvell/bg4cd/media.c | 25 ------------------------- 3 files changed, 9 insertions(+), 31 deletions(-) diff --git a/src/mainboard/google/cosmos/Kconfig b/src/mainboard/google/cosmos/Kconfig index 4af9986..2aa4362 100644 --- a/src/mainboard/google/cosmos/Kconfig +++ b/src/mainboard/google/cosmos/Kconfig @@ -25,10 +25,13 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ID_SUPPORT select CHROMEOS select CHROMEOS_VBNV_FLASH - select SOC_MARVELL_BG4CD - select MAINBOARD_HAS_BOOTBLOCK_INIT + select COMMON_CBFS_SPI_WRAPPER select HAVE_HARD_RESET + select MAINBOARD_HAS_BOOTBLOCK_INIT select RETURN_FROM_VERSTAGE + select SOC_MARVELL_BG4CD + select SPI_FLASH + select SPI_FLASH_SPANSION config MAINBOARD_DIR string diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc index 7d49486..af390d1 100644 --- a/src/soc/marvell/bg4cd/Makefile.inc +++ b/src/soc/marvell/bg4cd/Makefile.inc @@ -19,23 +19,23 @@ bootblock-y += cbmem.c bootblock-y += i2c.c -bootblock-y += media.c bootblock-y += monotonic_timer.c +bootblock-$(CONFIG_SPI_FLASH) += spi.c verstage-y += i2c.c -verstage-y += media.c verstage-y += monotonic_timer.c +verstage-$(CONFIG_SPI_FLASH) += spi.c romstage-y += cbmem.c romstage-y += i2c.c -romstage-y += media.c romstage-y += monotonic_timer.c romstage-y += sdram.c +romstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-y += cbmem.c ramstage-y += i2c.c -ramstage-y += media.c ramstage-y += monotonic_timer.c +ramstage-$(CONFIG_SPI_FLASH) += spi.c $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ diff --git a/src/soc/marvell/bg4cd/media.c b/src/soc/marvell/bg4cd/media.c deleted file mode 100644 index 5a4dc5f..0000000 --- a/src/soc/marvell/bg4cd/media.c +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <cbfs.h> - -int init_default_cbfs_media(struct cbfs_media *media) -{ - return 0; -}

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Patch set updated for coreboot: 9c85c75 bg4cd: Change all SoC headers to <soc/headername.h> system
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9358 -gerrit commit 9c85c75fd2fb5e5120e7ebe62ab5c8bdb0bf4287 Author: Julius Werner <jwerner(a)chromium.org> Date: Mon Oct 20 14:21:22 2014 -0700 bg4cd: Change all SoC headers to <soc/headername.h> system This patch aligns bg4cd to the new SoC header include scheme. Also alphabetized headers in affected files since we touch them anyway. BUG=None TEST=Tested with whole series. Compiled Cosmos. Change-Id: I32a4407f7deb2b1752b6220a140352724f320637 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 0b6bb6990417863010258632374c3f5ac19350c9 Original-Change-Id: Ia5299659ad186f2e7d698adfa7562396e747473f Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/224506 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/mainboard/google/cosmos/memlayout.ld | 2 +- src/mainboard/google/cosmos/romstage.c | 19 +++++++------ src/soc/marvell/bg4cd/Makefile.inc | 2 ++ src/soc/marvell/bg4cd/i2c.c | 2 +- src/soc/marvell/bg4cd/i2c.h | 26 ----------------- src/soc/marvell/bg4cd/include/soc/i2c.h | 26 +++++++++++++++++ src/soc/marvell/bg4cd/include/soc/memlayout.ld | 39 ++++++++++++++++++++++++++ src/soc/marvell/bg4cd/include/soc/sdram.h | 24 ++++++++++++++++ src/soc/marvell/bg4cd/memlayout.ld | 39 -------------------------- src/soc/marvell/bg4cd/sdram.c | 2 +- src/soc/marvell/bg4cd/sdram.h | 24 ---------------- 11 files changed, 104 insertions(+), 101 deletions(-) diff --git a/src/mainboard/google/cosmos/memlayout.ld b/src/mainboard/google/cosmos/memlayout.ld index d788b78..ead7f47 100644 --- a/src/mainboard/google/cosmos/memlayout.ld +++ b/src/mainboard/google/cosmos/memlayout.ld @@ -1 +1 @@ -#include <soc/marvell/bg4cd/memlayout.ld> +#include <soc/memlayout.ld> diff --git a/src/mainboard/google/cosmos/romstage.c b/src/mainboard/google/cosmos/romstage.c index f3e98e0..0c64728 100644 --- a/src/mainboard/google/cosmos/romstage.c +++ b/src/mainboard/google/cosmos/romstage.c @@ -17,21 +17,22 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <types.h> +#include <arch/cache.h> +#include <arch/exception.h> +#include <arch/stages.h> #include <armv7.h> #include <cbfs.h> -#include <console/console.h> -#include <arch/stages.h> #include <cbmem.h> +#include <console/console.h> #include <delay.h> -#include <timestamp.h> -#include <arch/cache.h> -#include <arch/exception.h> -#include <stdlib.h> #include <program_loading.h> -#include <vendorcode/google/chromeos/chromeos.h> -#include <soc/marvell/bg4cd/sdram.h> +#include <soc/sdram.h> +#include <stdlib.h> #include <symbols.h> +#include <timestamp.h> +#include <types.h> +#include <vendorcode/google/chromeos/chromeos.h> + #include "timer.h" void main(void) diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc index af390d1..18f9d8d 100644 --- a/src/soc/marvell/bg4cd/Makefile.inc +++ b/src/soc/marvell/bg4cd/Makefile.inc @@ -37,6 +37,8 @@ ramstage-y += i2c.c ramstage-y += monotonic_timer.c ramstage-$(CONFIG_SPI_FLASH) += spi.c +CPPFLAGS_common += -Isrc/soc/marvell/bg4cd/include/ + $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ diff --git a/src/soc/marvell/bg4cd/i2c.c b/src/soc/marvell/bg4cd/i2c.c index 1aa02d0..16ad9ab 100644 --- a/src/soc/marvell/bg4cd/i2c.c +++ b/src/soc/marvell/bg4cd/i2c.c @@ -18,7 +18,7 @@ */ #include <device/i2c.h> -#include "i2c.h" +#include <soc/i2c.h> int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count) { diff --git a/src/soc/marvell/bg4cd/i2c.h b/src/soc/marvell/bg4cd/i2c.h deleted file mode 100644 index 40db31a..0000000 --- a/src/soc/marvell/bg4cd/i2c.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __SOC_MARVELL_BG4CD_I2C_H__ -#define __SOC_MARVELL_BG4CD_I2C_H__ - -void i2c_init(unsigned int bus, unsigned int hz); - -#endif - diff --git a/src/soc/marvell/bg4cd/include/soc/i2c.h b/src/soc/marvell/bg4cd/include/soc/i2c.h new file mode 100644 index 0000000..40db31a --- /dev/null +++ b/src/soc/marvell/bg4cd/include/soc/i2c.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_MARVELL_BG4CD_I2C_H__ +#define __SOC_MARVELL_BG4CD_I2C_H__ + +void i2c_init(unsigned int bus, unsigned int hz); + +#endif + diff --git a/src/soc/marvell/bg4cd/include/soc/memlayout.ld b/src/soc/marvell/bg4cd/include/soc/memlayout.ld new file mode 100644 index 0000000..45cf395 --- /dev/null +++ b/src/soc/marvell/bg4cd/include/soc/memlayout.ld @@ -0,0 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <memlayout.h> +#include <vendorcode/google/chromeos/memlayout.h> + +#include <arch/header.ld> + +SECTIONS +{ + DRAM_START(0x00000000) + RAMSTAGE(0x00200000, 128K) + POSTRAM_CBFS_CACHE(0x01000000, 1M) + + SRAM_START(0x80000000) + TTB(0x80000000, 16K) + BOOTBLOCK(0x80004004, 16K - 4) + VBOOT2_WORK(0x80008000, 16K) + OVERLAP_VERSTAGE_ROMSTAGE(0x8000C000, 40K) + PRERAM_CBFS_CACHE(0x80016000, 4K) + STACK(0x80017000, 4K) + SRAM_END(0x80018000) +} diff --git a/src/soc/marvell/bg4cd/include/soc/sdram.h b/src/soc/marvell/bg4cd/include/soc/sdram.h new file mode 100644 index 0000000..6850d27 --- /dev/null +++ b/src/soc/marvell/bg4cd/include/soc/sdram.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__ +#define __SOC_MARVELL_BG4CD_SDRAM_H__ + +void sdram_init(void); +#endif diff --git a/src/soc/marvell/bg4cd/memlayout.ld b/src/soc/marvell/bg4cd/memlayout.ld deleted file mode 100644 index 45cf395..0000000 --- a/src/soc/marvell/bg4cd/memlayout.ld +++ /dev/null @@ -1,39 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <memlayout.h> -#include <vendorcode/google/chromeos/memlayout.h> - -#include <arch/header.ld> - -SECTIONS -{ - DRAM_START(0x00000000) - RAMSTAGE(0x00200000, 128K) - POSTRAM_CBFS_CACHE(0x01000000, 1M) - - SRAM_START(0x80000000) - TTB(0x80000000, 16K) - BOOTBLOCK(0x80004004, 16K - 4) - VBOOT2_WORK(0x80008000, 16K) - OVERLAP_VERSTAGE_ROMSTAGE(0x8000C000, 40K) - PRERAM_CBFS_CACHE(0x80016000, 4K) - STACK(0x80017000, 4K) - SRAM_END(0x80018000) -} diff --git a/src/soc/marvell/bg4cd/sdram.c b/src/soc/marvell/bg4cd/sdram.c index 1b5575b..0ebee15 100644 --- a/src/soc/marvell/bg4cd/sdram.c +++ b/src/soc/marvell/bg4cd/sdram.c @@ -17,7 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ #include <console/console.h> -#include "sdram.h" +#include <soc/sdram.h> void sdram_init(void) { diff --git a/src/soc/marvell/bg4cd/sdram.h b/src/soc/marvell/bg4cd/sdram.h deleted file mode 100644 index 6850d27..0000000 --- a/src/soc/marvell/bg4cd/sdram.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__ -#define __SOC_MARVELL_BG4CD_SDRAM_H__ - -void sdram_init(void); -#endif

1 0

Patch set updated for coreboot: 57cde35 cosmos: rearrange configuration and makefile definitions
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9353 -gerrit commit 57cde35e0cda3d7dd7d41cf861dec653b5cd7536 Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Wed Oct 15 18:19:03 2014 -0700 cosmos: rearrange configuration and makefile definitions This is a no-op aesthetic change, arranging configurarion and makefile lines alphanumerically. BRANCH=none BUG=none TEST=cosmos still builds Change-Id: I72b7defca722380dda3ef8453e625f28bdebfa2c Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: c55a7e9d5064edf5cac9498c8c6c377cbf705bb1 Original-Change-Id: I4498eef59fc20ea04b6ebadb451d0fe346824c05 Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/223597 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/marvell/bg4cd/Kconfig | 14 +++++++------- src/soc/marvell/bg4cd/Makefile.inc | 10 +++++----- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig index 0a9778d..f8bf0b9 100644 --- a/src/soc/marvell/bg4cd/Kconfig +++ b/src/soc/marvell/bg4cd/Kconfig @@ -20,16 +20,16 @@ config SOC_MARVELL_BG4CD bool default n - select CPU_HAS_BOOTBLOCK_INIT - select HAVE_MONOTONIC_TIMER - select GENERIC_UDELAY - select EARLY_CONSOLE - select DYNAMIC_CBMEM select ARCH_BOOTBLOCK_ARMV7 - select ARCH_VERSTAGE_ARMV7 - select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_VERSTAGE_ARMV7 select BOOTBLOCK_CONSOLE + select CPU_HAS_BOOTBLOCK_INIT + select DYNAMIC_CBMEM + select EARLY_CONSOLE + select GENERIC_UDELAY + select HAVE_MONOTONIC_TIMER if SOC_MARVELL_BG4CD diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc index 7d114dd..7d49486 100644 --- a/src/soc/marvell/bg4cd/Makefile.inc +++ b/src/soc/marvell/bg4cd/Makefile.inc @@ -18,24 +18,24 @@ ## bootblock-y += cbmem.c -bootblock-y += monotonic_timer.c -bootblock-y += media.c bootblock-y += i2c.c +bootblock-y += media.c +bootblock-y += monotonic_timer.c -verstage-y += monotonic_timer.c verstage-y += i2c.c verstage-y += media.c +verstage-y += monotonic_timer.c romstage-y += cbmem.c -romstage-y += monotonic_timer.c romstage-y += i2c.c romstage-y += media.c +romstage-y += monotonic_timer.c romstage-y += sdram.c ramstage-y += cbmem.c -ramstage-y += monotonic_timer.c ramstage-y += i2c.c ramstage-y += media.c +ramstage-y += monotonic_timer.c $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@

1 0

Patch set updated for coreboot: 310c025 bg4cd: add SPI controller driver skeleton
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9355 -gerrit commit 310c025b6d0c502cb0b61756cdb3a10847170eee Author: Vadim Bendebury <vbendeb(a)chromium.org> Date: Thu Oct 16 11:07:41 2014 -0700 bg4cd: add SPI controller driver skeleton This file provides the SOC specific SPI driver API, it needs to be filled up with code. Function descriptions can be found in src/include/spi-generic.h. BRANCH=none BUG=chrome-os-partner:32631 TEST=compiles with the upcoming patches applied. Change-Id: I3546d5f9fb2971f4ccb7a57ce8164fd77686af72 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 0583f17fe3f6a258321765b91eae608e33577afe Original-Change-Id: I0ee04ca17874a13403007bba80d5e8a7708bc625 Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/223719 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/marvell/bg4cd/spi.c | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/src/soc/marvell/bg4cd/spi.c b/src/soc/marvell/bg4cd/spi.c new file mode 100644 index 0000000..8ae22d1 --- /dev/null +++ b/src/soc/marvell/bg4cd/spi.c @@ -0,0 +1,40 @@ +/* + * This file is part of the coreboot project. + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stddef.h> +#include <spi-generic.h> + +struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs) +{ + return NULL; +} + +int spi_claim_bus(struct spi_slave *slave) +{ + return 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ +} + +int spi_xfer(struct spi_slave *slave, const void *dout, + unsigned out_bytes, void *din, unsigned in_bytes) +{ + return 0; +}

1 0

Patch set updated for coreboot: b4ab60e cosmos: add template for soc and board files
by Patrick Georgi 08 Apr '15

08 Apr '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/9351 -gerrit commit b4ab60ea845c8922c02f870231875f7445fe1e7c Author: Daisuke Nojiri <dnojiri(a)chromium.org> Date: Wed Oct 8 11:38:52 2014 -0700 cosmos: add template for soc and board files This adds board and soc files as a template for cosmos. BUG=chrome-os-partner:32772 BRANCH=none TEST=Built coreboot for cosmos and veyron_pinky. Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> Change-Id: I6e17058afaa629c6aa70c2d195230dba782af526 Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: fd9dbcf1023a79921c8501bbe09969d65ca9e742 Original-Change-Id: I676bdf460f5dd996dcce1fc422a69882798bc112 Original-Reviewed-on: https://chromium-review.googlesource.com/222050 Original-Reviewed-by: Vadim Bendebury <vbendeb(a)chromium.org> Original-Reviewed-by: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Tested-by: Daisuke Nojiri <dnojiri(a)chromium.org> Original-Commit-Queue: Daisuke Nojiri <dnojiri(a)chromium.org> --- src/mainboard/google/Kconfig | 3 ++ src/mainboard/google/cosmos/Kconfig | 57 ++++++++++++++++++++++++ src/mainboard/google/cosmos/Makefile.inc | 40 +++++++++++++++++ src/mainboard/google/cosmos/boardid.c | 25 +++++++++++ src/mainboard/google/cosmos/bootblock.c | 24 +++++++++++ src/mainboard/google/cosmos/chromeos.c | 41 ++++++++++++++++++ src/mainboard/google/cosmos/devicetree.cb | 23 ++++++++++ src/mainboard/google/cosmos/mainboard.c | 38 ++++++++++++++++ src/mainboard/google/cosmos/memlayout.ld | 1 + src/mainboard/google/cosmos/reset.c | 26 +++++++++++ src/mainboard/google/cosmos/romstage.c | 72 +++++++++++++++++++++++++++++++ src/soc/Makefile.inc | 1 + src/soc/marvell/Kconfig | 20 +++++++++ src/soc/marvell/Makefile.inc | 20 +++++++++ src/soc/marvell/bg4cd/Kconfig | 52 ++++++++++++++++++++++ src/soc/marvell/bg4cd/Makefile.inc | 46 ++++++++++++++++++++ src/soc/marvell/bg4cd/cbmem.c | 26 +++++++++++ src/soc/marvell/bg4cd/i2c.c | 30 +++++++++++++ src/soc/marvell/bg4cd/i2c.h | 26 +++++++++++ src/soc/marvell/bg4cd/media.c | 25 +++++++++++ src/soc/marvell/bg4cd/memlayout.ld | 39 +++++++++++++++++ src/soc/marvell/bg4cd/monotonic_timer.c | 29 +++++++++++++ src/soc/marvell/bg4cd/sdram.c | 26 +++++++++++ src/soc/marvell/bg4cd/sdram.h | 24 +++++++++++ 24 files changed, 714 insertions(+) diff --git a/src/mainboard/google/Kconfig b/src/mainboard/google/Kconfig index c193d81..22e8618 100644 --- a/src/mainboard/google/Kconfig +++ b/src/mainboard/google/Kconfig @@ -25,6 +25,8 @@ config BOARD_GOOGLE_BOLT bool "Bolt" config BOARD_GOOGLE_BUTTERFLY bool "Butterfly" +config BOARD_GOOGLE_COSMOS + bool "Cosmos" config BOARD_GOOGLE_DAISY bool "Daisy" config BOARD_GOOGLE_FALCO @@ -68,6 +70,7 @@ endchoice source "src/mainboard/google/bolt/Kconfig" source "src/mainboard/google/butterfly/Kconfig" +source "src/mainboard/google/cosmos/Kconfig" source "src/mainboard/google/daisy/Kconfig" source "src/mainboard/google/falco/Kconfig" source "src/mainboard/google/link/Kconfig" diff --git a/src/mainboard/google/cosmos/Kconfig b/src/mainboard/google/cosmos/Kconfig new file mode 100644 index 0000000..4af9986 --- /dev/null +++ b/src/mainboard/google/cosmos/Kconfig @@ -0,0 +1,57 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +if BOARD_GOOGLE_COSMOS + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select BOARD_ROMSIZE_KB_1024 + select BOARD_ID_SUPPORT + select CHROMEOS + select CHROMEOS_VBNV_FLASH + select SOC_MARVELL_BG4CD + select MAINBOARD_HAS_BOOTBLOCK_INIT + select HAVE_HARD_RESET + select RETURN_FROM_VERSTAGE + +config MAINBOARD_DIR + string + default google/cosmos + +config MAINBOARD_PART_NUMBER + string + default "Cosmos" + +config MAINBOARD_VENDOR + string + default "Google" + +config VBOOT_RAMSTAGE_INDEX + hex + default 0x3 + +config BOOT_MEDIA_SPI_BUS + int + default 2 + +config DRAM_SIZE_MB + int + default 1024 + +endif # BOARD_GOOGLE_COSMOS diff --git a/src/mainboard/google/cosmos/Makefile.inc b/src/mainboard/google/cosmos/Makefile.inc new file mode 100644 index 0000000..3e970fb --- /dev/null +++ b/src/mainboard/google/cosmos/Makefile.inc @@ -0,0 +1,40 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## +bootblock-y += bootblock.c +bootblock-y += boardid.c +bootblock-y += chromeos.c +bootblock-y += reset.c + +verstage-y += boardid.c +verstage-y += chromeos.c +verstage-y += reset.c + +romstage-y += boardid.c +romstage-y += romstage.c +romstage-y += reset.c + +ramstage-y += boardid.c +ramstage-y += chromeos.c +ramstage-y += mainboard.c +ramstage-y += reset.c + +bootblock-y += memlayout.ld +verstage-y += memlayout.ld +romstage-y += memlayout.ld +ramstage-y += memlayout.ld diff --git a/src/mainboard/google/cosmos/boardid.c b/src/mainboard/google/cosmos/boardid.c new file mode 100644 index 0000000..8b61891 --- /dev/null +++ b/src/mainboard/google/cosmos/boardid.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <boardid.h> + +uint8_t board_id(void) +{ + return -1; +} diff --git a/src/mainboard/google/cosmos/bootblock.c b/src/mainboard/google/cosmos/bootblock.c new file mode 100644 index 0000000..d5bffea --- /dev/null +++ b/src/mainboard/google/cosmos/bootblock.c @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <bootblock_common.h> + +void bootblock_mainboard_init(void) +{ +} diff --git a/src/mainboard/google/cosmos/chromeos.c b/src/mainboard/google/cosmos/chromeos.c new file mode 100644 index 0000000..0ad05c8 --- /dev/null +++ b/src/mainboard/google/cosmos/chromeos.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <boot/coreboot_tables.h> +#include <vendorcode/google/chromeos/chromeos.h> + +void fill_lb_gpios(struct lb_gpios *gpios) +{ +} + +int get_developer_mode_switch(void) +{ + return 0; +} + +int get_recovery_mode_switch(void) +{ + return 0; +} + +int get_write_protect_state(void) +{ + return 0; +} + diff --git a/src/mainboard/google/cosmos/devicetree.cb b/src/mainboard/google/cosmos/devicetree.cb new file mode 100644 index 0000000..b82d57c --- /dev/null +++ b/src/mainboard/google/cosmos/devicetree.cb @@ -0,0 +1,23 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +# TODO fill with Versatile Express board data in QEMU. +chip soc/marvell/bg4cd + device cpu_cluster 0 on end +end diff --git a/src/mainboard/google/cosmos/mainboard.c b/src/mainboard/google/cosmos/mainboard.c new file mode 100644 index 0000000..5866fea --- /dev/null +++ b/src/mainboard/google/cosmos/mainboard.c @@ -0,0 +1,38 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <device/device.h> +#include <boot/coreboot_tables.h> + +static void mainboard_init(device_t dev) +{ +} + +static void mainboard_enable(device_t dev) +{ + dev->ops->init = &mainboard_init; +} + +struct chip_operations mainboard_ops = { + .enable_dev = mainboard_enable, +}; + +void lb_board(struct lb_header *header) +{ +} diff --git a/src/mainboard/google/cosmos/memlayout.ld b/src/mainboard/google/cosmos/memlayout.ld new file mode 100644 index 0000000..d788b78 --- /dev/null +++ b/src/mainboard/google/cosmos/memlayout.ld @@ -0,0 +1 @@ +#include <soc/marvell/bg4cd/memlayout.ld> diff --git a/src/mainboard/google/cosmos/reset.c b/src/mainboard/google/cosmos/reset.c new file mode 100644 index 0000000..8020fbf --- /dev/null +++ b/src/mainboard/google/cosmos/reset.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <reset.h> + +void hard_reset(void) +{ + while (1) + ; +} diff --git a/src/mainboard/google/cosmos/romstage.c b/src/mainboard/google/cosmos/romstage.c new file mode 100644 index 0000000..f3e98e0 --- /dev/null +++ b/src/mainboard/google/cosmos/romstage.c @@ -0,0 +1,72 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <armv7.h> +#include <cbfs.h> +#include <console/console.h> +#include <arch/stages.h> +#include <cbmem.h> +#include <delay.h> +#include <timestamp.h> +#include <arch/cache.h> +#include <arch/exception.h> +#include <stdlib.h> +#include <program_loading.h> +#include <vendorcode/google/chromeos/chromeos.h> +#include <soc/marvell/bg4cd/sdram.h> +#include <symbols.h> +#include "timer.h" + +void main(void) +{ +#if CONFIG_COLLECT_TIMESTAMPS + uint64_t start_romstage_time; + uint64_t before_dram_time; + uint64_t after_dram_time; + uint64_t base_time = timestamp_get(); + start_romstage_time = timestamp_get(); +#endif + + console_init(); + +#if CONFIG_COLLECT_TIMESTAMPS + before_dram_time = timestamp_get(); +#endif + sdram_init(); +#if CONFIG_COLLECT_TIMESTAMPS + after_dram_time = timestamp_get(); +#endif + mmu_init(); + mmu_config_range(0, 4096, DCACHE_OFF); + dcache_mmu_enable(); + + cbmem_initialize_empty(); +#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(base_time); + timestamp_add(TS_START_ROMSTAGE, start_romstage_time); + timestamp_add(TS_BEFORE_INITRAM, before_dram_time); + timestamp_add(TS_AFTER_INITRAM, after_dram_time); +#endif + +#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_END_ROMSTAGE); +#endif + run_ramstage(); +} diff --git a/src/soc/Makefile.inc b/src/soc/Makefile.inc index 543e155..b722323 100644 --- a/src/soc/Makefile.inc +++ b/src/soc/Makefile.inc @@ -3,6 +3,7 @@ ################################################################################ subdirs-y += imgtec subdirs-y += intel +subdirs-y += marvell subdirs-y += nvidia subdirs-y += qualcomm subdirs-y += rockchip diff --git a/src/soc/marvell/Kconfig b/src/soc/marvell/Kconfig new file mode 100644 index 0000000..95b8c50 --- /dev/null +++ b/src/soc/marvell/Kconfig @@ -0,0 +1,20 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +source src/soc/marvell/bg4cd/Kconfig diff --git a/src/soc/marvell/Makefile.inc b/src/soc/marvell/Makefile.inc new file mode 100644 index 0000000..ef7bcd9 --- /dev/null +++ b/src/soc/marvell/Makefile.inc @@ -0,0 +1,20 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +subdirs-$(CONFIG_SOC_MARVELL_BG4CD) += bg4cd diff --git a/src/soc/marvell/bg4cd/Kconfig b/src/soc/marvell/bg4cd/Kconfig new file mode 100644 index 0000000..0a9778d --- /dev/null +++ b/src/soc/marvell/bg4cd/Kconfig @@ -0,0 +1,52 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +config SOC_MARVELL_BG4CD + bool + default n + select CPU_HAS_BOOTBLOCK_INIT + select HAVE_MONOTONIC_TIMER + select GENERIC_UDELAY + select EARLY_CONSOLE + select DYNAMIC_CBMEM + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_VERSTAGE_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 + select BOOTBLOCK_CONSOLE + +if SOC_MARVELL_BG4CD + +config BOOTBLOCK_CPU_INIT + string + default "soc/marvell/bg4cd/bootblock.c" + +config BOOTBLOCK_ROM_OFFSET + hex + default 0x0 + +config CBFS_HEADER_ROM_OFFSET + hex + default 0x0008000 + +config CBFS_ROM_OFFSET + hex + default 0x0018000 + +endif diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc new file mode 100644 index 0000000..7d114dd --- /dev/null +++ b/src/soc/marvell/bg4cd/Makefile.inc @@ -0,0 +1,46 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2014 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## + +bootblock-y += cbmem.c +bootblock-y += monotonic_timer.c +bootblock-y += media.c +bootblock-y += i2c.c + +verstage-y += monotonic_timer.c +verstage-y += i2c.c +verstage-y += media.c + +romstage-y += cbmem.c +romstage-y += monotonic_timer.c +romstage-y += i2c.c +romstage-y += media.c +romstage-y += sdram.c + +ramstage-y += cbmem.c +ramstage-y += monotonic_timer.c +ramstage-y += i2c.c +ramstage-y += media.c + +$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf + cp $< $@ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf "Generating: $(subst $(obj)/,,$(@))\n" + @mkdir -p $(dir $@) + @mv $< $@ diff --git a/src/soc/marvell/bg4cd/cbmem.c b/src/soc/marvell/bg4cd/cbmem.c new file mode 100644 index 0000000..168673d --- /dev/null +++ b/src/soc/marvell/bg4cd/cbmem.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <cbmem.h> +#include <stddef.h> + +void *cbmem_top(void) +{ + return NULL; +} diff --git a/src/soc/marvell/bg4cd/i2c.c b/src/soc/marvell/bg4cd/i2c.c new file mode 100644 index 0000000..1aa02d0 --- /dev/null +++ b/src/soc/marvell/bg4cd/i2c.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <device/i2c.h> +#include "i2c.h" + +int platform_i2c_transfer(unsigned bus, struct i2c_seg *segments, int seg_count) +{ + return 0; +} + +void i2c_init(unsigned int bus, unsigned int hz) +{ +} diff --git a/src/soc/marvell/bg4cd/i2c.h b/src/soc/marvell/bg4cd/i2c.h new file mode 100644 index 0000000..40db31a --- /dev/null +++ b/src/soc/marvell/bg4cd/i2c.h @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_MARVELL_BG4CD_I2C_H__ +#define __SOC_MARVELL_BG4CD_I2C_H__ + +void i2c_init(unsigned int bus, unsigned int hz); + +#endif + diff --git a/src/soc/marvell/bg4cd/media.c b/src/soc/marvell/bg4cd/media.c new file mode 100644 index 0000000..5a4dc5f --- /dev/null +++ b/src/soc/marvell/bg4cd/media.c @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <cbfs.h> + +int init_default_cbfs_media(struct cbfs_media *media) +{ + return 0; +} diff --git a/src/soc/marvell/bg4cd/memlayout.ld b/src/soc/marvell/bg4cd/memlayout.ld new file mode 100644 index 0000000..45cf395 --- /dev/null +++ b/src/soc/marvell/bg4cd/memlayout.ld @@ -0,0 +1,39 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <memlayout.h> +#include <vendorcode/google/chromeos/memlayout.h> + +#include <arch/header.ld> + +SECTIONS +{ + DRAM_START(0x00000000) + RAMSTAGE(0x00200000, 128K) + POSTRAM_CBFS_CACHE(0x01000000, 1M) + + SRAM_START(0x80000000) + TTB(0x80000000, 16K) + BOOTBLOCK(0x80004004, 16K - 4) + VBOOT2_WORK(0x80008000, 16K) + OVERLAP_VERSTAGE_ROMSTAGE(0x8000C000, 40K) + PRERAM_CBFS_CACHE(0x80016000, 4K) + STACK(0x80017000, 4K) + SRAM_END(0x80018000) +} diff --git a/src/soc/marvell/bg4cd/monotonic_timer.c b/src/soc/marvell/bg4cd/monotonic_timer.c new file mode 100644 index 0000000..a84b036 --- /dev/null +++ b/src/soc/marvell/bg4cd/monotonic_timer.c @@ -0,0 +1,29 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <delay.h> +#include <timer.h> + +void timer_monotonic_get(struct mono_time *mt) +{ +} + +void init_timer(void) +{ +} diff --git a/src/soc/marvell/bg4cd/sdram.c b/src/soc/marvell/bg4cd/sdram.c new file mode 100644 index 0000000..1b5575b --- /dev/null +++ b/src/soc/marvell/bg4cd/sdram.c @@ -0,0 +1,26 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#include <console/console.h> +#include "sdram.h" + +void sdram_init(void) +{ + printk(BIOS_INFO, "Starting SDRAM initialization...\n"); + printk(BIOS_INFO, "Finish SDRAM initialization...\n"); +} diff --git a/src/soc/marvell/bg4cd/sdram.h b/src/soc/marvell/bg4cd/sdram.h new file mode 100644 index 0000000..6850d27 --- /dev/null +++ b/src/soc/marvell/bg4cd/sdram.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __SOC_MARVELL_BG4CD_SDRAM_H__ +#define __SOC_MARVELL_BG4CD_SDRAM_H__ + +void sdram_init(void); +#endif

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coreboot-gerrit April 2015