coreboot-gerrit November 2015

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Patch set updated for coreboot: [NEEDS TEST] nb/intel/sandybridge: Fix PEG disablement
by Patrick Rudolph 02 Nov '15

02 Nov '15

Patrick Rudolph (siro(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12112 -gerrit commit b672e33c7e6f5db742b195d165229106d2120fe6 Author: Patrick Rudolph <siro(a)das-labor.org> Date: Wed Oct 21 18:05:01 2015 +0200 [NEEDS TEST] nb/intel/sandybridge: Fix PEG disablement Fix regression introduced by: 3660c0fc658e4e20ef079f762dfc7ad05c83544c "northbridge/intel/sandybridge: Enable PEG clock-gating on demand" Issue observed: GNU/Linux kernel crashes in earlyinit on systems without PEG devices. The crash occurs on every boot in different functions. There's no problem on systems with PEG enabled. Test system: * Lenovo T530 * Intel Core i5-3320M CPU * Fedora GNU/Linux 4.1 * PEG disabled in devicetree Problem description: Tests shows that modifing PEG chicken bit or device enable bits after setting BIOS_RESET_CPL causes random crashes in GNU/Linux. Problem solution: Disable PEG devices before setting BIOS_RESET_CPL. Final testing results: No more random kernel crashes. Change-Id: I4a967c2d00d7d1e4426cf5abdd5f616c21557da7 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- src/northbridge/intel/sandybridge/northbridge.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 09830de..656a0e8 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -427,6 +427,11 @@ static void northbridge_init(struct device *dev) } MCHBAR32(0x5f10) = bridge_type; + /* Turn off unused devices. Has to be done before + * setting BIOS_RESET_CPL. + */ + disable_peg(); + /* * Set bit 0 of BIOS_RESET_CPL to indicate to the CPU * that BIOS has initialized memory and power management @@ -452,9 +457,6 @@ static void northbridge_init(struct device *dev) /* Set here before graphics PM init */ MCHBAR32(0x5500) = 0x00100001; - - /* Turn off unused devices */ - disable_peg(); } static void northbridge_enable(device_t dev)

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Patch merged into coreboot/master: amd/olivehillplus: Tidy up devicetree
by gerrit＠coreboot.org 02 Nov '15

02 Nov '15

the following patch was just integrated into master: commit 65eec4d959a847c43b5f4e92c6eee60f042fd7f6 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Jun 23 07:46:44 2015 +0300 amd/olivehillplus: Tidy up devicetree Some comments and leftover static USB devices whose function numbers changed. Change-Id: I4d7c7499fe436588ef7e5ae030212c2638a4505f Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/12263 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See http://review.coreboot.org/12263 for details. -gerrit

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Patch set updated for coreboot: via/cx700: Fix hidden compile error and make sure it won't hide again
by Patrick Georgi 02 Nov '15

02 Nov '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12296 -gerrit commit dce3a7507e69dad7eba6b47bb3dcee83e6c32bc5 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 31 16:12:51 2015 +0100 via/cx700: Fix hidden compile error and make sure it won't hide again A wrong function name made an #ifdef'd code path not compile. Fix that, and also use IS_ENABLED() to make sure that such issues won't come up again there. Change-Id: Iccb98842dde498cce32cd86a770e22a506ad4cc2 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/northbridge/via/cx700/raminit.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index 3c6b6d0..67b2fac 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -1254,14 +1254,14 @@ static void sdram_enable(const struct mem_controller *ctrl) } } -#ifdef MEM_WIDTH_32BIT_MODE - /****************************************************************/ - /* Set Dram 32bit Mode */ - /****************************************************************/ - reg8 = pci_read_config8(MEMCTRL, 0x6c); - reg8 |= 0x20; - pci_write_config(MEMCTRL, 0x6c, reg8); -#endif + if (IS_ENABLED(MEM_WIDTH_32BIT_MODE)) { + /********************************************************/ + /* Set Dram 32bit Mode */ + /********************************************************/ + reg8 = pci_read_config8(MEMCTRL, 0x6c); + reg8 |= 0x20; + pci_write_config8(MEMCTRL, 0x6c, reg8); + } /****************************************************************/ /* Find the DQSI Low/High bound and save it to Scratch register */

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Patch set updated for coreboot: Avoid crashing on access to 0
by Patrick Georgi 02 Nov '15

02 Nov '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12294 -gerrit commit 61c1969b0f76e2689521f1fde37241cb66ddbf05 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Oct 30 15:40:20 2015 +0100 Avoid crashing on access to 0 Some compilers add a crash (eg. ud2 on x86) when predictably accessing 0 (because it's undefined behaviour), so do the actual accesses in assembler to shut up the language lawyerly compiler. Change-Id: I6aa6f28283281ebae73d6349811e290bf1b99483 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/arch/x86/include/arch/io.h | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 5c85019..9c84b89 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -145,32 +145,38 @@ static inline void insl(uint16_t port, void *addr, unsigned long count) static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr) { - return *((volatile uint8_t *)(addr)); + uint8_t res; + asm ("mov (%1), %0" : "=q" (res) : "r" (addr)); + return res; } static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr) { - return *((volatile uint16_t *)(addr)); + uint16_t res; + asm ("mov (%1), %0" : "=r" (res) : "r" (addr)); + return res; } static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr) { - return *((volatile uint32_t *)(addr)); + uint32_t res; + asm ("mov (%1), %0" : "=r" (res) : "r" (addr)); + return res; } static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value) { - *((volatile uint8_t *)(addr)) = value; + asm ("mov %0, (%1)" :: "q" (value), "r" (addr) : "memory"); } static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value) { - *((volatile uint16_t *)(addr)) = value; + asm ("mov %0, (%1)" :: "r" (value), "r" (addr) : "memory"); } static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value) { - *((volatile uint32_t *)(addr)) = value; + asm ("mov %0, (%1)" :: "r" (value), "r" (addr) : "memory"); } /* Conflicts with definition in lib.h */

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Patch set updated for coreboot: via/cx700: remove unused #define
by Patrick Georgi 02 Nov '15

02 Nov '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12295 -gerrit commit 39f0a460cf00193a490d60510835196e4d8c3fee Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 31 16:09:34 2015 +0100 via/cx700: remove unused #define Change-Id: I0180e0ae2aeeffcef46a97892356f1955f581efd Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/northbridge/via/cx700/raminit.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index 66c7c17..3c6b6d0 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -39,8 +39,6 @@ #define HOSTCTRL PCI_DEV(0, 0, 2) #define MEMCTRL PCI_DEV(0, 0, 3) -#define OHM_150 1 - #ifdef MEM_WIDTH_32BIT_MODE #define SDRAM1X_RA_14 30 #define SDRAM1X_RA_13 29

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New patch to review for coreboot: via/cx700: Fix hidden compile error and make sure it won't hide again
by Patrick Georgi 02 Nov '15

02 Nov '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12296 -gerrit commit d750dd18eabdc2892b55fe09c2831d95ab0d0359 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 31 16:12:51 2015 +0100 via/cx700: Fix hidden compile error and make sure it won't hide again A wrong function name made an #ifdef'd code path not compile. Fix that, and also use IS_ENABLED() to make sure that such issues won't come up again there. Change-Id: Iccb98842dde498cce32cd86a770e22a506ad4cc2 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/northbridge/via/cx700/raminit.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index 3c6b6d0..67b2fac 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -1254,14 +1254,14 @@ static void sdram_enable(const struct mem_controller *ctrl) } } -#ifdef MEM_WIDTH_32BIT_MODE - /****************************************************************/ - /* Set Dram 32bit Mode */ - /****************************************************************/ - reg8 = pci_read_config8(MEMCTRL, 0x6c); - reg8 |= 0x20; - pci_write_config(MEMCTRL, 0x6c, reg8); -#endif + if (IS_ENABLED(MEM_WIDTH_32BIT_MODE)) { + /********************************************************/ + /* Set Dram 32bit Mode */ + /********************************************************/ + reg8 = pci_read_config8(MEMCTRL, 0x6c); + reg8 |= 0x20; + pci_write_config8(MEMCTRL, 0x6c, reg8); + } /****************************************************************/ /* Find the DQSI Low/High bound and save it to Scratch register */

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New patch to review for coreboot: via/cx700: remove unused #define
by Patrick Georgi 02 Nov '15

02 Nov '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12295 -gerrit commit 48629a1a0096d41f5e338e93855d49d56f92b6ff Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Sat Oct 31 16:09:34 2015 +0100 via/cx700: remove unused #define Change-Id: I0180e0ae2aeeffcef46a97892356f1955f581efd Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/northbridge/via/cx700/raminit.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/northbridge/via/cx700/raminit.c b/src/northbridge/via/cx700/raminit.c index 66c7c17..3c6b6d0 100644 --- a/src/northbridge/via/cx700/raminit.c +++ b/src/northbridge/via/cx700/raminit.c @@ -39,8 +39,6 @@ #define HOSTCTRL PCI_DEV(0, 0, 2) #define MEMCTRL PCI_DEV(0, 0, 3) -#define OHM_150 1 - #ifdef MEM_WIDTH_32BIT_MODE #define SDRAM1X_RA_14 30 #define SDRAM1X_RA_13 29

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New patch to review for coreboot: Avoid crashing on access to 0
by Patrick Georgi 02 Nov '15

02 Nov '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12294 -gerrit commit 23d76695537027249bd4458a86a50b3bdfa1cfe6 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Oct 30 15:40:20 2015 +0100 Avoid crashing on access to 0 Some compilers add a crash (eg. ud2 on x86) when predictably accessing 0 (because it's undefined behaviour), so do the actual accesses in assembler to shut up the language lawyerly compiler. Change-Id: I6aa6f28283281ebae73d6349811e290bf1b99483 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/arch/x86/include/arch/io.h | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 5c85019..01533d5 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -145,32 +145,38 @@ static inline void insl(uint16_t port, void *addr, unsigned long count) static inline __attribute__((always_inline)) uint8_t read8(const volatile void *addr) { - return *((volatile uint8_t *)(addr)); + uint8_t res; + asm ("mov (%1), %0" : "=r" (res) : "r" (addr)); + return res; } static inline __attribute__((always_inline)) uint16_t read16(const volatile void *addr) { - return *((volatile uint16_t *)(addr)); + uint16_t res; + asm ("mov (%1), %0" : "=r" (res) : "r" (addr)); + return res; } static inline __attribute__((always_inline)) uint32_t read32(const volatile void *addr) { - return *((volatile uint32_t *)(addr)); + uint32_t res; + asm ("mov (%1), %0" : "=r" (res) : "r" (addr)); + return res; } static inline __attribute__((always_inline)) void write8(volatile void *addr, uint8_t value) { - *((volatile uint8_t *)(addr)) = value; + asm ("mov %0, (%1)" :: "r" (value), "r" (addr) : "memory"); } static inline __attribute__((always_inline)) void write16(volatile void *addr, uint16_t value) { - *((volatile uint16_t *)(addr)) = value; + asm ("mov %0, (%1)" :: "r" (value), "r" (addr) : "memory"); } static inline __attribute__((always_inline)) void write32(volatile void *addr, uint32_t value) { - *((volatile uint32_t *)(addr)) = value; + asm ("mov %0, (%1)" :: "r" (value), "r" (addr) : "memory"); } /* Conflicts with definition in lib.h */

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Patch set updated for coreboot: [NEEDS TEST] nb/intel/sandybridge: Fix PEG disablement
by Patrick Rudolph 02 Nov '15

02 Nov '15

Patrick Rudolph (siro(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12112 -gerrit commit 52b21488aacf6d0d937c36e334de53b84ce4fd23 Author: Patrick Rudolph <siro(a)das-labor.org> Date: Wed Oct 21 18:05:01 2015 +0200 [NEEDS TEST] nb/intel/sandybridge: Fix PEG disablement Fix regression introduced by: 3660c0fc658e4e20ef079f762dfc7ad05c83544c Issue observed: GNU/Linux kernel crashes in earlyinit on systems without PEG devices. The crash occurs on every boot in different functions. There's no problem on systems with PEG enabled. Test system: * Lenovo T530 * Intel Core i5-3320M CPU * Fedora GNU/Linux 4.1 * PEG disabled in devicetree Problem description: Tests shows that modifing PEG chicken bit or device enable bits after setting BIOS_RESET_CPL causes random crashes in GNU/Linux. Problem solution: Disable PEG devices before setting BIOS_RESET_CPL. Final testing results: No more random kernel crashes. Change-Id: I4a967c2d00d7d1e4426cf5abdd5f616c21557da7 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- src/northbridge/intel/sandybridge/northbridge.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 09830de..656a0e8 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -427,6 +427,11 @@ static void northbridge_init(struct device *dev) } MCHBAR32(0x5f10) = bridge_type; + /* Turn off unused devices. Has to be done before + * setting BIOS_RESET_CPL. + */ + disable_peg(); + /* * Set bit 0 of BIOS_RESET_CPL to indicate to the CPU * that BIOS has initialized memory and power management @@ -452,9 +457,6 @@ static void northbridge_init(struct device *dev) /* Set here before graphics PM init */ MCHBAR32(0x5500) = 0x00100001; - - /* Turn off unused devices */ - disable_peg(); } static void northbridge_enable(device_t dev)

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Patch set updated for coreboot: drivers/pc80: Ensure recovery mode always boots fallback image
by Timothy Pearson 02 Nov '15

02 Nov '15

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12289 -gerrit commit 69a98d3f1aafe61ee49b2a2c689a2fd5d2836994 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Sun Nov 1 02:13:17 2015 -0600 drivers/pc80: Ensure recovery mode always boots fallback image The current fallback / failed boot count checks only look at the value of last_boot when determining whether to execute the normal or fallback image. Furthermore, the normal boot bit is unconditionally set if the failed boot count has not exceeded its threshold, thereby overriding a request from the user to boot into fallback mode if the user does not also set the failed boot count above the failure threshold. Only check the failed boot count if the normal boot bit is set in nvram. NOTE: The existing code did not function as intended when used with recovery jumpers or nvramtool. Even when the user set a recovery jumper or used nvramtool to set the next boot attempt to Fallback, the bootblock would execute the normal code if the failed boot count was below threshold. The only way to recover from this situation was to forcibly power off and on the board repeatedly until the failed boot count rose high enough, or to directly reflash the ROM. Note that clearing the CMOS actually had the opposite effect from what was intended, as it reset the failed boot count and set the normal boot bit. Change-Id: I753ae9f0710c524875a85354ac2547df0c305569 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/drivers/pc80/mc146818rtc_early.c | 53 +++++++++++++++++++++++++----------- 1 file changed, 37 insertions(+), 16 deletions(-) diff --git a/src/drivers/pc80/mc146818rtc_early.c b/src/drivers/pc80/mc146818rtc_early.c index 421af2f..1a45527 100644 --- a/src/drivers/pc80/mc146818rtc_early.c +++ b/src/drivers/pc80/mc146818rtc_early.c @@ -12,6 +12,9 @@ #error "CONFIG_MAX_REBOOT_CNT too high" #endif +#define RTC_BOOT_TRY_NORMAL 0x1 +#define RTC_BOOT_LAST_WAS_NORMAL_AND_REACHED_PAYLOAD 0x2 + static int cmos_error(void) { unsigned char reg_d; @@ -46,7 +49,7 @@ static inline __attribute__((unused)) int last_boot_normal(void) { unsigned char byte; byte = cmos_read(RTC_BOOT_BYTE); - return (byte & (1 << 1)); + return (byte & RTC_BOOT_LAST_WAS_NORMAL_AND_REACHED_PAYLOAD); } static inline __attribute__((unused)) int do_normal_boot(void) @@ -67,29 +70,47 @@ static inline __attribute__((unused)) int do_normal_boot(void) /* The RTC_BOOT_BYTE is now o.k. see where to go. */ byte = cmos_read(RTC_BOOT_BYTE); + /* If booting past the bootblock is all that is required + * to reset the failed boot checks, then clear the boot + * count. This code must execute before any of the boot + * count checks below to function correctly. + */ if (!IS_ENABLED(CONFIG_SKIP_MAX_REBOOT_CNT_CLEAR)) - /* Are we in normal mode? */ - if (byte & 1) + /* Are we attempting to boot normally? */ + if (byte & RTC_BOOT_TRY_NORMAL) byte &= 0x0f; /* yes, clear the boot count */ - /* Properly set the last boot flag */ - byte &= 0xfc; - if ((byte >> 4) < CONFIG_MAX_REBOOT_CNT) { - byte |= (1<<1); - } - - /* Are we already at the max count? */ - if ((byte >> 4) < CONFIG_MAX_REBOOT_CNT) { - byte += 1 << 4; /* No, add 1 to the count */ - } - else { - byte &= 0xfc; /* Yes, put in fallback mode */ + /* Are we attempting to boot normally? */ + if (byte & RTC_BOOT_TRY_NORMAL) { + /* Properly set the last boot flag */ + byte &= 0xfc; + if ((byte >> 4) < CONFIG_MAX_REBOOT_CNT) { + byte |= RTC_BOOT_LAST_WAS_NORMAL_AND_REACHED_PAYLOAD; + } + + /* Are we already at the max count? */ + if ((byte >> 4) < CONFIG_MAX_REBOOT_CNT) { + byte += 1 << 4; /* No, add 1 to the count */ + } + else { + byte &= 0xfc; /* Yes, put in fallback mode */ + } } /* Save the boot byte */ cmos_write(byte, RTC_BOOT_BYTE); - return (byte & (1<<1)); + /* Return selected code path for this boot attempt + * If a boot path was selected and we successfully reach + * the payload, the last boot state bit will indicate + * which code path was taken. + * + * In other words, RTC_BOOT_LAST_WAS_NORMAL_AND_REACHED_PAYLOAD + * has final and absolute say on which code path to take. + * RTC_BOOT_TRY_NORMAL is only a request to try normal boot if + * possible (i.e. the payload can be reached via normal boot). + */ + return (byte & RTC_BOOT_LAST_WAS_NORMAL_AND_REACHED_PAYLOAD); } unsigned read_option_lowlevel(unsigned start, unsigned size, unsigned def)

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coreboot-gerrit November 2015