coreboot-gerrit May 2014

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 1b4d194 baytrail: add more iosf access functions
by Aaron Durbin 09 May '14

09 May '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5007 -gerrit commit 1b4d1940a7f5bd95396fea61a66528b57c67f51d Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed Dec 11 17:13:10 2013 -0800 baytrail: add more iosf access functions There's a slew of ports required to initialize baytrail's perf and power values. Therefore, add the necessary functionality in the iosf module as well as the reg_script library. BUG=chrome-os-partner:24345 BRANCH=None TEST=Built and booted. Change-Id: Id45def82f9b173abeba0e67e4055f21853e62772 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179748 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/lib/reg_script.c | 68 +++++++++++++++++++ src/soc/intel/baytrail/baytrail/iosf.h | 55 ++++++++++++++- src/soc/intel/baytrail/iosf.c | 120 +++++++++++++++++++++++++++++++++ 3 files changed, 242 insertions(+), 1 deletion(-) diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 0655520..647723b 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -249,6 +249,10 @@ static uint32_t reg_script_read_iosf(struct reg_script_context *ctx) const struct reg_script *step = reg_script_get_step(ctx); switch (step->id) { + case IOSF_PORT_AUNIT: + return iosf_aunit_read(step->reg); + case IOSF_PORT_CPU_BUS: + return iosf_cpu_bus_read(step->reg); case IOSF_PORT_BUNIT: return iosf_bunit_read(step->reg); case IOSF_PORT_DUNIT_CH0: @@ -257,16 +261,40 @@ static uint32_t reg_script_read_iosf(struct reg_script_context *ctx) return iosf_punit_read(step->reg); case IOSF_PORT_USBPHY: return iosf_usbphy_read(step->reg); + case IOSF_PORT_SEC: + return iosf_sec_read(step->reg); + case IOSF_PORT_0x45: + return iosf_port45_read(step->reg); + case IOSF_PORT_0x46: + return iosf_port46_read(step->reg); + case IOSF_PORT_0x47: + return iosf_port47_read(step->reg); case IOSF_PORT_SCORE: return iosf_score_read(step->reg); + case IOSF_PORT_0x55: + return iosf_port55_read(step->reg); + case IOSF_PORT_0x58: + return iosf_port58_read(step->reg); + case IOSF_PORT_0x59: + return iosf_port59_read(step->reg); + case IOSF_PORT_0x5a: + return iosf_port5a_read(step->reg); case IOSF_PORT_USHPHY: return iosf_ushphy_read(step->reg); case IOSF_PORT_SCC: return iosf_scc_read(step->reg); case IOSF_PORT_LPSS: return iosf_lpss_read(step->reg); + case IOSF_PORT_0xa2: + return iosf_porta2_read(step->reg); case IOSF_PORT_CCU: return iosf_ccu_read(step->reg); + case IOSF_PORT_SSUS: + return iosf_ssus_read(step->reg); + default: + printk(BIOS_DEBUG, "No read support for IOSF port 0x%x.\n", + step->id); + break; } #endif return 0; @@ -278,6 +306,12 @@ static void reg_script_write_iosf(struct reg_script_context *ctx) const struct reg_script *step = reg_script_get_step(ctx); switch (step->id) { + case IOSF_PORT_AUNIT: + iosf_aunit_write(step->reg, step->value); + break; + case IOSF_PORT_CPU_BUS: + iosf_cpu_bus_write(step->reg, step->value); + break; case IOSF_PORT_BUNIT: iosf_bunit_write(step->reg, step->value); break; @@ -290,9 +324,33 @@ static void reg_script_write_iosf(struct reg_script_context *ctx) case IOSF_PORT_USBPHY: iosf_usbphy_write(step->reg, step->value); break; + case IOSF_PORT_SEC: + iosf_sec_write(step->reg, step->value); + break; + case IOSF_PORT_0x45: + iosf_port45_write(step->reg, step->value); + break; + case IOSF_PORT_0x46: + iosf_port46_write(step->reg, step->value); + break; + case IOSF_PORT_0x47: + iosf_port47_write(step->reg, step->value); + break; case IOSF_PORT_SCORE: iosf_score_write(step->reg, step->value); break; + case IOSF_PORT_0x55: + iosf_port55_write(step->reg, step->value); + break; + case IOSF_PORT_0x58: + iosf_port58_write(step->reg, step->value); + break; + case IOSF_PORT_0x59: + iosf_port59_write(step->reg, step->value); + break; + case IOSF_PORT_0x5a: + iosf_port5a_write(step->reg, step->value); + break; case IOSF_PORT_USHPHY: iosf_ushphy_write(step->reg, step->value); break; @@ -302,9 +360,19 @@ static void reg_script_write_iosf(struct reg_script_context *ctx) case IOSF_PORT_LPSS: iosf_lpss_write(step->reg, step->value); break; + case IOSF_PORT_0xa2: + iosf_porta2_write(step->reg, step->value); + break; case IOSF_PORT_CCU: iosf_ccu_write(step->reg, step->value); break; + case IOSF_PORT_SSUS: + iosf_ssus_write(step->reg, step->value); + break; + default: + printk(BIOS_DEBUG, "No write support for IOSF port 0x%x.\n", + step->id); + break; } #endif } diff --git a/src/soc/intel/baytrail/baytrail/iosf.h b/src/soc/intel/baytrail/baytrail/iosf.h index d173901..8cbe67a 100644 --- a/src/soc/intel/baytrail/baytrail/iosf.h +++ b/src/soc/intel/baytrail/baytrail/iosf.h @@ -55,6 +55,10 @@ #define MDR_REG 0xd4 #define MCRX_REG 0xd8 +uint32_t iosf_aunit_read(int reg); +void iosf_aunit_write(int reg, uint32_t val); +uint32_t iosf_cpu_bus_read(int reg); +void iosf_cpu_bus_write(int reg, uint32_t val); uint32_t iosf_bunit_read(int reg); void iosf_bunit_write(int reg, uint32_t val); uint32_t iosf_dunit_read(int reg); @@ -68,6 +72,22 @@ uint32_t iosf_usbphy_read(int reg); void iosf_usbphy_write(int reg, uint32_t val); uint32_t iosf_ushphy_read(int reg); void iosf_ushphy_write(int reg, uint32_t val); +uint32_t iosf_sec_read(int reg); +void iosf_sec_write(int reg, uint32_t val); +uint32_t iosf_port45_read(int reg); +void iosf_port45_write(int reg, uint32_t val); +uint32_t iosf_port46_read(int reg); +void iosf_port46_write(int reg, uint32_t val); +uint32_t iosf_port47_read(int reg); +void iosf_port47_write(int reg, uint32_t val); +uint32_t iosf_port55_read(int reg); +void iosf_port55_write(int reg, uint32_t val); +uint32_t iosf_port58_read(int reg); +void iosf_port58_write(int reg, uint32_t val); +uint32_t iosf_port59_read(int reg); +void iosf_port59_write(int reg, uint32_t val); +uint32_t iosf_port5a_read(int reg); +void iosf_port5a_write(int reg, uint32_t val); uint32_t iosf_lpss_read(int reg); void iosf_lpss_write(int reg, uint32_t val); uint32_t iosf_ccu_read(int reg); @@ -76,6 +96,10 @@ uint32_t iosf_score_read(int reg); void iosf_score_write(int reg, uint32_t val); uint32_t iosf_scc_read(int reg); void iosf_scc_write(int reg, uint32_t val); +uint32_t iosf_porta2_read(int reg); +void iosf_porta2_write(int reg, uint32_t val); +uint32_t iosf_ssus_read(int reg); +void iosf_ssus_write(int reg, uint32_t val); /* IOSF ports. */ #define IOSF_PORT_AUNIT 0x00 /* IO Arbiter unit */ @@ -88,12 +112,22 @@ void iosf_scc_write(int reg, uint32_t val); #define IOSF_PORT_DUNIT_CH1 0x07 /* DUNIT Channel 1 */ #define IOSF_PORT_SYSMEMIO 0x0c /* System Memory IO */ #define IOSF_PORT_USBPHY 0x43 /* USB PHY */ +#define IOSF_PORT_SEC 0x44 /* SEC */ +#define IOSF_PORT_0x45 0x45 +#define IOSF_PORT_0x46 0x46 +#define IOSF_PORT_0x47 0x47 #define IOSF_PORT_SCORE 0x48 /* SCORE */ +#define IOSF_PORT_0x55 0x55 +#define IOSF_PORT_0x58 0x58 +#define IOSF_PORT_0x59 0x59 +#define IOSF_PORT_0x5a 0x5a #define IOSF_PORT_USHPHY 0x61 /* USB XHCI PHY */ #define IOSF_PORT_SCC 0x63 /* Storage Control Cluster */ #define IOSF_PORT_LPSS 0xa0 /* LPSS - Low Power Subsystem */ +#define IOSF_PORT_0xa2 0xa2 #define IOSF_PORT_SATAPHY 0xa3 /* SATA PHY */ #define IOSF_PORT_PCIEPHY 0xa3 /* PCIE PHY */ +#define IOSF_PORT_SSUS 0xa8 /* SUS */ #define IOSF_PORT_CCU 0xa9 /* Clock control unit. */ /* Read and write opcodes differ per port. */ @@ -113,22 +147,41 @@ void iosf_scc_write(int reg, uint32_t val); #define IOSF_OP_WRITE_SYSMEMIO (IOSF_OP_READ_SYSMEMIO | 1) #define IOSF_OP_READ_USBPHY 0x06 #define IOSF_OP_WRITE_USBPHY (IOSF_OP_READ_USBPHY | 1) +#define IOSF_OP_READ_SEC 0x04 +#define IOSF_OP_WRITE_SEC (IOSF_OP_READ_SEC | 1) +#define IOSF_OP_READ_0x45 0x06 +#define IOSF_OP_WRITE_0x45 (IOSF_OP_READ_0x45 | 1) +#define IOSF_OP_READ_0x46 0x06 +#define IOSF_OP_WRITE_0x46 (IOSF_OP_READ_0x46 | 1) +#define IOSF_OP_READ_0x47 0x06 +#define IOSF_OP_WRITE_0x47 (IOSF_OP_READ_0x47 | 1) #define IOSF_OP_READ_SCORE 0x06 #define IOSF_OP_WRITE_SCORE (IOSF_OP_READ_SCORE | 1) +#define IOSF_OP_READ_0x55 0x04 +#define IOSF_OP_WRITE_0x55 (IOSF_OP_READ_0x55 | 1) +#define IOSF_OP_READ_0x58 0x06 +#define IOSF_OP_WRITE_0x58 (IOSF_OP_READ_0x58 | 1) +#define IOSF_OP_READ_0x59 0x06 +#define IOSF_OP_WRITE_0x59 (IOSF_OP_READ_0x59 | 1) +#define IOSF_OP_READ_0x5a 0x04 +#define IOSF_OP_WRITE_0x5a (IOSF_OP_READ_0x5a | 1) #define IOSF_OP_READ_USHPHY 0x06 #define IOSF_OP_WRITE_USHPHY (IOSF_OP_READ_USHPHY | 1) #define IOSF_OP_READ_SCC 0x06 #define IOSF_OP_WRITE_SCC (IOSF_OP_READ_SCC | 1) #define IOSF_OP_READ_LPSS 0x06 #define IOSF_OP_WRITE_LPSS (IOSF_OP_READ_LPSS | 1) +#define IOSF_OP_READ_0xa2 0x06 +#define IOSF_OP_WRITE_0xa2 (IOSF_OP_READ_0xa2 | 1) #define IOSF_OP_READ_SATAPHY 0x00 #define IOSF_OP_WRITE_SATAPHY (IOSF_OP_READ_SATAPHY | 1) #define IOSF_OP_READ_PCIEPHY 0x00 #define IOSF_OP_WRITE_PCIEPHY (IOSF_OP_READ_PCIEPHY | 1) +#define IOSF_OP_READ_SSUS 0x10 +#define IOSF_OP_WRITE_SSUS (IOSF_OP_READ_SSUS | 1) #define IOSF_OP_READ_CCU 0x06 #define IOSF_OP_WRITE_CCU (IOSF_OP_READ_CCU | 1) - /* * BUNIT Registers. */ diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c index c3d4f0e..2b07e2b 100644 --- a/src/soc/intel/baytrail/iosf.c +++ b/src/soc/intel/baytrail/iosf.c @@ -165,3 +165,123 @@ void iosf_scc_write(int reg, uint32_t val) { return iosf_write_port(IOSF_WRITE(SCC), reg, val); } + +uint32_t iosf_aunit_read(int reg) +{ + return iosf_read_port(IOSF_READ(AUNIT), reg); +} + +void iosf_aunit_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(AUNIT), reg, val); +} + +uint32_t iosf_cpu_bus_read(int reg) +{ + return iosf_read_port(IOSF_READ(CPU_BUS), reg); +} + +void iosf_cpu_bus_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(CPU_BUS), reg, val); +} + +uint32_t iosf_sec_read(int reg) +{ + return iosf_read_port(IOSF_READ(SEC), reg); +} + +void iosf_sec_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(SEC), reg, val); +} + +uint32_t iosf_port45_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x45), reg); +} + +void iosf_port45_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x45), reg, val); +} + +uint32_t iosf_port46_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x46), reg); +} + +void iosf_port46_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x46), reg, val); +} + +uint32_t iosf_port47_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x47), reg); +} + +void iosf_port47_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x47), reg, val); +} + +uint32_t iosf_port55_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x55), reg); +} + +void iosf_port55_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x55), reg, val); +} + +uint32_t iosf_port58_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x58), reg); +} + +void iosf_port58_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x58), reg, val); +} + +uint32_t iosf_port59_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x59), reg); +} + +void iosf_port59_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x59), reg, val); +} + +uint32_t iosf_port5a_read(int reg) +{ + return iosf_read_port(IOSF_READ(0x5a), reg); +} + +void iosf_port5a_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0x5a), reg, val); +} + +uint32_t iosf_porta2_read(int reg) +{ + return iosf_read_port(IOSF_READ(0xa2), reg); +} + +void iosf_porta2_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(0xa2), reg, val); +} + +uint32_t iosf_ssus_read(int reg) +{ + return iosf_read_port(IOSF_READ(SSUS), reg); +} + +void iosf_ssus_write(int reg, uint32_t val) +{ + return iosf_write_port(IOSF_WRITE(SSUS), reg, val); +}

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Patch set updated for coreboot: d8fdeef baytrail: remove verbosity in iosf
by Aaron Durbin 09 May '14

09 May '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5006 -gerrit commit d8fdeef74f42a5590cff633666d976ac3dc4004d Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed Dec 11 17:10:58 2013 -0800 baytrail: remove verbosity in iosf The iosf access functions already use some common code, however there is a duplication for setting up the proper control register for port and opcode. Introduce macros to remove this verbosity. BUG=chrome-os-partner:24345 BRANCH=None TEST=Built and booted. Suspend and wake. Change-Id: I5bad7e2a11fa8e8bd4a3d7fa53d917b2565644f8 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179747 Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/soc/intel/baytrail/iosf.c | 77 +++++++++++++------------------------------ 1 file changed, 23 insertions(+), 54 deletions(-) diff --git a/src/soc/intel/baytrail/iosf.c b/src/soc/intel/baytrail/iosf.c index 4840dea..c3d4f0e 100644 --- a/src/soc/intel/baytrail/iosf.c +++ b/src/soc/intel/baytrail/iosf.c @@ -59,25 +59,24 @@ static void iosf_write_port(uint32_t cr, int reg, uint32_t val) write_iosf_reg(MCR_REG, cr); } +#define IOSF_READ(port) \ + IOSF_OPCODE(IOSF_OP_READ_##port) | IOSF_PORT(IOSF_PORT_##port) +#define IOSF_WRITE(port) \ + IOSF_OPCODE(IOSF_OP_WRITE_##port) | IOSF_PORT(IOSF_PORT_##port) + uint32_t iosf_bunit_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_BUNIT) | - IOSF_PORT(IOSF_PORT_BUNIT); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(BUNIT), reg); } void iosf_bunit_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_BUNIT) | - IOSF_PORT(IOSF_PORT_BUNIT); - iosf_write_port(cr, reg, val); + iosf_write_port(IOSF_WRITE(BUNIT), reg, val); } uint32_t iosf_dunit_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SYSMEMC) | - IOSF_PORT(IOSF_PORT_SYSMEMC); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(SYSMEMC), reg); } uint32_t iosf_dunit_ch0_read(int reg) @@ -94,105 +93,75 @@ uint32_t iosf_dunit_ch1_read(int reg) void iosf_dunit_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SYSMEMC) | - IOSF_PORT(IOSF_PORT_SYSMEMC); - iosf_write_port(cr, reg, val); + iosf_write_port(IOSF_WRITE(SYSMEMC), reg, val); } uint32_t iosf_punit_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_PMC) | - IOSF_PORT(IOSF_PORT_PMC); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(PMC), reg); } void iosf_punit_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_PMC) | - IOSF_PORT(IOSF_PORT_PMC); - iosf_write_port(cr, reg, val); + iosf_write_port(IOSF_WRITE(PMC), reg, val); } uint32_t iosf_usbphy_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_USBPHY) | - IOSF_PORT(IOSF_PORT_USBPHY); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(USBPHY), reg); } void iosf_usbphy_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_USBPHY) | - IOSF_PORT(IOSF_PORT_USBPHY); - return iosf_write_port(cr, reg, val); + return iosf_write_port(IOSF_WRITE(USBPHY), reg, val); } uint32_t iosf_ushphy_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_USHPHY) | - IOSF_PORT(IOSF_PORT_USHPHY); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(USHPHY), reg); } void iosf_ushphy_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_USHPHY) | - IOSF_PORT(IOSF_PORT_USHPHY); - return iosf_write_port(cr, reg, val); + return iosf_write_port(IOSF_WRITE(USHPHY), reg, val); } uint32_t iosf_lpss_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_LPSS) | - IOSF_PORT(IOSF_PORT_LPSS); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(LPSS), reg); } void iosf_lpss_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_LPSS) | - IOSF_PORT(IOSF_PORT_LPSS); - return iosf_write_port(cr, reg, val); + return iosf_write_port(IOSF_WRITE(LPSS), reg, val); } uint32_t iosf_ccu_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_CCU) | - IOSF_PORT(IOSF_PORT_CCU); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(CCU), reg); } void iosf_ccu_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_CCU) | - IOSF_PORT(IOSF_PORT_CCU); - return iosf_write_port(cr, reg, val); + return iosf_write_port(IOSF_WRITE(CCU), reg, val); } uint32_t iosf_score_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SCORE) | - IOSF_PORT(IOSF_PORT_SCORE); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(SCORE), reg); } void iosf_score_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SCORE) | - IOSF_PORT(IOSF_PORT_SCORE); - return iosf_write_port(cr, reg, val); + return iosf_write_port(IOSF_WRITE(SCORE), reg, val); } uint32_t iosf_scc_read(int reg) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_SCC) | - IOSF_PORT(IOSF_PORT_SCC); - return iosf_read_port(cr, reg); + return iosf_read_port(IOSF_READ(SCC), reg); } void iosf_scc_write(int reg, uint32_t val) { - uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_SCC) | - IOSF_PORT(IOSF_PORT_SCC); - return iosf_write_port(cr, reg, val); + return iosf_write_port(IOSF_WRITE(SCC), reg, val); }

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Patch set updated for coreboot: 141875a Trusted Platform: Make TPM init available without ChromeOS
by Kyösti Mälkki 09 May '14

09 May '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5644 -gerrit commit 141875a4bb2cd51657936b7b43bed7d139859223 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat May 3 17:30:30 2014 +0300 Trusted Platform: Make TPM init available without ChromeOS The function does TPM hardware initialisation but is not really related to use of ChromeOS. Change-Id: Ie67c6e2b07485bdf861f74f9a8768882d9495a01 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 2 +- src/cpu/intel/haswell/romstage.c | 8 +- src/drivers/Kconfig | 1 + src/drivers/Makefile.inc | 1 + src/drivers/pc80/Kconfig | 8 - src/drivers/pc80/Makefile.inc | 1 - src/drivers/pc80/tpm.c | 677 -------------------------- src/drivers/tpm/Kconfig | 16 + src/drivers/tpm/Makefile.inc | 8 + src/drivers/tpm/tpm.c | 677 ++++++++++++++++++++++++++ src/drivers/tpm/vboot.c | 221 +++++++++ src/include/bootmode.h | 1 + src/include/pc80/tpm.h | 29 -- src/include/tpm.h | 33 ++ src/lib/bootmode.c | 25 + src/mainboard/google/butterfly/romstage.c | 8 +- src/mainboard/google/link/romstage.c | 8 +- src/mainboard/google/parrot/romstage.c | 8 +- src/mainboard/google/stout/romstage.c | 7 +- src/mainboard/intel/emeraldlake2/romstage.c | 8 +- src/mainboard/samsung/lumpy/romstage.c | 7 +- src/mainboard/samsung/stumpy/romstage.c | 7 +- src/soc/intel/baytrail/romstage/romstage.c | 13 +- src/vendorcode/google/chromeos/Kconfig | 8 - src/vendorcode/google/chromeos/Makefile.inc | 7 - src/vendorcode/google/chromeos/chromeos.h | 3 - src/vendorcode/google/chromeos/vboot.c | 244 ---------- src/vendorcode/google/chromeos/vboot_loader.c | 2 +- 28 files changed, 1003 insertions(+), 1035 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 849e55d..d087370 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -282,7 +282,7 @@ config MMCONF_SUPPORT default n config BOOTMODE_STRAPS - bool + bool "Have bootmode straps" default n source src/console/Kconfig diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 9e27668..a77cb0c 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -36,9 +36,7 @@ #include <ramstage_cache.h> #include <romstage_handoff.h> #include <reset.h> -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> #endif @@ -279,9 +277,7 @@ void romstage_common(const struct romstage_params *params) printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 1a5f8ff..4dc2d97 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -35,6 +35,7 @@ source src/drivers/realtek/Kconfig source src/drivers/sil/Kconfig source src/drivers/spi/Kconfig source src/drivers/ti/Kconfig +source src/drivers/tpm/Kconfig source src/drivers/trident/Kconfig source src/drivers/uart/Kconfig source src/drivers/usb/Kconfig diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index f11e4b8..7156d30 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -28,6 +28,7 @@ subdirs-y += net subdirs-y += parade subdirs-y += realtek subdirs-y += sil +subdirs-$(CONFIG_TPM) += tpm subdirs-y += trident subdirs-$(CONFIG_DRIVERS_UART) += uart subdirs-y += usb diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig index 485dd64..254c159 100644 --- a/src/drivers/pc80/Kconfig +++ b/src/drivers/pc80/Kconfig @@ -15,11 +15,3 @@ config DRIVERS_PS2_KEYBOARD If you know you will only use a payload which does not require this option, then you can say N here to speed up boot time. Otherwise say Y. - -config TPM - bool - default n - help - Enable this option to enable TPM support in coreboot. - - If unsure, say N. diff --git a/src/drivers/pc80/Makefile.inc b/src/drivers/pc80/Makefile.inc index 4d0a280..bfdc11a 100644 --- a/src/drivers/pc80/Makefile.inc +++ b/src/drivers/pc80/Makefile.inc @@ -7,7 +7,6 @@ ramstage-y += keyboard.c ramstage-$(CONFIG_SPKMODEM) += spkmodem.c romstage-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.c -romstage-$(CONFIG_TPM) += tpm.c romstage-$(CONFIG_SPKMODEM) += spkmodem.c subdirs-y += vga diff --git a/src/drivers/pc80/tpm.c b/src/drivers/pc80/tpm.c deleted file mode 100644 index f581ab4..0000000 --- a/src/drivers/pc80/tpm.c +++ /dev/null @@ -1,677 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * The code in this file has been heavily based on the article "Writing a TPM - * Device Driver" published on http://ptgmedia.pearsoncmg.com and the - * submission by Stefan Berger on Qemu-devel mailing list. - * - * One principal difference is that in the simplest config the other than 0 - * TPM localities do not get mapped by some devices (for instance, by - * Infineon slb9635), so this driver provides access to locality 0 only. - */ - -#include <stdlib.h> -#include <string.h> -#include <delay.h> -#include <arch/io.h> -#include <arch/byteorder.h> -#include <console/console.h> -#include <pc80/tpm.h> -#include <arch/early_variables.h> - -#define PREFIX "lpc_tpm: " - -/* coreboot wrapper for TPM driver (start) */ -#define TPM_DEBUG(fmt, args...) \ - if (CONFIG_DEBUG_TPM) { \ - printk(BIOS_DEBUG, PREFIX); \ - printk(BIOS_DEBUG, fmt , ##args); \ - } -#define TPM_DEBUG_IO_READ(reg_, val_) \ - TPM_DEBUG("Read reg 0x%x returns 0x%x\n", (reg_), (val_)) -#define TPM_DEBUG_IO_WRITE(reg_, val_) \ - TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) -#define printf(x...) printk(BIOS_ERR, x) - -#define min(a,b) MIN(a,b) -#define max(a,b) MAX(a,b) -#define readb(_a) (*(volatile unsigned char *) (_a)) -#define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v)) -#define readl(_a) (*(volatile unsigned long *) (_a)) -#define writel(_v, _a) (*(volatile unsigned long *) (_a) = (_v)) -/* coreboot wrapper for TPM driver (end) */ - -#ifndef CONFIG_TPM_TIS_BASE_ADDRESS -/* Base TPM address standard for x86 systems */ -#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 -#endif - -/* the macro accepts the locality value, but only locality 0 is operational */ -#define TIS_REG(LOCALITY, REG) \ - (void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG) - -/* hardware registers' offsets */ -#define TIS_REG_ACCESS 0x0 -#define TIS_REG_INT_ENABLE 0x8 -#define TIS_REG_INT_VECTOR 0xc -#define TIS_REG_INT_STATUS 0x10 -#define TIS_REG_INTF_CAPABILITY 0x14 -#define TIS_REG_STS 0x18 -#define TIS_REG_BURST_COUNT 0x19 -#define TIS_REG_DATA_FIFO 0x24 -#define TIS_REG_DID_VID 0xf00 -#define TIS_REG_RID 0xf04 - -/* Some registers' bit field definitions */ -#define TIS_STS_VALID (1 << 7) /* 0x80 */ -#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */ -#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */ -#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */ -#define TIS_STS_EXPECT (1 << 3) /* 0x08 */ -#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */ - -#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */ -#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */ -#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */ -#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */ -#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */ -#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */ -#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */ - -/* - * Error value returned if a tpm register does not enter the expected state - * after continuous polling. No actual TPM register reading ever returns ~0, - * so this value is a safe error indication to be mixed with possible status - * register values. - */ -#define TPM_TIMEOUT_ERR (~0) - -/* Error value returned on various TPM driver errors */ -#define TPM_DRIVER_ERR (~0) - - /* 1 second is plenty for anything TPM does.*/ -#define MAX_DELAY_US (1000 * 1000) - -/* - * Structures defined below allow creating descriptions of TPM vendor/device - * ID information for run time discovery. The only device the system knows - * about at this time is Infineon slb9635 - */ -struct device_name { - u16 dev_id; - const char * const dev_name; -}; - -struct vendor_name { - u16 vendor_id; - const char * vendor_name; - const struct device_name* dev_names; -}; - -static const struct device_name atmel_devices[] = { - {0x3204, "AT97SC3204"}, - {0xffff} -}; - -static const struct device_name infineon_devices[] = { - {0x000b, "SLB9635 TT 1.2"}, - {0xffff} -}; - -static const struct device_name nuvoton_devices[] = { - {0x00fe, "NPCT420AA V2"}, - {0xffff} -}; - -static const struct device_name stmicro_devices[] = { - {0x0000, "ST33ZP24" }, - {0xffff} -}; - -static const struct vendor_name vendor_names[] = { - {0x1114, "Atmel", atmel_devices}, - {0x15d1, "Infineon", infineon_devices}, - {0x1050, "Nuvoton", nuvoton_devices}, - {0x104a, "ST Microelectronics", stmicro_devices}, -}; - -/* - * Cached vendor/device ID pair to indicate that the device has been already - * discovered - */ -static u32 vendor_dev_id CAR_GLOBAL; - -static inline u8 tpm_read_status(int locality) -{ - u8 value = readb(TIS_REG(locality, TIS_REG_STS)); - TPM_DEBUG_IO_READ(TIS_REG_STS, value); - return value; -} - -static inline void tpm_write_status(u8 sts, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_STS, sts); - writeb(sts, TIS_REG(locality, TIS_REG_STS)); -} - -static inline u8 tpm_read_data(int locality) -{ - u8 value = readb(TIS_REG(locality, TIS_REG_DATA_FIFO)); - TPM_DEBUG_IO_READ(TIS_REG_DATA_FIFO, value); - return value; -} - -static inline void tpm_write_data(u8 data, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_STS, data); - writeb(data, TIS_REG(locality, TIS_REG_DATA_FIFO)); -} - -static inline u16 tpm_read_burst_count(int locality) -{ - u16 count; - count = readb(TIS_REG(locality, TIS_REG_BURST_COUNT)); - count |= readb(TIS_REG(locality, TIS_REG_BURST_COUNT + 1)) << 8; - TPM_DEBUG_IO_READ(TIS_REG_BURST_COUNT, count); - return count; -} - -static inline u8 tpm_read_access(int locality) -{ - u8 value = readb(TIS_REG(locality, TIS_REG_ACCESS)); - TPM_DEBUG_IO_READ(TIS_REG_ACCESS, value); - return value; -} - -static inline void tpm_write_access(u8 data, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_ACCESS, data); - writeb(data, TIS_REG(locality, TIS_REG_ACCESS)); -} - -static inline u32 tpm_read_did_vid(int locality) -{ - u32 value = readl(TIS_REG(locality, TIS_REG_DID_VID)); - TPM_DEBUG_IO_READ(TIS_REG_DID_VID, value); - return value; -} - -/* - * tis_wait_sts() - * - * Wait for at least a second for a status to change its state to match the - * expected state. Normally the transition happens within microseconds. - * - * @locality - locality - * @mask - bitmask for the bitfield(s) to watch - * @expected - value the field(s) are supposed to be set to - * - * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. - */ -static int tis_wait_sts(int locality, u8 mask, u8 expected) -{ - u32 time_us = MAX_DELAY_US; - while (time_us > 0) { - u8 value = tpm_read_status(locality); - if ((value & mask) == expected) - return 0; - udelay(1); /* 1 us */ - time_us--; - } - return TPM_TIMEOUT_ERR; -} - -static inline int tis_wait_ready(int locality) -{ - return tis_wait_sts(locality, TIS_STS_COMMAND_READY, - TIS_STS_COMMAND_READY); -} - -static inline int tis_wait_valid(int locality) -{ - return tis_wait_sts(locality, TIS_STS_VALID, TIS_STS_VALID); -} - -static inline int tis_wait_valid_data(int locality) -{ - const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; - return tis_wait_sts(locality, has_data, has_data); -} - -static inline int tis_has_valid_data(int locality) -{ - const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; - return (tpm_read_status(locality) & has_data) == has_data; -} - -static inline int tis_expect_data(int locality) -{ - return !!(tpm_read_status(locality) & TIS_STS_EXPECT); -} - -/* - * tis_wait_access() - * - * Wait for at least a second for a access to change its state to match the - * expected state. Normally the transition happens within microseconds. - * - * @locality - locality - * @mask - bitmask for the bitfield(s) to watch - * @expected - value the field(s) are supposed to be set to - * - * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. - */ -static int tis_wait_access(int locality, u8 mask, u8 expected) -{ - u32 time_us = MAX_DELAY_US; - while (time_us > 0) { - u8 value = tpm_read_access(locality); - if ((value & mask) == expected) - return 0; - udelay(1); /* 1 us */ - time_us--; - } - return TPM_TIMEOUT_ERR; -} - -static inline int tis_wait_dropped_access(int locality) -{ - return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, 0); -} - -static inline int tis_wait_received_access(int locality) -{ - return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, - TIS_ACCESS_ACTIVE_LOCALITY); -} - -static inline int tis_has_access(int locality) -{ - return !!(tpm_read_access(locality) & TIS_ACCESS_ACTIVE_LOCALITY); -} - -static inline void tis_request_access(int locality) -{ - tpm_write_access(TIS_ACCESS_REQUEST_USE, locality); -} - -static inline void tis_drop_access(int locality) -{ - tpm_write_access(TIS_ACCESS_ACTIVE_LOCALITY, locality); -} - -/* - * PC Client Specific TPM Interface Specification section 11.2.12: - * - * Software must be prepared to send two writes of a "1" to command ready - * field: the first to indicate successful read of all the data, thus - * clearing the data from the ReadFIFO and freeing the TPM's resources, - * and the second to indicate to the TPM it is about to send a new command. - * - * In practice not all TPMs behave the same so it is necessary to be - * flexible when trying to set command ready. - * - * Returns 0 on success if the TPM is ready for transactions. - * Returns TPM_TIMEOUT_ERR if the command ready bit does not get set. - */ -static int tis_command_ready(u8 locality) -{ - u32 status; - - /* 1st attempt to set command ready */ - tpm_write_status(TIS_STS_COMMAND_READY, locality); - - /* Wait for response */ - status = tpm_read_status(locality); - - /* Check if command ready is set yet */ - if (status & TIS_STS_COMMAND_READY) - return 0; - - /* 2nd attempt to set command ready */ - tpm_write_status(TIS_STS_COMMAND_READY, locality); - - return tis_wait_ready(locality); -} - -/* - * Probe the TPM device and try determining its manufacturer/device name. - * - * Returns 0 on success (the device is found or was found during an earlier - * invocation) or TPM_DRIVER_ERR if the device is not found. - */ -static u32 tis_probe(void) -{ - const char *device_name = "unknown"; - const char *vendor_name = device_name; - const struct device_name *dev; - u32 didvid; - u16 vid, did; - int i; - - if (car_get_var(vendor_dev_id)) - return 0; /* Already probed. */ - - didvid = tpm_read_did_vid(0); - if (!didvid || (didvid == 0xffffffff)) { - printf("%s: No TPM device found\n", __FUNCTION__); - return TPM_DRIVER_ERR; - } - - car_set_var(vendor_dev_id, didvid); - - vid = didvid & 0xffff; - did = (didvid >> 16) & 0xffff; - for (i = 0; i < ARRAY_SIZE(vendor_names); i++) { - int j = 0; - u16 known_did; - if (vid == vendor_names[i].vendor_id) { - vendor_name = vendor_names[i].vendor_name; - } else { - continue; - } - dev = &vendor_names[i].dev_names[j]; - while ((known_did = dev->dev_id) != 0xffff) { - if (known_did == did) { - device_name = dev->dev_name; - break; - } - j++; - } - break; - } - /* this will have to be converted into debug printout */ - printf("Found TPM %s by %s\n", device_name, vendor_name); - return 0; -} - -/* - * tis_senddata() - * - * send the passed in data to the TPM device. - * - * @data - address of the data to send, byte by byte - * @len - length of the data to send - * - * Returns 0 on success, TPM_DRIVER_ERR on error (in case the device does - * not accept the entire command). - */ -static u32 tis_senddata(const u8 * const data, u32 len) -{ - u32 offset = 0; - u16 burst = 0; - u32 max_cycles = 0; - u8 locality = 0; - - if (tis_wait_ready(locality)) { - printf("%s:%d - failed to get 'command_ready' status\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - burst = tpm_read_burst_count(locality); - - while (1) { - unsigned count; - - /* Wait till the device is ready to accept more data. */ - while (!burst) { - if (max_cycles++ == MAX_DELAY_US) { - printf("%s:%d failed to feed %d bytes of %d\n", - __FILE__, __LINE__, len - offset, len); - return TPM_DRIVER_ERR; - } - udelay(1); - burst = tpm_read_burst_count(locality); - } - - max_cycles = 0; - - /* - * Calculate number of bytes the TPM is ready to accept in one - * shot. - * - * We want to send the last byte outside of the loop (hence - * the -1 below) to make sure that the 'expected' status bit - * changes to zero exactly after the last byte is fed into the - * FIFO. - */ - count = min(burst, len - offset - 1); - while (count--) - tpm_write_data(data[offset++], locality); - - if (tis_wait_valid(locality) || !tis_expect_data(locality)) { - printf("%s:%d TPM command feed overflow\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - burst = tpm_read_burst_count(locality); - if ((offset == (len - 1)) && burst) - /* - * We need to be able to send the last byte to the - * device, so burst size must be nonzero before we - * break out. - */ - break; - } - - /* Send the last byte. */ - tpm_write_data(data[offset++], locality); - - /* - * Verify that TPM does not expect any more data as part of this - * command. - */ - if (tis_wait_valid(locality) || tis_expect_data(locality)) { - printf("%s:%d unexpected TPM status 0x%x\n", - __FILE__, __LINE__, tpm_read_status(locality)); - return TPM_DRIVER_ERR; - } - - /* OK, sitting pretty, let's start the command execution. */ - tpm_write_status(TIS_STS_TPM_GO, locality); - - return 0; -} - -/* - * tis_readresponse() - * - * read the TPM device response after a command was issued. - * - * @buffer - address where to read the response, byte by byte. - * @len - pointer to the size of buffer - * - * On success stores the number of received bytes to len and returns 0. On - * errors (misformatted TPM data or synchronization problems) returns - * TPM_DRIVER_ERR. - */ -static u32 tis_readresponse(u8 *buffer, size_t *len) -{ - u16 burst_count; - u32 offset = 0; - u8 locality = 0; - u32 expected_count = *len; - int max_cycles = 0; - - /* Wait for the TPM to process the command */ - if (tis_wait_valid_data(locality)) { - printf("%s:%d failed processing command\n", __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - do { - while ((burst_count = tpm_read_burst_count(locality)) == 0) { - if (max_cycles++ == MAX_DELAY_US) { - printf("%s:%d TPM stuck on read\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - udelay(1); - } - - max_cycles = 0; - - while (burst_count-- && (offset < expected_count)) { - buffer[offset++] = tpm_read_data(locality); - if (offset == 6) { - /* - * We got the first six bytes of the reply, - * let's figure out how many bytes to expect - * total - it is stored as a 4 byte number in - * network order, starting with offset 2 into - * the body of the reply. - */ - u32 real_length; - memcpy(&real_length, - buffer + 2, - sizeof(real_length)); - expected_count = be32_to_cpu(real_length); - - if ((expected_count < offset) || - (expected_count > *len)) { - printf("%s:%d bad response size %d\n", - __FILE__, __LINE__, - expected_count); - return TPM_DRIVER_ERR; - } - } - } - - /* Wait for the next portion */ - if (tis_wait_valid(locality)) { - printf("%s:%d failed to read response\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - if (offset == expected_count) - break; /* We got all we need */ - - } while (tis_has_valid_data(locality)); - - /* * Make sure we indeed read all there was. */ - if (tis_has_valid_data(locality)) { - printf("%s:%d wrong receive status: %x %d bytes left\n", - __FILE__, __LINE__, tpm_read_status(locality), - tpm_read_burst_count(locality)); - return TPM_DRIVER_ERR; - } - - /* Tell the TPM that we are done. */ - if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) - return TPM_DRIVER_ERR; - - *len = offset; - return 0; -} - -/* - * tis_init() - * - * Initialize the TPM device. Returns 0 on success or TPM_DRIVER_ERR on - * failure (in case device probing did not succeed). - */ -int tis_init(void) -{ - if (tis_probe()) - return TPM_DRIVER_ERR; - return 0; -} - -/* - * tis_open() - * - * Requests access to locality 0 for the caller. After all commands have been - * completed the caller is supposed to call tis_close(). - * - * Returns 0 on success, TPM_DRIVER_ERR on failure. - */ -int tis_open(void) -{ - u8 locality = 0; /* we use locality zero for everything */ - - if (tis_close()) - return TPM_DRIVER_ERR; - - /* now request access to locality */ - tis_request_access(locality); - - /* did we get a lock? */ - if (tis_wait_received_access(locality)) { - printf("%s:%d - failed to lock locality %d\n", - __FILE__, __LINE__, locality); - return TPM_DRIVER_ERR; - } - - /* Certain TPMs seem to need some delay here or they hang... */ - udelay(10); - - if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) - return TPM_DRIVER_ERR; - - return 0; -} - -/* - * tis_close() - * - * terminate the current session with the TPM by releasing the locked - * locality. Returns 0 on success of TPM_DRIVER_ERR on failure (in case lock - * removal did not succeed). - */ -int tis_close(void) -{ - u8 locality = 0; - if (tis_has_access(locality)) { - tis_drop_access(locality); - if (tis_wait_dropped_access(locality)) { - printf("%s:%d - failed to release locality %d\n", - __FILE__, __LINE__, locality); - return TPM_DRIVER_ERR; - } - } - return 0; -} - -/* - * tis_sendrecv() - * - * Send the requested data to the TPM and then try to get its response - * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at recv_len) - * or TPM_DRIVER_ERR on failure. - */ -int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, - uint8_t *recvbuf, size_t *recv_len) -{ - if (tis_senddata(sendbuf, send_size)) { - printf("%s:%d failed sending data to TPM\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - return tis_readresponse(recvbuf, recv_len); -} diff --git a/src/drivers/tpm/Kconfig b/src/drivers/tpm/Kconfig new file mode 100644 index 0000000..d5a9236 --- /dev/null +++ b/src/drivers/tpm/Kconfig @@ -0,0 +1,16 @@ +config TPM + bool "Initialise TPM hardware" + default n + help + Enable this option to enable TPM support in coreboot. + + If unsure, say N. + +config NO_TPM_RESUME + bool + default n + depends on TPM + help + On some boards the TPM stays powered up in S3. On those + boards, booting Windows will break if the TPM resume command + is sent during an S3 resume. diff --git a/src/drivers/tpm/Makefile.inc b/src/drivers/tpm/Makefile.inc new file mode 100644 index 0000000..774b65c --- /dev/null +++ b/src/drivers/tpm/Makefile.inc @@ -0,0 +1,8 @@ +romstage-y += tpm.c +romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vboot.c + +ifeq ($(MOCK_TPM),1) +CFLAGS_common += -DMOCK_TPM=1 +else +CFLAGS_common += -DMOCK_TPM=0 +endif diff --git a/src/drivers/tpm/tpm.c b/src/drivers/tpm/tpm.c new file mode 100644 index 0000000..ea3b5f3 --- /dev/null +++ b/src/drivers/tpm/tpm.c @@ -0,0 +1,677 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * The code in this file has been heavily based on the article "Writing a TPM + * Device Driver" published on http://ptgmedia.pearsoncmg.com and the + * submission by Stefan Berger on Qemu-devel mailing list. + * + * One principal difference is that in the simplest config the other than 0 + * TPM localities do not get mapped by some devices (for instance, by + * Infineon slb9635), so this driver provides access to locality 0 only. + */ + +#include <stdlib.h> +#include <string.h> +#include <delay.h> +#include <arch/io.h> +#include <arch/byteorder.h> +#include <console/console.h> +#include <tpm.h> +#include <arch/early_variables.h> + +#define PREFIX "lpc_tpm: " + +/* coreboot wrapper for TPM driver (start) */ +#define TPM_DEBUG(fmt, args...) \ + if (CONFIG_DEBUG_TPM) { \ + printk(BIOS_DEBUG, PREFIX); \ + printk(BIOS_DEBUG, fmt , ##args); \ + } +#define TPM_DEBUG_IO_READ(reg_, val_) \ + TPM_DEBUG("Read reg 0x%x returns 0x%x\n", (reg_), (val_)) +#define TPM_DEBUG_IO_WRITE(reg_, val_) \ + TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) +#define printf(x...) printk(BIOS_ERR, x) + +#define min(a,b) MIN(a,b) +#define max(a,b) MAX(a,b) +#define readb(_a) (*(volatile unsigned char *) (_a)) +#define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v)) +#define readl(_a) (*(volatile unsigned long *) (_a)) +#define writel(_v, _a) (*(volatile unsigned long *) (_a) = (_v)) +/* coreboot wrapper for TPM driver (end) */ + +#ifndef CONFIG_TPM_TIS_BASE_ADDRESS +/* Base TPM address standard for x86 systems */ +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 +#endif + +/* the macro accepts the locality value, but only locality 0 is operational */ +#define TIS_REG(LOCALITY, REG) \ + (void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG) + +/* hardware registers' offsets */ +#define TIS_REG_ACCESS 0x0 +#define TIS_REG_INT_ENABLE 0x8 +#define TIS_REG_INT_VECTOR 0xc +#define TIS_REG_INT_STATUS 0x10 +#define TIS_REG_INTF_CAPABILITY 0x14 +#define TIS_REG_STS 0x18 +#define TIS_REG_BURST_COUNT 0x19 +#define TIS_REG_DATA_FIFO 0x24 +#define TIS_REG_DID_VID 0xf00 +#define TIS_REG_RID 0xf04 + +/* Some registers' bit field definitions */ +#define TIS_STS_VALID (1 << 7) /* 0x80 */ +#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */ +#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */ +#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */ +#define TIS_STS_EXPECT (1 << 3) /* 0x08 */ +#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */ + +#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */ +#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */ +#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */ +#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */ +#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */ +#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */ +#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */ + +/* + * Error value returned if a tpm register does not enter the expected state + * after continuous polling. No actual TPM register reading ever returns ~0, + * so this value is a safe error indication to be mixed with possible status + * register values. + */ +#define TPM_TIMEOUT_ERR (~0) + +/* Error value returned on various TPM driver errors */ +#define TPM_DRIVER_ERR (~0) + + /* 1 second is plenty for anything TPM does.*/ +#define MAX_DELAY_US (1000 * 1000) + +/* + * Structures defined below allow creating descriptions of TPM vendor/device + * ID information for run time discovery. The only device the system knows + * about at this time is Infineon slb9635 + */ +struct device_name { + u16 dev_id; + const char * const dev_name; +}; + +struct vendor_name { + u16 vendor_id; + const char * vendor_name; + const struct device_name* dev_names; +}; + +static const struct device_name atmel_devices[] = { + {0x3204, "AT97SC3204"}, + {0xffff} +}; + +static const struct device_name infineon_devices[] = { + {0x000b, "SLB9635 TT 1.2"}, + {0xffff} +}; + +static const struct device_name nuvoton_devices[] = { + {0x00fe, "NPCT420AA V2"}, + {0xffff} +}; + +static const struct device_name stmicro_devices[] = { + {0x0000, "ST33ZP24" }, + {0xffff} +}; + +static const struct vendor_name vendor_names[] = { + {0x1114, "Atmel", atmel_devices}, + {0x15d1, "Infineon", infineon_devices}, + {0x1050, "Nuvoton", nuvoton_devices}, + {0x104a, "ST Microelectronics", stmicro_devices}, +}; + +/* + * Cached vendor/device ID pair to indicate that the device has been already + * discovered + */ +static u32 vendor_dev_id CAR_GLOBAL; + +static inline u8 tpm_read_status(int locality) +{ + u8 value = readb(TIS_REG(locality, TIS_REG_STS)); + TPM_DEBUG_IO_READ(TIS_REG_STS, value); + return value; +} + +static inline void tpm_write_status(u8 sts, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_STS, sts); + writeb(sts, TIS_REG(locality, TIS_REG_STS)); +} + +static inline u8 tpm_read_data(int locality) +{ + u8 value = readb(TIS_REG(locality, TIS_REG_DATA_FIFO)); + TPM_DEBUG_IO_READ(TIS_REG_DATA_FIFO, value); + return value; +} + +static inline void tpm_write_data(u8 data, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_STS, data); + writeb(data, TIS_REG(locality, TIS_REG_DATA_FIFO)); +} + +static inline u16 tpm_read_burst_count(int locality) +{ + u16 count; + count = readb(TIS_REG(locality, TIS_REG_BURST_COUNT)); + count |= readb(TIS_REG(locality, TIS_REG_BURST_COUNT + 1)) << 8; + TPM_DEBUG_IO_READ(TIS_REG_BURST_COUNT, count); + return count; +} + +static inline u8 tpm_read_access(int locality) +{ + u8 value = readb(TIS_REG(locality, TIS_REG_ACCESS)); + TPM_DEBUG_IO_READ(TIS_REG_ACCESS, value); + return value; +} + +static inline void tpm_write_access(u8 data, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_ACCESS, data); + writeb(data, TIS_REG(locality, TIS_REG_ACCESS)); +} + +static inline u32 tpm_read_did_vid(int locality) +{ + u32 value = readl(TIS_REG(locality, TIS_REG_DID_VID)); + TPM_DEBUG_IO_READ(TIS_REG_DID_VID, value); + return value; +} + +/* + * tis_wait_sts() + * + * Wait for at least a second for a status to change its state to match the + * expected state. Normally the transition happens within microseconds. + * + * @locality - locality + * @mask - bitmask for the bitfield(s) to watch + * @expected - value the field(s) are supposed to be set to + * + * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. + */ +static int tis_wait_sts(int locality, u8 mask, u8 expected) +{ + u32 time_us = MAX_DELAY_US; + while (time_us > 0) { + u8 value = tpm_read_status(locality); + if ((value & mask) == expected) + return 0; + udelay(1); /* 1 us */ + time_us--; + } + return TPM_TIMEOUT_ERR; +} + +static inline int tis_wait_ready(int locality) +{ + return tis_wait_sts(locality, TIS_STS_COMMAND_READY, + TIS_STS_COMMAND_READY); +} + +static inline int tis_wait_valid(int locality) +{ + return tis_wait_sts(locality, TIS_STS_VALID, TIS_STS_VALID); +} + +static inline int tis_wait_valid_data(int locality) +{ + const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; + return tis_wait_sts(locality, has_data, has_data); +} + +static inline int tis_has_valid_data(int locality) +{ + const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; + return (tpm_read_status(locality) & has_data) == has_data; +} + +static inline int tis_expect_data(int locality) +{ + return !!(tpm_read_status(locality) & TIS_STS_EXPECT); +} + +/* + * tis_wait_access() + * + * Wait for at least a second for a access to change its state to match the + * expected state. Normally the transition happens within microseconds. + * + * @locality - locality + * @mask - bitmask for the bitfield(s) to watch + * @expected - value the field(s) are supposed to be set to + * + * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. + */ +static int tis_wait_access(int locality, u8 mask, u8 expected) +{ + u32 time_us = MAX_DELAY_US; + while (time_us > 0) { + u8 value = tpm_read_access(locality); + if ((value & mask) == expected) + return 0; + udelay(1); /* 1 us */ + time_us--; + } + return TPM_TIMEOUT_ERR; +} + +static inline int tis_wait_dropped_access(int locality) +{ + return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, 0); +} + +static inline int tis_wait_received_access(int locality) +{ + return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, + TIS_ACCESS_ACTIVE_LOCALITY); +} + +static inline int tis_has_access(int locality) +{ + return !!(tpm_read_access(locality) & TIS_ACCESS_ACTIVE_LOCALITY); +} + +static inline void tis_request_access(int locality) +{ + tpm_write_access(TIS_ACCESS_REQUEST_USE, locality); +} + +static inline void tis_drop_access(int locality) +{ + tpm_write_access(TIS_ACCESS_ACTIVE_LOCALITY, locality); +} + +/* + * PC Client Specific TPM Interface Specification section 11.2.12: + * + * Software must be prepared to send two writes of a "1" to command ready + * field: the first to indicate successful read of all the data, thus + * clearing the data from the ReadFIFO and freeing the TPM's resources, + * and the second to indicate to the TPM it is about to send a new command. + * + * In practice not all TPMs behave the same so it is necessary to be + * flexible when trying to set command ready. + * + * Returns 0 on success if the TPM is ready for transactions. + * Returns TPM_TIMEOUT_ERR if the command ready bit does not get set. + */ +static int tis_command_ready(u8 locality) +{ + u32 status; + + /* 1st attempt to set command ready */ + tpm_write_status(TIS_STS_COMMAND_READY, locality); + + /* Wait for response */ + status = tpm_read_status(locality); + + /* Check if command ready is set yet */ + if (status & TIS_STS_COMMAND_READY) + return 0; + + /* 2nd attempt to set command ready */ + tpm_write_status(TIS_STS_COMMAND_READY, locality); + + return tis_wait_ready(locality); +} + +/* + * Probe the TPM device and try determining its manufacturer/device name. + * + * Returns 0 on success (the device is found or was found during an earlier + * invocation) or TPM_DRIVER_ERR if the device is not found. + */ +static u32 tis_probe(void) +{ + const char *device_name = "unknown"; + const char *vendor_name = device_name; + const struct device_name *dev; + u32 didvid; + u16 vid, did; + int i; + + if (car_get_var(vendor_dev_id)) + return 0; /* Already probed. */ + + didvid = tpm_read_did_vid(0); + if (!didvid || (didvid == 0xffffffff)) { + printf("%s: No TPM device found\n", __FUNCTION__); + return TPM_DRIVER_ERR; + } + + car_set_var(vendor_dev_id, didvid); + + vid = didvid & 0xffff; + did = (didvid >> 16) & 0xffff; + for (i = 0; i < ARRAY_SIZE(vendor_names); i++) { + int j = 0; + u16 known_did; + if (vid == vendor_names[i].vendor_id) { + vendor_name = vendor_names[i].vendor_name; + } else { + continue; + } + dev = &vendor_names[i].dev_names[j]; + while ((known_did = dev->dev_id) != 0xffff) { + if (known_did == did) { + device_name = dev->dev_name; + break; + } + j++; + } + break; + } + /* this will have to be converted into debug printout */ + printf("Found TPM %s by %s\n", device_name, vendor_name); + return 0; +} + +/* + * tis_senddata() + * + * send the passed in data to the TPM device. + * + * @data - address of the data to send, byte by byte + * @len - length of the data to send + * + * Returns 0 on success, TPM_DRIVER_ERR on error (in case the device does + * not accept the entire command). + */ +static u32 tis_senddata(const u8 * const data, u32 len) +{ + u32 offset = 0; + u16 burst = 0; + u32 max_cycles = 0; + u8 locality = 0; + + if (tis_wait_ready(locality)) { + printf("%s:%d - failed to get 'command_ready' status\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + burst = tpm_read_burst_count(locality); + + while (1) { + unsigned count; + + /* Wait till the device is ready to accept more data. */ + while (!burst) { + if (max_cycles++ == MAX_DELAY_US) { + printf("%s:%d failed to feed %d bytes of %d\n", + __FILE__, __LINE__, len - offset, len); + return TPM_DRIVER_ERR; + } + udelay(1); + burst = tpm_read_burst_count(locality); + } + + max_cycles = 0; + + /* + * Calculate number of bytes the TPM is ready to accept in one + * shot. + * + * We want to send the last byte outside of the loop (hence + * the -1 below) to make sure that the 'expected' status bit + * changes to zero exactly after the last byte is fed into the + * FIFO. + */ + count = min(burst, len - offset - 1); + while (count--) + tpm_write_data(data[offset++], locality); + + if (tis_wait_valid(locality) || !tis_expect_data(locality)) { + printf("%s:%d TPM command feed overflow\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + burst = tpm_read_burst_count(locality); + if ((offset == (len - 1)) && burst) + /* + * We need to be able to send the last byte to the + * device, so burst size must be nonzero before we + * break out. + */ + break; + } + + /* Send the last byte. */ + tpm_write_data(data[offset++], locality); + + /* + * Verify that TPM does not expect any more data as part of this + * command. + */ + if (tis_wait_valid(locality) || tis_expect_data(locality)) { + printf("%s:%d unexpected TPM status 0x%x\n", + __FILE__, __LINE__, tpm_read_status(locality)); + return TPM_DRIVER_ERR; + } + + /* OK, sitting pretty, let's start the command execution. */ + tpm_write_status(TIS_STS_TPM_GO, locality); + + return 0; +} + +/* + * tis_readresponse() + * + * read the TPM device response after a command was issued. + * + * @buffer - address where to read the response, byte by byte. + * @len - pointer to the size of buffer + * + * On success stores the number of received bytes to len and returns 0. On + * errors (misformatted TPM data or synchronization problems) returns + * TPM_DRIVER_ERR. + */ +static u32 tis_readresponse(u8 *buffer, size_t *len) +{ + u16 burst_count; + u32 offset = 0; + u8 locality = 0; + u32 expected_count = *len; + int max_cycles = 0; + + /* Wait for the TPM to process the command */ + if (tis_wait_valid_data(locality)) { + printf("%s:%d failed processing command\n", __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + do { + while ((burst_count = tpm_read_burst_count(locality)) == 0) { + if (max_cycles++ == MAX_DELAY_US) { + printf("%s:%d TPM stuck on read\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + udelay(1); + } + + max_cycles = 0; + + while (burst_count-- && (offset < expected_count)) { + buffer[offset++] = tpm_read_data(locality); + if (offset == 6) { + /* + * We got the first six bytes of the reply, + * let's figure out how many bytes to expect + * total - it is stored as a 4 byte number in + * network order, starting with offset 2 into + * the body of the reply. + */ + u32 real_length; + memcpy(&real_length, + buffer + 2, + sizeof(real_length)); + expected_count = be32_to_cpu(real_length); + + if ((expected_count < offset) || + (expected_count > *len)) { + printf("%s:%d bad response size %d\n", + __FILE__, __LINE__, + expected_count); + return TPM_DRIVER_ERR; + } + } + } + + /* Wait for the next portion */ + if (tis_wait_valid(locality)) { + printf("%s:%d failed to read response\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + if (offset == expected_count) + break; /* We got all we need */ + + } while (tis_has_valid_data(locality)); + + /* * Make sure we indeed read all there was. */ + if (tis_has_valid_data(locality)) { + printf("%s:%d wrong receive status: %x %d bytes left\n", + __FILE__, __LINE__, tpm_read_status(locality), + tpm_read_burst_count(locality)); + return TPM_DRIVER_ERR; + } + + /* Tell the TPM that we are done. */ + if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) + return TPM_DRIVER_ERR; + + *len = offset; + return 0; +} + +/* + * tis_init() + * + * Initialize the TPM device. Returns 0 on success or TPM_DRIVER_ERR on + * failure (in case device probing did not succeed). + */ +int tis_init(void) +{ + if (tis_probe()) + return TPM_DRIVER_ERR; + return 0; +} + +/* + * tis_open() + * + * Requests access to locality 0 for the caller. After all commands have been + * completed the caller is supposed to call tis_close(). + * + * Returns 0 on success, TPM_DRIVER_ERR on failure. + */ +int tis_open(void) +{ + u8 locality = 0; /* we use locality zero for everything */ + + if (tis_close()) + return TPM_DRIVER_ERR; + + /* now request access to locality */ + tis_request_access(locality); + + /* did we get a lock? */ + if (tis_wait_received_access(locality)) { + printf("%s:%d - failed to lock locality %d\n", + __FILE__, __LINE__, locality); + return TPM_DRIVER_ERR; + } + + /* Certain TPMs seem to need some delay here or they hang... */ + udelay(10); + + if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) + return TPM_DRIVER_ERR; + + return 0; +} + +/* + * tis_close() + * + * terminate the current session with the TPM by releasing the locked + * locality. Returns 0 on success of TPM_DRIVER_ERR on failure (in case lock + * removal did not succeed). + */ +int tis_close(void) +{ + u8 locality = 0; + if (tis_has_access(locality)) { + tis_drop_access(locality); + if (tis_wait_dropped_access(locality)) { + printf("%s:%d - failed to release locality %d\n", + __FILE__, __LINE__, locality); + return TPM_DRIVER_ERR; + } + } + return 0; +} + +/* + * tis_sendrecv() + * + * Send the requested data to the TPM and then try to get its response + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or TPM_DRIVER_ERR on failure. + */ +int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, + uint8_t *recvbuf, size_t *recv_len) +{ + if (tis_senddata(sendbuf, send_size)) { + printf("%s:%d failed sending data to TPM\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + return tis_readresponse(recvbuf, recv_len); +} diff --git a/src/drivers/tpm/vboot.c b/src/drivers/tpm/vboot.c new file mode 100644 index 0000000..1622332 --- /dev/null +++ b/src/drivers/tpm/vboot.c @@ -0,0 +1,221 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <console/console.h> +#include <arch/acpi.h> +#include <tpm.h> +#include <reset.h> + +//#define EXTRA_LOGGING + +#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ + +#define TPM_SUCCESS ((u32)0x00000000) + +#define TPM_E_IOERROR ((u32)0x0000001f) +#define TPM_E_COMMUNICATION_ERROR ((u32)0x00005004) +#define TPM_E_NON_FATAL ((u32)0x00000800) +#define TPM_E_INVALID_POSTINIT ((u32)0x00000026) + +#define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1)) +#define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2)) + +static const struct { + u8 buffer[12]; +} tpm_resume_cmd = { + { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x2 } +}; + +static const struct { + u8 buffer[12]; +} tpm_startup_cmd = { + {0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1 } +}; + +static const struct { + u8 buffer[10]; +} tpm_continueselftest_cmd = { + { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53 } +}; + +static inline void FromTpmUint32(const u8 * buffer, u32 * x) +{ + *x = ((buffer[0] << 24) | + (buffer[1] << 16) | (buffer[2] << 8) | buffer[3]); +} + +static inline int TpmCommandSize(const u8 * buffer) +{ + u32 size; + FromTpmUint32(buffer + sizeof(u16), &size); + return (int)size; +} + +/* Gets the code field of a TPM command. */ +static inline int TpmCommandCode(const u8 * buffer) +{ + u32 code; + FromTpmUint32(buffer + sizeof(u16) + sizeof(u32), &code); + return code; +} + +/* Gets the return code field of a TPM result. */ +static inline int TpmReturnCode(const u8 * buffer) +{ + return TpmCommandCode(buffer); +} + +/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or + * DOING_SELFTEST errors are returned. + */ +static u32 TlclSendReceiveNoRetry(const u8 * request, + u8 * response, int max_length) +{ + size_t response_length = max_length; + u32 result; + +#ifdef EXTRA_LOGGING + printk(BIOS_DEBUG, "TPM: command: %x%x %x%x%x%x %x%x%x%x\n", + request[0], request[1], + request[2], request[3], request[4], request[5], + request[6], request[7], request[8], request[9]); +#endif + + result = TPM_SUCCESS; + if (tis_sendrecv + (request, TpmCommandSize(request), response, &response_length)) + result = TPM_E_IOERROR; + + if (0 != result) { + /* Communication with TPM failed, so response is garbage */ + printk(BIOS_DEBUG, + "TPM: command 0x%x send/receive failed: 0x%x\n", + TpmCommandCode(request), result); + return TPM_E_COMMUNICATION_ERROR; + } + /* Otherwise, use the result code from the response */ + result = TpmReturnCode(response); + +/* TODO: add paranoia about returned response_length vs. max_length + * (and possibly expected length from the response header). See + * crosbug.com/17017 */ + +#ifdef EXTRA_LOGGING + printk(BIOS_DEBUG, "TPM: response: %x%x %x%x%x%x %x%x%x%x\n", + response[0], response[1], + response[2], response[3], response[4], response[5], + response[6], response[7], response[8], response[9]); +#endif + + printk(BIOS_DEBUG, "TPM: command 0x%x returned 0x%x\n", + TpmCommandCode(request), result); + + return result; +} + +static inline u32 TlclContinueSelfTest(void) +{ + u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + printk(BIOS_DEBUG, "TPM: Continue self test\n"); + /* Call the No Retry version of SendReceive to avoid recursion. */ + return TlclSendReceiveNoRetry(tpm_continueselftest_cmd.buffer, + response, sizeof(response)); +} + +/* Sends a TPM command and gets a response. Returns 0 if success or the TPM + * error code if error. In the firmware, waits for the self test to complete + * if needed. In the host, reports the first error without retries. */ +static u32 TlclSendReceive(const u8 * request, u8 * response, int max_length) +{ + u32 result = TlclSendReceiveNoRetry(request, response, max_length); + /* When compiling for the firmware, hide command failures due to the self + * test not having run or completed. */ + /* If the command fails because the self test has not completed, try it + * again after attempting to ensure that the self test has completed. */ + if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { + result = TlclContinueSelfTest(); + if (result != TPM_SUCCESS) { + return result; + } +#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) + /* Retry only once */ + result = TlclSendReceiveNoRetry(request, response, max_length); +#else + /* This needs serious testing. The TPM specification says: + * "iii. The caller MUST wait for the actions of + * TPM_ContinueSelfTest to complete before reissuing the + * command C1." But, if ContinueSelfTest is non-blocking, how + * do we know that the actions have completed other than trying + * again? */ + do { + result = + TlclSendReceiveNoRetry(request, response, + max_length); + } while (result == TPM_E_DOING_SELFTEST); +#endif + } + + return result; +} + +void init_vboot(int bootmode) +{ + u32 result; + u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + + printk(BIOS_DEBUG, "Verified boot TPM initialization.\n"); + + printk(BIOS_SPEW, "TPM: Init\n"); + if (tis_init()) + return; + + printk(BIOS_SPEW, "TPM: Open\n"); + if (tis_open()) + return; + + + if (bootmode == 2) { + /* S3 Resume */ + printk(BIOS_SPEW, "TPM: Resume\n"); + result = TlclSendReceive(tpm_resume_cmd.buffer, + response, sizeof(response)); + if (result == TPM_E_INVALID_POSTINIT) { + /* We're on a platform where the TPM maintains power + * in S3, so it's already initialized. + */ + printk(BIOS_DEBUG, "TPM: Already initialized.\n"); + return; + } + } else { + printk(BIOS_SPEW, "TPM: Startup\n"); + result = TlclSendReceive(tpm_startup_cmd.buffer, + response, sizeof(response)); + } + + if (result == TPM_SUCCESS) { + printk(BIOS_SPEW, "TPM: OK.\n"); + return; + } + +#if !MOCK_TPM + printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result); + hard_reset(); +#endif +} diff --git a/src/include/bootmode.h b/src/include/bootmode.h index 323668b..63b5abc 100644 --- a/src/include/bootmode.h +++ b/src/include/bootmode.h @@ -37,4 +37,5 @@ static inline int recovery_mode_enabled(void) { return 0; } static inline int developer_mode_enabled(void) { return 0; } #endif +void init_trusted_platform(int bootmode); #endif /* __BOOTMODE_H__ */ diff --git a/src/include/pc80/tpm.h b/src/include/pc80/tpm.h deleted file mode 100644 index 2eff15a..0000000 --- a/src/include/pc80/tpm.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef TPM_H_ -#define TPM_H_ - -int tis_init(void); -int tis_open(void); -int tis_close(void); -int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, - size_t *recv_len); - -#endif /* TPM_H_ */ diff --git a/src/include/tpm.h b/src/include/tpm.h new file mode 100644 index 0000000..d23b076 --- /dev/null +++ b/src/include/tpm.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef TPM_H_ +#define TPM_H_ + +#include <stddef.h> + +int tis_init(void); +int tis_open(void); +int tis_close(void); +int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, + size_t *recv_len); + +void init_vboot(int bootmode); + +#endif /* TPM_H_ */ diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c index 9818490..4d44df0 100644 --- a/src/lib/bootmode.c +++ b/src/lib/bootmode.c @@ -18,7 +18,9 @@ */ #include <rules.h> +#include <console/console.h> #include <bootmode.h> +#include <tpm.h> #if CONFIG_CHROMEOS || CONFIG_VBOOT_VERIFY_FIRMWARE #include <vendorcode/google/chromeos/chromeos.h> #endif @@ -78,3 +80,26 @@ void gfx_set_init_done(int done) gfx_init_done = done; } #endif + +#if ENV_ROMSTAGE +void init_trusted_platform(int bootmode) +{ + /* With CONFIG_CHROMEOS, u-boot does TPM init on power-on. + * Doing TPM startup when we're not coming in on the S3 resume path + * saves us roughly 20ms in boot time only. This does not seem to + * be worth an API change to vboot_reference-firmware right now, so + * just bail out early: + */ + if (IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE) && (bootmode != 2)) + return; + + /* On some boards the TPM stays powered up in S3. */ + if (IS_ENABLED(CONFIG_NO_TPM_RESUME) && (bootmode == 2)) + return; + + if (IS_ENABLED(CONFIG_TPM)) + init_vboot(bootmode); + else + printk(BIOS_DEBUG, "TPM: support not enabled in build.\n"); +} +#endif diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index d32f3f0..0b2f5c9 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -38,9 +38,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #include <cbfs.h> static void pch_enable_lpc(void) @@ -273,8 +271,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 66d2067..f4fd09e 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -40,9 +40,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #include <cbfs.h> #include <southbridge/intel/bd82x6x/chip.h> @@ -317,8 +315,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 361c19b..7cf1055 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -38,9 +38,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #include <cbfs.h> #include "ec/compal/ene932/ec.h" @@ -273,8 +271,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index f53c07d..011ff7d 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -39,9 +39,6 @@ #include <cpu/x86/msr.h> #include "gpio.h" #include <bootmode.h> -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif #include <cbfs.h> #include <ec/quanta/it8518/ec.h> #include "ec.h" @@ -327,8 +324,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 9308e96..93c02de 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -38,9 +38,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #define SIO_PORT 0x164e @@ -325,8 +323,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index ef5a836..1882efe 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -45,9 +45,6 @@ #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif static void pch_enable_lpc(void) { @@ -345,8 +342,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 8d2a3e4..6e7b05e 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -45,9 +45,6 @@ #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif /* Stumpy USB Reset Disable defined in cmos.layout */ #if CONFIG_USE_OPTION_TABLE @@ -352,8 +349,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 8436c65..0513b06 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -32,7 +32,7 @@ #include <ramstage_cache.h> #include <romstage_handoff.h> #include <timestamp.h> -#include <vendorcode/google/chromeos/chromeos.h> +#include <bootmode.h> #include <baytrail/gpio.h> #include <baytrail/iomap.h> #include <baytrail/lpc.h> @@ -190,15 +190,9 @@ static int chipset_prev_sleep_state(void) return prev_sleep_state; } -#if CONFIG_CHROMEOS static inline void chromeos_init(int prev_sleep_state) { - /* Normalize the sleep state to what init_chromeos() wants for S3: 2. */ - init_chromeos(prev_sleep_state == 3 ? 2 : 0); } -#else -static inline void chromeos_init(int prev_sleep_state) {} -#endif /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) @@ -227,7 +221,10 @@ void romstage_common(struct romstage_params *params) else printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - chromeos_init(prev_sleep_state); + /* Normalize the sleep state to what init_trusted_platform() + * wants for S3: 2. + */ + init_trusted_platform(prev_sleep_state == 3 ? 2 : 0); /* Save timestamp information. */ timestamp_init(ts64_to_tsc(params->ts.times[0])); diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index a1a9d9a..6c074c7 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -124,13 +124,5 @@ config VBOOT_REFCODE_INDEX This is the index of the reference code component in the verified firmware block. -config NO_TPM_RESUME - bool - default n - help - On some boards the TPM stays powered up in S3. On those - boards, booting Windows will break if the TPM resume command - is sent during an S3 resume. - endif endmenu diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 2dcb03a..5fd595e 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -21,19 +21,12 @@ romstage-y += chromeos.c ramstage-y += chromeos.c romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vbnv.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += vbnv.c -romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vboot.c ramstage-y += gnvs.c romstage-y += fmap.c ramstage-y += fmap.c ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c smm-y += fmap.c -ifeq ($(MOCK_TPM),1) -CFLAGS_common += -DMOCK_TPM=1 -else -CFLAGS_common += -DMOCK_TPM=0 -endif - ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index dc34dc3..ce884b1 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -31,9 +31,6 @@ int vboot_wants_oprom(void); void read_vbnv(uint8_t *vbnv_copy); void save_vbnv(const uint8_t *vbnv_copy); -/* functions implemented in vboot.c */ -void init_chromeos(int bootmode); - #if CONFIG_VBOOT_VERIFY_FIRMWARE /* Returns 0 on success < 0 on error. */ int vboot_get_handoff_info(void **addr, uint32_t *size); diff --git a/src/vendorcode/google/chromeos/vboot.c b/src/vendorcode/google/chromeos/vboot.c deleted file mode 100644 index 03d759c..0000000 --- a/src/vendorcode/google/chromeos/vboot.c +++ /dev/null @@ -1,244 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <types.h> -#include <console/console.h> -#include <arch/acpi.h> -#include <pc80/tpm.h> -#include <reset.h> -#include "chromeos.h" - -//#define EXTRA_LOGGING -#define UBOOT_DOES_TPM_STARTUP - -#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ - -#define TPM_SUCCESS ((u32)0x00000000) - -#define TPM_E_IOERROR ((u32)0x0000001f) -#define TPM_E_COMMUNICATION_ERROR ((u32)0x00005004) -#define TPM_E_NON_FATAL ((u32)0x00000800) -#define TPM_E_INVALID_POSTINIT ((u32)0x00000026) - -#define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1)) -#define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2)) - -#if CONFIG_NO_TPM_RESUME -static void init_vboot(int bootmode) -{ -} -#else -static const struct { - u8 buffer[12]; -} tpm_resume_cmd = { - { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x2 } -}; - -static const struct { - u8 buffer[12]; -} tpm_startup_cmd = { - {0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1 } -}; - -static const struct { - u8 buffer[10]; -} tpm_continueselftest_cmd = { - { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53 } -}; - -static inline void FromTpmUint32(const u8 * buffer, u32 * x) -{ - *x = ((buffer[0] << 24) | - (buffer[1] << 16) | (buffer[2] << 8) | buffer[3]); -} - -static inline int TpmCommandSize(const u8 * buffer) -{ - u32 size; - FromTpmUint32(buffer + sizeof(u16), &size); - return (int)size; -} - -/* Gets the code field of a TPM command. */ -static inline int TpmCommandCode(const u8 * buffer) -{ - u32 code; - FromTpmUint32(buffer + sizeof(u16) + sizeof(u32), &code); - return code; -} - -/* Gets the return code field of a TPM result. */ -static inline int TpmReturnCode(const u8 * buffer) -{ - return TpmCommandCode(buffer); -} - -/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or - * DOING_SELFTEST errors are returned. - */ -static u32 TlclSendReceiveNoRetry(const u8 * request, - u8 * response, int max_length) -{ - size_t response_length = max_length; - u32 result; - -#ifdef EXTRA_LOGGING - printk(BIOS_DEBUG, "TPM: command: %x%x %x%x%x%x %x%x%x%x\n", - request[0], request[1], - request[2], request[3], request[4], request[5], - request[6], request[7], request[8], request[9]); -#endif - - result = TPM_SUCCESS; - if (tis_sendrecv - (request, TpmCommandSize(request), response, &response_length)) - result = TPM_E_IOERROR; - - if (0 != result) { - /* Communication with TPM failed, so response is garbage */ - printk(BIOS_DEBUG, - "TPM: command 0x%x send/receive failed: 0x%x\n", - TpmCommandCode(request), result); - return TPM_E_COMMUNICATION_ERROR; - } - /* Otherwise, use the result code from the response */ - result = TpmReturnCode(response); - -/* TODO: add paranoia about returned response_length vs. max_length - * (and possibly expected length from the response header). See - * crosbug.com/17017 */ - -#ifdef EXTRA_LOGGING - printk(BIOS_DEBUG, "TPM: response: %x%x %x%x%x%x %x%x%x%x\n", - response[0], response[1], - response[2], response[3], response[4], response[5], - response[6], response[7], response[8], response[9]); -#endif - - printk(BIOS_DEBUG, "TPM: command 0x%x returned 0x%x\n", - TpmCommandCode(request), result); - - return result; -} - -static inline u32 TlclContinueSelfTest(void) -{ - u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - printk(BIOS_DEBUG, "TPM: Continue self test\n"); - /* Call the No Retry version of SendReceive to avoid recursion. */ - return TlclSendReceiveNoRetry(tpm_continueselftest_cmd.buffer, - response, sizeof(response)); -} - -/* Sends a TPM command and gets a response. Returns 0 if success or the TPM - * error code if error. In the firmware, waits for the self test to complete - * if needed. In the host, reports the first error without retries. */ -static u32 TlclSendReceive(const u8 * request, u8 * response, int max_length) -{ - u32 result = TlclSendReceiveNoRetry(request, response, max_length); - /* When compiling for the firmware, hide command failures due to the self - * test not having run or completed. */ - /* If the command fails because the self test has not completed, try it - * again after attempting to ensure that the self test has completed. */ - if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { - result = TlclContinueSelfTest(); - if (result != TPM_SUCCESS) { - return result; - } -#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) - /* Retry only once */ - result = TlclSendReceiveNoRetry(request, response, max_length); -#else - /* This needs serious testing. The TPM specification says: - * "iii. The caller MUST wait for the actions of - * TPM_ContinueSelfTest to complete before reissuing the - * command C1." But, if ContinueSelfTest is non-blocking, how - * do we know that the actions have completed other than trying - * again? */ - do { - result = - TlclSendReceiveNoRetry(request, response, - max_length); - } while (result == TPM_E_DOING_SELFTEST); -#endif - } - - return result; -} - -static void init_vboot(int bootmode) -{ - u32 result; - u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - -#ifdef UBOOT_DOES_TPM_STARTUP - /* Doing TPM startup when we're not coming in on the S3 resume path - * saves us roughly 20ms in boot time only. This does not seem to - * be worth an API change to vboot_reference-firmware right now, so - * let's keep the code around, but just bail out early: - */ - if (bootmode != 2) - return; -#endif - - printk(BIOS_DEBUG, "Verified boot TPM initialization.\n"); - - printk(BIOS_SPEW, "TPM: Init\n"); - if (tis_init()) - return; - - printk(BIOS_SPEW, "TPM: Open\n"); - if (tis_open()) - return; - - - if (bootmode == 2) { - /* S3 Resume */ - printk(BIOS_SPEW, "TPM: Resume\n"); - result = TlclSendReceive(tpm_resume_cmd.buffer, - response, sizeof(response)); - if (result == TPM_E_INVALID_POSTINIT) { - /* We're on a platform where the TPM maintains power - * in S3, so it's already initialized. - */ - printk(BIOS_DEBUG, "TPM: Already initialized.\n"); - return; - } - } else { - printk(BIOS_SPEW, "TPM: Startup\n"); - result = TlclSendReceive(tpm_startup_cmd.buffer, - response, sizeof(response)); - } - - if (result == TPM_SUCCESS) { - printk(BIOS_SPEW, "TPM: OK.\n"); - return; - } - -#if !MOCK_TPM - printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result); - hard_reset(); -#endif -} -#endif - -void init_chromeos(int bootmode) -{ - init_vboot(bootmode); -} diff --git a/src/vendorcode/google/chromeos/vboot_loader.c b/src/vendorcode/google/chromeos/vboot_loader.c index 943ad17..2f786ad 100644 --- a/src/vendorcode/google/chromeos/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot_loader.c @@ -24,7 +24,7 @@ #include <cbmem.h> #include <console/console.h> #include <console/vtxprintf.h> -#include <pc80/tpm.h> +#include <tpm.h> #include <reset.h> #include <ramstage_loader.h> #include <romstage_handoff.h>

1 0

Patch set updated for coreboot: 4a9f60a ChromeOS: Rename chromeos.c in vendorcode
by Kyösti Mälkki 09 May '14

09 May '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5645 -gerrit commit 4a9f60a7b8232fc209428b32403a15911d7e268d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Apr 28 23:25:01 2014 +0300 ChromeOS: Rename chromeos.c in vendorcode Rename the file to vboot_handoff.c and compile it conditionally with VBOOT_VERIFY_FIRMWARE. Change-Id: I8b6fd91063b54cb8f5927c6483a398b75e1d262a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/vendorcode/google/chromeos/Makefile.inc | 4 +- src/vendorcode/google/chromeos/chromeos.c | 120 ------------------------- src/vendorcode/google/chromeos/vboot_handoff.c | 115 ++++++++++++++++++++++++ 3 files changed, 117 insertions(+), 122 deletions(-) diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 5fd595e..cc63e06 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -17,8 +17,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-y += chromeos.c -ramstage-y += chromeos.c romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vbnv.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += vbnv.c ramstage-y += gnvs.c @@ -28,6 +26,8 @@ ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c smm-y += fmap.c ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) +romstage-y += vboot_handoff.c +ramstage-y += vboot_handoff.c romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c deleted file mode 100644 index f8dd7dc..0000000 --- a/src/vendorcode/google/chromeos/chromeos.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include "chromeos.h" -#if CONFIG_VBOOT_VERIFY_FIRMWARE -#include "vboot_handoff.h" -#endif -#include <boot/coreboot_tables.h> -#include <cbmem.h> -#include <console/console.h> - -#if CONFIG_VBOOT_VERIFY_FIRMWARE -#include <payload_loader.h> - -int vboot_enable_developer(void) -{ - struct vboot_handoff *vbho; - - vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vbho == NULL) { - printk(BIOS_ERR, "%s: Couldn't find vboot_handoff structure!\n", - __func__); - return 0; - } - - return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_DEVELOPER); -} - -int vboot_enable_recovery(void) -{ - struct vboot_handoff *vbho; - - vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vbho == NULL) - return 0; - - return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_RECOVERY); -} - -static void *vboot_get_payload(size_t *len) -{ - struct vboot_handoff *vboot_handoff; - struct firmware_component *fwc; - - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vboot_handoff == NULL) - return NULL; - - if (CONFIG_VBOOT_BOOT_LOADER_INDEX >= MAX_PARSED_FW_COMPONENTS) { - printk(BIOS_ERR, "Invalid boot loader index: %d\n", - CONFIG_VBOOT_BOOT_LOADER_INDEX); - return NULL; - } - - fwc = &vboot_handoff->components[CONFIG_VBOOT_BOOT_LOADER_INDEX]; - - if (len != NULL) - *len = fwc->size; - - printk(BIOS_DEBUG, "Booting 0x%x byte payload at 0x%08x.\n", - fwc->size, fwc->address); - - return (void *)fwc->address; -} - -static int vboot_locate_payload(struct payload *payload) -{ - void *buffer; - size_t size; - - buffer = vboot_get_payload(&size); - - if (buffer == NULL) - return -1; - - payload->backing_store.data = buffer; - payload->backing_store.size = size; - - return 0; -} - -const struct payload_loader_ops vboot_payload_loader = { - .name = "VBOOT", - .locate = vboot_locate_payload, -}; - -int vboot_get_handoff_info(void **addr, uint32_t *size) -{ - struct vboot_handoff *vboot_handoff; - - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vboot_handoff == NULL) - return -1; - - *addr = vboot_handoff; - *size = sizeof(*vboot_handoff); - return 0; -} -#endif diff --git a/src/vendorcode/google/chromeos/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot_handoff.c new file mode 100644 index 0000000..937b2e3 --- /dev/null +++ b/src/vendorcode/google/chromeos/vboot_handoff.c @@ -0,0 +1,115 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stddef.h> +#include "chromeos.h" +#include <boot/coreboot_tables.h> +#include <cbmem.h> +#include <console/console.h> +#include <payload_loader.h> +#include "vboot_handoff.h" + +int vboot_enable_developer(void) +{ + struct vboot_handoff *vbho; + + vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vbho == NULL) { + printk(BIOS_ERR, "%s: Couldn't find vboot_handoff structure!\n", + __func__); + return 0; + } + + return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_DEVELOPER); +} + +int vboot_enable_recovery(void) +{ + struct vboot_handoff *vbho; + + vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vbho == NULL) + return 0; + + return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_RECOVERY); +} + +static void *vboot_get_payload(size_t *len) +{ + struct vboot_handoff *vboot_handoff; + struct firmware_component *fwc; + + vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vboot_handoff == NULL) + return NULL; + + if (CONFIG_VBOOT_BOOT_LOADER_INDEX >= MAX_PARSED_FW_COMPONENTS) { + printk(BIOS_ERR, "Invalid boot loader index: %d\n", + CONFIG_VBOOT_BOOT_LOADER_INDEX); + return NULL; + } + + fwc = &vboot_handoff->components[CONFIG_VBOOT_BOOT_LOADER_INDEX]; + + if (len != NULL) + *len = fwc->size; + + printk(BIOS_DEBUG, "Booting 0x%x byte payload at 0x%08x.\n", + fwc->size, fwc->address); + + return (void *)fwc->address; +} + +static int vboot_locate_payload(struct payload *payload) +{ + void *buffer; + size_t size; + + buffer = vboot_get_payload(&size); + + if (buffer == NULL) + return -1; + + payload->backing_store.data = buffer; + payload->backing_store.size = size; + + return 0; +} + +const struct payload_loader_ops vboot_payload_loader = { + .name = "VBOOT", + .locate = vboot_locate_payload, +}; + +int vboot_get_handoff_info(void **addr, uint32_t *size) +{ + struct vboot_handoff *vboot_handoff; + + vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vboot_handoff == NULL) + return -1; + + *addr = vboot_handoff; + *size = sizeof(*vboot_handoff); + return 0; +}

1 0

Patch set updated for coreboot: 0a006bd superio/*: Deal with some chip.h special cases
by Edward O'Callaghan 09 May '14

09 May '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5621 -gerrit commit 0a006bd9cee5bd3cf1366c5df7c3e192e3953d3a Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Apr 30 17:17:03 2014 +1000 superio/*: Deal with some chip.h special cases While backing out the empty pc80 keyboard struct we encountered some special cases where chip.h is used for other purposes. Deal with these cases. Change-Id: Ib11a46cfd14d050d5daa213623b9d8a401c06410 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/superio/ite/it8772f/chip.h | 5 +---- src/superio/nsc/pc97307/chip.h | 37 --------------------------------- src/superio/nsc/pc97307/superio.c | 1 - src/superio/nsc/pc97317/chip.h | 38 ---------------------------------- src/superio/nsc/pc97317/superio.c | 1 - src/superio/winbond/w83697hf/chip.h | 2 +- src/superio/winbond/w83697hf/superio.c | 2 +- 7 files changed, 3 insertions(+), 83 deletions(-) diff --git a/src/superio/ite/it8772f/chip.h b/src/superio/ite/it8772f/chip.h index 9c9aaa6..4a1b696 100644 --- a/src/superio/ite/it8772f/chip.h +++ b/src/superio/ite/it8772f/chip.h @@ -22,11 +22,8 @@ #define SUPERIO_ITE_IT8772F_CHIP_H #include <device/device.h> -#include <pc80/keyboard.h> struct superio_ite_it8772f_config { - struct pc_keyboard keyboard; - /* GPIO SimpleIO register values via devicetree.cb */ u8 gpio_set1; u8 gpio_set2; @@ -51,4 +48,4 @@ struct superio_ite_it8772f_config { u8 fan3_enable; }; -#endif +#endif /* SUPERIO_ITE_IT8772F_CHIP_H */ diff --git a/src/superio/nsc/pc97307/chip.h b/src/superio/nsc/pc97307/chip.h deleted file mode 100644 index e0c1330..0000000 --- a/src/superio/nsc/pc97307/chip.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2000 AG Electronics Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef SUPERIO_NSC_PC97307_CHIP_H -#define SUPERIO_NSC_PC97307_CHIP_H - -#ifndef PNP_INDEX_REG -#define PNP_INDEX_REG 0x15C -#endif -#ifndef PNP_DATA_REG -#define PNP_DATA_REG 0x15D -#endif - -#include <pc80/keyboard.h> - -struct superio_nsc_pc97307_config { - - struct pc_keyboard keyboard; -}; -#endif diff --git a/src/superio/nsc/pc97307/superio.c b/src/superio/nsc/pc97307/superio.c index af7ca77..6b15901 100644 --- a/src/superio/nsc/pc97307/superio.c +++ b/src/superio/nsc/pc97307/superio.c @@ -24,7 +24,6 @@ #include <device/pnp.h> #include <stdlib.h> #include <pc80/keyboard.h> -#include "chip.h" /* FIXME */ #include "pc97307.h" static void init(device_t dev) diff --git a/src/superio/nsc/pc97317/chip.h b/src/superio/nsc/pc97317/chip.h deleted file mode 100644 index d896916..0000000 --- a/src/superio/nsc/pc97317/chip.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2000 AG Electronics Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef SUPERIO_NSC_PC97317_CHIP_H -#define SUPERIO_NSC_PC97317_CHIP_H - -#ifndef PNP_INDEX_REG -#define PNP_INDEX_REG 0x15C -#endif -#ifndef PNP_DATA_REG -#define PNP_DATA_REG 0x15D -#endif - -#include <pc80/keyboard.h> - -struct superio_nsc_pc97317_config { - - struct pc_keyboard keyboard; -}; - -#endif diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index 6f39c5d..09c3b5e 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -24,7 +24,6 @@ #include <device/pnp.h> #include <stdlib.h> #include <pc80/keyboard.h> -#include "chip.h" /* FIXME */ #include "pc97317.h" static void init(device_t dev) diff --git a/src/superio/winbond/w83697hf/chip.h b/src/superio/winbond/w83697hf/chip.h index df9ce4b..5ca9b20 100644 --- a/src/superio/winbond/w83697hf/chip.h +++ b/src/superio/winbond/w83697hf/chip.h @@ -27,4 +27,4 @@ struct superio_winbond_w83697hf_config { unsigned int hwmon_fan2_divisor; }; -#endif +#endif /* SUPERIO_WINBOND_W83697HF_CHIP_H */ diff --git a/src/superio/winbond/w83697hf/superio.c b/src/superio/winbond/w83697hf/superio.c index 933da95..9d9742c 100644 --- a/src/superio/winbond/w83697hf/superio.c +++ b/src/superio/winbond/w83697hf/superio.c @@ -28,7 +28,7 @@ #include <pc80/mc146818rtc.h> #include <stdlib.h> #include <pc80/keyboard.h> -#include "chip.h" /* FIXME */ +#include "chip.h" #include "w83697hf.h" static void hwmon_set_fan_divisor(unsigned int base, int num, unsigned int divisor) {

1 0

Patch set updated for coreboot: 1bcfa68 src/drivers/pc80: Remove empty struct keyboard
by Edward O'Callaghan 09 May '14

09 May '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5617 -gerrit commit 1bcfa680f5c099e3cc0f8e45f92acecfa39f95cd Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Apr 30 05:01:52 2014 +1000 src/drivers/pc80: Remove empty struct keyboard This is a empty struct that has propagated through the superio's & ec's but really does nothing. Time to get rid of it before it adds yet more cruft. However, since this touches many superio's at once we do this in stages by first changing the function type to be a pure procedure. Change-Id: Ibc732e676a9d4f0269114acabc92b15771d27ef2 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/drivers/pc80/keyboard.c | 2 +- src/ec/compal/ene932/ec.c | 5 +---- src/ec/google/chromeec/ec_lpc.c | 5 ++--- src/ec/quanta/ene_kb3940q/ec.c | 4 +--- src/ec/quanta/it8518/ec.c | 5 +---- src/include/pc80/keyboard.h | 2 +- src/mainboard/emulation/qemu-i440fx/mainboard.c | 2 +- src/mainboard/emulation/qemu-q35/mainboard.c | 2 +- src/mainboard/lenovo/t530/mainboard.c | 2 +- src/mainboard/lenovo/x201/mainboard.c | 2 +- src/mainboard/lenovo/x230/mainboard.c | 2 +- src/mainboard/packardbell/ms2290/mainboard.c | 2 +- src/mainboard/roda/rk9/mainboard.c | 2 +- src/northbridge/via/cx700/lpc.c | 2 +- src/northbridge/via/vx800/lpc.c | 2 +- src/southbridge/dmp/vortex86ex/southbridge.c | 2 +- src/southbridge/sis/sis966/lpc.c | 16 ++++++++-------- src/southbridge/via/vt8231/vt8231.c | 2 +- src/southbridge/via/vt8235/vt8235.c | 2 +- src/southbridge/via/vt8237r/lpc.c | 2 +- src/superio/fintek/f71863fg/superio.c | 5 ++--- src/superio/fintek/f71869ad/superio.c | 4 +--- src/superio/fintek/f71872/superio.c | 5 ++--- src/superio/fintek/f71889/superio.c | 5 ++--- src/superio/fintek/f81865f/superio.c | 5 ++--- src/superio/ite/it8671f/superio.c | 4 +--- src/superio/ite/it8712f/superio.c | 4 +--- src/superio/ite/it8716f/superio.c | 4 +--- src/superio/ite/it8718f/superio.c | 4 +--- src/superio/ite/it8721f/superio.c | 4 +--- src/superio/ite/it8772f/superio.c | 4 ++-- src/superio/nsc/pc8374/superio.c | 4 +--- src/superio/nsc/pc87309/superio.c | 4 +--- src/superio/nsc/pc87351/superio.c | 4 +--- src/superio/nsc/pc87360/superio.c | 4 +--- src/superio/nsc/pc87366/superio.c | 4 +--- src/superio/nsc/pc87417/superio.c | 4 +--- src/superio/nsc/pc87427/superio.c | 5 ++--- src/superio/nsc/pc97307/superio.c | 6 +++--- src/superio/nsc/pc97317/superio.c | 6 +++--- src/superio/nuvoton/wpcm450/superio.c | 4 +--- src/superio/renesas/m3885x/superio.c | 5 ++--- src/superio/smsc/fdc37m60x/superio.c | 4 +--- src/superio/smsc/fdc37n972/fdc37n972.c | 5 +---- src/superio/smsc/kbc1100/superio.c | 4 +--- src/superio/smsc/lpc47b272/superio.c | 4 +--- src/superio/smsc/lpc47b397/superio.c | 4 +--- src/superio/smsc/lpc47m10x/superio.c | 4 +--- src/superio/smsc/lpc47m15x/superio.c | 4 +--- src/superio/smsc/lpc47n227/superio.c | 5 ++--- src/superio/smsc/mec1308/superio.c | 4 +--- src/superio/smsc/sch4037/superio.c | 4 +--- src/superio/smsc/sio1007/chip.h | 1 + src/superio/smsc/sio1036/superio.c | 2 -- src/superio/smsc/sio10n268/sio10n268.c | 4 +--- src/superio/smsc/smscsuperio/superio.c | 4 +--- src/superio/winbond/w83627dhg/superio.c | 4 +--- src/superio/winbond/w83627ehg/superio.c | 4 +--- src/superio/winbond/w83627hf/superio.c | 4 +--- src/superio/winbond/w83627thg/superio.c | 4 +--- src/superio/winbond/w83627uhg/superio.c | 4 +--- src/superio/winbond/w83697hf/superio.c | 3 ++- src/superio/winbond/w83977f/superio.c | 4 +--- src/superio/winbond/w83977tf/superio.c | 4 +--- 64 files changed, 84 insertions(+), 163 deletions(-) diff --git a/src/drivers/pc80/keyboard.c b/src/drivers/pc80/keyboard.c index 5b68617..6a573d8 100644 --- a/src/drivers/pc80/keyboard.c +++ b/src/drivers/pc80/keyboard.c @@ -193,7 +193,7 @@ static u8 send_keyboard(u8 command) return regval; } -void pc_keyboard_init(struct pc_keyboard *keyboard) +void pc_keyboard_init(void) { u8 retries; u8 regval; diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index 3f4d1b9..e60a0ac 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -133,14 +133,11 @@ static u8 ec_io_read(u16 addr) #ifndef __SMM__ static void ene932_init(device_t dev) { - struct ec_compal_ene932_config *conf = dev->chip_info; - - if (!dev->enabled) return; printk(BIOS_DEBUG, "Compal ENE932: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index a445da8..5f377c9 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -138,11 +138,10 @@ int google_chromeec_command(struct chromeec_command *cec_command) #ifndef __SMM__ static void lpc_ec_init(device_t dev) { - struct ec_google_chromeec_config *conf = dev->chip_info; - if (!dev->enabled) return; - pc_keyboard_init(&conf->keyboard); + + pc_keyboard_init(); google_chromeec_init(); } diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 137aa81..57854d0 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -141,13 +141,11 @@ static void ene_kb3940q_log_events(void) static void ene_kb3940q_init(device_t dev) { - struct ec_quanta_ene_kb3940q_config *conf = dev->chip_info; - if (!dev->enabled) return; printk(BIOS_DEBUG, "Quanta EnE KB3940Q: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); ene_kb3940q_log_events(); } diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 6516cee..7588a1e 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -162,14 +162,11 @@ void ec_it8518_enable_wake_events(void) #ifndef __SMM__ static void it8518_init(device_t dev) { - struct ec_quanta_it8518_config *conf = dev->chip_info; - - if (!dev->enabled) return; printk(BIOS_DEBUG, "Quanta IT8518: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } diff --git a/src/include/pc80/keyboard.h b/src/include/pc80/keyboard.h index ce281bb..5f97723 100644 --- a/src/include/pc80/keyboard.h +++ b/src/include/pc80/keyboard.h @@ -5,7 +5,7 @@ struct pc_keyboard { /* No initialization parameters for now */ }; -void pc_keyboard_init(struct pc_keyboard *keyboard); +void pc_keyboard_init(void); void set_kbc_ps2_mode(void); #endif /* PC80_KEYBOARD_H */ diff --git a/src/mainboard/emulation/qemu-i440fx/mainboard.c b/src/mainboard/emulation/qemu-i440fx/mainboard.c index 90ad2db..a8a61c4 100644 --- a/src/mainboard/emulation/qemu-i440fx/mainboard.c +++ b/src/mainboard/emulation/qemu-i440fx/mainboard.c @@ -43,7 +43,7 @@ static void qemu_nb_init(device_t dev) /* This sneaked in here, because Qemu does not * emulate a SuperIO chip */ - pc_keyboard_init(0); + pc_keyboard_init(); /* setup IRQ routing */ for (i = 0; i < 32; i++) diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c index 78c92a9..e991b53 100644 --- a/src/mainboard/emulation/qemu-q35/mainboard.c +++ b/src/mainboard/emulation/qemu-q35/mainboard.c @@ -50,7 +50,7 @@ static void qemu_nb_init(device_t dev) /* This sneaked in here, because Qemu does not * emulate a SuperIO chip */ - pc_keyboard_init(0); + pc_keyboard_init(); /* setup IRQ routing for pci slots */ for (i = 0; i < 25; i++) diff --git a/src/mainboard/lenovo/t530/mainboard.c b/src/mainboard/lenovo/t530/mainboard.c index 5931d00..6d21b31 100644 --- a/src/mainboard/lenovo/t530/mainboard.c +++ b/src/mainboard/lenovo/t530/mainboard.c @@ -161,7 +161,7 @@ static void mainboard_init(device_t dev) /* This sneaked in here, because X201 SuperIO chip isn't really connected to anything and hence we don't init it. */ - pc_keyboard_init(0); + pc_keyboard_init(); /* Enable expresscard hotplug events. */ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 2)), diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index cf42a9b..d772d19 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -134,7 +134,7 @@ static void mainboard_init(device_t dev) /* This sneaked in here, because X201 SuperIO chip isn't really connected to anything and hence we don't init it. */ - pc_keyboard_init(0); + pc_keyboard_init(); /* Enable expresscard hotplug events. */ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), diff --git a/src/mainboard/lenovo/x230/mainboard.c b/src/mainboard/lenovo/x230/mainboard.c index 2e4bc4a..01d1910 100644 --- a/src/mainboard/lenovo/x230/mainboard.c +++ b/src/mainboard/lenovo/x230/mainboard.c @@ -161,7 +161,7 @@ static void mainboard_init(device_t dev) /* This sneaked in here, because X201 SuperIO chip isn't really connected to anything and hence we don't init it. */ - pc_keyboard_init(0); + pc_keyboard_init(); /* Enable expresscard hotplug events. */ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 2)), diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index e54df19..d7f45c0 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -169,7 +169,7 @@ static void mainboard_enable(device_t dev) /* This sneaked in here, because EasyNote has no SuperIO chip. */ - pc_keyboard_init(0); + pc_keyboard_init(); verb_setup(); } diff --git a/src/mainboard/roda/rk9/mainboard.c b/src/mainboard/roda/rk9/mainboard.c index 33e6bde..0627a5e 100644 --- a/src/mainboard/roda/rk9/mainboard.c +++ b/src/mainboard/roda/rk9/mainboard.c @@ -133,7 +133,7 @@ static void mainboard_enable(device_t dev) /* We have no driver for the embedded controller since the firmware does most of the job. Hence, initialize keyboards here. */ - pc_keyboard_init(NULL); + pc_keyboard_init(); } struct chip_operations mainboard_ops = { diff --git a/src/northbridge/via/cx700/lpc.c b/src/northbridge/via/cx700/lpc.c index 22e8743..c09fbb4 100644 --- a/src/northbridge/via/cx700/lpc.c +++ b/src/northbridge/via/cx700/lpc.c @@ -289,7 +289,7 @@ static void cx700_lpc_init(struct device *dev) isa_dma_init(); /* Initialize keyboard controller */ - pc_keyboard_init(0); + pc_keyboard_init(); } static struct device_operations cx700_lpc_ops = { diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c index 9e1fa57..1908a8a 100644 --- a/src/northbridge/via/vx800/lpc.c +++ b/src/northbridge/via/vx800/lpc.c @@ -330,7 +330,7 @@ static void southbridge_init(struct device *dev) setup_i8259(); // make sure interupt controller is configured before keyboard init /* turn on keyboard and RTC, no need to visit this reg twice */ - pc_keyboard_init(0); + pc_keyboard_init(); printk(BIOS_DEBUG, "ps2 usb lid, you set who can wakeup system from s3 sleep\n"); S3_ps2_kb_ms_wakeup(dev); diff --git a/src/southbridge/dmp/vortex86ex/southbridge.c b/src/southbridge/dmp/vortex86ex/southbridge.c index 2a68e4e..b9432f0 100644 --- a/src/southbridge/dmp/vortex86ex/southbridge.c +++ b/src/southbridge/dmp/vortex86ex/southbridge.c @@ -611,7 +611,7 @@ static void southbridge_init(struct device *dev) retries--; } post_code(POST_DMP_KBD_IS_READY); - pc_keyboard_init(0); + pc_keyboard_init(); } static struct device_operations vortex_sb_ops = { diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c index a4db1e5..824bb6a 100644 --- a/src/southbridge/sis/sis966/lpc.c +++ b/src/southbridge/sis/sis966/lpc.c @@ -89,16 +89,16 @@ static void lpc_usb_legacy_init(device_t dev) static void lpc_init(device_t dev) { - uint8_t byte; - uint8_t byte_old; - int on; - int nmi_option; + uint8_t byte; + uint8_t byte_old; + int on; + int nmi_option; - printk(BIOS_DEBUG, "LPC_INIT -------->\n"); - pc_keyboard_init(0); + printk(BIOS_DEBUG, "LPC_INIT -------->\n"); + pc_keyboard_init(); - lpc_usb_legacy_init(dev); - lpc_common_init(dev); + lpc_usb_legacy_init(dev); + lpc_common_init(dev); /* power after power fail */ diff --git a/src/southbridge/via/vt8231/vt8231.c b/src/southbridge/via/vt8231/vt8231.c index 85f007a..2011d8a 100644 --- a/src/southbridge/via/vt8231/vt8231.c +++ b/src/southbridge/via/vt8231/vt8231.c @@ -21,7 +21,7 @@ static void keyboard_on(void) regval |= 0x0f; pci_write_config8(lpc_dev, 0x51, regval); } - pc_keyboard_init(0); + pc_keyboard_init(); } static void com_port_on(void) diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c index 4fa2784..6bc767a 100644 --- a/src/southbridge/via/vt8235/vt8235.c +++ b/src/southbridge/via/vt8235/vt8235.c @@ -16,7 +16,7 @@ static void keyboard_on(struct device *dev) regval &= 0xfd; pci_write_config8(dev, 0x51, regval); - pc_keyboard_init(0); + pc_keyboard_init(); } #ifdef UNUSED_CODE diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 4949de6..5ddd816 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -627,7 +627,7 @@ static void init_keyboard(struct device *dev) { u8 regval = pci_read_config8(dev, 0x51); if (regval & 0x1) - pc_keyboard_init(0); + pc_keyboard_init(); } static void southbridge_init_common(struct device *dev) diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c index 29b5ab3..83ccd38 100644 --- a/src/superio/fintek/f71863fg/superio.c +++ b/src/superio/fintek/f71863fg/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f71863fg.h" static void f71863fg_init(device_t dev) { - struct superio_fintek_f71863fg_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -39,7 +38,7 @@ static void f71863fg_init(device_t dev) /* TODO: Might potentially need code for HWM or FDC etc. */ case F71863FG_KBC: res0 = find_resource(dev, PNP_IDX_IO0); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c index cc690ec..0f7f1f1 100644 --- a/src/superio/fintek/f71869ad/superio.c +++ b/src/superio/fintek/f71869ad/superio.c @@ -31,15 +31,13 @@ static void f71869ad_init(device_t dev) { - struct superio_fintek_f71869ad_config *conf = dev->chip_info; - if (!dev->enabled) return; switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71869AD_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case F71869AD_HWM: f71869ad_multifunc_init(dev); diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c index 55a11b1..c6fa7d0 100644 --- a/src/superio/fintek/f71872/superio.c +++ b/src/superio/fintek/f71872/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f71872.h" static void f71872_init(device_t dev) { - struct superio_fintek_f71872_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +36,7 @@ static void f71872_init(device_t dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71872_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71889/superio.c b/src/superio/fintek/f71889/superio.c index 71edafc..14bdd07 100644 --- a/src/superio/fintek/f71889/superio.c +++ b/src/superio/fintek/f71889/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f71889.h" static void f71889_init(device_t dev) { - struct superio_fintek_f71889_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +36,7 @@ static void f71889_init(device_t dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71889_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c index 85ac7ba..bfb53b4 100644 --- a/src/superio/fintek/f81865f/superio.c +++ b/src/superio/fintek/f81865f/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f81865f.h" static void f81865f_init(device_t dev) { - struct superio_fintek_f81865f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +36,7 @@ static void f81865f_init(device_t dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F81865F_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/ite/it8671f/superio.c b/src/superio/ite/it8671f/superio.c index 21c70ec..9da8f1d 100644 --- a/src/superio/ite/it8671f/superio.c +++ b/src/superio/ite/it8671f/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8671f.h" static void init(device_t dev) { - struct superio_ite_it8671f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) case IT8671F_PP: /* TODO. */ break; case IT8671F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8671F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c index 2fd3440..769afe3 100644 --- a/src/superio/ite/it8712f/superio.c +++ b/src/superio/ite/it8712f/superio.c @@ -24,7 +24,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8712f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -44,7 +43,6 @@ static void pnp_exit_ext_func_mode(device_t dev) static void it8712f_init(device_t dev) { - struct superio_ite_it8712f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -58,7 +56,7 @@ static void it8712f_init(device_t dev) break; case IT8712F_KBCK: set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8712F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c index 8cf3c5f..bd89a32 100644 --- a/src/superio/ite/it8716f/superio.c +++ b/src/superio/ite/it8716f/superio.c @@ -27,7 +27,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8716f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -76,7 +75,6 @@ static void init_ec(u16 base) static void it8716f_init(device_t dev) { - struct superio_ite_it8716f_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -90,7 +88,7 @@ static void it8716f_init(device_t dev) init_ec(res0->base + EC_INDEX_PORT); break; case IT8716F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index 998d271..d40407a 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8718f.h" static void init(device_t dev) { - struct superio_ite_it8718f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -40,7 +38,7 @@ static void init(device_t dev) case IT8718F_EC: /* TODO. */ break; case IT8718F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8718F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8721f/superio.c b/src/superio/ite/it8721f/superio.c index 300a480..66e6ef7 100644 --- a/src/superio/ite/it8721f/superio.c +++ b/src/superio/ite/it8721f/superio.c @@ -23,12 +23,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8721f.h" static void init(device_t dev) { - struct superio_ite_it8721f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -41,7 +39,7 @@ static void init(device_t dev) case IT8721F_EC: /* TODO. */ break; case IT8721F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8721F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index e7e82a8..721e7f9 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -23,7 +23,7 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" +#include "chip.h" /* FIXME */ #include "it8772f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -177,7 +177,7 @@ static void it8772f_init(device_t dev) case IT8772F_KBCK: if (!conf->skip_keyboard) { set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } break; case IT8772F_KBCM: diff --git a/src/superio/nsc/pc8374/superio.c b/src/superio/nsc/pc8374/superio.c index 71cde2c..8b6f1ca 100644 --- a/src/superio/nsc/pc8374/superio.c +++ b/src/superio/nsc/pc8374/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc8374.h" static void init(device_t dev) { - struct superio_nsc_pc8374_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC8374_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c index 52fc14f..f374e6a 100644 --- a/src/superio/nsc/pc87309/superio.c +++ b/src/superio/nsc/pc87309/superio.c @@ -23,19 +23,17 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87309.h" static void init(device_t dev) { - struct superio_nsc_pc87309_config *conf = dev->chip_info; if (!dev->enabled) return; switch (dev->path.pnp.device) { case PC87309_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87351/superio.c b/src/superio/nsc/pc87351/superio.c index 4d9469e..7f395b4 100644 --- a/src/superio/nsc/pc87351/superio.c +++ b/src/superio/nsc/pc87351/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87351.h" static void init(device_t dev) { - struct superio_nsc_pc87351_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87351_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c index 92731e7..a53cc35 100644 --- a/src/superio/nsc/pc87360/superio.c +++ b/src/superio/nsc/pc87360/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87360.h" static void init(device_t dev) { - struct superio_nsc_pc87360_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87360_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c index 1874ab3..27bdd6e 100644 --- a/src/superio/nsc/pc87366/superio.c +++ b/src/superio/nsc/pc87366/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87366.h" static void init(device_t dev) { - struct superio_nsc_pc87366_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87366_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 3b91f36..99882a5 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -27,19 +27,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87417.h" static void init(device_t dev) { - struct superio_nsc_pc87417_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87417_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c index ae02f01..170fd85 100644 --- a/src/superio/nsc/pc87427/superio.c +++ b/src/superio/nsc/pc87427/superio.c @@ -25,19 +25,18 @@ #include <console/console.h> #include <string.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "pc87427.h" static void init(device_t dev) { - struct superio_nsc_pc87427_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87427_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc97307/superio.c b/src/superio/nsc/pc97307/superio.c index c1cd5c1..af7ca77 100644 --- a/src/superio/nsc/pc97307/superio.c +++ b/src/superio/nsc/pc97307/superio.c @@ -23,12 +23,12 @@ #include <device/device.h> #include <device/pnp.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> +#include "chip.h" /* FIXME */ #include "pc97307.h" static void init(device_t dev) { - struct superio_nsc_pc97307_config *conf = dev->chip_info; u8 reg8; if (!dev->enabled) @@ -40,7 +40,7 @@ static void init(device_t dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard. */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case PC97307_FDC: /* Set up floppy in PS/2 mode. */ diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index a69dfe7..6f39c5d 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -23,12 +23,12 @@ #include <device/device.h> #include <device/pnp.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> +#include "chip.h" /* FIXME */ #include "pc97317.h" static void init(device_t dev) { - struct superio_nsc_pc97317_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -39,7 +39,7 @@ static void init(device_t dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; default: break; diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c index fabb546..ff815cf 100644 --- a/src/superio/nuvoton/wpcm450/superio.c +++ b/src/superio/nuvoton/wpcm450/superio.c @@ -25,19 +25,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "wpcm450.h" static void init(device_t dev) { - struct superio_nuvoton_wpcm450_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case WPCM450_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/renesas/m3885x/superio.c b/src/superio/renesas/m3885x/superio.c index 34d7d11..17bdadf 100644 --- a/src/superio/renesas/m3885x/superio.c +++ b/src/superio/renesas/m3885x/superio.c @@ -25,20 +25,19 @@ #include <string.h> #include <assert.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> void m3885_configure_multikey(void); static void m3885x_init(device_t dev) { - struct superio_renesas_m3885x_config *conf = dev->chip_info; if (!dev->enabled) return; printk(BIOS_DEBUG, "Renesas M3885x: Initializing keyboard.\n"); set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); m3885_configure_multikey(); } diff --git a/src/superio/smsc/fdc37m60x/superio.c b/src/superio/smsc/fdc37m60x/superio.c index 92a1783..f5626ee 100644 --- a/src/superio/smsc/fdc37m60x/superio.c +++ b/src/superio/smsc/fdc37m60x/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "fdc37m60x.h" static void init(device_t dev) { - struct superio_smsc_fdc37m60x_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) case FDC37M60X_PP: /* TODO. */ break; case FDC37M60X_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case FDC37M60X_AUX: /* TODO. */ break; diff --git a/src/superio/smsc/fdc37n972/fdc37n972.c b/src/superio/smsc/fdc37n972/fdc37n972.c index cab4540..f7ae697 100644 --- a/src/superio/smsc/fdc37n972/fdc37n972.c +++ b/src/superio/smsc/fdc37n972/fdc37n972.c @@ -26,8 +26,6 @@ static void init(device_t dev) { - struct superio_smsc_fdc37n972_config *conf = dev->chip_info; - if (!dev->enabled) return; @@ -37,7 +35,7 @@ static void init(device_t dev) case FDC37N972_PP: /* TODO. */ break; case FDC37N972_KBDC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; // [..] The rest: TODO } @@ -67,4 +65,3 @@ struct chip_operations superio_smsc_fdc37n972_ops = { CHIP_NAME("SMSC FDC37N972 Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/smsc/kbc1100/superio.c b/src/superio/smsc/kbc1100/superio.c index 3a834a0..77777d0 100644 --- a/src/superio/smsc/kbc1100/superio.c +++ b/src/superio/smsc/kbc1100/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "kbc1100.h" /* Forward declarations */ @@ -60,7 +59,6 @@ static void enable_dev(device_t dev) static void kbc1100_init(device_t dev) { - struct superio_smsc_kbc1100_config *conf = dev->chip_info; struct resource *res0, *res1; @@ -74,7 +72,7 @@ static void kbc1100_init(device_t dev) case KBC1100_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c index fb39c28..30e89a8 100644 --- a/src/superio/smsc/lpc47b272/superio.c +++ b/src/superio/smsc/lpc47b272/superio.c @@ -32,7 +32,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47b272.h" /* Forward declarations */ @@ -85,14 +84,13 @@ static void enable_dev(device_t dev) */ static void lpc47b272_init(device_t dev) { - struct superio_smsc_lpc47b272_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47B272_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index 3d81350..8a6c03e 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -29,7 +29,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47b397.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -56,14 +55,13 @@ static void enable_hwm_smbus(device_t dev) static void lpc47b397_init(device_t dev) { - struct superio_smsc_lpc47b397_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47B397_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index 1a697f2..a9583e4 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -31,7 +31,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47m10x.h" /* Forward declarations */ @@ -84,14 +83,13 @@ static void enable_dev(device_t dev) */ static void lpc47m10x_init(device_t dev) { - struct superio_smsc_lpc47m10x_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47M10X2_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index b142dde..91e77ba 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47m15x.h" /* Forward declarations */ @@ -65,14 +64,13 @@ static void enable_dev(device_t dev) static void lpc47m15x_init(device_t dev) { - struct superio_smsc_lpc47m15x_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47M15X_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index eda2622..b1ef18a 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -28,7 +28,7 @@ #include <string.h> #include <assert.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "lpc47n227.h" /* Forward declarations. */ @@ -128,7 +128,6 @@ void lpc47n227_pnp_enable(device_t dev) */ static void lpc47n227_init(device_t dev) { - struct superio_smsc_lpc47n227_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -136,7 +135,7 @@ static void lpc47n227_init(device_t dev) switch (dev->path.pnp.device) { case LPC47N227_KBDC: printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c index 448800e..54d99fb 100644 --- a/src/superio/smsc/mec1308/superio.c +++ b/src/superio/smsc/mec1308/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "mec1308.h" #if CONFIG_HAVE_ACPI_RESUME #include <arch/acpi.h> @@ -36,7 +35,6 @@ static void mec1308_init(device_t dev) { - struct superio_smsc_mec1308_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -47,7 +45,7 @@ static void mec1308_init(device_t dev) if (acpi_slp_type == 3) return; #endif - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c index b7f100a..35df431 100644 --- a/src/superio/smsc/sch4037/superio.c +++ b/src/superio/smsc/sch4037/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "sch4037.h" /* Forward declarations */ @@ -61,7 +60,6 @@ static void enable_dev(device_t dev) static void sch4037_init(device_t dev) { - struct superio_smsc_sch4037_config *conf = dev->chip_info; struct resource *res0, *res1; if (!dev->enabled) { @@ -73,7 +71,7 @@ static void sch4037_init(device_t dev) case SCH4037_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/sio1007/chip.h b/src/superio/smsc/sio1007/chip.h index eee2811..345b403 100644 --- a/src/superio/smsc/sio1007/chip.h +++ b/src/superio/smsc/sio1007/chip.h @@ -20,6 +20,7 @@ #ifndef SUPERIO_SMSC_1007_CHIP_H #define SUPERIO_SMSC_1007_CHIP_H +/* FIXME: wrong place for this! */ void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask); int sio1007_enable_uart_at(u16 port); diff --git a/src/superio/smsc/sio1036/superio.c b/src/superio/smsc/sio1036/superio.c index 4980803..7fac79c 100644 --- a/src/superio/smsc/sio1036/superio.c +++ b/src/superio/smsc/sio1036/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "sio1036.h" /* Forward declarations */ @@ -60,7 +59,6 @@ static void enable_dev(device_t dev) static void sio1036_init(device_t dev) { - struct superio_smsc_sio1036_config *conf = dev->chip_info; struct resource *res0, *res1; diff --git a/src/superio/smsc/sio10n268/sio10n268.c b/src/superio/smsc/sio10n268/sio10n268.c index 690c160..40c01b4 100644 --- a/src/superio/smsc/sio10n268/sio10n268.c +++ b/src/superio/smsc/sio10n268/sio10n268.c @@ -26,8 +26,6 @@ static void init(device_t dev) { - struct superio_smsc_sio10n268_config *conf = dev->chip_info; - if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) break; case SIO10N268_KBDC: /* TODO: This is still hardcoded. */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; // [..] The rest: TODO } diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 9990aa2..0d62a9a 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -41,7 +41,6 @@ #include <console/console.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" /* The following Super I/O chips are currently supported by this driver: */ #define LPC47M172 0x14 @@ -150,7 +149,6 @@ static const struct logical_devices { */ static void smsc_init(device_t dev) { - struct superio_smsc_smscsuperio_config *conf = dev->chip_info; int i, ld; /* Do not initialize disabled devices. */ @@ -169,7 +167,7 @@ static void smsc_init(device_t dev) /* A Super I/O was found, so initialize the respective device. */ ld = dev->path.pnp.device; if (ld == logical_device_table[i].devs[LD_KBC]) { - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } } diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 269e57c..fdab974 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -23,7 +23,6 @@ #include <superio/conf_mode.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83627dhg.h" static void w83627dhg_enable_UR2(device_t dev) @@ -39,7 +38,6 @@ static void w83627dhg_enable_UR2(device_t dev) static void w83627dhg_init(device_t dev) { - struct superio_winbond_w83627dhg_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -49,7 +47,7 @@ static void w83627dhg_init(device_t dev) w83627dhg_enable_UR2(dev); break; case W83627DHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index 62d3311..aae0ac4 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -30,7 +30,6 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83627ehg.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -95,7 +94,6 @@ static void init_hwm(u16 base) static void w83627ehg_init(device_t dev) { - struct superio_winbond_w83627ehg_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -103,7 +101,7 @@ static void w83627ehg_init(device_t dev) switch(dev->path.pnp.device) { case W83627EHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case W83627EHG_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index c881743..5445b47 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -30,7 +30,6 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83627hf.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -102,7 +101,6 @@ static void init_hwm(u16 base) static void w83627hf_init(device_t dev) { - struct superio_winbond_w83627hf_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -110,7 +108,7 @@ static void w83627hf_init(device_t dev) switch(dev->path.pnp.device) { case W83627HF_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case W83627HF_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index f6aba10..75186fa 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -27,19 +27,17 @@ #include <console/console.h> #include <string.h> #include <pc80/keyboard.h> -#include "chip.h" #include "w83627thg.h" static void w83627thg_init(device_t dev) { - struct superio_winbond_w83627thg_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83627THG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index 5775ff5..f0d9aef 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -27,7 +27,6 @@ #include <stdint.h> #include <stdlib.h> #include <pc80/keyboard.h> -#include "chip.h" #include "w83627uhg.h" /* @@ -60,7 +59,6 @@ static void set_uart_clock_source(device_t dev, u8 uart_clock) static void w83627uhg_init(device_t dev) { - struct superio_winbond_w83627uhg_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -85,7 +83,7 @@ static void w83627uhg_init(device_t dev) set_uart_clock_source(dev, 0); break; case W83627UHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83697hf/superio.c b/src/superio/winbond/w83697hf/superio.c index f896078..933da95 100644 --- a/src/superio/winbond/w83697hf/superio.c +++ b/src/superio/winbond/w83697hf/superio.c @@ -27,7 +27,8 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> +#include "chip.h" /* FIXME */ #include "w83697hf.h" static void hwmon_set_fan_divisor(unsigned int base, int num, unsigned int divisor) { diff --git a/src/superio/winbond/w83977f/superio.c b/src/superio/winbond/w83977f/superio.c index 32ecf18..232f46a 100644 --- a/src/superio/winbond/w83977f/superio.c +++ b/src/superio/winbond/w83977f/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83977f.h" static void w83977f_init(device_t dev) { - struct superio_winbond_w83977f_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83977F_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index 7f2dffb..a61770a 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -28,19 +28,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83977tf.h" static void w83977tf_init(device_t dev) { - struct superio_winbond_w83977tf_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83977TF_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } }

1 0

Patch set updated for coreboot: 9d5bcf5 Trusted Platform: Make TPM init available without ChromeOS
by Kyösti Mälkki 09 May '14

09 May '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5644 -gerrit commit 9d5bcf5ec82c7758961f2d2ace9e8444f8fc8775 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat May 3 17:30:30 2014 +0300 Trusted Platform: Make TPM init available without ChromeOS The function does TPM hardware initialisation but is not really related to use of ChromeOS. Change-Id: Ie67c6e2b07485bdf861f74f9a8768882d9495a01 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 2 +- src/cpu/intel/haswell/romstage.c | 8 +- src/drivers/Kconfig | 1 + src/drivers/Makefile.inc | 1 + src/drivers/pc80/Kconfig | 8 - src/drivers/pc80/Makefile.inc | 1 - src/drivers/pc80/tpm.c | 677 -------------------------- src/drivers/tpm/tpm.c | 677 ++++++++++++++++++++++++++ src/drivers/tpm/vboot.c | 221 +++++++++ src/include/bootmode.h | 1 + src/include/pc80/tpm.h | 29 -- src/include/tpm.h | 33 ++ src/lib/bootmode.c | 25 + src/mainboard/google/butterfly/romstage.c | 8 +- src/mainboard/google/link/romstage.c | 8 +- src/mainboard/google/parrot/romstage.c | 8 +- src/mainboard/google/stout/romstage.c | 7 +- src/mainboard/intel/emeraldlake2/romstage.c | 8 +- src/mainboard/samsung/lumpy/romstage.c | 7 +- src/mainboard/samsung/stumpy/romstage.c | 7 +- src/soc/intel/baytrail/romstage/romstage.c | 13 +- src/vendorcode/google/chromeos/Kconfig | 8 - src/vendorcode/google/chromeos/Makefile.inc | 7 - src/vendorcode/google/chromeos/chromeos.h | 3 - src/vendorcode/google/chromeos/vboot.c | 244 ---------- src/vendorcode/google/chromeos/vboot_loader.c | 2 +- 26 files changed, 979 insertions(+), 1035 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 849e55d..d087370 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -282,7 +282,7 @@ config MMCONF_SUPPORT default n config BOOTMODE_STRAPS - bool + bool "Have bootmode straps" default n source src/console/Kconfig diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 9e27668..a77cb0c 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -36,9 +36,7 @@ #include <ramstage_cache.h> #include <romstage_handoff.h> #include <reset.h> -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #if CONFIG_EC_GOOGLE_CHROMEEC #include <ec/google/chromeec/ec.h> #endif @@ -279,9 +277,7 @@ void romstage_common(const struct romstage_params *params) printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 1a5f8ff..4dc2d97 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -35,6 +35,7 @@ source src/drivers/realtek/Kconfig source src/drivers/sil/Kconfig source src/drivers/spi/Kconfig source src/drivers/ti/Kconfig +source src/drivers/tpm/Kconfig source src/drivers/trident/Kconfig source src/drivers/uart/Kconfig source src/drivers/usb/Kconfig diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index f11e4b8..7156d30 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -28,6 +28,7 @@ subdirs-y += net subdirs-y += parade subdirs-y += realtek subdirs-y += sil +subdirs-$(CONFIG_TPM) += tpm subdirs-y += trident subdirs-$(CONFIG_DRIVERS_UART) += uart subdirs-y += usb diff --git a/src/drivers/pc80/Kconfig b/src/drivers/pc80/Kconfig index 485dd64..254c159 100644 --- a/src/drivers/pc80/Kconfig +++ b/src/drivers/pc80/Kconfig @@ -15,11 +15,3 @@ config DRIVERS_PS2_KEYBOARD If you know you will only use a payload which does not require this option, then you can say N here to speed up boot time. Otherwise say Y. - -config TPM - bool - default n - help - Enable this option to enable TPM support in coreboot. - - If unsure, say N. diff --git a/src/drivers/pc80/Makefile.inc b/src/drivers/pc80/Makefile.inc index 4d0a280..bfdc11a 100644 --- a/src/drivers/pc80/Makefile.inc +++ b/src/drivers/pc80/Makefile.inc @@ -7,7 +7,6 @@ ramstage-y += keyboard.c ramstage-$(CONFIG_SPKMODEM) += spkmodem.c romstage-$(CONFIG_USE_OPTION_TABLE) += mc146818rtc_early.c -romstage-$(CONFIG_TPM) += tpm.c romstage-$(CONFIG_SPKMODEM) += spkmodem.c subdirs-y += vga diff --git a/src/drivers/pc80/tpm.c b/src/drivers/pc80/tpm.c deleted file mode 100644 index f581ab4..0000000 --- a/src/drivers/pc80/tpm.c +++ /dev/null @@ -1,677 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/* - * The code in this file has been heavily based on the article "Writing a TPM - * Device Driver" published on http://ptgmedia.pearsoncmg.com and the - * submission by Stefan Berger on Qemu-devel mailing list. - * - * One principal difference is that in the simplest config the other than 0 - * TPM localities do not get mapped by some devices (for instance, by - * Infineon slb9635), so this driver provides access to locality 0 only. - */ - -#include <stdlib.h> -#include <string.h> -#include <delay.h> -#include <arch/io.h> -#include <arch/byteorder.h> -#include <console/console.h> -#include <pc80/tpm.h> -#include <arch/early_variables.h> - -#define PREFIX "lpc_tpm: " - -/* coreboot wrapper for TPM driver (start) */ -#define TPM_DEBUG(fmt, args...) \ - if (CONFIG_DEBUG_TPM) { \ - printk(BIOS_DEBUG, PREFIX); \ - printk(BIOS_DEBUG, fmt , ##args); \ - } -#define TPM_DEBUG_IO_READ(reg_, val_) \ - TPM_DEBUG("Read reg 0x%x returns 0x%x\n", (reg_), (val_)) -#define TPM_DEBUG_IO_WRITE(reg_, val_) \ - TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) -#define printf(x...) printk(BIOS_ERR, x) - -#define min(a,b) MIN(a,b) -#define max(a,b) MAX(a,b) -#define readb(_a) (*(volatile unsigned char *) (_a)) -#define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v)) -#define readl(_a) (*(volatile unsigned long *) (_a)) -#define writel(_v, _a) (*(volatile unsigned long *) (_a) = (_v)) -/* coreboot wrapper for TPM driver (end) */ - -#ifndef CONFIG_TPM_TIS_BASE_ADDRESS -/* Base TPM address standard for x86 systems */ -#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 -#endif - -/* the macro accepts the locality value, but only locality 0 is operational */ -#define TIS_REG(LOCALITY, REG) \ - (void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG) - -/* hardware registers' offsets */ -#define TIS_REG_ACCESS 0x0 -#define TIS_REG_INT_ENABLE 0x8 -#define TIS_REG_INT_VECTOR 0xc -#define TIS_REG_INT_STATUS 0x10 -#define TIS_REG_INTF_CAPABILITY 0x14 -#define TIS_REG_STS 0x18 -#define TIS_REG_BURST_COUNT 0x19 -#define TIS_REG_DATA_FIFO 0x24 -#define TIS_REG_DID_VID 0xf00 -#define TIS_REG_RID 0xf04 - -/* Some registers' bit field definitions */ -#define TIS_STS_VALID (1 << 7) /* 0x80 */ -#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */ -#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */ -#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */ -#define TIS_STS_EXPECT (1 << 3) /* 0x08 */ -#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */ - -#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */ -#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */ -#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */ -#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */ -#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */ -#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */ -#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */ - -/* - * Error value returned if a tpm register does not enter the expected state - * after continuous polling. No actual TPM register reading ever returns ~0, - * so this value is a safe error indication to be mixed with possible status - * register values. - */ -#define TPM_TIMEOUT_ERR (~0) - -/* Error value returned on various TPM driver errors */ -#define TPM_DRIVER_ERR (~0) - - /* 1 second is plenty for anything TPM does.*/ -#define MAX_DELAY_US (1000 * 1000) - -/* - * Structures defined below allow creating descriptions of TPM vendor/device - * ID information for run time discovery. The only device the system knows - * about at this time is Infineon slb9635 - */ -struct device_name { - u16 dev_id; - const char * const dev_name; -}; - -struct vendor_name { - u16 vendor_id; - const char * vendor_name; - const struct device_name* dev_names; -}; - -static const struct device_name atmel_devices[] = { - {0x3204, "AT97SC3204"}, - {0xffff} -}; - -static const struct device_name infineon_devices[] = { - {0x000b, "SLB9635 TT 1.2"}, - {0xffff} -}; - -static const struct device_name nuvoton_devices[] = { - {0x00fe, "NPCT420AA V2"}, - {0xffff} -}; - -static const struct device_name stmicro_devices[] = { - {0x0000, "ST33ZP24" }, - {0xffff} -}; - -static const struct vendor_name vendor_names[] = { - {0x1114, "Atmel", atmel_devices}, - {0x15d1, "Infineon", infineon_devices}, - {0x1050, "Nuvoton", nuvoton_devices}, - {0x104a, "ST Microelectronics", stmicro_devices}, -}; - -/* - * Cached vendor/device ID pair to indicate that the device has been already - * discovered - */ -static u32 vendor_dev_id CAR_GLOBAL; - -static inline u8 tpm_read_status(int locality) -{ - u8 value = readb(TIS_REG(locality, TIS_REG_STS)); - TPM_DEBUG_IO_READ(TIS_REG_STS, value); - return value; -} - -static inline void tpm_write_status(u8 sts, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_STS, sts); - writeb(sts, TIS_REG(locality, TIS_REG_STS)); -} - -static inline u8 tpm_read_data(int locality) -{ - u8 value = readb(TIS_REG(locality, TIS_REG_DATA_FIFO)); - TPM_DEBUG_IO_READ(TIS_REG_DATA_FIFO, value); - return value; -} - -static inline void tpm_write_data(u8 data, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_STS, data); - writeb(data, TIS_REG(locality, TIS_REG_DATA_FIFO)); -} - -static inline u16 tpm_read_burst_count(int locality) -{ - u16 count; - count = readb(TIS_REG(locality, TIS_REG_BURST_COUNT)); - count |= readb(TIS_REG(locality, TIS_REG_BURST_COUNT + 1)) << 8; - TPM_DEBUG_IO_READ(TIS_REG_BURST_COUNT, count); - return count; -} - -static inline u8 tpm_read_access(int locality) -{ - u8 value = readb(TIS_REG(locality, TIS_REG_ACCESS)); - TPM_DEBUG_IO_READ(TIS_REG_ACCESS, value); - return value; -} - -static inline void tpm_write_access(u8 data, int locality) -{ - TPM_DEBUG_IO_WRITE(TIS_REG_ACCESS, data); - writeb(data, TIS_REG(locality, TIS_REG_ACCESS)); -} - -static inline u32 tpm_read_did_vid(int locality) -{ - u32 value = readl(TIS_REG(locality, TIS_REG_DID_VID)); - TPM_DEBUG_IO_READ(TIS_REG_DID_VID, value); - return value; -} - -/* - * tis_wait_sts() - * - * Wait for at least a second for a status to change its state to match the - * expected state. Normally the transition happens within microseconds. - * - * @locality - locality - * @mask - bitmask for the bitfield(s) to watch - * @expected - value the field(s) are supposed to be set to - * - * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. - */ -static int tis_wait_sts(int locality, u8 mask, u8 expected) -{ - u32 time_us = MAX_DELAY_US; - while (time_us > 0) { - u8 value = tpm_read_status(locality); - if ((value & mask) == expected) - return 0; - udelay(1); /* 1 us */ - time_us--; - } - return TPM_TIMEOUT_ERR; -} - -static inline int tis_wait_ready(int locality) -{ - return tis_wait_sts(locality, TIS_STS_COMMAND_READY, - TIS_STS_COMMAND_READY); -} - -static inline int tis_wait_valid(int locality) -{ - return tis_wait_sts(locality, TIS_STS_VALID, TIS_STS_VALID); -} - -static inline int tis_wait_valid_data(int locality) -{ - const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; - return tis_wait_sts(locality, has_data, has_data); -} - -static inline int tis_has_valid_data(int locality) -{ - const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; - return (tpm_read_status(locality) & has_data) == has_data; -} - -static inline int tis_expect_data(int locality) -{ - return !!(tpm_read_status(locality) & TIS_STS_EXPECT); -} - -/* - * tis_wait_access() - * - * Wait for at least a second for a access to change its state to match the - * expected state. Normally the transition happens within microseconds. - * - * @locality - locality - * @mask - bitmask for the bitfield(s) to watch - * @expected - value the field(s) are supposed to be set to - * - * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. - */ -static int tis_wait_access(int locality, u8 mask, u8 expected) -{ - u32 time_us = MAX_DELAY_US; - while (time_us > 0) { - u8 value = tpm_read_access(locality); - if ((value & mask) == expected) - return 0; - udelay(1); /* 1 us */ - time_us--; - } - return TPM_TIMEOUT_ERR; -} - -static inline int tis_wait_dropped_access(int locality) -{ - return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, 0); -} - -static inline int tis_wait_received_access(int locality) -{ - return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, - TIS_ACCESS_ACTIVE_LOCALITY); -} - -static inline int tis_has_access(int locality) -{ - return !!(tpm_read_access(locality) & TIS_ACCESS_ACTIVE_LOCALITY); -} - -static inline void tis_request_access(int locality) -{ - tpm_write_access(TIS_ACCESS_REQUEST_USE, locality); -} - -static inline void tis_drop_access(int locality) -{ - tpm_write_access(TIS_ACCESS_ACTIVE_LOCALITY, locality); -} - -/* - * PC Client Specific TPM Interface Specification section 11.2.12: - * - * Software must be prepared to send two writes of a "1" to command ready - * field: the first to indicate successful read of all the data, thus - * clearing the data from the ReadFIFO and freeing the TPM's resources, - * and the second to indicate to the TPM it is about to send a new command. - * - * In practice not all TPMs behave the same so it is necessary to be - * flexible when trying to set command ready. - * - * Returns 0 on success if the TPM is ready for transactions. - * Returns TPM_TIMEOUT_ERR if the command ready bit does not get set. - */ -static int tis_command_ready(u8 locality) -{ - u32 status; - - /* 1st attempt to set command ready */ - tpm_write_status(TIS_STS_COMMAND_READY, locality); - - /* Wait for response */ - status = tpm_read_status(locality); - - /* Check if command ready is set yet */ - if (status & TIS_STS_COMMAND_READY) - return 0; - - /* 2nd attempt to set command ready */ - tpm_write_status(TIS_STS_COMMAND_READY, locality); - - return tis_wait_ready(locality); -} - -/* - * Probe the TPM device and try determining its manufacturer/device name. - * - * Returns 0 on success (the device is found or was found during an earlier - * invocation) or TPM_DRIVER_ERR if the device is not found. - */ -static u32 tis_probe(void) -{ - const char *device_name = "unknown"; - const char *vendor_name = device_name; - const struct device_name *dev; - u32 didvid; - u16 vid, did; - int i; - - if (car_get_var(vendor_dev_id)) - return 0; /* Already probed. */ - - didvid = tpm_read_did_vid(0); - if (!didvid || (didvid == 0xffffffff)) { - printf("%s: No TPM device found\n", __FUNCTION__); - return TPM_DRIVER_ERR; - } - - car_set_var(vendor_dev_id, didvid); - - vid = didvid & 0xffff; - did = (didvid >> 16) & 0xffff; - for (i = 0; i < ARRAY_SIZE(vendor_names); i++) { - int j = 0; - u16 known_did; - if (vid == vendor_names[i].vendor_id) { - vendor_name = vendor_names[i].vendor_name; - } else { - continue; - } - dev = &vendor_names[i].dev_names[j]; - while ((known_did = dev->dev_id) != 0xffff) { - if (known_did == did) { - device_name = dev->dev_name; - break; - } - j++; - } - break; - } - /* this will have to be converted into debug printout */ - printf("Found TPM %s by %s\n", device_name, vendor_name); - return 0; -} - -/* - * tis_senddata() - * - * send the passed in data to the TPM device. - * - * @data - address of the data to send, byte by byte - * @len - length of the data to send - * - * Returns 0 on success, TPM_DRIVER_ERR on error (in case the device does - * not accept the entire command). - */ -static u32 tis_senddata(const u8 * const data, u32 len) -{ - u32 offset = 0; - u16 burst = 0; - u32 max_cycles = 0; - u8 locality = 0; - - if (tis_wait_ready(locality)) { - printf("%s:%d - failed to get 'command_ready' status\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - burst = tpm_read_burst_count(locality); - - while (1) { - unsigned count; - - /* Wait till the device is ready to accept more data. */ - while (!burst) { - if (max_cycles++ == MAX_DELAY_US) { - printf("%s:%d failed to feed %d bytes of %d\n", - __FILE__, __LINE__, len - offset, len); - return TPM_DRIVER_ERR; - } - udelay(1); - burst = tpm_read_burst_count(locality); - } - - max_cycles = 0; - - /* - * Calculate number of bytes the TPM is ready to accept in one - * shot. - * - * We want to send the last byte outside of the loop (hence - * the -1 below) to make sure that the 'expected' status bit - * changes to zero exactly after the last byte is fed into the - * FIFO. - */ - count = min(burst, len - offset - 1); - while (count--) - tpm_write_data(data[offset++], locality); - - if (tis_wait_valid(locality) || !tis_expect_data(locality)) { - printf("%s:%d TPM command feed overflow\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - burst = tpm_read_burst_count(locality); - if ((offset == (len - 1)) && burst) - /* - * We need to be able to send the last byte to the - * device, so burst size must be nonzero before we - * break out. - */ - break; - } - - /* Send the last byte. */ - tpm_write_data(data[offset++], locality); - - /* - * Verify that TPM does not expect any more data as part of this - * command. - */ - if (tis_wait_valid(locality) || tis_expect_data(locality)) { - printf("%s:%d unexpected TPM status 0x%x\n", - __FILE__, __LINE__, tpm_read_status(locality)); - return TPM_DRIVER_ERR; - } - - /* OK, sitting pretty, let's start the command execution. */ - tpm_write_status(TIS_STS_TPM_GO, locality); - - return 0; -} - -/* - * tis_readresponse() - * - * read the TPM device response after a command was issued. - * - * @buffer - address where to read the response, byte by byte. - * @len - pointer to the size of buffer - * - * On success stores the number of received bytes to len and returns 0. On - * errors (misformatted TPM data or synchronization problems) returns - * TPM_DRIVER_ERR. - */ -static u32 tis_readresponse(u8 *buffer, size_t *len) -{ - u16 burst_count; - u32 offset = 0; - u8 locality = 0; - u32 expected_count = *len; - int max_cycles = 0; - - /* Wait for the TPM to process the command */ - if (tis_wait_valid_data(locality)) { - printf("%s:%d failed processing command\n", __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - do { - while ((burst_count = tpm_read_burst_count(locality)) == 0) { - if (max_cycles++ == MAX_DELAY_US) { - printf("%s:%d TPM stuck on read\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - udelay(1); - } - - max_cycles = 0; - - while (burst_count-- && (offset < expected_count)) { - buffer[offset++] = tpm_read_data(locality); - if (offset == 6) { - /* - * We got the first six bytes of the reply, - * let's figure out how many bytes to expect - * total - it is stored as a 4 byte number in - * network order, starting with offset 2 into - * the body of the reply. - */ - u32 real_length; - memcpy(&real_length, - buffer + 2, - sizeof(real_length)); - expected_count = be32_to_cpu(real_length); - - if ((expected_count < offset) || - (expected_count > *len)) { - printf("%s:%d bad response size %d\n", - __FILE__, __LINE__, - expected_count); - return TPM_DRIVER_ERR; - } - } - } - - /* Wait for the next portion */ - if (tis_wait_valid(locality)) { - printf("%s:%d failed to read response\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - if (offset == expected_count) - break; /* We got all we need */ - - } while (tis_has_valid_data(locality)); - - /* * Make sure we indeed read all there was. */ - if (tis_has_valid_data(locality)) { - printf("%s:%d wrong receive status: %x %d bytes left\n", - __FILE__, __LINE__, tpm_read_status(locality), - tpm_read_burst_count(locality)); - return TPM_DRIVER_ERR; - } - - /* Tell the TPM that we are done. */ - if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) - return TPM_DRIVER_ERR; - - *len = offset; - return 0; -} - -/* - * tis_init() - * - * Initialize the TPM device. Returns 0 on success or TPM_DRIVER_ERR on - * failure (in case device probing did not succeed). - */ -int tis_init(void) -{ - if (tis_probe()) - return TPM_DRIVER_ERR; - return 0; -} - -/* - * tis_open() - * - * Requests access to locality 0 for the caller. After all commands have been - * completed the caller is supposed to call tis_close(). - * - * Returns 0 on success, TPM_DRIVER_ERR on failure. - */ -int tis_open(void) -{ - u8 locality = 0; /* we use locality zero for everything */ - - if (tis_close()) - return TPM_DRIVER_ERR; - - /* now request access to locality */ - tis_request_access(locality); - - /* did we get a lock? */ - if (tis_wait_received_access(locality)) { - printf("%s:%d - failed to lock locality %d\n", - __FILE__, __LINE__, locality); - return TPM_DRIVER_ERR; - } - - /* Certain TPMs seem to need some delay here or they hang... */ - udelay(10); - - if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) - return TPM_DRIVER_ERR; - - return 0; -} - -/* - * tis_close() - * - * terminate the current session with the TPM by releasing the locked - * locality. Returns 0 on success of TPM_DRIVER_ERR on failure (in case lock - * removal did not succeed). - */ -int tis_close(void) -{ - u8 locality = 0; - if (tis_has_access(locality)) { - tis_drop_access(locality); - if (tis_wait_dropped_access(locality)) { - printf("%s:%d - failed to release locality %d\n", - __FILE__, __LINE__, locality); - return TPM_DRIVER_ERR; - } - } - return 0; -} - -/* - * tis_sendrecv() - * - * Send the requested data to the TPM and then try to get its response - * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at recv_len) - * or TPM_DRIVER_ERR on failure. - */ -int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, - uint8_t *recvbuf, size_t *recv_len) -{ - if (tis_senddata(sendbuf, send_size)) { - printf("%s:%d failed sending data to TPM\n", - __FILE__, __LINE__); - return TPM_DRIVER_ERR; - } - - return tis_readresponse(recvbuf, recv_len); -} diff --git a/src/drivers/tpm/tpm.c b/src/drivers/tpm/tpm.c new file mode 100644 index 0000000..ea3b5f3 --- /dev/null +++ b/src/drivers/tpm/tpm.c @@ -0,0 +1,677 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * The code in this file has been heavily based on the article "Writing a TPM + * Device Driver" published on http://ptgmedia.pearsoncmg.com and the + * submission by Stefan Berger on Qemu-devel mailing list. + * + * One principal difference is that in the simplest config the other than 0 + * TPM localities do not get mapped by some devices (for instance, by + * Infineon slb9635), so this driver provides access to locality 0 only. + */ + +#include <stdlib.h> +#include <string.h> +#include <delay.h> +#include <arch/io.h> +#include <arch/byteorder.h> +#include <console/console.h> +#include <tpm.h> +#include <arch/early_variables.h> + +#define PREFIX "lpc_tpm: " + +/* coreboot wrapper for TPM driver (start) */ +#define TPM_DEBUG(fmt, args...) \ + if (CONFIG_DEBUG_TPM) { \ + printk(BIOS_DEBUG, PREFIX); \ + printk(BIOS_DEBUG, fmt , ##args); \ + } +#define TPM_DEBUG_IO_READ(reg_, val_) \ + TPM_DEBUG("Read reg 0x%x returns 0x%x\n", (reg_), (val_)) +#define TPM_DEBUG_IO_WRITE(reg_, val_) \ + TPM_DEBUG("Write reg 0x%x with 0x%x\n", (reg_), (val_)) +#define printf(x...) printk(BIOS_ERR, x) + +#define min(a,b) MIN(a,b) +#define max(a,b) MAX(a,b) +#define readb(_a) (*(volatile unsigned char *) (_a)) +#define writeb(_v, _a) (*(volatile unsigned char *) (_a) = (_v)) +#define readl(_a) (*(volatile unsigned long *) (_a)) +#define writel(_v, _a) (*(volatile unsigned long *) (_a) = (_v)) +/* coreboot wrapper for TPM driver (end) */ + +#ifndef CONFIG_TPM_TIS_BASE_ADDRESS +/* Base TPM address standard for x86 systems */ +#define CONFIG_TPM_TIS_BASE_ADDRESS 0xfed40000 +#endif + +/* the macro accepts the locality value, but only locality 0 is operational */ +#define TIS_REG(LOCALITY, REG) \ + (void *)(CONFIG_TPM_TIS_BASE_ADDRESS + (LOCALITY << 12) + REG) + +/* hardware registers' offsets */ +#define TIS_REG_ACCESS 0x0 +#define TIS_REG_INT_ENABLE 0x8 +#define TIS_REG_INT_VECTOR 0xc +#define TIS_REG_INT_STATUS 0x10 +#define TIS_REG_INTF_CAPABILITY 0x14 +#define TIS_REG_STS 0x18 +#define TIS_REG_BURST_COUNT 0x19 +#define TIS_REG_DATA_FIFO 0x24 +#define TIS_REG_DID_VID 0xf00 +#define TIS_REG_RID 0xf04 + +/* Some registers' bit field definitions */ +#define TIS_STS_VALID (1 << 7) /* 0x80 */ +#define TIS_STS_COMMAND_READY (1 << 6) /* 0x40 */ +#define TIS_STS_TPM_GO (1 << 5) /* 0x20 */ +#define TIS_STS_DATA_AVAILABLE (1 << 4) /* 0x10 */ +#define TIS_STS_EXPECT (1 << 3) /* 0x08 */ +#define TIS_STS_RESPONSE_RETRY (1 << 1) /* 0x02 */ + +#define TIS_ACCESS_TPM_REG_VALID_STS (1 << 7) /* 0x80 */ +#define TIS_ACCESS_ACTIVE_LOCALITY (1 << 5) /* 0x20 */ +#define TIS_ACCESS_BEEN_SEIZED (1 << 4) /* 0x10 */ +#define TIS_ACCESS_SEIZE (1 << 3) /* 0x08 */ +#define TIS_ACCESS_PENDING_REQUEST (1 << 2) /* 0x04 */ +#define TIS_ACCESS_REQUEST_USE (1 << 1) /* 0x02 */ +#define TIS_ACCESS_TPM_ESTABLISHMENT (1 << 0) /* 0x01 */ + +/* + * Error value returned if a tpm register does not enter the expected state + * after continuous polling. No actual TPM register reading ever returns ~0, + * so this value is a safe error indication to be mixed with possible status + * register values. + */ +#define TPM_TIMEOUT_ERR (~0) + +/* Error value returned on various TPM driver errors */ +#define TPM_DRIVER_ERR (~0) + + /* 1 second is plenty for anything TPM does.*/ +#define MAX_DELAY_US (1000 * 1000) + +/* + * Structures defined below allow creating descriptions of TPM vendor/device + * ID information for run time discovery. The only device the system knows + * about at this time is Infineon slb9635 + */ +struct device_name { + u16 dev_id; + const char * const dev_name; +}; + +struct vendor_name { + u16 vendor_id; + const char * vendor_name; + const struct device_name* dev_names; +}; + +static const struct device_name atmel_devices[] = { + {0x3204, "AT97SC3204"}, + {0xffff} +}; + +static const struct device_name infineon_devices[] = { + {0x000b, "SLB9635 TT 1.2"}, + {0xffff} +}; + +static const struct device_name nuvoton_devices[] = { + {0x00fe, "NPCT420AA V2"}, + {0xffff} +}; + +static const struct device_name stmicro_devices[] = { + {0x0000, "ST33ZP24" }, + {0xffff} +}; + +static const struct vendor_name vendor_names[] = { + {0x1114, "Atmel", atmel_devices}, + {0x15d1, "Infineon", infineon_devices}, + {0x1050, "Nuvoton", nuvoton_devices}, + {0x104a, "ST Microelectronics", stmicro_devices}, +}; + +/* + * Cached vendor/device ID pair to indicate that the device has been already + * discovered + */ +static u32 vendor_dev_id CAR_GLOBAL; + +static inline u8 tpm_read_status(int locality) +{ + u8 value = readb(TIS_REG(locality, TIS_REG_STS)); + TPM_DEBUG_IO_READ(TIS_REG_STS, value); + return value; +} + +static inline void tpm_write_status(u8 sts, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_STS, sts); + writeb(sts, TIS_REG(locality, TIS_REG_STS)); +} + +static inline u8 tpm_read_data(int locality) +{ + u8 value = readb(TIS_REG(locality, TIS_REG_DATA_FIFO)); + TPM_DEBUG_IO_READ(TIS_REG_DATA_FIFO, value); + return value; +} + +static inline void tpm_write_data(u8 data, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_STS, data); + writeb(data, TIS_REG(locality, TIS_REG_DATA_FIFO)); +} + +static inline u16 tpm_read_burst_count(int locality) +{ + u16 count; + count = readb(TIS_REG(locality, TIS_REG_BURST_COUNT)); + count |= readb(TIS_REG(locality, TIS_REG_BURST_COUNT + 1)) << 8; + TPM_DEBUG_IO_READ(TIS_REG_BURST_COUNT, count); + return count; +} + +static inline u8 tpm_read_access(int locality) +{ + u8 value = readb(TIS_REG(locality, TIS_REG_ACCESS)); + TPM_DEBUG_IO_READ(TIS_REG_ACCESS, value); + return value; +} + +static inline void tpm_write_access(u8 data, int locality) +{ + TPM_DEBUG_IO_WRITE(TIS_REG_ACCESS, data); + writeb(data, TIS_REG(locality, TIS_REG_ACCESS)); +} + +static inline u32 tpm_read_did_vid(int locality) +{ + u32 value = readl(TIS_REG(locality, TIS_REG_DID_VID)); + TPM_DEBUG_IO_READ(TIS_REG_DID_VID, value); + return value; +} + +/* + * tis_wait_sts() + * + * Wait for at least a second for a status to change its state to match the + * expected state. Normally the transition happens within microseconds. + * + * @locality - locality + * @mask - bitmask for the bitfield(s) to watch + * @expected - value the field(s) are supposed to be set to + * + * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. + */ +static int tis_wait_sts(int locality, u8 mask, u8 expected) +{ + u32 time_us = MAX_DELAY_US; + while (time_us > 0) { + u8 value = tpm_read_status(locality); + if ((value & mask) == expected) + return 0; + udelay(1); /* 1 us */ + time_us--; + } + return TPM_TIMEOUT_ERR; +} + +static inline int tis_wait_ready(int locality) +{ + return tis_wait_sts(locality, TIS_STS_COMMAND_READY, + TIS_STS_COMMAND_READY); +} + +static inline int tis_wait_valid(int locality) +{ + return tis_wait_sts(locality, TIS_STS_VALID, TIS_STS_VALID); +} + +static inline int tis_wait_valid_data(int locality) +{ + const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; + return tis_wait_sts(locality, has_data, has_data); +} + +static inline int tis_has_valid_data(int locality) +{ + const u8 has_data = TIS_STS_DATA_AVAILABLE | TIS_STS_VALID; + return (tpm_read_status(locality) & has_data) == has_data; +} + +static inline int tis_expect_data(int locality) +{ + return !!(tpm_read_status(locality) & TIS_STS_EXPECT); +} + +/* + * tis_wait_access() + * + * Wait for at least a second for a access to change its state to match the + * expected state. Normally the transition happens within microseconds. + * + * @locality - locality + * @mask - bitmask for the bitfield(s) to watch + * @expected - value the field(s) are supposed to be set to + * + * Returns 0 on success or TPM_TIMEOUT_ERR on timeout. + */ +static int tis_wait_access(int locality, u8 mask, u8 expected) +{ + u32 time_us = MAX_DELAY_US; + while (time_us > 0) { + u8 value = tpm_read_access(locality); + if ((value & mask) == expected) + return 0; + udelay(1); /* 1 us */ + time_us--; + } + return TPM_TIMEOUT_ERR; +} + +static inline int tis_wait_dropped_access(int locality) +{ + return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, 0); +} + +static inline int tis_wait_received_access(int locality) +{ + return tis_wait_access(locality, TIS_ACCESS_ACTIVE_LOCALITY, + TIS_ACCESS_ACTIVE_LOCALITY); +} + +static inline int tis_has_access(int locality) +{ + return !!(tpm_read_access(locality) & TIS_ACCESS_ACTIVE_LOCALITY); +} + +static inline void tis_request_access(int locality) +{ + tpm_write_access(TIS_ACCESS_REQUEST_USE, locality); +} + +static inline void tis_drop_access(int locality) +{ + tpm_write_access(TIS_ACCESS_ACTIVE_LOCALITY, locality); +} + +/* + * PC Client Specific TPM Interface Specification section 11.2.12: + * + * Software must be prepared to send two writes of a "1" to command ready + * field: the first to indicate successful read of all the data, thus + * clearing the data from the ReadFIFO and freeing the TPM's resources, + * and the second to indicate to the TPM it is about to send a new command. + * + * In practice not all TPMs behave the same so it is necessary to be + * flexible when trying to set command ready. + * + * Returns 0 on success if the TPM is ready for transactions. + * Returns TPM_TIMEOUT_ERR if the command ready bit does not get set. + */ +static int tis_command_ready(u8 locality) +{ + u32 status; + + /* 1st attempt to set command ready */ + tpm_write_status(TIS_STS_COMMAND_READY, locality); + + /* Wait for response */ + status = tpm_read_status(locality); + + /* Check if command ready is set yet */ + if (status & TIS_STS_COMMAND_READY) + return 0; + + /* 2nd attempt to set command ready */ + tpm_write_status(TIS_STS_COMMAND_READY, locality); + + return tis_wait_ready(locality); +} + +/* + * Probe the TPM device and try determining its manufacturer/device name. + * + * Returns 0 on success (the device is found or was found during an earlier + * invocation) or TPM_DRIVER_ERR if the device is not found. + */ +static u32 tis_probe(void) +{ + const char *device_name = "unknown"; + const char *vendor_name = device_name; + const struct device_name *dev; + u32 didvid; + u16 vid, did; + int i; + + if (car_get_var(vendor_dev_id)) + return 0; /* Already probed. */ + + didvid = tpm_read_did_vid(0); + if (!didvid || (didvid == 0xffffffff)) { + printf("%s: No TPM device found\n", __FUNCTION__); + return TPM_DRIVER_ERR; + } + + car_set_var(vendor_dev_id, didvid); + + vid = didvid & 0xffff; + did = (didvid >> 16) & 0xffff; + for (i = 0; i < ARRAY_SIZE(vendor_names); i++) { + int j = 0; + u16 known_did; + if (vid == vendor_names[i].vendor_id) { + vendor_name = vendor_names[i].vendor_name; + } else { + continue; + } + dev = &vendor_names[i].dev_names[j]; + while ((known_did = dev->dev_id) != 0xffff) { + if (known_did == did) { + device_name = dev->dev_name; + break; + } + j++; + } + break; + } + /* this will have to be converted into debug printout */ + printf("Found TPM %s by %s\n", device_name, vendor_name); + return 0; +} + +/* + * tis_senddata() + * + * send the passed in data to the TPM device. + * + * @data - address of the data to send, byte by byte + * @len - length of the data to send + * + * Returns 0 on success, TPM_DRIVER_ERR on error (in case the device does + * not accept the entire command). + */ +static u32 tis_senddata(const u8 * const data, u32 len) +{ + u32 offset = 0; + u16 burst = 0; + u32 max_cycles = 0; + u8 locality = 0; + + if (tis_wait_ready(locality)) { + printf("%s:%d - failed to get 'command_ready' status\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + burst = tpm_read_burst_count(locality); + + while (1) { + unsigned count; + + /* Wait till the device is ready to accept more data. */ + while (!burst) { + if (max_cycles++ == MAX_DELAY_US) { + printf("%s:%d failed to feed %d bytes of %d\n", + __FILE__, __LINE__, len - offset, len); + return TPM_DRIVER_ERR; + } + udelay(1); + burst = tpm_read_burst_count(locality); + } + + max_cycles = 0; + + /* + * Calculate number of bytes the TPM is ready to accept in one + * shot. + * + * We want to send the last byte outside of the loop (hence + * the -1 below) to make sure that the 'expected' status bit + * changes to zero exactly after the last byte is fed into the + * FIFO. + */ + count = min(burst, len - offset - 1); + while (count--) + tpm_write_data(data[offset++], locality); + + if (tis_wait_valid(locality) || !tis_expect_data(locality)) { + printf("%s:%d TPM command feed overflow\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + burst = tpm_read_burst_count(locality); + if ((offset == (len - 1)) && burst) + /* + * We need to be able to send the last byte to the + * device, so burst size must be nonzero before we + * break out. + */ + break; + } + + /* Send the last byte. */ + tpm_write_data(data[offset++], locality); + + /* + * Verify that TPM does not expect any more data as part of this + * command. + */ + if (tis_wait_valid(locality) || tis_expect_data(locality)) { + printf("%s:%d unexpected TPM status 0x%x\n", + __FILE__, __LINE__, tpm_read_status(locality)); + return TPM_DRIVER_ERR; + } + + /* OK, sitting pretty, let's start the command execution. */ + tpm_write_status(TIS_STS_TPM_GO, locality); + + return 0; +} + +/* + * tis_readresponse() + * + * read the TPM device response after a command was issued. + * + * @buffer - address where to read the response, byte by byte. + * @len - pointer to the size of buffer + * + * On success stores the number of received bytes to len and returns 0. On + * errors (misformatted TPM data or synchronization problems) returns + * TPM_DRIVER_ERR. + */ +static u32 tis_readresponse(u8 *buffer, size_t *len) +{ + u16 burst_count; + u32 offset = 0; + u8 locality = 0; + u32 expected_count = *len; + int max_cycles = 0; + + /* Wait for the TPM to process the command */ + if (tis_wait_valid_data(locality)) { + printf("%s:%d failed processing command\n", __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + do { + while ((burst_count = tpm_read_burst_count(locality)) == 0) { + if (max_cycles++ == MAX_DELAY_US) { + printf("%s:%d TPM stuck on read\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + udelay(1); + } + + max_cycles = 0; + + while (burst_count-- && (offset < expected_count)) { + buffer[offset++] = tpm_read_data(locality); + if (offset == 6) { + /* + * We got the first six bytes of the reply, + * let's figure out how many bytes to expect + * total - it is stored as a 4 byte number in + * network order, starting with offset 2 into + * the body of the reply. + */ + u32 real_length; + memcpy(&real_length, + buffer + 2, + sizeof(real_length)); + expected_count = be32_to_cpu(real_length); + + if ((expected_count < offset) || + (expected_count > *len)) { + printf("%s:%d bad response size %d\n", + __FILE__, __LINE__, + expected_count); + return TPM_DRIVER_ERR; + } + } + } + + /* Wait for the next portion */ + if (tis_wait_valid(locality)) { + printf("%s:%d failed to read response\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + if (offset == expected_count) + break; /* We got all we need */ + + } while (tis_has_valid_data(locality)); + + /* * Make sure we indeed read all there was. */ + if (tis_has_valid_data(locality)) { + printf("%s:%d wrong receive status: %x %d bytes left\n", + __FILE__, __LINE__, tpm_read_status(locality), + tpm_read_burst_count(locality)); + return TPM_DRIVER_ERR; + } + + /* Tell the TPM that we are done. */ + if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) + return TPM_DRIVER_ERR; + + *len = offset; + return 0; +} + +/* + * tis_init() + * + * Initialize the TPM device. Returns 0 on success or TPM_DRIVER_ERR on + * failure (in case device probing did not succeed). + */ +int tis_init(void) +{ + if (tis_probe()) + return TPM_DRIVER_ERR; + return 0; +} + +/* + * tis_open() + * + * Requests access to locality 0 for the caller. After all commands have been + * completed the caller is supposed to call tis_close(). + * + * Returns 0 on success, TPM_DRIVER_ERR on failure. + */ +int tis_open(void) +{ + u8 locality = 0; /* we use locality zero for everything */ + + if (tis_close()) + return TPM_DRIVER_ERR; + + /* now request access to locality */ + tis_request_access(locality); + + /* did we get a lock? */ + if (tis_wait_received_access(locality)) { + printf("%s:%d - failed to lock locality %d\n", + __FILE__, __LINE__, locality); + return TPM_DRIVER_ERR; + } + + /* Certain TPMs seem to need some delay here or they hang... */ + udelay(10); + + if (tis_command_ready(locality) == TPM_TIMEOUT_ERR) + return TPM_DRIVER_ERR; + + return 0; +} + +/* + * tis_close() + * + * terminate the current session with the TPM by releasing the locked + * locality. Returns 0 on success of TPM_DRIVER_ERR on failure (in case lock + * removal did not succeed). + */ +int tis_close(void) +{ + u8 locality = 0; + if (tis_has_access(locality)) { + tis_drop_access(locality); + if (tis_wait_dropped_access(locality)) { + printf("%s:%d - failed to release locality %d\n", + __FILE__, __LINE__, locality); + return TPM_DRIVER_ERR; + } + } + return 0; +} + +/* + * tis_sendrecv() + * + * Send the requested data to the TPM and then try to get its response + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or TPM_DRIVER_ERR on failure. + */ +int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, + uint8_t *recvbuf, size_t *recv_len) +{ + if (tis_senddata(sendbuf, send_size)) { + printf("%s:%d failed sending data to TPM\n", + __FILE__, __LINE__); + return TPM_DRIVER_ERR; + } + + return tis_readresponse(recvbuf, recv_len); +} diff --git a/src/drivers/tpm/vboot.c b/src/drivers/tpm/vboot.c new file mode 100644 index 0000000..1622332 --- /dev/null +++ b/src/drivers/tpm/vboot.c @@ -0,0 +1,221 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <types.h> +#include <console/console.h> +#include <arch/acpi.h> +#include <tpm.h> +#include <reset.h> + +//#define EXTRA_LOGGING + +#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ + +#define TPM_SUCCESS ((u32)0x00000000) + +#define TPM_E_IOERROR ((u32)0x0000001f) +#define TPM_E_COMMUNICATION_ERROR ((u32)0x00005004) +#define TPM_E_NON_FATAL ((u32)0x00000800) +#define TPM_E_INVALID_POSTINIT ((u32)0x00000026) + +#define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1)) +#define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2)) + +static const struct { + u8 buffer[12]; +} tpm_resume_cmd = { + { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x2 } +}; + +static const struct { + u8 buffer[12]; +} tpm_startup_cmd = { + {0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1 } +}; + +static const struct { + u8 buffer[10]; +} tpm_continueselftest_cmd = { + { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53 } +}; + +static inline void FromTpmUint32(const u8 * buffer, u32 * x) +{ + *x = ((buffer[0] << 24) | + (buffer[1] << 16) | (buffer[2] << 8) | buffer[3]); +} + +static inline int TpmCommandSize(const u8 * buffer) +{ + u32 size; + FromTpmUint32(buffer + sizeof(u16), &size); + return (int)size; +} + +/* Gets the code field of a TPM command. */ +static inline int TpmCommandCode(const u8 * buffer) +{ + u32 code; + FromTpmUint32(buffer + sizeof(u16) + sizeof(u32), &code); + return code; +} + +/* Gets the return code field of a TPM result. */ +static inline int TpmReturnCode(const u8 * buffer) +{ + return TpmCommandCode(buffer); +} + +/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or + * DOING_SELFTEST errors are returned. + */ +static u32 TlclSendReceiveNoRetry(const u8 * request, + u8 * response, int max_length) +{ + size_t response_length = max_length; + u32 result; + +#ifdef EXTRA_LOGGING + printk(BIOS_DEBUG, "TPM: command: %x%x %x%x%x%x %x%x%x%x\n", + request[0], request[1], + request[2], request[3], request[4], request[5], + request[6], request[7], request[8], request[9]); +#endif + + result = TPM_SUCCESS; + if (tis_sendrecv + (request, TpmCommandSize(request), response, &response_length)) + result = TPM_E_IOERROR; + + if (0 != result) { + /* Communication with TPM failed, so response is garbage */ + printk(BIOS_DEBUG, + "TPM: command 0x%x send/receive failed: 0x%x\n", + TpmCommandCode(request), result); + return TPM_E_COMMUNICATION_ERROR; + } + /* Otherwise, use the result code from the response */ + result = TpmReturnCode(response); + +/* TODO: add paranoia about returned response_length vs. max_length + * (and possibly expected length from the response header). See + * crosbug.com/17017 */ + +#ifdef EXTRA_LOGGING + printk(BIOS_DEBUG, "TPM: response: %x%x %x%x%x%x %x%x%x%x\n", + response[0], response[1], + response[2], response[3], response[4], response[5], + response[6], response[7], response[8], response[9]); +#endif + + printk(BIOS_DEBUG, "TPM: command 0x%x returned 0x%x\n", + TpmCommandCode(request), result); + + return result; +} + +static inline u32 TlclContinueSelfTest(void) +{ + u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + printk(BIOS_DEBUG, "TPM: Continue self test\n"); + /* Call the No Retry version of SendReceive to avoid recursion. */ + return TlclSendReceiveNoRetry(tpm_continueselftest_cmd.buffer, + response, sizeof(response)); +} + +/* Sends a TPM command and gets a response. Returns 0 if success or the TPM + * error code if error. In the firmware, waits for the self test to complete + * if needed. In the host, reports the first error without retries. */ +static u32 TlclSendReceive(const u8 * request, u8 * response, int max_length) +{ + u32 result = TlclSendReceiveNoRetry(request, response, max_length); + /* When compiling for the firmware, hide command failures due to the self + * test not having run or completed. */ + /* If the command fails because the self test has not completed, try it + * again after attempting to ensure that the self test has completed. */ + if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { + result = TlclContinueSelfTest(); + if (result != TPM_SUCCESS) { + return result; + } +#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) + /* Retry only once */ + result = TlclSendReceiveNoRetry(request, response, max_length); +#else + /* This needs serious testing. The TPM specification says: + * "iii. The caller MUST wait for the actions of + * TPM_ContinueSelfTest to complete before reissuing the + * command C1." But, if ContinueSelfTest is non-blocking, how + * do we know that the actions have completed other than trying + * again? */ + do { + result = + TlclSendReceiveNoRetry(request, response, + max_length); + } while (result == TPM_E_DOING_SELFTEST); +#endif + } + + return result; +} + +void init_vboot(int bootmode) +{ + u32 result; + u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; + + printk(BIOS_DEBUG, "Verified boot TPM initialization.\n"); + + printk(BIOS_SPEW, "TPM: Init\n"); + if (tis_init()) + return; + + printk(BIOS_SPEW, "TPM: Open\n"); + if (tis_open()) + return; + + + if (bootmode == 2) { + /* S3 Resume */ + printk(BIOS_SPEW, "TPM: Resume\n"); + result = TlclSendReceive(tpm_resume_cmd.buffer, + response, sizeof(response)); + if (result == TPM_E_INVALID_POSTINIT) { + /* We're on a platform where the TPM maintains power + * in S3, so it's already initialized. + */ + printk(BIOS_DEBUG, "TPM: Already initialized.\n"); + return; + } + } else { + printk(BIOS_SPEW, "TPM: Startup\n"); + result = TlclSendReceive(tpm_startup_cmd.buffer, + response, sizeof(response)); + } + + if (result == TPM_SUCCESS) { + printk(BIOS_SPEW, "TPM: OK.\n"); + return; + } + +#if !MOCK_TPM + printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result); + hard_reset(); +#endif +} diff --git a/src/include/bootmode.h b/src/include/bootmode.h index 323668b..63b5abc 100644 --- a/src/include/bootmode.h +++ b/src/include/bootmode.h @@ -37,4 +37,5 @@ static inline int recovery_mode_enabled(void) { return 0; } static inline int developer_mode_enabled(void) { return 0; } #endif +void init_trusted_platform(int bootmode); #endif /* __BOOTMODE_H__ */ diff --git a/src/include/pc80/tpm.h b/src/include/pc80/tpm.h deleted file mode 100644 index 2eff15a..0000000 --- a/src/include/pc80/tpm.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef TPM_H_ -#define TPM_H_ - -int tis_init(void); -int tis_open(void); -int tis_close(void); -int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, - size_t *recv_len); - -#endif /* TPM_H_ */ diff --git a/src/include/tpm.h b/src/include/tpm.h new file mode 100644 index 0000000..d23b076 --- /dev/null +++ b/src/include/tpm.h @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef TPM_H_ +#define TPM_H_ + +#include <stddef.h> + +int tis_init(void); +int tis_open(void); +int tis_close(void); +int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, + size_t *recv_len); + +void init_vboot(int bootmode); + +#endif /* TPM_H_ */ diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c index 9818490..4d44df0 100644 --- a/src/lib/bootmode.c +++ b/src/lib/bootmode.c @@ -18,7 +18,9 @@ */ #include <rules.h> +#include <console/console.h> #include <bootmode.h> +#include <tpm.h> #if CONFIG_CHROMEOS || CONFIG_VBOOT_VERIFY_FIRMWARE #include <vendorcode/google/chromeos/chromeos.h> #endif @@ -78,3 +80,26 @@ void gfx_set_init_done(int done) gfx_init_done = done; } #endif + +#if ENV_ROMSTAGE +void init_trusted_platform(int bootmode) +{ + /* With CONFIG_CHROMEOS, u-boot does TPM init on power-on. + * Doing TPM startup when we're not coming in on the S3 resume path + * saves us roughly 20ms in boot time only. This does not seem to + * be worth an API change to vboot_reference-firmware right now, so + * just bail out early: + */ + if (IS_ENABLED(CONFIG_VBOOT_VERIFY_FIRMWARE) && (bootmode != 2)) + return; + + /* On some boards the TPM stays powered up in S3. */ + if (IS_ENABLED(CONFIG_NO_TPM_RESUME) && (bootmode == 2)) + return; + + if (IS_ENABLED(CONFIG_TPM)) + init_vboot(bootmode); + else + printk(BIOS_DEBUG, "TPM: support not enabled in build.\n"); +} +#endif diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index d32f3f0..0b2f5c9 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -38,9 +38,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #include <cbfs.h> static void pch_enable_lpc(void) @@ -273,8 +271,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 66d2067..f4fd09e 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -40,9 +40,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #include <cbfs.h> #include <southbridge/intel/bd82x6x/chip.h> @@ -317,8 +315,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 361c19b..7cf1055 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -38,9 +38,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #include <cbfs.h> #include "ec/compal/ene932/ec.h" @@ -273,8 +271,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index f53c07d..011ff7d 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -39,9 +39,6 @@ #include <cpu/x86/msr.h> #include "gpio.h" #include <bootmode.h> -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif #include <cbfs.h> #include <ec/quanta/it8518/ec.h> #include "ec.h" @@ -327,8 +324,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 9308e96..93c02de 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -38,9 +38,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif +#include <bootmode.h> #define SIO_PORT 0x164e @@ -325,8 +323,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index ef5a836..1882efe 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -45,9 +45,6 @@ #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif static void pch_enable_lpc(void) { @@ -345,8 +342,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 8d2a3e4..6e7b05e 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -45,9 +45,6 @@ #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif -#if CONFIG_CHROMEOS -#include <vendorcode/google/chromeos/chromeos.h> -#endif /* Stumpy USB Reset Disable defined in cmos.layout */ #if CONFIG_USE_OPTION_TABLE @@ -352,8 +349,6 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_CHROMEOS - init_chromeos(boot_mode); -#endif + init_trusted_platform(boot_mode); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index 8436c65..0513b06 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -32,7 +32,7 @@ #include <ramstage_cache.h> #include <romstage_handoff.h> #include <timestamp.h> -#include <vendorcode/google/chromeos/chromeos.h> +#include <bootmode.h> #include <baytrail/gpio.h> #include <baytrail/iomap.h> #include <baytrail/lpc.h> @@ -190,15 +190,9 @@ static int chipset_prev_sleep_state(void) return prev_sleep_state; } -#if CONFIG_CHROMEOS static inline void chromeos_init(int prev_sleep_state) { - /* Normalize the sleep state to what init_chromeos() wants for S3: 2. */ - init_chromeos(prev_sleep_state == 3 ? 2 : 0); } -#else -static inline void chromeos_init(int prev_sleep_state) {} -#endif /* Entry from the mainboard. */ void romstage_common(struct romstage_params *params) @@ -227,7 +221,10 @@ void romstage_common(struct romstage_params *params) else printk(BIOS_DEBUG, "Romstage handoff structure not added!\n"); - chromeos_init(prev_sleep_state); + /* Normalize the sleep state to what init_trusted_platform() + * wants for S3: 2. + */ + init_trusted_platform(prev_sleep_state == 3 ? 2 : 0); /* Save timestamp information. */ timestamp_init(ts64_to_tsc(params->ts.times[0])); diff --git a/src/vendorcode/google/chromeos/Kconfig b/src/vendorcode/google/chromeos/Kconfig index a1a9d9a..6c074c7 100644 --- a/src/vendorcode/google/chromeos/Kconfig +++ b/src/vendorcode/google/chromeos/Kconfig @@ -124,13 +124,5 @@ config VBOOT_REFCODE_INDEX This is the index of the reference code component in the verified firmware block. -config NO_TPM_RESUME - bool - default n - help - On some boards the TPM stays powered up in S3. On those - boards, booting Windows will break if the TPM resume command - is sent during an S3 resume. - endif endmenu diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 2dcb03a..5fd595e 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -21,19 +21,12 @@ romstage-y += chromeos.c ramstage-y += chromeos.c romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vbnv.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += vbnv.c -romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vboot.c ramstage-y += gnvs.c romstage-y += fmap.c ramstage-y += fmap.c ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c smm-y += fmap.c -ifeq ($(MOCK_TPM),1) -CFLAGS_common += -DMOCK_TPM=1 -else -CFLAGS_common += -DMOCK_TPM=0 -endif - ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index dc34dc3..ce884b1 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -31,9 +31,6 @@ int vboot_wants_oprom(void); void read_vbnv(uint8_t *vbnv_copy); void save_vbnv(const uint8_t *vbnv_copy); -/* functions implemented in vboot.c */ -void init_chromeos(int bootmode); - #if CONFIG_VBOOT_VERIFY_FIRMWARE /* Returns 0 on success < 0 on error. */ int vboot_get_handoff_info(void **addr, uint32_t *size); diff --git a/src/vendorcode/google/chromeos/vboot.c b/src/vendorcode/google/chromeos/vboot.c deleted file mode 100644 index 03d759c..0000000 --- a/src/vendorcode/google/chromeos/vboot.c +++ /dev/null @@ -1,244 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <types.h> -#include <console/console.h> -#include <arch/acpi.h> -#include <pc80/tpm.h> -#include <reset.h> -#include "chromeos.h" - -//#define EXTRA_LOGGING -#define UBOOT_DOES_TPM_STARTUP - -#define TPM_LARGE_ENOUGH_COMMAND_SIZE 256 /* saves space in the firmware */ - -#define TPM_SUCCESS ((u32)0x00000000) - -#define TPM_E_IOERROR ((u32)0x0000001f) -#define TPM_E_COMMUNICATION_ERROR ((u32)0x00005004) -#define TPM_E_NON_FATAL ((u32)0x00000800) -#define TPM_E_INVALID_POSTINIT ((u32)0x00000026) - -#define TPM_E_NEEDS_SELFTEST ((u32)(TPM_E_NON_FATAL + 1)) -#define TPM_E_DOING_SELFTEST ((u32)(TPM_E_NON_FATAL + 2)) - -#if CONFIG_NO_TPM_RESUME -static void init_vboot(int bootmode) -{ -} -#else -static const struct { - u8 buffer[12]; -} tpm_resume_cmd = { - { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x2 } -}; - -static const struct { - u8 buffer[12]; -} tpm_startup_cmd = { - {0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x1 } -}; - -static const struct { - u8 buffer[10]; -} tpm_continueselftest_cmd = { - { 0x0, 0xc1, 0x0, 0x0, 0x0, 0xa, 0x0, 0x0, 0x0, 0x53 } -}; - -static inline void FromTpmUint32(const u8 * buffer, u32 * x) -{ - *x = ((buffer[0] << 24) | - (buffer[1] << 16) | (buffer[2] << 8) | buffer[3]); -} - -static inline int TpmCommandSize(const u8 * buffer) -{ - u32 size; - FromTpmUint32(buffer + sizeof(u16), &size); - return (int)size; -} - -/* Gets the code field of a TPM command. */ -static inline int TpmCommandCode(const u8 * buffer) -{ - u32 code; - FromTpmUint32(buffer + sizeof(u16) + sizeof(u32), &code); - return code; -} - -/* Gets the return code field of a TPM result. */ -static inline int TpmReturnCode(const u8 * buffer) -{ - return TpmCommandCode(buffer); -} - -/* Like TlclSendReceive below, but do not retry if NEEDS_SELFTEST or - * DOING_SELFTEST errors are returned. - */ -static u32 TlclSendReceiveNoRetry(const u8 * request, - u8 * response, int max_length) -{ - size_t response_length = max_length; - u32 result; - -#ifdef EXTRA_LOGGING - printk(BIOS_DEBUG, "TPM: command: %x%x %x%x%x%x %x%x%x%x\n", - request[0], request[1], - request[2], request[3], request[4], request[5], - request[6], request[7], request[8], request[9]); -#endif - - result = TPM_SUCCESS; - if (tis_sendrecv - (request, TpmCommandSize(request), response, &response_length)) - result = TPM_E_IOERROR; - - if (0 != result) { - /* Communication with TPM failed, so response is garbage */ - printk(BIOS_DEBUG, - "TPM: command 0x%x send/receive failed: 0x%x\n", - TpmCommandCode(request), result); - return TPM_E_COMMUNICATION_ERROR; - } - /* Otherwise, use the result code from the response */ - result = TpmReturnCode(response); - -/* TODO: add paranoia about returned response_length vs. max_length - * (and possibly expected length from the response header). See - * crosbug.com/17017 */ - -#ifdef EXTRA_LOGGING - printk(BIOS_DEBUG, "TPM: response: %x%x %x%x%x%x %x%x%x%x\n", - response[0], response[1], - response[2], response[3], response[4], response[5], - response[6], response[7], response[8], response[9]); -#endif - - printk(BIOS_DEBUG, "TPM: command 0x%x returned 0x%x\n", - TpmCommandCode(request), result); - - return result; -} - -static inline u32 TlclContinueSelfTest(void) -{ - u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - printk(BIOS_DEBUG, "TPM: Continue self test\n"); - /* Call the No Retry version of SendReceive to avoid recursion. */ - return TlclSendReceiveNoRetry(tpm_continueselftest_cmd.buffer, - response, sizeof(response)); -} - -/* Sends a TPM command and gets a response. Returns 0 if success or the TPM - * error code if error. In the firmware, waits for the self test to complete - * if needed. In the host, reports the first error without retries. */ -static u32 TlclSendReceive(const u8 * request, u8 * response, int max_length) -{ - u32 result = TlclSendReceiveNoRetry(request, response, max_length); - /* When compiling for the firmware, hide command failures due to the self - * test not having run or completed. */ - /* If the command fails because the self test has not completed, try it - * again after attempting to ensure that the self test has completed. */ - if (result == TPM_E_NEEDS_SELFTEST || result == TPM_E_DOING_SELFTEST) { - result = TlclContinueSelfTest(); - if (result != TPM_SUCCESS) { - return result; - } -#if defined(TPM_BLOCKING_CONTINUESELFTEST) || defined(VB_RECOVERY_MODE) - /* Retry only once */ - result = TlclSendReceiveNoRetry(request, response, max_length); -#else - /* This needs serious testing. The TPM specification says: - * "iii. The caller MUST wait for the actions of - * TPM_ContinueSelfTest to complete before reissuing the - * command C1." But, if ContinueSelfTest is non-blocking, how - * do we know that the actions have completed other than trying - * again? */ - do { - result = - TlclSendReceiveNoRetry(request, response, - max_length); - } while (result == TPM_E_DOING_SELFTEST); -#endif - } - - return result; -} - -static void init_vboot(int bootmode) -{ - u32 result; - u8 response[TPM_LARGE_ENOUGH_COMMAND_SIZE]; - -#ifdef UBOOT_DOES_TPM_STARTUP - /* Doing TPM startup when we're not coming in on the S3 resume path - * saves us roughly 20ms in boot time only. This does not seem to - * be worth an API change to vboot_reference-firmware right now, so - * let's keep the code around, but just bail out early: - */ - if (bootmode != 2) - return; -#endif - - printk(BIOS_DEBUG, "Verified boot TPM initialization.\n"); - - printk(BIOS_SPEW, "TPM: Init\n"); - if (tis_init()) - return; - - printk(BIOS_SPEW, "TPM: Open\n"); - if (tis_open()) - return; - - - if (bootmode == 2) { - /* S3 Resume */ - printk(BIOS_SPEW, "TPM: Resume\n"); - result = TlclSendReceive(tpm_resume_cmd.buffer, - response, sizeof(response)); - if (result == TPM_E_INVALID_POSTINIT) { - /* We're on a platform where the TPM maintains power - * in S3, so it's already initialized. - */ - printk(BIOS_DEBUG, "TPM: Already initialized.\n"); - return; - } - } else { - printk(BIOS_SPEW, "TPM: Startup\n"); - result = TlclSendReceive(tpm_startup_cmd.buffer, - response, sizeof(response)); - } - - if (result == TPM_SUCCESS) { - printk(BIOS_SPEW, "TPM: OK.\n"); - return; - } - -#if !MOCK_TPM - printk(BIOS_ERR, "TPM: Error code 0x%x. Hard reset!\n", result); - hard_reset(); -#endif -} -#endif - -void init_chromeos(int bootmode) -{ - init_vboot(bootmode); -} diff --git a/src/vendorcode/google/chromeos/vboot_loader.c b/src/vendorcode/google/chromeos/vboot_loader.c index 943ad17..2f786ad 100644 --- a/src/vendorcode/google/chromeos/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot_loader.c @@ -24,7 +24,7 @@ #include <cbmem.h> #include <console/console.h> #include <console/vtxprintf.h> -#include <pc80/tpm.h> +#include <tpm.h> #include <reset.h> #include <ramstage_loader.h> #include <romstage_handoff.h>

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Patch set updated for coreboot: 0a76f55 ChromeOS: Rename chromeos.c in vendorcode
by Kyösti Mälkki 09 May '14

09 May '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5645 -gerrit commit 0a76f5543722a6c8bd89875ce52cff2c315a7ec3 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Apr 28 23:25:01 2014 +0300 ChromeOS: Rename chromeos.c in vendorcode Rename the file to vboot_handoff.c and compile it conditionally with VBOOT_VERIFY_FIRMWARE. Change-Id: I8b6fd91063b54cb8f5927c6483a398b75e1d262a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/vendorcode/google/chromeos/Makefile.inc | 4 +- src/vendorcode/google/chromeos/chromeos.c | 120 ------------------------- src/vendorcode/google/chromeos/vboot_handoff.c | 115 ++++++++++++++++++++++++ 3 files changed, 117 insertions(+), 122 deletions(-) diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 5fd595e..cc63e06 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -17,8 +17,6 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## -romstage-y += chromeos.c -ramstage-y += chromeos.c romstage-$(CONFIG_ARCH_ROMSTAGE_X86_32) += vbnv.c ramstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += vbnv.c ramstage-y += gnvs.c @@ -28,6 +26,8 @@ ramstage-$(CONFIG_CHROMEOS_RAMOOPS) += ramoops.c smm-y += fmap.c ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) +romstage-y += vboot_handoff.c +ramstage-y += vboot_handoff.c romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c deleted file mode 100644 index f8dd7dc..0000000 --- a/src/vendorcode/google/chromeos/chromeos.c +++ /dev/null @@ -1,120 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stddef.h> -#include "chromeos.h" -#if CONFIG_VBOOT_VERIFY_FIRMWARE -#include "vboot_handoff.h" -#endif -#include <boot/coreboot_tables.h> -#include <cbmem.h> -#include <console/console.h> - -#if CONFIG_VBOOT_VERIFY_FIRMWARE -#include <payload_loader.h> - -int vboot_enable_developer(void) -{ - struct vboot_handoff *vbho; - - vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vbho == NULL) { - printk(BIOS_ERR, "%s: Couldn't find vboot_handoff structure!\n", - __func__); - return 0; - } - - return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_DEVELOPER); -} - -int vboot_enable_recovery(void) -{ - struct vboot_handoff *vbho; - - vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vbho == NULL) - return 0; - - return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_RECOVERY); -} - -static void *vboot_get_payload(size_t *len) -{ - struct vboot_handoff *vboot_handoff; - struct firmware_component *fwc; - - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vboot_handoff == NULL) - return NULL; - - if (CONFIG_VBOOT_BOOT_LOADER_INDEX >= MAX_PARSED_FW_COMPONENTS) { - printk(BIOS_ERR, "Invalid boot loader index: %d\n", - CONFIG_VBOOT_BOOT_LOADER_INDEX); - return NULL; - } - - fwc = &vboot_handoff->components[CONFIG_VBOOT_BOOT_LOADER_INDEX]; - - if (len != NULL) - *len = fwc->size; - - printk(BIOS_DEBUG, "Booting 0x%x byte payload at 0x%08x.\n", - fwc->size, fwc->address); - - return (void *)fwc->address; -} - -static int vboot_locate_payload(struct payload *payload) -{ - void *buffer; - size_t size; - - buffer = vboot_get_payload(&size); - - if (buffer == NULL) - return -1; - - payload->backing_store.data = buffer; - payload->backing_store.size = size; - - return 0; -} - -const struct payload_loader_ops vboot_payload_loader = { - .name = "VBOOT", - .locate = vboot_locate_payload, -}; - -int vboot_get_handoff_info(void **addr, uint32_t *size) -{ - struct vboot_handoff *vboot_handoff; - - vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); - - if (vboot_handoff == NULL) - return -1; - - *addr = vboot_handoff; - *size = sizeof(*vboot_handoff); - return 0; -} -#endif diff --git a/src/vendorcode/google/chromeos/vboot_handoff.c b/src/vendorcode/google/chromeos/vboot_handoff.c new file mode 100644 index 0000000..937b2e3 --- /dev/null +++ b/src/vendorcode/google/chromeos/vboot_handoff.c @@ -0,0 +1,115 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stddef.h> +#include "chromeos.h" +#include <boot/coreboot_tables.h> +#include <cbmem.h> +#include <console/console.h> +#include <payload_loader.h> +#include "vboot_handoff.h" + +int vboot_enable_developer(void) +{ + struct vboot_handoff *vbho; + + vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vbho == NULL) { + printk(BIOS_ERR, "%s: Couldn't find vboot_handoff structure!\n", + __func__); + return 0; + } + + return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_DEVELOPER); +} + +int vboot_enable_recovery(void) +{ + struct vboot_handoff *vbho; + + vbho = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vbho == NULL) + return 0; + + return !!(vbho->init_params.out_flags & VB_INIT_OUT_ENABLE_RECOVERY); +} + +static void *vboot_get_payload(size_t *len) +{ + struct vboot_handoff *vboot_handoff; + struct firmware_component *fwc; + + vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vboot_handoff == NULL) + return NULL; + + if (CONFIG_VBOOT_BOOT_LOADER_INDEX >= MAX_PARSED_FW_COMPONENTS) { + printk(BIOS_ERR, "Invalid boot loader index: %d\n", + CONFIG_VBOOT_BOOT_LOADER_INDEX); + return NULL; + } + + fwc = &vboot_handoff->components[CONFIG_VBOOT_BOOT_LOADER_INDEX]; + + if (len != NULL) + *len = fwc->size; + + printk(BIOS_DEBUG, "Booting 0x%x byte payload at 0x%08x.\n", + fwc->size, fwc->address); + + return (void *)fwc->address; +} + +static int vboot_locate_payload(struct payload *payload) +{ + void *buffer; + size_t size; + + buffer = vboot_get_payload(&size); + + if (buffer == NULL) + return -1; + + payload->backing_store.data = buffer; + payload->backing_store.size = size; + + return 0; +} + +const struct payload_loader_ops vboot_payload_loader = { + .name = "VBOOT", + .locate = vboot_locate_payload, +}; + +int vboot_get_handoff_info(void **addr, uint32_t *size) +{ + struct vboot_handoff *vboot_handoff; + + vboot_handoff = cbmem_find(CBMEM_ID_VBOOT_HANDOFF); + + if (vboot_handoff == NULL) + return -1; + + *addr = vboot_handoff; + *size = sizeof(*vboot_handoff); + return 0; +}

1 0

Patch set updated for coreboot: 232621a src/drivers/pc80: Remove empty struct keyboard
by Edward O'Callaghan 09 May '14

09 May '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5617 -gerrit commit 232621aca2bab47ec2bf9e3bd3397b3aa4a65500 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Apr 30 05:01:52 2014 +1000 src/drivers/pc80: Remove empty struct keyboard This is a empty struct that has propagated through the superio's & ec's but really does nothing. Time to get rid of it before it adds yet more cruft. However, since this touches many superio's at once we do this in stages by first changing the function type to be a pure procedure. Change-Id: Ibc732e676a9d4f0269114acabc92b15771d27ef2 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/drivers/pc80/keyboard.c | 2 +- src/ec/compal/ene932/ec.c | 5 +---- src/ec/google/chromeec/ec_lpc.c | 5 ++--- src/ec/quanta/ene_kb3940q/ec.c | 4 +--- src/ec/quanta/it8518/ec.c | 5 +---- src/include/pc80/keyboard.h | 2 +- src/mainboard/emulation/qemu-i440fx/mainboard.c | 2 +- src/mainboard/emulation/qemu-q35/mainboard.c | 2 +- src/mainboard/lenovo/t530/mainboard.c | 2 +- src/mainboard/lenovo/x201/mainboard.c | 2 +- src/mainboard/lenovo/x230/mainboard.c | 2 +- src/mainboard/packardbell/ms2290/mainboard.c | 2 +- src/mainboard/roda/rk9/mainboard.c | 2 +- src/northbridge/via/cx700/lpc.c | 2 +- src/northbridge/via/vx800/lpc.c | 2 +- src/southbridge/dmp/vortex86ex/southbridge.c | 2 +- src/southbridge/sis/sis966/lpc.c | 16 ++++++++-------- src/southbridge/via/vt8231/vt8231.c | 2 +- src/southbridge/via/vt8235/vt8235.c | 2 +- src/southbridge/via/vt8237r/lpc.c | 2 +- src/superio/fintek/f71863fg/superio.c | 5 ++--- src/superio/fintek/f71869ad/superio.c | 2 +- src/superio/fintek/f71872/superio.c | 5 ++--- src/superio/fintek/f71889/superio.c | 5 ++--- src/superio/fintek/f81865f/superio.c | 5 ++--- src/superio/ite/it8671f/superio.c | 4 +--- src/superio/ite/it8712f/superio.c | 4 +--- src/superio/ite/it8716f/superio.c | 4 +--- src/superio/ite/it8718f/superio.c | 4 +--- src/superio/ite/it8721f/superio.c | 4 +--- src/superio/ite/it8772f/superio.c | 4 ++-- src/superio/nsc/pc8374/superio.c | 4 +--- src/superio/nsc/pc87309/superio.c | 4 +--- src/superio/nsc/pc87351/superio.c | 4 +--- src/superio/nsc/pc87360/superio.c | 4 +--- src/superio/nsc/pc87366/superio.c | 4 +--- src/superio/nsc/pc87417/superio.c | 4 +--- src/superio/nsc/pc87427/superio.c | 5 ++--- src/superio/nsc/pc97307/superio.c | 6 +++--- src/superio/nsc/pc97317/superio.c | 6 +++--- src/superio/nuvoton/wpcm450/superio.c | 4 +--- src/superio/renesas/m3885x/superio.c | 5 ++--- src/superio/smsc/fdc37m60x/superio.c | 4 +--- src/superio/smsc/fdc37n972/fdc37n972.c | 5 +---- src/superio/smsc/kbc1100/superio.c | 4 +--- src/superio/smsc/lpc47b272/superio.c | 4 +--- src/superio/smsc/lpc47b397/superio.c | 4 +--- src/superio/smsc/lpc47m10x/superio.c | 4 +--- src/superio/smsc/lpc47m15x/superio.c | 4 +--- src/superio/smsc/lpc47n227/superio.c | 5 ++--- src/superio/smsc/mec1308/superio.c | 4 +--- src/superio/smsc/sch4037/superio.c | 4 +--- src/superio/smsc/sio1007/chip.h | 1 + src/superio/smsc/sio1036/superio.c | 2 -- src/superio/smsc/sio10n268/sio10n268.c | 4 +--- src/superio/smsc/smscsuperio/superio.c | 4 +--- src/superio/winbond/w83627dhg/superio.c | 4 +--- src/superio/winbond/w83627ehg/superio.c | 4 +--- src/superio/winbond/w83627hf/superio.c | 4 +--- src/superio/winbond/w83627thg/superio.c | 4 +--- src/superio/winbond/w83627uhg/superio.c | 4 +--- src/superio/winbond/w83697hf/superio.c | 3 ++- src/superio/winbond/w83977f/superio.c | 4 +--- src/superio/winbond/w83977tf/superio.c | 4 +--- 64 files changed, 84 insertions(+), 161 deletions(-) diff --git a/src/drivers/pc80/keyboard.c b/src/drivers/pc80/keyboard.c index 5b68617..6a573d8 100644 --- a/src/drivers/pc80/keyboard.c +++ b/src/drivers/pc80/keyboard.c @@ -193,7 +193,7 @@ static u8 send_keyboard(u8 command) return regval; } -void pc_keyboard_init(struct pc_keyboard *keyboard) +void pc_keyboard_init(void) { u8 retries; u8 regval; diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index 3f4d1b9..e60a0ac 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -133,14 +133,11 @@ static u8 ec_io_read(u16 addr) #ifndef __SMM__ static void ene932_init(device_t dev) { - struct ec_compal_ene932_config *conf = dev->chip_info; - - if (!dev->enabled) return; printk(BIOS_DEBUG, "Compal ENE932: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index a445da8..5f377c9 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -138,11 +138,10 @@ int google_chromeec_command(struct chromeec_command *cec_command) #ifndef __SMM__ static void lpc_ec_init(device_t dev) { - struct ec_google_chromeec_config *conf = dev->chip_info; - if (!dev->enabled) return; - pc_keyboard_init(&conf->keyboard); + + pc_keyboard_init(); google_chromeec_init(); } diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 137aa81..57854d0 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -141,13 +141,11 @@ static void ene_kb3940q_log_events(void) static void ene_kb3940q_init(device_t dev) { - struct ec_quanta_ene_kb3940q_config *conf = dev->chip_info; - if (!dev->enabled) return; printk(BIOS_DEBUG, "Quanta EnE KB3940Q: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); ene_kb3940q_log_events(); } diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 6516cee..7588a1e 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -162,14 +162,11 @@ void ec_it8518_enable_wake_events(void) #ifndef __SMM__ static void it8518_init(device_t dev) { - struct ec_quanta_it8518_config *conf = dev->chip_info; - - if (!dev->enabled) return; printk(BIOS_DEBUG, "Quanta IT8518: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } diff --git a/src/include/pc80/keyboard.h b/src/include/pc80/keyboard.h index ce281bb..5f97723 100644 --- a/src/include/pc80/keyboard.h +++ b/src/include/pc80/keyboard.h @@ -5,7 +5,7 @@ struct pc_keyboard { /* No initialization parameters for now */ }; -void pc_keyboard_init(struct pc_keyboard *keyboard); +void pc_keyboard_init(void); void set_kbc_ps2_mode(void); #endif /* PC80_KEYBOARD_H */ diff --git a/src/mainboard/emulation/qemu-i440fx/mainboard.c b/src/mainboard/emulation/qemu-i440fx/mainboard.c index 90ad2db..a8a61c4 100644 --- a/src/mainboard/emulation/qemu-i440fx/mainboard.c +++ b/src/mainboard/emulation/qemu-i440fx/mainboard.c @@ -43,7 +43,7 @@ static void qemu_nb_init(device_t dev) /* This sneaked in here, because Qemu does not * emulate a SuperIO chip */ - pc_keyboard_init(0); + pc_keyboard_init(); /* setup IRQ routing */ for (i = 0; i < 32; i++) diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c index 78c92a9..e991b53 100644 --- a/src/mainboard/emulation/qemu-q35/mainboard.c +++ b/src/mainboard/emulation/qemu-q35/mainboard.c @@ -50,7 +50,7 @@ static void qemu_nb_init(device_t dev) /* This sneaked in here, because Qemu does not * emulate a SuperIO chip */ - pc_keyboard_init(0); + pc_keyboard_init(); /* setup IRQ routing for pci slots */ for (i = 0; i < 25; i++) diff --git a/src/mainboard/lenovo/t530/mainboard.c b/src/mainboard/lenovo/t530/mainboard.c index 5931d00..6d21b31 100644 --- a/src/mainboard/lenovo/t530/mainboard.c +++ b/src/mainboard/lenovo/t530/mainboard.c @@ -161,7 +161,7 @@ static void mainboard_init(device_t dev) /* This sneaked in here, because X201 SuperIO chip isn't really connected to anything and hence we don't init it. */ - pc_keyboard_init(0); + pc_keyboard_init(); /* Enable expresscard hotplug events. */ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 2)), diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index cf42a9b..d772d19 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -134,7 +134,7 @@ static void mainboard_init(device_t dev) /* This sneaked in here, because X201 SuperIO chip isn't really connected to anything and hence we don't init it. */ - pc_keyboard_init(0); + pc_keyboard_init(); /* Enable expresscard hotplug events. */ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), diff --git a/src/mainboard/lenovo/x230/mainboard.c b/src/mainboard/lenovo/x230/mainboard.c index 2e4bc4a..01d1910 100644 --- a/src/mainboard/lenovo/x230/mainboard.c +++ b/src/mainboard/lenovo/x230/mainboard.c @@ -161,7 +161,7 @@ static void mainboard_init(device_t dev) /* This sneaked in here, because X201 SuperIO chip isn't really connected to anything and hence we don't init it. */ - pc_keyboard_init(0); + pc_keyboard_init(); /* Enable expresscard hotplug events. */ pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 2)), diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index e54df19..d7f45c0 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -169,7 +169,7 @@ static void mainboard_enable(device_t dev) /* This sneaked in here, because EasyNote has no SuperIO chip. */ - pc_keyboard_init(0); + pc_keyboard_init(); verb_setup(); } diff --git a/src/mainboard/roda/rk9/mainboard.c b/src/mainboard/roda/rk9/mainboard.c index 33e6bde..0627a5e 100644 --- a/src/mainboard/roda/rk9/mainboard.c +++ b/src/mainboard/roda/rk9/mainboard.c @@ -133,7 +133,7 @@ static void mainboard_enable(device_t dev) /* We have no driver for the embedded controller since the firmware does most of the job. Hence, initialize keyboards here. */ - pc_keyboard_init(NULL); + pc_keyboard_init(); } struct chip_operations mainboard_ops = { diff --git a/src/northbridge/via/cx700/lpc.c b/src/northbridge/via/cx700/lpc.c index 22e8743..c09fbb4 100644 --- a/src/northbridge/via/cx700/lpc.c +++ b/src/northbridge/via/cx700/lpc.c @@ -289,7 +289,7 @@ static void cx700_lpc_init(struct device *dev) isa_dma_init(); /* Initialize keyboard controller */ - pc_keyboard_init(0); + pc_keyboard_init(); } static struct device_operations cx700_lpc_ops = { diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c index 9e1fa57..1908a8a 100644 --- a/src/northbridge/via/vx800/lpc.c +++ b/src/northbridge/via/vx800/lpc.c @@ -330,7 +330,7 @@ static void southbridge_init(struct device *dev) setup_i8259(); // make sure interupt controller is configured before keyboard init /* turn on keyboard and RTC, no need to visit this reg twice */ - pc_keyboard_init(0); + pc_keyboard_init(); printk(BIOS_DEBUG, "ps2 usb lid, you set who can wakeup system from s3 sleep\n"); S3_ps2_kb_ms_wakeup(dev); diff --git a/src/southbridge/dmp/vortex86ex/southbridge.c b/src/southbridge/dmp/vortex86ex/southbridge.c index 2a68e4e..b9432f0 100644 --- a/src/southbridge/dmp/vortex86ex/southbridge.c +++ b/src/southbridge/dmp/vortex86ex/southbridge.c @@ -611,7 +611,7 @@ static void southbridge_init(struct device *dev) retries--; } post_code(POST_DMP_KBD_IS_READY); - pc_keyboard_init(0); + pc_keyboard_init(); } static struct device_operations vortex_sb_ops = { diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c index a4db1e5..824bb6a 100644 --- a/src/southbridge/sis/sis966/lpc.c +++ b/src/southbridge/sis/sis966/lpc.c @@ -89,16 +89,16 @@ static void lpc_usb_legacy_init(device_t dev) static void lpc_init(device_t dev) { - uint8_t byte; - uint8_t byte_old; - int on; - int nmi_option; + uint8_t byte; + uint8_t byte_old; + int on; + int nmi_option; - printk(BIOS_DEBUG, "LPC_INIT -------->\n"); - pc_keyboard_init(0); + printk(BIOS_DEBUG, "LPC_INIT -------->\n"); + pc_keyboard_init(); - lpc_usb_legacy_init(dev); - lpc_common_init(dev); + lpc_usb_legacy_init(dev); + lpc_common_init(dev); /* power after power fail */ diff --git a/src/southbridge/via/vt8231/vt8231.c b/src/southbridge/via/vt8231/vt8231.c index 85f007a..2011d8a 100644 --- a/src/southbridge/via/vt8231/vt8231.c +++ b/src/southbridge/via/vt8231/vt8231.c @@ -21,7 +21,7 @@ static void keyboard_on(void) regval |= 0x0f; pci_write_config8(lpc_dev, 0x51, regval); } - pc_keyboard_init(0); + pc_keyboard_init(); } static void com_port_on(void) diff --git a/src/southbridge/via/vt8235/vt8235.c b/src/southbridge/via/vt8235/vt8235.c index 4fa2784..6bc767a 100644 --- a/src/southbridge/via/vt8235/vt8235.c +++ b/src/southbridge/via/vt8235/vt8235.c @@ -16,7 +16,7 @@ static void keyboard_on(struct device *dev) regval &= 0xfd; pci_write_config8(dev, 0x51, regval); - pc_keyboard_init(0); + pc_keyboard_init(); } #ifdef UNUSED_CODE diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 4949de6..5ddd816 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -627,7 +627,7 @@ static void init_keyboard(struct device *dev) { u8 regval = pci_read_config8(dev, 0x51); if (regval & 0x1) - pc_keyboard_init(0); + pc_keyboard_init(); } static void southbridge_init_common(struct device *dev) diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c index 29b5ab3..83ccd38 100644 --- a/src/superio/fintek/f71863fg/superio.c +++ b/src/superio/fintek/f71863fg/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f71863fg.h" static void f71863fg_init(device_t dev) { - struct superio_fintek_f71863fg_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -39,7 +38,7 @@ static void f71863fg_init(device_t dev) /* TODO: Might potentially need code for HWM or FDC etc. */ case F71863FG_KBC: res0 = find_resource(dev, PNP_IDX_IO0); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c index cc690ec..18bd817 100644 --- a/src/superio/fintek/f71869ad/superio.c +++ b/src/superio/fintek/f71869ad/superio.c @@ -39,7 +39,7 @@ static void f71869ad_init(device_t dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71869AD_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case F71869AD_HWM: f71869ad_multifunc_init(dev); diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c index 55a11b1..c6fa7d0 100644 --- a/src/superio/fintek/f71872/superio.c +++ b/src/superio/fintek/f71872/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f71872.h" static void f71872_init(device_t dev) { - struct superio_fintek_f71872_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +36,7 @@ static void f71872_init(device_t dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71872_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f71889/superio.c b/src/superio/fintek/f71889/superio.c index 71edafc..14bdd07 100644 --- a/src/superio/fintek/f71889/superio.c +++ b/src/superio/fintek/f71889/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f71889.h" static void f71889_init(device_t dev) { - struct superio_fintek_f71889_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +36,7 @@ static void f71889_init(device_t dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71889_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c index 85ac7ba..bfb53b4 100644 --- a/src/superio/fintek/f81865f/superio.c +++ b/src/superio/fintek/f81865f/superio.c @@ -24,12 +24,11 @@ #include <superio/conf_mode.h> #include <console/console.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "f81865f.h" static void f81865f_init(device_t dev) { - struct superio_fintek_f81865f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -37,7 +36,7 @@ static void f81865f_init(device_t dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F81865F_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/ite/it8671f/superio.c b/src/superio/ite/it8671f/superio.c index 21c70ec..9da8f1d 100644 --- a/src/superio/ite/it8671f/superio.c +++ b/src/superio/ite/it8671f/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8671f.h" static void init(device_t dev) { - struct superio_ite_it8671f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) case IT8671F_PP: /* TODO. */ break; case IT8671F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8671F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c index 2fd3440..769afe3 100644 --- a/src/superio/ite/it8712f/superio.c +++ b/src/superio/ite/it8712f/superio.c @@ -24,7 +24,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8712f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -44,7 +43,6 @@ static void pnp_exit_ext_func_mode(device_t dev) static void it8712f_init(device_t dev) { - struct superio_ite_it8712f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -58,7 +56,7 @@ static void it8712f_init(device_t dev) break; case IT8712F_KBCK: set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8712F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c index 8cf3c5f..bd89a32 100644 --- a/src/superio/ite/it8716f/superio.c +++ b/src/superio/ite/it8716f/superio.c @@ -27,7 +27,6 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" #include "it8716f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -76,7 +75,6 @@ static void init_ec(u16 base) static void it8716f_init(device_t dev) { - struct superio_ite_it8716f_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -90,7 +88,7 @@ static void it8716f_init(device_t dev) init_ec(res0->base + EC_INDEX_PORT); break; case IT8716F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index 998d271..d40407a 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8718f.h" static void init(device_t dev) { - struct superio_ite_it8718f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -40,7 +38,7 @@ static void init(device_t dev) case IT8718F_EC: /* TODO. */ break; case IT8718F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8718F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8721f/superio.c b/src/superio/ite/it8721f/superio.c index 300a480..66e6ef7 100644 --- a/src/superio/ite/it8721f/superio.c +++ b/src/superio/ite/it8721f/superio.c @@ -23,12 +23,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "it8721f.h" static void init(device_t dev) { - struct superio_ite_it8721f_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -41,7 +39,7 @@ static void init(device_t dev) case IT8721F_EC: /* TODO. */ break; case IT8721F_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case IT8721F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index e7e82a8..721e7f9 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -23,7 +23,7 @@ #include <pc80/keyboard.h> #include <arch/io.h> #include <stdlib.h> -#include "chip.h" +#include "chip.h" /* FIXME */ #include "it8772f.h" static void pnp_enter_ext_func_mode(device_t dev) @@ -177,7 +177,7 @@ static void it8772f_init(device_t dev) case IT8772F_KBCK: if (!conf->skip_keyboard) { set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } break; case IT8772F_KBCM: diff --git a/src/superio/nsc/pc8374/superio.c b/src/superio/nsc/pc8374/superio.c index 71cde2c..8b6f1ca 100644 --- a/src/superio/nsc/pc8374/superio.c +++ b/src/superio/nsc/pc8374/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc8374.h" static void init(device_t dev) { - struct superio_nsc_pc8374_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC8374_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c index 52fc14f..f374e6a 100644 --- a/src/superio/nsc/pc87309/superio.c +++ b/src/superio/nsc/pc87309/superio.c @@ -23,19 +23,17 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87309.h" static void init(device_t dev) { - struct superio_nsc_pc87309_config *conf = dev->chip_info; if (!dev->enabled) return; switch (dev->path.pnp.device) { case PC87309_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87351/superio.c b/src/superio/nsc/pc87351/superio.c index 4d9469e..7f395b4 100644 --- a/src/superio/nsc/pc87351/superio.c +++ b/src/superio/nsc/pc87351/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87351.h" static void init(device_t dev) { - struct superio_nsc_pc87351_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87351_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c index 92731e7..a53cc35 100644 --- a/src/superio/nsc/pc87360/superio.c +++ b/src/superio/nsc/pc87360/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87360.h" static void init(device_t dev) { - struct superio_nsc_pc87360_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87360_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c index 1874ab3..27bdd6e 100644 --- a/src/superio/nsc/pc87366/superio.c +++ b/src/superio/nsc/pc87366/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87366.h" static void init(device_t dev) { - struct superio_nsc_pc87366_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87366_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 3b91f36..99882a5 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -27,19 +27,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "pc87417.h" static void init(device_t dev) { - struct superio_nsc_pc87417_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87417_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc87427/superio.c b/src/superio/nsc/pc87427/superio.c index ae02f01..170fd85 100644 --- a/src/superio/nsc/pc87427/superio.c +++ b/src/superio/nsc/pc87427/superio.c @@ -25,19 +25,18 @@ #include <console/console.h> #include <string.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "pc87427.h" static void init(device_t dev) { - struct superio_nsc_pc87427_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case PC87427_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/nsc/pc97307/superio.c b/src/superio/nsc/pc97307/superio.c index c1cd5c1..af7ca77 100644 --- a/src/superio/nsc/pc97307/superio.c +++ b/src/superio/nsc/pc97307/superio.c @@ -23,12 +23,12 @@ #include <device/device.h> #include <device/pnp.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> +#include "chip.h" /* FIXME */ #include "pc97307.h" static void init(device_t dev) { - struct superio_nsc_pc97307_config *conf = dev->chip_info; u8 reg8; if (!dev->enabled) @@ -40,7 +40,7 @@ static void init(device_t dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard. */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case PC97307_FDC: /* Set up floppy in PS/2 mode. */ diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index a69dfe7..6f39c5d 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -23,12 +23,12 @@ #include <device/device.h> #include <device/pnp.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> +#include "chip.h" /* FIXME */ #include "pc97317.h" static void init(device_t dev) { - struct superio_nsc_pc97317_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -39,7 +39,7 @@ static void init(device_t dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; default: break; diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c index fabb546..ff815cf 100644 --- a/src/superio/nuvoton/wpcm450/superio.c +++ b/src/superio/nuvoton/wpcm450/superio.c @@ -25,19 +25,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "wpcm450.h" static void init(device_t dev) { - struct superio_nuvoton_wpcm450_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case WPCM450_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/renesas/m3885x/superio.c b/src/superio/renesas/m3885x/superio.c index 34d7d11..17bdadf 100644 --- a/src/superio/renesas/m3885x/superio.c +++ b/src/superio/renesas/m3885x/superio.c @@ -25,20 +25,19 @@ #include <string.h> #include <assert.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> void m3885_configure_multikey(void); static void m3885x_init(device_t dev) { - struct superio_renesas_m3885x_config *conf = dev->chip_info; if (!dev->enabled) return; printk(BIOS_DEBUG, "Renesas M3885x: Initializing keyboard.\n"); set_kbc_ps2_mode(); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); m3885_configure_multikey(); } diff --git a/src/superio/smsc/fdc37m60x/superio.c b/src/superio/smsc/fdc37m60x/superio.c index 92a1783..f5626ee 100644 --- a/src/superio/smsc/fdc37m60x/superio.c +++ b/src/superio/smsc/fdc37m60x/superio.c @@ -22,12 +22,10 @@ #include <device/pnp.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "fdc37m60x.h" static void init(device_t dev) { - struct superio_smsc_fdc37m60x_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) case FDC37M60X_PP: /* TODO. */ break; case FDC37M60X_KBCK: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case FDC37M60X_AUX: /* TODO. */ break; diff --git a/src/superio/smsc/fdc37n972/fdc37n972.c b/src/superio/smsc/fdc37n972/fdc37n972.c index cab4540..f7ae697 100644 --- a/src/superio/smsc/fdc37n972/fdc37n972.c +++ b/src/superio/smsc/fdc37n972/fdc37n972.c @@ -26,8 +26,6 @@ static void init(device_t dev) { - struct superio_smsc_fdc37n972_config *conf = dev->chip_info; - if (!dev->enabled) return; @@ -37,7 +35,7 @@ static void init(device_t dev) case FDC37N972_PP: /* TODO. */ break; case FDC37N972_KBDC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; // [..] The rest: TODO } @@ -67,4 +65,3 @@ struct chip_operations superio_smsc_fdc37n972_ops = { CHIP_NAME("SMSC FDC37N972 Super I/O") .enable_dev = enable_dev, }; - diff --git a/src/superio/smsc/kbc1100/superio.c b/src/superio/smsc/kbc1100/superio.c index 3a834a0..77777d0 100644 --- a/src/superio/smsc/kbc1100/superio.c +++ b/src/superio/smsc/kbc1100/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "kbc1100.h" /* Forward declarations */ @@ -60,7 +59,6 @@ static void enable_dev(device_t dev) static void kbc1100_init(device_t dev) { - struct superio_smsc_kbc1100_config *conf = dev->chip_info; struct resource *res0, *res1; @@ -74,7 +72,7 @@ static void kbc1100_init(device_t dev) case KBC1100_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c index fb39c28..30e89a8 100644 --- a/src/superio/smsc/lpc47b272/superio.c +++ b/src/superio/smsc/lpc47b272/superio.c @@ -32,7 +32,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47b272.h" /* Forward declarations */ @@ -85,14 +84,13 @@ static void enable_dev(device_t dev) */ static void lpc47b272_init(device_t dev) { - struct superio_smsc_lpc47b272_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47B272_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index 3d81350..8a6c03e 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -29,7 +29,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47b397.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -56,14 +55,13 @@ static void enable_hwm_smbus(device_t dev) static void lpc47b397_init(device_t dev) { - struct superio_smsc_lpc47b397_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47B397_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index 1a697f2..a9583e4 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -31,7 +31,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47m10x.h" /* Forward declarations */ @@ -84,14 +83,13 @@ static void enable_dev(device_t dev) */ static void lpc47m10x_init(device_t dev) { - struct superio_smsc_lpc47m10x_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47M10X2_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index b142dde..91e77ba 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "lpc47m15x.h" /* Forward declarations */ @@ -65,14 +64,13 @@ static void enable_dev(device_t dev) static void lpc47m15x_init(device_t dev) { - struct superio_smsc_lpc47m15x_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case LPC47M15X_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index eda2622..b1ef18a 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -28,7 +28,7 @@ #include <string.h> #include <assert.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> #include "lpc47n227.h" /* Forward declarations. */ @@ -128,7 +128,6 @@ void lpc47n227_pnp_enable(device_t dev) */ static void lpc47n227_init(device_t dev) { - struct superio_smsc_lpc47n227_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -136,7 +135,7 @@ static void lpc47n227_init(device_t dev) switch (dev->path.pnp.device) { case LPC47N227_KBDC: printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n"); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c index 448800e..54d99fb 100644 --- a/src/superio/smsc/mec1308/superio.c +++ b/src/superio/smsc/mec1308/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "mec1308.h" #if CONFIG_HAVE_ACPI_RESUME #include <arch/acpi.h> @@ -36,7 +35,6 @@ static void mec1308_init(device_t dev) { - struct superio_smsc_mec1308_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -47,7 +45,7 @@ static void mec1308_init(device_t dev) if (acpi_slp_type == 3) return; #endif - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c index b7f100a..35df431 100644 --- a/src/superio/smsc/sch4037/superio.c +++ b/src/superio/smsc/sch4037/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "sch4037.h" /* Forward declarations */ @@ -61,7 +60,6 @@ static void enable_dev(device_t dev) static void sch4037_init(device_t dev) { - struct superio_smsc_sch4037_config *conf = dev->chip_info; struct resource *res0, *res1; if (!dev->enabled) { @@ -73,7 +71,7 @@ static void sch4037_init(device_t dev) case SCH4037_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/smsc/sio1007/chip.h b/src/superio/smsc/sio1007/chip.h index eee2811..345b403 100644 --- a/src/superio/smsc/sio1007/chip.h +++ b/src/superio/smsc/sio1007/chip.h @@ -20,6 +20,7 @@ #ifndef SUPERIO_SMSC_1007_CHIP_H #define SUPERIO_SMSC_1007_CHIP_H +/* FIXME: wrong place for this! */ void sio1007_setreg(u16 lpc_port, u8 reg, u8 value, u8 mask); int sio1007_enable_uart_at(u16 port); diff --git a/src/superio/smsc/sio1036/superio.c b/src/superio/smsc/sio1036/superio.c index 4980803..7fac79c 100644 --- a/src/superio/smsc/sio1036/superio.c +++ b/src/superio/smsc/sio1036/superio.c @@ -28,7 +28,6 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "sio1036.h" /* Forward declarations */ @@ -60,7 +59,6 @@ static void enable_dev(device_t dev) static void sio1036_init(device_t dev) { - struct superio_smsc_sio1036_config *conf = dev->chip_info; struct resource *res0, *res1; diff --git a/src/superio/smsc/sio10n268/sio10n268.c b/src/superio/smsc/sio10n268/sio10n268.c index 690c160..40c01b4 100644 --- a/src/superio/smsc/sio10n268/sio10n268.c +++ b/src/superio/smsc/sio10n268/sio10n268.c @@ -26,8 +26,6 @@ static void init(device_t dev) { - struct superio_smsc_sio10n268_config *conf = dev->chip_info; - if (!dev->enabled) return; @@ -38,7 +36,7 @@ static void init(device_t dev) break; case SIO10N268_KBDC: /* TODO: This is still hardcoded. */ - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; // [..] The rest: TODO } diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index 9990aa2..0d62a9a 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -41,7 +41,6 @@ #include <console/console.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" /* The following Super I/O chips are currently supported by this driver: */ #define LPC47M172 0x14 @@ -150,7 +149,6 @@ static const struct logical_devices { */ static void smsc_init(device_t dev) { - struct superio_smsc_smscsuperio_config *conf = dev->chip_info; int i, ld; /* Do not initialize disabled devices. */ @@ -169,7 +167,7 @@ static void smsc_init(device_t dev) /* A Super I/O was found, so initialize the respective device. */ ld = dev->path.pnp.device; if (ld == logical_device_table[i].devs[LD_KBC]) { - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); } } diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 269e57c..fdab974 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -23,7 +23,6 @@ #include <superio/conf_mode.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83627dhg.h" static void w83627dhg_enable_UR2(device_t dev) @@ -39,7 +38,6 @@ static void w83627dhg_enable_UR2(device_t dev) static void w83627dhg_init(device_t dev) { - struct superio_winbond_w83627dhg_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -49,7 +47,7 @@ static void w83627dhg_init(device_t dev) w83627dhg_enable_UR2(dev); break; case W83627DHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index 62d3311..aae0ac4 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -30,7 +30,6 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83627ehg.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -95,7 +94,6 @@ static void init_hwm(u16 base) static void w83627ehg_init(device_t dev) { - struct superio_winbond_w83627ehg_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -103,7 +101,7 @@ static void w83627ehg_init(device_t dev) switch(dev->path.pnp.device) { case W83627EHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case W83627EHG_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index c881743..5445b47 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -30,7 +30,6 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" #include "w83627hf.h" static void pnp_write_index(u16 port, u8 reg, u8 value) @@ -102,7 +101,6 @@ static void init_hwm(u16 base) static void w83627hf_init(device_t dev) { - struct superio_winbond_w83627hf_config *conf = dev->chip_info; struct resource *res0; if (!dev->enabled) @@ -110,7 +108,7 @@ static void w83627hf_init(device_t dev) switch(dev->path.pnp.device) { case W83627HF_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; case W83627HF_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index f6aba10..75186fa 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -27,19 +27,17 @@ #include <console/console.h> #include <string.h> #include <pc80/keyboard.h> -#include "chip.h" #include "w83627thg.h" static void w83627thg_init(device_t dev) { - struct superio_winbond_w83627thg_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83627THG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index 5775ff5..f0d9aef 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -27,7 +27,6 @@ #include <stdint.h> #include <stdlib.h> #include <pc80/keyboard.h> -#include "chip.h" #include "w83627uhg.h" /* @@ -60,7 +59,6 @@ static void set_uart_clock_source(device_t dev, u8 uart_clock) static void w83627uhg_init(device_t dev) { - struct superio_winbond_w83627uhg_config *conf = dev->chip_info; if (!dev->enabled) return; @@ -85,7 +83,7 @@ static void w83627uhg_init(device_t dev) set_uart_clock_source(dev, 0); break; case W83627UHG_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83697hf/superio.c b/src/superio/winbond/w83697hf/superio.c index f896078..933da95 100644 --- a/src/superio/winbond/w83697hf/superio.c +++ b/src/superio/winbond/w83697hf/superio.c @@ -27,7 +27,8 @@ #include <lib.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> -#include "chip.h" +#include <pc80/keyboard.h> +#include "chip.h" /* FIXME */ #include "w83697hf.h" static void hwmon_set_fan_divisor(unsigned int base, int num, unsigned int divisor) { diff --git a/src/superio/winbond/w83977f/superio.c b/src/superio/winbond/w83977f/superio.c index 32ecf18..232f46a 100644 --- a/src/superio/winbond/w83977f/superio.c +++ b/src/superio/winbond/w83977f/superio.c @@ -26,19 +26,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83977f.h" static void w83977f_init(device_t dev) { - struct superio_winbond_w83977f_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83977F_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } } diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index 7f2dffb..a61770a 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -28,19 +28,17 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "chip.h" #include "w83977tf.h" static void w83977tf_init(device_t dev) { - struct superio_winbond_w83977tf_config *conf = dev->chip_info; if (!dev->enabled) return; switch(dev->path.pnp.device) { case W83977TF_KBC: - pc_keyboard_init(&conf->keyboard); + pc_keyboard_init(); break; } }

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New patch to review for coreboot: dcf455e util/lzma_payload/squish.py: LZMA payload with header magics
by Edward O'Callaghan 09 May '14

09 May '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5708 -gerrit commit dcf455e8247b0900ce75c64cf1d1f9ee48c24ffb Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri May 9 19:28:50 2014 +1000 util/lzma_payload/squish.py: LZMA payload with header magics SeaBIOS expects file-size information to be packed into the header of a LZMA container before it will decompress it. Provide a little tool to do that. Change-Id: I26987357b21b6677dbfa013167824a6127270beb Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- util/lzma_payload/squish.py | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/util/lzma_payload/squish.py b/util/lzma_payload/squish.py new file mode 100755 index 0000000..f0329c0 --- /dev/null +++ b/util/lzma_payload/squish.py @@ -0,0 +1,42 @@ +#!/usr/bin/env python + +# This file is part of the coreboot project. +# Copyright (C) 2014 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> + +import sys +import argparse +import lzma +import struct + + +def compressor(infile, outfile): + lzc = lzma.LZMACompressor() + data = lzc.compress(infile.read()) + size = len(infile.read()) + data = data[:5] + struct.pack('<i', size) + data[9:] + outfile.write(data) + + +def main(argv): + parser = argparse.ArgumentParser( + prog='squish', + description='''Compress a given file into LZMA package''', + epilog='''SeaBIOS expects a certain kind of LZMA compressed file + to unpack. This tool ensures correct header information + is provided.''', + usage='%(prog)s [options]') + + parser.add_argument('-i', '--inputfile', nargs='?', + type=argparse.FileType('rb'), + default=sys.stdin, + help="file to be compressed") + + parser.add_argument('-o', '--outputfile', nargs='?', + type=argparse.FileType('wb'), + default=sys.stdout, + help="compressed output name") + args = parser.parse_args() + compressor(args.inputfile, args.outputfile) + +if __name__ == "__main__": + main(sys.argv[1:])

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coreboot-gerrit May 2014