coreboot-gerrit May 2014

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 42ca8db cpu/intel: Add CPU socket rPGA988B
by Paul Menzel 09 May '14

09 May '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5671 -gerrit commit 42ca8db1b3e7f991c58c0cea4abf35928945ec7f Author: Zaolin <zaolin(a)das-labor.org> Date: Tue May 6 21:30:54 2014 +0200 cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520 Change-Id: I1009616cc4c18ebd0e3be7ceb50398617b49e3a3 Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- src/cpu/intel/Kconfig | 1 + src/cpu/intel/Makefile.inc | 1 + src/cpu/intel/socket_rPGA988B/Kconfig | 16 ++++++++++++++++ src/cpu/intel/socket_rPGA988B/Makefile.inc | 8 ++++++++ src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c | 5 +++++ 5 files changed, 31 insertions(+) diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index af03619..fb4b023 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -34,6 +34,7 @@ source src/cpu/intel/socket_PGA370/Kconfig source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA771/Kconfig source src/cpu/intel/socket_LGA775/Kconfig +source src/cpu/intel/socket_rPGA988B/Kconfig source src/cpu/intel/socket_rPGA989/Kconfig # Architecture specific features source src/cpu/intel/fit/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 964369d..0392f69 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -14,6 +14,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA479M) += socket_mPGA479M subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 +subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA988B) += socket_rPGA988B subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA989) += socket_rPGA989 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax diff --git a/src/cpu/intel/socket_rPGA988B/Kconfig b/src/cpu/intel/socket_rPGA988B/Kconfig new file mode 100644 index 0000000..7e74f89 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Kconfig @@ -0,0 +1,16 @@ +config CPU_INTEL_SOCKET_RPGA988B + bool + +if CPU_INTEL_SOCKET_RPGA988B + +config SOCKET_SPECIFIC_OPTIONS # dummy + def_bool y + select MMX + select SSE + select CACHE_AS_RAM + +config CACHE_MRC_BIN + bool + default n + +endif diff --git a/src/cpu/intel/socket_rPGA988B/Makefile.inc b/src/cpu/intel/socket_rPGA988B/Makefile.inc new file mode 100644 index 0000000..d8036d1 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Makefile.inc @@ -0,0 +1,8 @@ +ramstage-y += socket_rPGA988B.c +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo diff --git a/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c new file mode 100644 index 0000000..9a18e61 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c @@ -0,0 +1,5 @@ +#include <device/device.h> + +struct chip_operations cpu_intel_socket_rPGA988B_ops = { + CHIP_NAME("Socket rPGA988B CPU") +};

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Patch set updated for coreboot: f07b20e cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520
by Philipp Deppenwiese 09 May '14

09 May '14

Philipp Deppenwiese (zaolin(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5671 -gerrit commit f07b20eaa537b0241af8021bfb54914d3978305a Author: Zaolin <zaolin(a)das-labor.org> Date: Tue May 6 21:30:54 2014 +0200 cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520 Change-Id: I1009616cc4c18ebd0e3be7ceb50398617b49e3a3 Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- src/cpu/intel/Kconfig | 1 + src/cpu/intel/Makefile.inc | 1 + src/cpu/intel/socket_rPGA988B/Kconfig | 16 ++++++++++++++++ src/cpu/intel/socket_rPGA988B/Makefile.inc | 8 ++++++++ src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c | 5 +++++ 5 files changed, 31 insertions(+) diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index af03619..fb4b023 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -34,6 +34,7 @@ source src/cpu/intel/socket_PGA370/Kconfig source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA771/Kconfig source src/cpu/intel/socket_LGA775/Kconfig +source src/cpu/intel/socket_rPGA988B/Kconfig source src/cpu/intel/socket_rPGA989/Kconfig # Architecture specific features source src/cpu/intel/fit/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 964369d..0392f69 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -14,6 +14,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA479M) += socket_mPGA479M subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 +subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA988B) += socket_rPGA988B subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA989) += socket_rPGA989 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax diff --git a/src/cpu/intel/socket_rPGA988B/Kconfig b/src/cpu/intel/socket_rPGA988B/Kconfig new file mode 100644 index 0000000..7e74f89 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Kconfig @@ -0,0 +1,16 @@ +config CPU_INTEL_SOCKET_RPGA988B + bool + +if CPU_INTEL_SOCKET_RPGA988B + +config SOCKET_SPECIFIC_OPTIONS # dummy + def_bool y + select MMX + select SSE + select CACHE_AS_RAM + +config CACHE_MRC_BIN + bool + default n + +endif diff --git a/src/cpu/intel/socket_rPGA988B/Makefile.inc b/src/cpu/intel/socket_rPGA988B/Makefile.inc new file mode 100644 index 0000000..d8036d1 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Makefile.inc @@ -0,0 +1,8 @@ +ramstage-y += socket_rPGA988B.c +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo diff --git a/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c new file mode 100644 index 0000000..9a18e61 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c @@ -0,0 +1,5 @@ +#include <device/device.h> + +struct chip_operations cpu_intel_socket_rPGA988B_ops = { + CHIP_NAME("Socket rPGA988B CPU") +};

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New patch to review for coreboot: 6e92fa4 cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520
by Philipp Deppenwiese 09 May '14

09 May '14

Philipp Deppenwiese (zaolin(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5713 -gerrit commit 6e92fa47657a192ad82a9f9a9b4b849d211f1937 Author: Zaolin <zaolin(a)das-labor.org> Date: Tue May 6 21:30:54 2014 +0200 cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520 Change-Id: I4b2acf3cc0a737a55d8a285f2fa10debb507a999 Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- src/cpu/intel/Kconfig | 1 + src/cpu/intel/Makefile.inc | 1 + src/cpu/intel/socket_rPGA988B/Kconfig | 16 ++++++++++++++++ src/cpu/intel/socket_rPGA988B/Makefile.inc | 8 ++++++++ src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c | 5 +++++ 5 files changed, 31 insertions(+) diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index af03619..fb4b023 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -34,6 +34,7 @@ source src/cpu/intel/socket_PGA370/Kconfig source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA771/Kconfig source src/cpu/intel/socket_LGA775/Kconfig +source src/cpu/intel/socket_rPGA988B/Kconfig source src/cpu/intel/socket_rPGA989/Kconfig # Architecture specific features source src/cpu/intel/fit/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 964369d..0392f69 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -14,6 +14,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA479M) += socket_mPGA479M subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 +subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA988B) += socket_rPGA988B subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA989) += socket_rPGA989 subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax diff --git a/src/cpu/intel/socket_rPGA988B/Kconfig b/src/cpu/intel/socket_rPGA988B/Kconfig new file mode 100644 index 0000000..7e74f89 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Kconfig @@ -0,0 +1,16 @@ +config CPU_INTEL_SOCKET_RPGA988B + bool + +if CPU_INTEL_SOCKET_RPGA988B + +config SOCKET_SPECIFIC_OPTIONS # dummy + def_bool y + select MMX + select SSE + select CACHE_AS_RAM + +config CACHE_MRC_BIN + bool + default n + +endif diff --git a/src/cpu/intel/socket_rPGA988B/Makefile.inc b/src/cpu/intel/socket_rPGA988B/Makefile.inc new file mode 100644 index 0000000..d8036d1 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Makefile.inc @@ -0,0 +1,8 @@ +ramstage-y += socket_rPGA988B.c +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo diff --git a/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c new file mode 100644 index 0000000..9a18e61 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c @@ -0,0 +1,5 @@ +#include <device/device.h> + +struct chip_operations cpu_intel_socket_rPGA988B_ops = { + CHIP_NAME("Socket rPGA988B CPU") +};

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New patch to review for coreboot: 9a6f452 cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520
by Philipp Deppenwiese 09 May '14

09 May '14

Philipp Deppenwiese (zaolin(a)das-labor.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5712 -gerrit commit 9a6f4521cfff337d265ecf3ef7786fb7446705a3 Author: Zaolin <zaolin(a)das-labor.org> Date: Tue May 6 21:30:54 2014 +0200 cpu/intel: Add CPU socket rPGA988B Used by the Lenovo ThinkPad T520 Change-Id: Iac61e1564f9ef04330566ea2deffc2336dd89a9f Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org> --- src/cpu/intel/Kconfig | 1 + src/cpu/intel/Makefile.inc | 1 + src/cpu/intel/socket_rPGA988B/Kconfig | 16 ++++++++++++++++ src/cpu/intel/socket_rPGA988B/Makefile.inc | 8 ++++++++ src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c | 5 +++++ 5 files changed, 31 insertions(+) diff --git a/src/cpu/intel/Kconfig b/src/cpu/intel/Kconfig index af03619..cf58e90 100644 --- a/src/cpu/intel/Kconfig +++ b/src/cpu/intel/Kconfig @@ -35,6 +35,7 @@ source src/cpu/intel/socket_441/Kconfig source src/cpu/intel/socket_LGA771/Kconfig source src/cpu/intel/socket_LGA775/Kconfig source src/cpu/intel/socket_rPGA989/Kconfig +source src/cpu/intel/socket_rPGA988B/Kconfig # Architecture specific features source src/cpu/intel/fit/Kconfig source src/cpu/intel/turbo/Kconfig diff --git a/src/cpu/intel/Makefile.inc b/src/cpu/intel/Makefile.inc index 964369d..81ccb4a 100644 --- a/src/cpu/intel/Makefile.inc +++ b/src/cpu/intel/Makefile.inc @@ -15,6 +15,7 @@ subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA603) += socket_mPGA603 subdirs-$(CONFIG_CPU_INTEL_SOCKET_MPGA604) += socket_mPGA604 subdirs-$(CONFIG_CPU_INTEL_SOCKET_PGA370) += socket_PGA370 subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA989) += socket_rPGA989 +subdirs-$(CONFIG_CPU_INTEL_SOCKET_RPGA988B) += socket_rPGA988B subdirs-$(CONFIG_NORTHBRIDGE_INTEL_NEHALEM) += model_2065x subdirs-$(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE) += model_206ax subdirs-$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE) += model_206ax diff --git a/src/cpu/intel/socket_rPGA988B/Kconfig b/src/cpu/intel/socket_rPGA988B/Kconfig new file mode 100644 index 0000000..7e74f89 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Kconfig @@ -0,0 +1,16 @@ +config CPU_INTEL_SOCKET_RPGA988B + bool + +if CPU_INTEL_SOCKET_RPGA988B + +config SOCKET_SPECIFIC_OPTIONS # dummy + def_bool y + select MMX + select SSE + select CACHE_AS_RAM + +config CACHE_MRC_BIN + bool + default n + +endif diff --git a/src/cpu/intel/socket_rPGA988B/Makefile.inc b/src/cpu/intel/socket_rPGA988B/Makefile.inc new file mode 100644 index 0000000..d8036d1 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/Makefile.inc @@ -0,0 +1,8 @@ +ramstage-y += socket_rPGA988B.c +subdirs-y += ../../x86/tsc +subdirs-y += ../../x86/mtrr +subdirs-y += ../../x86/lapic +subdirs-y += ../../x86/cache +subdirs-y += ../../x86/smm +subdirs-y += ../microcode +subdirs-y += ../turbo diff --git a/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c new file mode 100644 index 0000000..9a18e61 --- /dev/null +++ b/src/cpu/intel/socket_rPGA988B/socket_rPGA988B.c @@ -0,0 +1,5 @@ +#include <device/device.h> + +struct chip_operations cpu_intel_socket_rPGA988B_ops = { + CHIP_NAME("Socket rPGA988B CPU") +};

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Patch merged into coreboot/master: 0e6be39 Makefile: Don't use llvm-mc for the moment
by gerrit＠coreboot.org 09 May '14

09 May '14

the following patch was just integrated into master: commit 0e6be39f8b9411c356f1e10550ba0424c7caddd7 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat May 10 04:42:00 2014 +1000 Makefile: Don't use llvm-mc for the moment The LLVM integrated assembler has some deficiencies in support for building AGESA. See: LLVM PR18918 - [RFE]: Missing altmacro support in integrated assembler Disable llvm-mc for the moment until these have been addressed fully upstream. Change-Id: Id4131d1de04d01c0bec284f976f0ba9662b950ab Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/5711 Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5711 for details. -gerrit

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Patch merged into coreboot/master: 868648c Makefile.inc: Make clang once again a valid toolchain
by gerrit＠coreboot.org 09 May '14

09 May '14

the following patch was just integrated into master: commit 868648c41de67f1794da5df275740be6fd30411f Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat May 10 04:39:06 2014 +1000 Makefile.inc: Make clang once again a valid toolchain 'prove' that clang is supported (to some extent). Change-Id: I181f4910ba64ab9746e7ac94aa79da23cdd41dad Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/5709 Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5709 for details. -gerrit

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Patch merged into coreboot/master: 3ee4317 payloads: make build system integration work again
by gerrit＠coreboot.org 09 May '14

09 May '14

the following patch was just integrated into master: commit 3ee43171ef4b2f5a3513fc785802a02afb4af4a9 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri May 9 20:41:01 2014 +0200 payloads: make build system integration work again Payloads using Kconfig get confused by coreboot Kconfig configuration in environment variables. Prune them. Change-Id: I63da2af0a15dca35d70cd65b2f74a1564aab9483 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: http://review.coreboot.org/5710 Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer(a)gmail.com> See http://review.coreboot.org/5710 for details. -gerrit

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Patch merged into coreboot/master: 2dd3f87 cougar_canyon2: Switch CPU/NB/SB to the shared FSP code
by gerrit＠coreboot.org 09 May '14

09 May '14

the following patch was just integrated into master: commit 2dd3f877cc7926f5ac1cfd5a7e5d546c8be2121c Author: Martin Roth <gaumless(a)gmail.com> Date: Fri Apr 25 15:09:27 2014 -0600 cougar_canyon2: Switch CPU/NB/SB to the shared FSP code CPU - fsp_model_206ax: - Remove Kconfig options and mark this as using the FSP. - Use shared FSP cache_as_ram.inc file Mainboard - intel/cougar_canyon2: - Update to use the shared FSP header file. - Modify to call copy_and_run() directly instead of returning to cache_as_ram.inc. Northbridge - fsp_sandybridge: - remove mrccache, fsp_util.[ch] - add fsp/chipset_fsp_util.[ch] with chipset specific FSP bits. - Update to use the shared FSP header file. These changes were validated with FSP: CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd SHA256: e1bbd614058675636ee45f8dc1a6dbf0e818bcdb32318b7f8d8b6ac0ce730801 MD5: 24965382fbb832f7b184d3f24157abda Change-Id: Ibc52a78312c2fcbd1e632bc2484e4379a4f057d4 Signed-off-by: Martin Roth <gaumless(a)gmail.com> Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/5636 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/5636 for details. -gerrit

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Patch merged into coreboot/master: a642716 Intel FSP: add a shared set of functions for the FSP
by gerrit＠coreboot.org 09 May '14

09 May '14

the following patch was just integrated into master: commit a6427161c20bfb8319208dbbd08697a530a3839e Author: Martin Roth <gaumless(a)gmail.com> Date: Fri Apr 25 14:12:13 2014 -0600 Intel FSP: add a shared set of functions for the FSP - Move the non chipset-specific fsp pieces out of the chipset into a shared area. This is used by northbridge / southbrige / SOC code. It pulls in pieces from Kconfig, Makefile and FSP specific code. - Enabled in the CPU code with a Kconfig "select PLATFORM_USES_FSP" Change-Id: I7ffa934c1df09b71d48a876a56e3b888685870b8 Signed-off-by: Martin Roth <gaumless(a)gmail.com> Signed-off-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-on: http://review.coreboot.org/5635 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/5635 for details. -gerrit

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New patch to review for coreboot: 1ad69f7 Makefile: Don't use llvm-mc for the moment
by Edward O'Callaghan 09 May '14

09 May '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5711 -gerrit commit 1ad69f73f8ca5eac03d5574dde12139a89db87ff Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat May 10 04:42:00 2014 +1000 Makefile: Don't use llvm-mc for the moment The LLVM integrated assembler has some deficiencies in support for building AGESA. See: LLVM PR18918 - [RFE]: Missing altmacro support in integrated assembler Disable llvm-mc for the moment until these have been addressed fully upstream. Change-Id: Id4131d1de04d01c0bec284f976f0ba9662b950ab Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 91fc3c0..c9648c0 100644 --- a/Makefile +++ b/Makefile @@ -121,7 +121,7 @@ include toolchain.inc ifneq ($(INNER_SCANBUILD),y) ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) -CC:=clang -m32 -mno-mmx -mno-sse +CC:=clang -m32 -mno-mmx -mno-sse -no-integrated-as HOSTCC:=clang endif endif

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coreboot-gerrit May 2014