coreboot-gerrit May 2014

coreboot-gerrit@coreboot.org

1 participants
1066 discussions

Patch merged into coreboot/master: 6a70258 rambi: Make eMMC CLK pull-down and change pull strengths to 20K
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 6a70258c696090bb10d65f2a57b91348c7382477 Author: Shawn Nematbakhsh <shawnn(a)chromium.org> Date: Fri Dec 20 13:27:56 2013 -0800 rambi: Make eMMC CLK pull-down and change pull strengths to 20K eMMC CLK was incorrectly configured as PULL_UP, but should have been PULL_DOWN. 2K pulls somehow masked this problem. BUG=chrome-os-partner:24353 TEST=Verify eMMC is bootable on Rambi on boards that previously failed with an all-20K, all-PU eMMC pin configuration. BRANCH=None Change-Id: I0cbb6ebbb6818f83402b99330728266b09a0f5d6 Signed-off-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181034 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/5026 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5026 for details. -gerrit

1 0

Patch merged into coreboot/master: 0039319 baytrail: align with intel recommendations
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 003931975f975145e25c0987aaa87344a30cb6af Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed Dec 18 14:37:31 2013 -0600 baytrail: align with intel recommendations The BISOC.EXIT_SELF_REFRESH_LATENCY field should not be updated from the default. BUG=chrome-os-partner:24345 BRANCH=None TEST=Built and booted. S3 resumed. Change-Id: I6e701a520513372318258648e998dd8c7ab29ea4 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180730 Reviewed-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Reviewed-on: http://review.coreboot.org/5025 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5025 for details. -gerrit

1 0

Patch merged into coreboot/master: 68530cd rambi: specify reference code index in vboot area
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 68530cdb7c1b381a103256fd46e882c904dc47c2 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Dec 13 13:08:59 2013 -0800 rambi: specify reference code index in vboot area Rambi's reference code will live at slot 3 in the verified firmware section. BUG=chrome-os-partner:22867 BRANCH=None TEST=Built and booted. Verified correct area where reference code was loaded from. Change-Id: I8bee46600429ac8f732fe334852f69aff1324150 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180027 Reviewed-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Reviewed-on: http://review.coreboot.org/5024 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5024 for details. -gerrit

1 0

Patch merged into coreboot/master: 7f17759 baytrail: add way to load reference code from vboot area
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 7f17759e8228330cfde832a9384ec2990693d4c9 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Dec 13 13:05:24 2013 -0800 baytrail: add way to load reference code from vboot area When employing vboot firmware verification the reference code loading should load from the verified firmware section. Add this ability. BUG=chrome-os-partner:22867 BRANCH=None TEST=Built and booted rambi. Noted firmware being loaded from rw verified area. Also noted S3 resume loading from cached area. Change-Id: I114de844f218b7573cf90107e174bf0962fdaa50 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180026 Reviewed-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Reviewed-on: http://review.coreboot.org/5023 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/5023 for details. -gerrit

1 0

Patch merged into coreboot/master: 2e65796 baytrail: Expose IOSF as ACPI object
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 2e657964814b95de64406c50d08fc997f1c93887 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Dec 13 16:43:11 2013 -0800 baytrail: Expose IOSF as ACPI object The kernel iosf driver uses HID INT33BD to probe and be provided the 12 bytes in PCI for access. BUG=chrome-os-partner:17279 BRANCH=none TEST=build and boot on rambi, load iosf_mbi driver and verify that it gets address 0xe00000d0 Change-Id: I865eafe664f00f21d1ebb967c291083830d895b9 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180098 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/5021 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5021 for details. -gerrit

1 0

Patch merged into coreboot/master: 73c0a05 rambi: Disable HSUART2 and SPI interfaces
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 73c0a05bc704659fcd1c70cc5d97e134de54c8f3 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Dec 13 16:01:56 2013 -0800 rambi: Disable HSUART2 and SPI interfaces Not used currently on rambi board. Disable in case it saves power. BUG=chrome-os-partner:23862 BRANCH=none TEST=build and boot on rambi Change-Id: Idb870c2cfa88cb6c3f1ada3caf0db566e33ec1eb Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/180084 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/5020 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5020 for details. -gerrit

1 0

Patch merged into coreboot/master: 7e647f5 rambi: Enable SCC devices in ACPI mode
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 7e647f596c007567e421defd0d2963070daed497 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Dec 12 15:51:52 2013 -0800 rambi: Enable SCC devices in ACPI mode With the ACPI GNVS exported and depthcharge changed to initialize eMMC in ACPI mode we can now put the SCC devices into ACPI mode. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot on rambi, test eMMC and SD card Change-Id: I39716198f8227c0c3293ac23eb09660792e2c51b Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179901 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/5018 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5018 for details. -gerrit

1 0

Patch merged into coreboot/master: c29d6b8 baytrail: Put devices in ACPI mode after setup
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit c29d6b8ab2a963e51dafe17b45a826f4c1627795 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Dec 12 16:55:36 2013 -0800 baytrail: Put devices in ACPI mode after setup Make sure reg_script is executed before the device is put into ACPI mode. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi from eMMC in ACPI mode Change-Id: I4090babbfc7fb0f3be4da869386e998d87a513ba Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179896 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/5017 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5017 for details. -gerrit

1 0

Patch merged into coreboot/master: d82cade baytrail: Add header include wrapper and offset define
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit d82caded48a7b2a3f0e8662e3e35a30aa7839743 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Dec 12 10:42:31 2013 -0800 baytrail: Add header include wrapper and offset define Since this file will get added to payloads it is useful if it exports what offset in NVS it lives. BUG=chrome-os-partner:24380 BRANCH=none TEST=build and boot rambi with emmc in ACPI mode Change-Id: I52860980c91dfe2525628e142b34ca192e69b258 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/179848 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/5014 Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5014 for details. -gerrit

1 0

Patch merged into coreboot/master: 2e4dea6 superio/ite/it8718f: Remove hard coding from romstage
by gerrit＠coreboot.org 12 May '14

12 May '14

the following patch was just integrated into master: commit 2e4dea663ce9f23f8cd925803b045259219d927d Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Mon May 12 05:02:58 2014 +1000 superio/ite/it8718f: Remove hard coding from romstage Make use of the ITE common Super I/O framework and there-by removing any hard coding of Super I/O base address. Change-Id: I14af89d2727d7c6bac0f9840043c430726297429 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/5717 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/5717 for details. -gerrit

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit May 2014