coreboot-gerrit April 2014

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New patch to review for coreboot: aa45533 mainboard/jetway/nf81-t56n-lf: Documentation cosmetics
by Edward O'Callaghan 10 Apr '14

10 Apr '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5481 -gerrit commit aa455338c1a4c15177cf2b3b658abee4e1060b88 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Apr 10 19:12:28 2014 +1000 mainboard/jetway/nf81-t56n-lf: Documentation cosmetics Keep under 80 colums and Doxygen'ify inline documentation somewhat. Strip some whitespace bulk while here. Change-Id: Icb38f087724d3e3511df1d554a620eb637ce286a Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.h | 2 +- src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c | 5 +-- src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c | 34 ++++++--------- src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h | 54 ++++++++++-------------- src/mainboard/jetway/nf81-t56n-lf/irq_tables.c | 12 ++---- 5 files changed, 43 insertions(+), 64 deletions(-) diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.h b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.h index c4f4f70..98cff3b 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.h +++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.h @@ -70,4 +70,4 @@ AGESA_STATUS BiosHookBeforeExitSelfRefresh (UINT32 Func, UINT32 Data, VOID *Conf /* PCIE slot reset control */ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr); -#endif //_BIOS_CALLOUT_H_ +#endif /* _BIOS_CALLOUT_H_ */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c b/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c index e7772aa..a236090 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi_tables.c @@ -31,7 +31,6 @@ #define DUMP_ACPI_TABLES 0 #if DUMP_ACPI_TABLES == 1 - static void dump_mem(u32 start, u32 end) { @@ -45,7 +44,7 @@ static void dump_mem(u32 start, u32 end) } print_debug("\n"); } -#endif +#endif /* DUMP_ACPI_TABLES */ extern const unsigned char AmlCode[]; @@ -313,7 +312,7 @@ unsigned long write_acpi_tables(unsigned long start) printk(BIOS_DEBUG, "hest\n"); dump_mem(hest, ((void *)hest) + hest->header.length); -#endif +#endif /* DUMP_ACPI_TABLES */ printk(BIOS_INFO, "ACPI: done.\n"); return current; diff --git a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c index 1627f25..2944eae 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c +++ b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c @@ -17,11 +17,9 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/*----------------------------------------------------------------------------- - * M O D U L E S U S E D - *----------------------------------------------------------------------------- +/** + * Modules Used */ - #include "agesawrapper.h" #include "BiosCallOuts.h" #include "PlatformGnbPcieComplex.h" @@ -39,12 +37,10 @@ #include <cpu/amd/agesa/s3_resume.h> #include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h> -#define FILECODE UNASSIGNED_FILE_FILECODE - -/*------------------------------------------------------------------------------ - * D E F I N I T I O N S A N D M A C R O S - *------------------------------------------------------------------------------ +/** + * @brief Definitions and Macros */ +#define FILECODE UNASSIGNED_FILE_FILECODE #define MMCONF_ENABLE 1 @@ -58,24 +54,20 @@ VOID *AcpiWheaMce = NULL; VOID *AcpiWheaCmc = NULL; VOID *AcpiAlib = NULL; -/*------------------------------------------------------------------------------ - * T Y P E D E F S A N D S T R U C T U R E S - *------------------------------------------------------------------------------ +/** + * @brief Typedefs and Structures */ -/*------------------------------------------------------------------------------ - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *------------------------------------------------------------------------------ +/** + * @brief Prototypes of local functions */ -/*------------------------------------------------------------------------------ - * E X P O R T E D F U N C T I O N S - *------------------------------------------------------------------------------ +/** + * @brief Exported functions */ -/*------------------------------------------------------------------------------ - * L O C A L F U N C T I O N S - *------------------------------------------------------------------------------ +/** + * @brief Local functions */ uint32_t agesawrapper_amdinitcpuio(void) { diff --git a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h index 6af5e5f..a8437df 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h +++ b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.h @@ -17,62 +17,54 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/*---------------------------------------------------------------------------------------- - * M O D U L E S U S E D - *---------------------------------------------------------------------------------------- - */ - #ifndef _AGESAWRAPPER_H_ #define _AGESAWRAPPER_H_ +/** + * Modules Used + */ #include <stdint.h> #include <vendorcode/amd/agesa/f14/AGESA.h> -/*---------------------------------------------------------------------------------------- - * D E F I N I T I O N S A N D M A C R O S - *---------------------------------------------------------------------------------------- +/** + * @brief Definitions and Macros + * + * Define AMD Ontario APPU SSID/SVID */ -/* Define AMD Ontario APPU SSID/SVID */ #define AMD_APU_SVID 0x1022 #define AMD_APU_SSID 0x1234 #define PCIE_BASE_ADDRESS CONFIG_MMCONF_BASE_ADDRESS enum { - PICK_DMI, /* DMI Interface */ - PICK_PSTATE, /* Acpi Pstate SSDT Table */ - PICK_SRAT, /* SRAT Table */ - PICK_SLIT, /* SLIT Table */ - PICK_WHEA_MCE, /* WHEA MCE table */ - PICK_WHEA_CMC, /* WHEA CMV table */ - PICK_ALIB, /* SACPI SSDT table with ALIB implementation */ + PICK_DMI, /**< DMI Interface */ + PICK_PSTATE, /**< Acpi Pstate SSDT Table */ + PICK_SRAT, /**< SRAT Table */ + PICK_SLIT, /**< SLIT Table */ + PICK_WHEA_MCE, /**< WHEA MCE table */ + PICK_WHEA_CMC, /**< WHEA CMV table */ + PICK_ALIB, /**< SACPI SSDT table with ALIB implementation */ }; -/*---------------------------------------------------------------------------------------- - * T Y P E D E F S A N D S T R U C T U R E S - *---------------------------------------------------------------------------------------- +/** + * @brief Typedefs and Structures */ - typedef struct { UINT32 CalloutName; AGESA_STATUS (*CalloutPtr) (UINT32 Func, UINT32 Data, VOID* ConfigPtr); } BIOS_CALLOUT_STRUCT; -/*---------------------------------------------------------------------------------------- - * P R O T O T Y P E S O F L O C A L F U N C T I O N S - *---------------------------------------------------------------------------------------- +/** + * @brief Prototypes of local functions */ -/*---------------------------------------------------------------------------------------- - * E X P O R T E D F U N C T I O N S - *---------------------------------------------------------------------------------------- +/** + * @brief Exported functions */ -/*--------------------------------------------------------------------------------------- - * L O C A L F U N C T I O N S - *--------------------------------------------------------------------------------------- +/** + * @brief Local functions */ - UINT32 agesawrapper_amdinitreset (void); UINT32 agesawrapper_amdinitearly (void); UINT32 agesawrapper_amdinitenv (void); @@ -92,4 +84,4 @@ void *agesawrapper_getlateinitptr (int pick); UINT32 GetHeapBase(AMD_CONFIG_PARAMS *StdHeader); -#endif +#endif /* _AGESAWRAPPER_H_ */ diff --git a/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c b/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c index b77c375..89257c2 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c +++ b/src/mainboard/jetway/nf81-t56n-lf/irq_tables.c @@ -58,8 +58,10 @@ unsigned long write_pirq_routing_table(unsigned long addr) u8 sum = 0; int i; - - get_bus_conf(); /* it will find out all bus num and apic that share with mptable.c and mptable.c and acpi_tables.c */ + /* Find out all bus num and apic that are share with: + * mptable.c and acpi_tables.c + */ + get_bus_conf(); /* Align the table to be 16 byte aligned. */ @@ -90,19 +92,14 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq_info = (void *)(&pirq->checksum + 1); slot_num = 0; - /* pci bridge */ write_pirq_info(pirq_info, bus_sb800[0], ((sbdn_sb800 + 0x14) << 3) | 4, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0); pirq_info++; - - slot_num++; - - pirq->size = 32 + 16 * slot_num; for (i = 0; i < pirq->size; i++) @@ -117,5 +114,4 @@ unsigned long write_pirq_routing_table(unsigned long addr) printk(BIOS_INFO, "write_pirq_routing_table done.\n"); return (unsigned long)pirq_info; - }

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Patch set updated for coreboot: 443f9e2 drivers/pc80: Avoid include of .c
by Edward O'Callaghan 10 Apr '14

10 Apr '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5480 -gerrit commit 443f9e241b3d41bfc72a11b0598a31c371b27555 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Wed Apr 9 15:46:37 2014 +1000 drivers/pc80: Avoid include of .c Avoid #including .c files from pc80 driver. Change-Id: Ifc2d053923ea0f5e64a95b011c27a3b8f628017e Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/drivers/pc80/i8259.c | 4 +--- src/include/pc80/i8254.h | 4 +++- src/include/pc80/i8259.h | 1 + src/mainboard/amd/dinar/Makefile.inc | 3 +++ src/mainboard/amd/dinar/romstage.c | 4 ++-- src/mainboard/amd/inagua/Makefile.inc | 3 +++ src/mainboard/amd/inagua/romstage.c | 4 ++-- src/mainboard/amd/olivehill/Makefile.inc | 3 +++ src/mainboard/amd/olivehill/romstage.c | 4 ++-- src/mainboard/amd/parmer/Makefile.inc | 3 +++ src/mainboard/amd/parmer/romstage.c | 4 ++-- src/mainboard/amd/persimmon/Makefile.inc | 3 +++ src/mainboard/amd/persimmon/romstage.c | 4 ++-- src/mainboard/amd/thatcher/Makefile.inc | 3 +++ src/mainboard/amd/thatcher/romstage.c | 4 ++-- src/mainboard/amd/torpedo/Makefile.inc | 4 +++- src/mainboard/amd/torpedo/romstage.c | 4 ++-- src/mainboard/asrock/e350m1/Makefile.inc | 5 +++-- src/mainboard/asrock/e350m1/romstage.c | 4 ++-- src/mainboard/asrock/imb-a180/Makefile.inc | 3 +++ src/mainboard/asrock/imb-a180/romstage.c | 4 ++-- src/mainboard/asus/f2a85-m/Makefile.inc | 3 +++ src/mainboard/asus/f2a85-m/romstage.c | 4 ++-- src/mainboard/dmp/vortex86ex/romstage.c | 2 ++ src/mainboard/gizmosphere/gizmo/Makefile.inc | 3 +++ src/mainboard/gizmosphere/gizmo/romstage.c | 4 ++-- src/mainboard/hp/pavilion_m6_1035dx/Makefile.inc | 3 +++ src/mainboard/hp/pavilion_m6_1035dx/romstage.c | 5 ++--- src/mainboard/jetway/nf81-t56n-lf/Makefile.inc | 3 +++ src/mainboard/jetway/nf81-t56n-lf/romstage.c | 5 ++--- src/mainboard/lippert/frontrunner-af/Makefile.inc | 5 +++-- src/mainboard/lippert/frontrunner-af/romstage.c | 4 ++-- src/mainboard/lippert/toucan-af/Makefile.inc | 5 +++-- src/mainboard/lippert/toucan-af/romstage.c | 4 ++-- src/mainboard/supermicro/h8scm/Makefile.inc | 4 +++- src/mainboard/supermicro/h8scm/romstage.c | 4 ++-- src/mainboard/tyan/s8226/Makefile.inc | 4 +++- src/mainboard/tyan/s8226/romstage.c | 4 ++-- 38 files changed, 92 insertions(+), 49 deletions(-) diff --git a/src/drivers/pc80/i8259.c b/src/drivers/pc80/i8259.c index 6f97c56..1525055 100644 --- a/src/drivers/pc80/i8259.c +++ b/src/drivers/pc80/i8259.c @@ -135,7 +135,5 @@ void i8259_configure_irq_trigger(int int_num, int is_level_triggered) printk(BIOS_ERR, "%s: higher order bits are wrong: want 0x%x, got 0x%x\n", __func__, (int_bits>>8), inb(ELCR2)); } -#endif +#endif /* PARANOID_IRQ_TRIGGERS */ } - - diff --git a/src/include/pc80/i8254.h b/src/include/pc80/i8254.h index f4f0dca..22fb2e5 100644 --- a/src/include/pc80/i8254.h +++ b/src/include/pc80/i8254.h @@ -58,5 +58,7 @@ #define PPCB_SPKR 0x02 /* Bit 1 */ #define PPCB_T2GATE 0x01 /* Bit 0 */ +/* Initialize i8254 timers */ void setup_i8254(void); -#endif + +#endif /* PC80_I8254_H */ diff --git a/src/include/pc80/i8259.h b/src/include/pc80/i8259.h index 7e99e4b..56a09d6 100644 --- a/src/include/pc80/i8259.h +++ b/src/include/pc80/i8259.h @@ -20,6 +20,7 @@ #ifndef PC80_I8259_H #define PC80_I8259_H +/* Initialize i8259 pic */ void setup_i8259(void); #define IRQ_LEVEL_TRIGGERED 1 diff --git a/src/mainboard/amd/dinar/Makefile.inc b/src/mainboard/amd/dinar/Makefile.inc index 8dfe21d..7a93698 100644 --- a/src/mainboard/amd/dinar/Makefile.inc +++ b/src/mainboard/amd/dinar/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c index 91b385f..d5fd445 100644 --- a/src/mainboard/amd/dinar/romstage.c +++ b/src/mainboard/amd/dinar/romstage.c @@ -31,8 +31,8 @@ #include "superio/smsc/sch4037/sch4037_early_init.c" #include "superio/smsc/sio1036/sio1036_early_init.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "nb_cimx.h" #include <sb_cimx.h> #include "Platform.h" diff --git a/src/mainboard/amd/inagua/Makefile.inc b/src/mainboard/amd/inagua/Makefile.inc index f5c52f0..c2e0785 100644 --- a/src/mainboard/amd/inagua/Makefile.inc +++ b/src/mainboard/amd/inagua/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom diff --git a/src/mainboard/amd/inagua/romstage.c b/src/mainboard/amd/inagua/romstage.c index 718d2b2..db99ed3 100644 --- a/src/mainboard/amd/inagua/romstage.c +++ b/src/mainboard/amd/inagua/romstage.c @@ -34,8 +34,8 @@ #include "cpu/x86/bist.h" #include "superio/smsc/kbc1100/kbc1100_early_init.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/amd/olivehill/Makefile.inc b/src/mainboard/amd/olivehill/Makefile.inc index 3103f70..3a80f73 100644 --- a/src/mainboard/amd/olivehill/Makefile.inc +++ b/src/mainboard/amd/olivehill/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c index 9431d4a..344151f 100644 --- a/src/mainboard/amd/olivehill/romstage.c +++ b/src/mainboard/amd/olivehill/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/lapic.h" #include "southbridge/amd/agesa/hudson/hudson.h" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "cbmem.h" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); diff --git a/src/mainboard/amd/parmer/Makefile.inc b/src/mainboard/amd/parmer/Makefile.inc index 3103f70..3a80f73 100644 --- a/src/mainboard/amd/parmer/Makefile.inc +++ b/src/mainboard/amd/parmer/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c index 202442c..ea11ed3 100644 --- a/src/mainboard/amd/parmer/romstage.c +++ b/src/mainboard/amd/parmer/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/lapic.h" #include "southbridge/amd/agesa/hudson/hudson.h" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "cbmem.h" void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); diff --git a/src/mainboard/amd/persimmon/Makefile.inc b/src/mainboard/amd/persimmon/Makefile.inc index e1f18a9..4b1a801 100644 --- a/src/mainboard/amd/persimmon/Makefile.inc +++ b/src/mainboard/amd/persimmon/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c index e082f60..48aec4f 100644 --- a/src/mainboard/amd/persimmon/romstage.c +++ b/src/mainboard/amd/persimmon/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/bist.h" #include <superio/fintek/f81865f/f81865f.h> #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/amd/thatcher/Makefile.inc b/src/mainboard/amd/thatcher/Makefile.inc index 3103f70..3a80f73 100644 --- a/src/mainboard/amd/thatcher/Makefile.inc +++ b/src/mainboard/amd/thatcher/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c index 6bf8ac6..d4c5641 100644 --- a/src/mainboard/amd/thatcher/romstage.c +++ b/src/mainboard/amd/thatcher/romstage.c @@ -34,8 +34,8 @@ #include "southbridge/amd/agesa/hudson/hudson.h" #include "src/superio/smsc/lpc47n217/early_serial.c" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "cbmem.h" #define SERIAL_DEV PNP_DEV(0x2e, LPC47N217_SP1) diff --git a/src/mainboard/amd/torpedo/Makefile.inc b/src/mainboard/amd/torpedo/Makefile.inc index 1102ea2..f81e221 100644 --- a/src/mainboard/amd/torpedo/Makefile.inc +++ b/src/mainboard/amd/torpedo/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom @@ -43,4 +46,3 @@ ramstage-y += agesawrapper.c ramstage-y += dimmSpd.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c - diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index f6204b9..53ac5d6 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -31,8 +31,8 @@ #include "cpu/x86/bist.h" #include "superio/smsc/kbc1100/kbc1100_early_init.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "sb_cimx.h" #include "SbPlatform.h" #include <arch/cpu.h> diff --git a/src/mainboard/asrock/e350m1/Makefile.inc b/src/mainboard/asrock/e350m1/Makefile.inc index 2105082..c624762 100644 --- a/src/mainboard/asrock/e350m1/Makefile.inc +++ b/src/mainboard/asrock/e350m1/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c @@ -26,5 +29,3 @@ ramstage-y += buildOpts.c ramstage-y += agesawrapper.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c - - diff --git a/src/mainboard/asrock/e350m1/romstage.c b/src/mainboard/asrock/e350m1/romstage.c index bf850a3..c3905d0 100644 --- a/src/mainboard/asrock/e350m1/romstage.c +++ b/src/mainboard/asrock/e350m1/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/bist.h" #include "superio/winbond/w83627hf/early_serial.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/asrock/imb-a180/Makefile.inc b/src/mainboard/asrock/imb-a180/Makefile.inc index a83297a..b557e72 100644 --- a/src/mainboard/asrock/imb-a180/Makefile.inc +++ b/src/mainboard/asrock/imb-a180/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c index 9b069b7..9ab07f2 100644 --- a/src/mainboard/asrock/imb-a180/romstage.c +++ b/src/mainboard/asrock/imb-a180/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/lapic.h" #include "southbridge/amd/agesa/hudson/hudson.h" #include "cpu/amd/agesa/s3_resume.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "cbmem.h" #include "superio/winbond/w83627uhg/early_serial.c" diff --git a/src/mainboard/asus/f2a85-m/Makefile.inc b/src/mainboard/asus/f2a85-m/Makefile.inc index 3103f70..3a80f73 100644 --- a/src/mainboard/asus/f2a85-m/Makefile.inc +++ b/src/mainboard/asus/f2a85-m/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index ee9983d..3eeb528 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -35,9 +35,9 @@ #include <southbridge/amd/agesa/hudson/smbus.h> #include <stdint.h> #include <string.h> +#include <pc80/i8254.h> +#include <pc80/i8259.h> /* TODO: remove .c includes */ -#include <drivers/pc80/i8254.c> -#include <drivers/pc80/i8259.c> #include <superio/ite/it8712f/early_serial.c> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); diff --git a/src/mainboard/dmp/vortex86ex/romstage.c b/src/mainboard/dmp/vortex86ex/romstage.c index 8889015..bfc8869 100644 --- a/src/mainboard/dmp/vortex86ex/romstage.c +++ b/src/mainboard/dmp/vortex86ex/romstage.c @@ -23,7 +23,9 @@ #include <stdlib.h> #include <console/console.h> #include <cpu/x86/cache.h> +/* FIXME: ROMCC board */ #include "drivers/pc80/i8254.c" +/* #include <pc80/i8254.h> */ #include "northbridge/dmp/vortex86ex/northbridge.h" #include "southbridge/dmp/vortex86ex/southbridge.h" #include "northbridge/dmp/vortex86ex/raminit.c" diff --git a/src/mainboard/gizmosphere/gizmo/Makefile.inc b/src/mainboard/gizmosphere/gizmo/Makefile.inc index 3f4224b..e677e43 100755 --- a/src/mainboard/gizmosphere/gizmo/Makefile.inc +++ b/src/mainboard/gizmosphere/gizmo/Makefile.inc @@ -18,6 +18,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom diff --git a/src/mainboard/gizmosphere/gizmo/romstage.c b/src/mainboard/gizmosphere/gizmo/romstage.c index 705d429..52fc7d9 100755 --- a/src/mainboard/gizmosphere/gizmo/romstage.c +++ b/src/mainboard/gizmosphere/gizmo/romstage.c @@ -32,8 +32,8 @@ #include <cpu/x86/mtrr.h> #include "agesawrapper.h" #include "cpu/x86/bist.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/hp/pavilion_m6_1035dx/Makefile.inc b/src/mainboard/hp/pavilion_m6_1035dx/Makefile.inc index 3103f70..3a80f73 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/Makefile.inc +++ b/src/mainboard/hp/pavilion_m6_1035dx/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += buildOpts.c romstage-y += agesawrapper.c romstage-y += BiosCallOuts.c diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c index dd19679..9869803 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c @@ -33,9 +33,8 @@ #include <string.h> #include <southbridge/amd/agesa/hudson/hudson.h> -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" - +#include <pc80/i8254.h> +#include <pc80/i8259.h> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); void disable_cache_as_ram(void); diff --git a/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc b/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc index e1f18a9..4b1a801 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc +++ b/src/mainboard/jetway/nf81-t56n-lf/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c index 846d5c7..aa0b9fb 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c +++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c @@ -42,9 +42,8 @@ #include <southbridge/amd/cimx/sb800/SBPLATFORM.h> #include "superio/fintek/f71869ad/f71869ad.h" -/* FIXME: should not include .c files */ -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> void disable_cache_as_ram(void); /* cache_as_ram.inc */ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx); diff --git a/src/mainboard/lippert/frontrunner-af/Makefile.inc b/src/mainboard/lippert/frontrunner-af/Makefile.inc index e1f18a9..2e07808 100644 --- a/src/mainboard/lippert/frontrunner-af/Makefile.inc +++ b/src/mainboard/lippert/frontrunner-af/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom @@ -33,5 +36,3 @@ ramstage-y += buildOpts.c ramstage-y += agesawrapper.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c - - diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c index 9ecd087..748b1e0 100644 --- a/src/mainboard/lippert/frontrunner-af/romstage.c +++ b/src/mainboard/lippert/frontrunner-af/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/bist.h" #include "superio/smsc/smscsuperio/early_serial.c" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/lippert/toucan-af/Makefile.inc b/src/mainboard/lippert/toucan-af/Makefile.inc index e1f18a9..2e07808 100644 --- a/src/mainboard/lippert/toucan-af/Makefile.inc +++ b/src/mainboard/lippert/toucan-af/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + ifeq ($(CONFIG_AHCI_BIOS),y) stripped_ahcibios_id = $(call strip_quotes,$(CONFIG_AHCI_BIOS_ID)) cbfs-files-$(CONFIG_AHCI_BIOS) += pci$(stripped_ahcibios_id).rom @@ -33,5 +36,3 @@ ramstage-y += buildOpts.c ramstage-y += agesawrapper.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c - - diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c index 4f62268..ef4588f 100644 --- a/src/mainboard/lippert/toucan-af/romstage.c +++ b/src/mainboard/lippert/toucan-af/romstage.c @@ -33,8 +33,8 @@ #include "cpu/x86/bist.h" #include "superio/winbond/w83627dhg/w83627dhg.h" #include "cpu/x86/lapic.h" -#include "drivers/pc80/i8254.c" -#include "drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include <cpu/x86/cache.h> #include <sb_cimx.h> #include "SBPLATFORM.h" diff --git a/src/mainboard/supermicro/h8scm/Makefile.inc b/src/mainboard/supermicro/h8scm/Makefile.inc index 77e8719..2a656e1 100644 --- a/src/mainboard/supermicro/h8scm/Makefile.inc +++ b/src/mainboard/supermicro/h8scm/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += rd890_cfg.c romstage-y += sb700_cfg.c romstage-y += buildOpts.c @@ -38,4 +41,3 @@ NB_CIMX_ROOT ?= $(CIMX_PREFIX)/rd890 SB_CIMX_ROOT ?= $(CIMX_PREFIX)/sb700 subdirs-y += ../../../../$(AGESA_ROOT) - diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c index 9ee1dfa..cb0939a 100644 --- a/src/mainboard/supermicro/h8scm/romstage.c +++ b/src/mainboard/supermicro/h8scm/romstage.c @@ -30,8 +30,8 @@ #include "northbridge/amd/agesa/family10/reset_test.h" #include <nb_cimx.h> #include <sb_cimx.h> -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> #include "superio/nuvoton/wpcm450/wpcm450.h" #include "superio/winbond/w83627dhg/w83627dhg.h" diff --git a/src/mainboard/tyan/s8226/Makefile.inc b/src/mainboard/tyan/s8226/Makefile.inc index 77e8719..2a656e1 100644 --- a/src/mainboard/tyan/s8226/Makefile.inc +++ b/src/mainboard/tyan/s8226/Makefile.inc @@ -17,6 +17,9 @@ # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA # +romstage-y += $(src)/drivers/pc80/8254.c +romstage-y += $(src)/drivers/pc80/i8259.c + romstage-y += rd890_cfg.c romstage-y += sb700_cfg.c romstage-y += buildOpts.c @@ -38,4 +41,3 @@ NB_CIMX_ROOT ?= $(CIMX_PREFIX)/rd890 SB_CIMX_ROOT ?= $(CIMX_PREFIX)/sb700 subdirs-y += ../../../../$(AGESA_ROOT) - diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c index a6c33e8..42596ff 100644 --- a/src/mainboard/tyan/s8226/romstage.c +++ b/src/mainboard/tyan/s8226/romstage.c @@ -32,8 +32,8 @@ #include <sb_cimx.h> #include "superio/nuvoton/wpcm450/wpcm450.h" #include "superio/winbond/w83627dhg/w83627dhg.h" -#include "src/drivers/pc80/i8254.c" -#include "src/drivers/pc80/i8259.c" +#include <pc80/i8254.h> +#include <pc80/i8259.h> extern void disable_cache_as_ram(void); /* cache_as_ram.inc */

1 0

Patch merged into coreboot/master: 6b583a4 vendorcode/amd/agesa: Do not hardcode ROM base address
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit 6b583a454c24c0c8fb41da9eaef52a830e83b3e4 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sun Apr 6 15:19:56 2014 -0500 vendorcode/amd/agesa: Do not hardcode ROM base address The ROM address range is set up in the LPC PCI device, register 0x6c. Coreboot already sets that up correctly in the bootblock, however AGESA overrides that to 0xffffff00, which will always map the ROM from 0xff000000. This may conflict with other devices which are assigned address space in that range. If a device is assigned a range between 0xff000000 and the real ROM base, accesses to that device will be diverted to the system ROM, regardless of how other BARs are set up. Since we already need to set up the ROM address range in the bootblock, before calling AGESA, just remove the override from AGESA. Note that not all AGESA versions override this mapping. Change-Id: I592e5d087ed830c9604a04a356912c7654ce56d2 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Reviewed-on: http://review.coreboot.org/5467 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-by: Aaron Durbin <adurbin(a)google.com> See http://review.coreboot.org/5467 for details. -gerrit

1 0

Patch merged into coreboot/master: 8395e90 supermicro/h8qgi/dsdt: Use PIC as default interrupt model
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit 8395e90bc0a737f09ef5b5e2c94e37c66748b505 Author: Konstantin Aladyshev <aladyshev(a)nicevt.ru> Date: Sat Jul 12 02:36:32 2014 +0400 supermicro/h8qgi/dsdt: Use PIC as default interrupt model According ACPI specification: """ The \_PIC optional method is used to report to the BIOS the current interrupt model used by the OS. The argument passed into the method signifies the interrupt model OSPM has chosen, PIC mode, APIC mode, or SAPIC mode. Notice that calling this method is optional for OSPM. If the method is never called, the BIOS must assume PIC mode. Arguments: (1) Arg0 – An Integer containing a code for the current interrupt model: 0 –PIC mode 1 –APIC mode 2 –SAPIC mode """ In current configuration with default value of interrupt model PMOD equal 1 (APIC mode), Linux can't boot with "noapic" option. Kernel never call _PIC method and PMOD stays equal 1, indicatind that APIC routing objects should be evaluated. This mix of PIC and APIC leads to boot fail. Change default value of interrupt model PMOD to 0, for correct "noapic" boot. Change-Id: I7fa6f0c24802751202ed2e7f13411001a600e772 Signed-off-by: Konstantin Aladyshev <aladyshev(a)nicevt.ru> Reviewed-on: http://review.coreboot.org/5473 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5473 for details. -gerrit

1 0

Patch merged into coreboot/master: fe365ac mainboard/lenovo: [2/2] implement initial T530 support
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit fe365ac7e8c01cff46c593e80ca20ae3cb3362e7 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Mar 16 17:24:18 2014 +1100 mainboard/lenovo: [2/2] implement initial T530 support Step 2: change the Lenovo X230 code to adapt it to the new board's hardware with the great guidance from Vladimir (phcoder) to find the correct GPIO's. The machine has: - Chipset: Intel QM77 - GPU's: Intel Integrated HD Graphics : Discrete NVIDIA NVS 5400M (1 GB VRAM) with Optimus Technology Change-Id: Iee12c3edc22df4a7935b7fb7ff4a320c21c4239b Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/5391 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/5391 for details. -gerrit

1 0

Patch merged into coreboot/master: 956c298 mainboard/lenovo: [1/2] fork X230 to T530
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit 956c29823328b37506fce7bfefe7e53e58706dd2 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sun Mar 16 17:09:58 2014 +1100 mainboard/lenovo: [1/2] fork X230 to T530 Step 1: copy all files unmodified from Lenovo X230. This makes it much easier later to see how the two boards actually and deliberately differ when porting bugfixes from one to the other. Change-Id: I3151c7848440ea6c240b959379a8eb369d35f3de Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Reviewed-on: http://review.coreboot.org/5390 Reviewed-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Tested-by: build bot (Jenkins) See http://review.coreboot.org/5390 for details. -gerrit

1 0

Patch merged into coreboot/master: a09dad0 asus/f2a85-m: conditionally show POST codes
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit a09dad0c77ff0365210f784b10d0516338a949b7 Author: Idwer Vollering <vidwer(a)gmail.com> Date: Tue Mar 11 15:43:35 2014 +0000 asus/f2a85-m: conditionally show POST codes Change-Id: I61e55601676c0825815d6520a874ccade8942379 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Reviewed-on: http://review.coreboot.org/5362 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5362 for details. -gerrit

1 0

Patch merged into coreboot/master: 1a25c9cd lynxpoint: Fix SerialIO ACPI compile issue with recent IASL
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit 1a25c9cdfd3fd391328133ba94c63ecd1083e4f8 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Mon Feb 10 11:37:45 2014 -0800 lynxpoint: Fix SerialIO ACPI compile issue with recent IASL The SerialIO DwordIo() definition is fixed up before returning it in the serialio device _CRS method, so the values that are set in the raw ASL are not actually used. However modern versions of IASL do not like that the RangeLength is set to zero and will fail to compile. Set this value to 1 to make IASL stop complaining, but the real value is still fixed up in _CRS so this has no real effect on the end result. Change-Id: Iceb888e54dd4d627c12d078915108a11f45b1a2d Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: http://review.coreboot.org/5182 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/5182 for details. -gerrit

1 0

Patch merged into coreboot/master: 69813fe sb/amd/amd8111/acpi.c: Remove set but unused variable `dword`
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit 69813febbc91571f9126f980b97fd7b37a45f125 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Sat Mar 1 12:49:57 2014 +0100 sb/amd/amd8111/acpi.c: Remove set but unused variable `dword` Removing `-Wno-unused-but-set-variable` from `CFLAGS` results in the error below, when building for example the HP DL145 GL1. CC southbridge/amd/amd8111/acpi.ramstage.o src/southbridge/amd/amd8111/acpi.c: In function 'acpi_init': src/southbridge/amd/amd8111/acpi.c:100:11: error: variable 'dword' set but not used [-Werror=unused-but-set-variable] Removing the variable `dword` fixes this error. The read is left in the code, as I do not know if it has an effect or not. Change-Id: I9957cef3a996c5974c275423c9de63ccf230974e Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/5315 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5315 for details. -gerrit

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Patch merged into coreboot/master: dbc7bd9 console: Refactor uart8250/NE2K
by gerrit＠coreboot.org 09 Apr '14

09 Apr '14

the following patch was just integrated into master: commit dbc7bd9dce2d188dd48de7acd5754507ff0c87e5 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Jan 28 11:34:38 2014 +0200 console: Refactor uart8250/NE2K Do this for symmetry with romstage_console.c. Change-Id: If17acfc3da07b1dbefa87162c3c7168deb7b354a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/5330 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/5330 for details. -gerrit

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coreboot-gerrit April 2014