coreboot-gerrit April 2014

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Patch set updated for coreboot: bbd9b37 Introduce stage-specific architecture for coreboot
by Furquan Shaikh 29 Apr '14

29 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5577 -gerrit commit bbd9b37982225de9e9f762f9473a3d48f4eec831 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Apr 23 10:18:48 2014 -0700 Introduce stage-specific architecture for coreboot Make all three coreboot stages (bootblock, romstage and ramstage) aware of the architecture specific to that stage i.e. we will have CONFIG_ARCH variables for each of the three stages. This allows us to have an SOC with any combination of architectures and thus every stage can be made to run on a completely different architecture independent of others. Thus, bootblock can have an x86 arch whereas romstage and ramstage can have arm32 and arm64 arch respectively. These arch specific options can be considered as either arch or modes eg: x86 running in different modes or ARM having different arch types (v4, v7, v8). In addition to different architectures/modes per stage, a separate binary arch is introduced to help to indentify the arch of CBFS binaries. Also, for now this arch type is used at places which are not clearly part of any of the above stages (eg seabios and others). The original CONFIG_ARCH variable is thus removed and replaced by CONFIG_BINARY_ARCH. Ultimate goal is to get rid of all the occurences of CONFIG_BINARY_ARCH and when we understand the arch for currently not-so-sure components. However, the general idea is that CONFIG_BINARY_ARCH should be declared as the topmost arch of the SoC or the arch which is actually responsible for loading the kernel. In order to meet these requirements, changes have been made to CC, LD, OBJCOPY and family to add CC_bootblock, CC_romstage, CC_ramstage, CC_binary and similarly others. Few additional macros have been introduced to identify the class to be used at various points, e.g.: CC_$(class) derives the $(class) part from the name of the stage being compiled. Conflicts: src/arch/armv7/Makefile.inc src/arch/x86/Makefile.inc Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile | 90 +++++++++++++++++++++-------- Makefile.inc | 66 +++++++++++++-------- src/Kconfig | 50 ++++++++++++---- src/arch/armv7/Makefile.inc | 50 ++++++++++------ src/arch/x86/Kconfig | 4 +- src/arch/x86/Makefile.inc | 83 ++++++++++++++++---------- src/arch/x86/boot/Makefile.inc | 8 +++ src/arch/x86/lib/Makefile.inc | 21 +++++-- src/console/Kconfig | 2 +- src/cpu/Kconfig | 6 +- src/cpu/Makefile.inc | 4 +- src/cpu/allwinner/a10/Kconfig | 5 +- src/cpu/amd/agesa/Kconfig | 5 +- src/cpu/amd/geode_gx1/Kconfig | 5 +- src/cpu/amd/geode_gx2/Kconfig | 5 +- src/cpu/amd/geode_lx/Kconfig | 5 +- src/cpu/amd/model_10xxx/Kconfig | 5 +- src/cpu/amd/model_fxx/Kconfig | 5 +- src/cpu/amd/sc520/Kconfig | 5 +- src/cpu/armltd/cortex-a9/Kconfig | 5 +- src/cpu/dmp/vortex86ex/Kconfig | 5 +- src/cpu/intel/ep80579/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/cpu/intel/haswell/Kconfig | 5 +- src/cpu/intel/haswell/Makefile.inc | 6 +- src/cpu/intel/model_1067x/Kconfig | 5 +- src/cpu/intel/model_106cx/Kconfig | 5 +- src/cpu/intel/model_2065x/Kconfig | 5 +- src/cpu/intel/model_206ax/Kconfig | 5 +- src/cpu/intel/model_65x/Kconfig | 5 +- src/cpu/intel/model_67x/Kconfig | 5 +- src/cpu/intel/model_68x/Kconfig | 5 +- src/cpu/intel/model_69x/Kconfig | 5 +- src/cpu/intel/model_6bx/Kconfig | 5 +- src/cpu/intel/model_6dx/Kconfig | 5 +- src/cpu/intel/model_6ex/Kconfig | 5 +- src/cpu/intel/model_6fx/Kconfig | 5 +- src/cpu/intel/model_6xx/Kconfig | 5 +- src/cpu/intel/model_f0x/Kconfig | 5 +- src/cpu/intel/model_f1x/Kconfig | 5 +- src/cpu/intel/model_f2x/Kconfig | 5 +- src/cpu/intel/model_f3x/Kconfig | 5 +- src/cpu/intel/model_f4x/Kconfig | 5 +- src/cpu/qemu-x86/Kconfig | 5 +- src/cpu/samsung/exynos5250/Kconfig | 5 +- src/cpu/samsung/exynos5420/Kconfig | 5 +- src/cpu/ti/am335x/Kconfig | 5 +- src/cpu/ti/am335x/Makefile.inc | 4 +- src/cpu/via/c3/Kconfig | 5 +- src/cpu/via/c7/Kconfig | 5 +- src/cpu/via/nano/Kconfig | 5 +- src/cpu/x86/Makefile.inc | 6 +- src/cpu/x86/smm/Makefile.inc | 26 ++++----- src/device/Kconfig | 8 +-- src/device/Makefile.inc | 2 +- src/device/device.c | 4 +- src/device/oprom/include/io.h | 2 +- src/device/oprom/yabel/compat/functions.c | 2 +- src/device/oprom/yabel/device.h | 8 +-- src/device/oprom/yabel/io.c | 2 +- src/drivers/Makefile.inc | 2 +- src/drivers/pc80/mc146818rtc.c | 2 +- src/drivers/uart/Kconfig | 4 +- src/ec/google/chromeec/Kconfig | 2 +- src/lib/Makefile.inc | 8 +-- src/lib/cbfs_core.c | 2 +- src/lib/coreboot_table.c | 2 +- src/mainboard/advansus/a785e-i/Makefile.inc | 2 +- src/mainboard/asus/m5a88-v/Makefile.inc | 2 +- src/mainboard/avalue/eax-785e/Makefile.inc | 2 +- src/mainboard/bifferos/bifferboard/Kconfig | 5 +- src/soc/intel/baytrail/Kconfig | 5 +- src/superio/Makefile.inc | 2 +- src/vendorcode/amd/agesa/f10/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f12/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f14/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15tn/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f16kb/Makefile.inc | 5 +- src/vendorcode/amd/cimx/rd890/Makefile.inc | 6 +- src/vendorcode/amd/cimx/sb700/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb800/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb900/Makefile.inc | 5 +- src/vendorcode/google/chromeos/Makefile.inc | 17 +++--- src/vendorcode/intel/Makefile.inc | 5 +- 86 files changed, 527 insertions(+), 232 deletions(-) diff --git a/Makefile b/Makefile index b709d14..b3da4a6 100644 --- a/Makefile +++ b/Makefile @@ -113,33 +113,74 @@ else include $(HAVE_DOTCONFIG) -ARCHDIR-$(CONFIG_ARCH_ARMV7) := armv7 -ARCHDIR-$(CONFIG_ARCH_X86) := x86 +# Each stage of coreboot can have a different arch. For this we need separate +# config vars +# bootblock arch +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_ARMV7) := armv7 +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_X86) := i386 -ARCH-y := $(ARCHDIR-y) +# romstage arch +ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_ARMV7) := armv7 +ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_X86) := i386 -# If architecture folder name is different from GCC binutils architecture name, -# override here. -ARCH-$(CONFIG_ARCH_ARMV7) := armv7 -ARCH-$(CONFIG_ARCH_X86) := i386 +# ramstage arch +ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_ARMV7) := armv7 +ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_X86) := i386 -ifneq ($(INNER_SCANBUILD),y) -CC := $(CC_$(ARCH-y)) -endif -CPP := $(CPP_$(ARCH-y)) -AS := $(AS_$(ARCH-y)) -LD := $(LD_$(ARCH-y)) -NM := $(NM_$(ARCH-y)) -OBJCOPY := $(OBJCOPY_$(ARCH-y)) -OBJDUMP := $(OBJDUMP_$(ARCH-y)) -READELF := $(READELF_$(ARCH-y)) -STRIP := $(STRIP_$(ARCH-y)) -AR := $(AR_$(ARCH-y)) +# overall binary arch +ARCH-BINARY-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-BINARY-$(CONFIG_ARCH_BINARY_X86) := i386 -CFLAGS += $(CFLAGS_$(ARCH-y)) +ARCHDIR-armv7 := armv7 +ARCHDIR-i386 := x86 -LIBGCC_FILE_NAME := $(shell test -r `$(CC) -print-libgcc-file-name` && \ - $(CC) -print-libgcc-file-name) +# If architecture folder name is different from GCC binutils architecture name, +# override here. +ARCH-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-$(CONFIG_ARCH_BINARY_X86) := i386 + +# Since there can be a different arch for each stage, we can have a different cc +# for each stage +CC_bootblock := $(CC_$(ARCH-BOOTBLOCK-y)) +CC_romstage := $(CC_$(ARCH-ROMSTAGE-y)) +CC_ramstage := $(CC_$(ARCH-RAMSTAGE-y)) +CC_binary := $(CC_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different nm +# for each stage +NM_bootblock := $(NM_$(ARCH-BOOTBLOCK-y)) +NM_romstage := $(NM_$(ARCH-ROMSTAGE-y)) +NM_ramstage := $(NM_$(ARCH-RAMSTAGE-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different +# objcopy for each stage +OBJCOPY_bootblock := $(OBJCOPY_$(ARCH-BOOTBLOCK-y)) +OBJCOPY_romstage := $(OBJCOPY_$(ARCH-ROMSTAGE-y)) +OBJCOPY_ramstage := $(OBJCOPY_$(ARCH-RAMSTAGE-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) + +# CFLAGS +CFLAGS_bootblock += $(CFLAGS_$(ARCH-BOOTBLOCK-y)) +CFLAGS_romstage += $(CFLAGS_$(ARCH-ROMSTAGE-y)) +CFLAGS_ramstage += $(CFLAGS_$(ARCH-RAMSTAGE-y)) +CFLAGS_binary += $(CFLAGS_$(ARCH-BINARY-y)) + +AS_binary := $(AS_$(ARCH-BINARY-y)) +LD_binary := $(LD_$(ARCH-BINARY-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) +OBJDUMP_binary := $(OBJDUMP_$(ARCH-BINARY-y)) +READELF_binary := $(READELF_$(ARCH-BINARY-y)) +STRIP_binary := $(STRIP_$(ARCH-BINARY-y)) +AR_binary := $(AR_$(ARCH-BINARY-y)) + +LIBGCC_FILE_NAME_bootblock := $(shell test -r `$(CC_bootblock) -print-libgcc-file-name` && \ + $(CC_bootblock) -print-libgcc-file-name) +LIBGCC_FILE_NAME_romstage := $(shell test -r `$(CC_romstage) -print-libgcc-file-name` && \ + $(CC_romstage) -print-libgcc-file-name) +LIBGCC_FILE_NAME_ramstage := $(shell test -r `$(CC_ramstage) -print-libgcc-file-name` && \ + $(CC_ramstage) -print-libgcc-file-name) ifneq ($(INNER_SCANBUILD),y) ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) @@ -264,7 +305,8 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$< + $(eval cc-class := $(call find-class-comm,$(class))) + $(CC_$(cc-class)) $(3) -MMD $$$$(CFLAGS_$(cc-class)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef @@ -285,7 +327,7 @@ printall: @echo alldirs:=$(alldirs) @echo allsrcs=$(allsrcs) @echo DEPENDENCIES=$(DEPENDENCIES) - @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME) + @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME_$(class)) @$(foreach class,$(special-classes),echo $(class):='$($(class))'; ) endif diff --git a/Makefile.inc b/Makefile.inc index ba73d98..f00b6f8 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -65,7 +65,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool -subdirs-y += src/arch/$(ARCHDIR-y) +subdirs-y += src/arch/armv7 src/arch/x86 subdirs-y += src/mainboard/$(MAINBOARDDIR) subdirs-y += site-local @@ -105,7 +105,7 @@ files-in-dir=$(filter-out $(call dir-wildcards,$(call filter-out-dirs,$(1),$(dir # reduce command line length by linking the objects of each # directory into an intermediate file ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \ - $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD) -o $$@ -r $$^ ) \ + $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_binary) -o $$@ -r $$^ ) \ $(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs)))) romstage-c-ccopts:=-D__PRE_RAM__ @@ -146,10 +146,10 @@ smm-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-y)/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c - $(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex endef @@ -168,7 +168,7 @@ cbfs-files-processor-nvramtool= \ # arg2: binary file name cbfs-files-processor-vsa= \ $(eval $(2): $(1) ; \ - printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) + printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY_binary) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD_binary) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) ####################################################################### # Add handler for arbitrary files in CBFS @@ -211,19 +211,29 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include +INCLUDES := -Isrc -Isrc/include -I$(obj) INCLUDES += -Isrc/device/oprom/include # abspath is a workaround for romcc INCLUDES += -include $(src)/include/kconfig.h -CFLAGS = $(INCLUDES) -Os -pipe -g -nostdinc -CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -CFLAGS += -Wstrict-aliasing -Wshadow +INCLUDES_binary := -Isrc/arch/$(ARCHDIR-$(ARCH-BINARY-y))/include +INCLUDES_bootblock := -Isrc/arch/$(ARCHDIR-$(ARCH-BOOTBLOCK-y))/include +INCLUDES_romstage := -Isrc/arch/$(ARCHDIR-$(ARCH-ROMSTAGE-y))/include +INCLUDES_ramstage := -Isrc/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include + +CFLAGS_common = $(INCLUDES) -Os -pipe -g -nostdinc +CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wstrict-aliasing -Wshadow ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y) -CFLAGS += -Werror +CFLAGS_common += -Werror endif -CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer +CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer + +CFLAGS_binary = $(CFLAGS_common) $(INCLUDES_binary) +CFLAGS_bootblock = $(CFLAGS_common) $(INCLUDES_bootblock) +CFLAGS_romstage = $(CFLAGS_common) $(INCLUDES_romstage) +CFLAGS_ramstage = $(CFLAGS_common) $(INCLUDES_ramstage) additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \ $(objutil)/ifdfake $(objutil)/options @@ -245,9 +255,9 @@ $(obj)/build.h: .xcompile printf "#define COREBOOT_BUILD_WEEKDAY_BCD 0x`LANG= date +"%w"`\n" >> $(obj)/build.ht printf "#define COREBOOT_DMI_DATE \"`LANG= date +"%m/%d/%Y"`\"\n" >> $(obj)/build.ht printf "\n" >> $(obj)/build.ht - printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD_binary) --version | head -n1)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_BY \"$(subst \,@,$(shell PATH=$$PATH:/usr/ucb whoami))\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_HOST \"$(shell hostname -s 2>/dev/null || hostname 2>/dev/null)\"\n" >> $(obj)/build.ht @@ -315,15 +325,15 @@ $(objutil)/%.o: $(objutil)/%.c $(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(CFLAGS) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -D__PRE_RAM__ $(CFLAGS) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< ####################################################################### # Clean up rules @@ -339,7 +349,7 @@ clean-for-update-target: rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.* rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC)" LD="$(LD)" + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC_binary)" LD="$(LD_binary)" clean-target: rm -f $(obj)/coreboot* @@ -412,16 +422,22 @@ tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/ # Common recipes for all stages ######################################################################################################################################################################## +find-class = $(if $(filter $(1),$(basename $(1))),$(1),$(call find-class,$(basename $(1)))) + +find-class-comm = $(if $(CC_$(call find-class,$(1))),$(call find-class,$(1)),binary) + $(objcbfs)/%.bin: $(objcbfs)/%.elf + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_$(class)) -O binary $< $@ $(objcbfs)/%.elf: $(objcbfs)/%.debug + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + $(NM_$(class)) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_$(class)) --strip-debug $@.tmp + $(OBJCOPY_$(class)) --add-gnu-debuglink=$< $@.tmp mv $@.tmp $@ ######################################################################################################################################################################## @@ -550,10 +566,10 @@ cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) bootsplash.jpg-type := bootsplash -ifeq ($(CONFIG_ARCH_ARMV7),y) +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) ROMSTAGE_ELF := romstage.elf endif -ifeq ($(CONFIG_ARCH_X86),y) +ifeq ($(CONFIG_ARCH_BINARY_X86),y) ROMSTAGE_ELF := romstage_xip.elf endif diff --git a/src/Kconfig b/src/Kconfig index 6356b19..e85ab62 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -228,22 +228,50 @@ source src/mainboard/Kconfig # This option is used to set the architecture of a mainboard to X86. # It is usually set in mainboard/*/Kconfig. -config ARCH_X86 +config ARCH_BINARY_X86 bool default n select PCI -config ARCH_ARMV7 +config ARCH_BINARY_ARMV7 bool default n +# This option is used to set the architecture of bootblock stage +config ARCH_BOOTBLOCK_ARMV7 + bool + default n + +config ARCH_BOOTBLOCK_X86 + bool + default n + +# This option is used to set the architecture of romstage stage +config ARCH_ROMSTAGE_ARMV7 + bool + default n + +config ARCH_ROMSTAGE_X86 + bool + default n + +# This option is used to set the architecture of ramstage stage +config ARCH_RAMSTAGE_ARMV7 + bool + default n + +config ARCH_RAMSTAGE_X86 + bool + default n + + # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_X86 +if ARCH_BINARY_X86 source src/arch/x86/Kconfig endif -if ARCH_ARMV7 +if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig endif @@ -334,7 +362,7 @@ config TIMER_QUEUE config COOP_MULTITASKING def_bool n - depends on TIMER_QUEUE && ARCH_X86 + depends on TIMER_QUEUE && ARCH_BINARY_X86 help Cooperative multitasking allows callbacks to be multiplexed on the main thread of ramstage. With this enabled it allows for multiple @@ -433,7 +461,7 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM by the board and/or chipset. config HAVE_REFCODE_BLOB - depends on ARCH_X86 + depends on ARCH_BINARY_X86 bool "An external reference code blob should be put into cbfs." default n help @@ -518,7 +546,7 @@ config GENERATE_PIRQ_TABLE If unsure, say Y. config GENERATE_SMBIOS_TABLES - depends on ARCH_X86 + depends on ARCH_BINARY_X86 bool "Generate SMBIOS tables" default y help @@ -532,8 +560,8 @@ menu "Payload" choice prompt "Add a payload" - default PAYLOAD_NONE if !ARCH_X86 - default PAYLOAD_SEABIOS if ARCH_X86 + default PAYLOAD_NONE if !ARCH_BINARY_X86 + default PAYLOAD_SEABIOS if ARCH_BINARY_X86 config PAYLOAD_NONE bool "None" @@ -567,7 +595,7 @@ config PAYLOAD_LINUX config PAYLOAD_SEABIOS bool "SeaBIOS" - depends on ARCH_X86 + depends on ARCH_BINARY_X86 help Select this option if you want to build a coreboot image with a SeaBIOS payload. If you don't know what this is @@ -1115,7 +1143,7 @@ config POWER_BUTTON_IS_OPTIONAL config REG_SCRIPT bool - default y if ARCH_X86 + default y if ARCH_BINARY_X86 default n help Internal option that controls whether we compile in register scripts. diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index a419dcd..241ecb5 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -32,6 +32,7 @@ subdirs-y += lib/ # ARM specific options ################################################################################ +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) CBFSTOOL_PRE_OPTS = -b 0 @@ -40,20 +41,23 @@ stages_o = $(obj)/arch/armv7/stages.o $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -I. $(INCLUDES) -c -o $@ $< -marm + $(CC_binary) -I. $(INCLUDES) $(INCLUDES_binary) -c -o $@ $< -marm -CFLAGS += \ +CFLAGS_common += \ -ffixed-r8\ -march=armv7-a\ -marm\ -mno-unaligned-access\ -mthumb\ -mthumb-interwork +endif # CONFIG_ARCH_BINARY_ARMV7 ################################################################################ # Bootblock ################################################################################ +ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y) + bootblock-y += cache.c bootblock-y += eabi_compat.c bootblock-y += memset.S @@ -81,31 +85,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_bootblock) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ + $(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \ -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ + $(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_bootblock) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group endif +endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y) + romstage-y += cache.c romstage-y += div0.c romstage-y += eabi_compat.c @@ -132,9 +140,9 @@ crt0s += $(cpu_incs-y) $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions @@ -149,21 +157,24 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_ARMV7 ################################################################################ # Ramstage ################################################################################ -# Things that appear in every board +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y) + ramstage-y += exception.c ramstage-y += exception_asm.S ramstage-y += div0.c @@ -183,17 +194,17 @@ ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld + $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< endif -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) +$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) @@ -220,3 +231,4 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c endif +endif # CONFIG_ARCH_RAMSTAGE_ARMV7 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8854e6b..36c9356 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -13,14 +13,14 @@ config X86_ARCH_OPTIONS config AP_IN_SIPI_WAIT bool default n - depends on ARCH_X86 && SMP + depends on ARCH_BINARY_X86 && SMP # Aligns 16bit entry code in bootblock so that hyper-threading CPUs # can boot AP CPUs to enable their shared caches. config SIPI_VECTOR_IN_ROM bool default n - depends on ARCH_X86 + depends on ARCH_BINARY_X86 config RAMBASE hex diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 79caabd..8a85100 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -53,8 +53,10 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE)) mbi.bin-type := mbi +ifeq ($(CONFIG_ARCH_BINARY_X86),y) CBFSTOOL_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) CBFSTOOL_PRE_OPTS = -b $(shell cat $(objcbfs)/base_xip.txt) +endif ################################################################################ # i386 specific tools @@ -75,6 +77,8 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l # Build the bootblock +ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86),y) + bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds @@ -114,31 +118,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC_bootblock) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ + $(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< + $(CC_bootblock) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< endif +endif # CONFIG_ARCH_BOOTBLOCK_X86 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + crt0s = $(src)/arch/x86/init/prologue.inc ldscripts = ldscripts += $(src)/arch/x86/init/romstage.ld @@ -170,14 +178,26 @@ else ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE endif +$(objcbfs)/romstage_%.bin: $(objcbfs)/romstage_%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY_romstage) -O binary $< $@ + +$(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM_romstage) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_romstage) --strip-debug $@.tmp + $(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" @@ -195,21 +215,21 @@ romstage-libs ?= $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_null.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif - $(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ + $(NM_romstage) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ echo "Forbidden global variables in romstage:"; \ - $(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ + $(NM_romstage) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ else true; fi $(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_xip.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions @@ -238,16 +258,20 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_X86 ################################################################################ # Ramstage ################################################################################ +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) @@ -305,30 +329,31 @@ else $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld + $(LD_ramstage) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< endif endif -$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) +$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $$(ramstage-libs) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif +endif # CONFIG_ARCH_RAMSTAGE_X86 ################################################################################ seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ - AS="$(AS)" CPP="$(CPP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ + AS="$(AS_binary)" CPP="$(CPP)" \ CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ @@ -337,8 +362,8 @@ seabios: filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) @@ -346,6 +371,6 @@ filo: grub2: $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER) diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 928fc03..061074c 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -1,6 +1,13 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c romstage-$(CONFIG_BROKEN_CAR_MIGRATE) += cbmem.c +endif # CONFIG_ARCH_ROMSTAGE_X86 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-y += boot.c ramstage-y += gdt.c ramstage-y += tables.c @@ -14,3 +21,4 @@ ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S $(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h +endif # CONFIG_ARCH_RAMSTAGE_X86 \ No newline at end of file diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index 8b7418b..03e6c88 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -1,3 +1,16 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + +romstage-y += cbfs_and_run.c +romstage-y += memset.c +romstage-y += memcpy.c +romstage-y += memmove.c +romstage-y += rom_media.c + +endif # CONFIG_ARCH_ROMSTAGE_X86 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-y += c_start.S ramstage-y += cpu.c ramstage-y += pci_ops_conf1.c @@ -12,12 +25,6 @@ ramstage-y += rom_media.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S -romstage-y += cbfs_and_run.c -romstage-y += memset.c -romstage-y += memcpy.c -romstage-y += memmove.c -romstage-y += rom_media.c - smm-y += memset.c smm-y += memcpy.c smm-y += memmove.c @@ -26,3 +33,5 @@ smm-y += rom_media.c rmodules-y += memset.c rmodules-y += memcpy.c rmodules-y += memmove.c + +endif # CONFIG_ARCH_RAMSTAGE_X86 \ No newline at end of file diff --git a/src/console/Kconfig b/src/console/Kconfig index 65fc1aa..c3d88a2 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -2,7 +2,7 @@ menu "Console" config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on ARCH_ARMV7 + depends on ARCH_BINARY_ARMV7 default n help Use console during the bootblock if supported diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 6fced37..59407c2 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -14,7 +14,7 @@ source src/cpu/via/Kconfig source src/cpu/qemu-x86/Kconfig source src/cpu/x86/Kconfig -if ARCH_X86 +if ARCH_BINARY_X86 config CACHE_AS_RAM bool @@ -62,7 +62,7 @@ config SSE2 streaming SIMD instructions. Some parts of coreboot can be built with more efficient code if SSE2 instructions are available. -endif # ARCH_X86 +endif # ARCH_BINARY_X86 config SUPPORT_CPU_UCODE_IN_CBFS bool @@ -80,7 +80,7 @@ config CPU_MICROCODE_ADDED_DURING_BUILD default y if CPU_MICROCODE_CBFS_GENERATE || CPU_MICROCODE_CBFS_EXTERNAL choice - prompt "Include CPU microcode in CBFS" if ARCH_X86 + prompt "Include CPU microcode in CBFS" if ARCH_BINARY_X86 default CPU_MICROCODE_CBFS_GENERATE if SUPPORT_CPU_UCODE_IN_CBFS default CPU_MICROCODE_CBFS_NONE if !SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index f206fdc..e66585b 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -42,13 +42,13 @@ endif # final microcode file. $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs) @printf " LD $(subst $(obj)/,,$(@))\n" - $(LD) -static --entry=0 $+ -o $@ + $(LD_binary) -static --entry=0 $+ -o $@ # We have a lot of useless data in the large blob, and we are only interested in # the data section, so we only copy that part to the final microcode file $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o @printf " MICROCODE $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -j .data -O binary $< $@ + $(OBJCOPY_binary) -j .data -O binary $< $@ ifeq ($(cbfs_include_ucode),y) # Add CPU microcode to specified rom image $(1) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index f76a7b6..0e13f94 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -6,7 +6,10 @@ if CPU_ALLWINNER_A10 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index fa36f38..7670f17 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -26,7 +26,10 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_TN default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER diff --git a/src/cpu/amd/geode_gx1/Kconfig b/src/cpu/amd/geode_gx1/Kconfig index b87e8bc..f04c8d5 100644 --- a/src/cpu/amd/geode_gx1/Kconfig +++ b/src/cpu/amd/geode_gx1/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX1 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_GX1 diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig index b96c770..9d74830 100644 --- a/src/cpu/amd/geode_gx2/Kconfig +++ b/src/cpu/amd/geode_gx2/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX2 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_GX2 diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index 6aceab2..9527ea7 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_GEODE_LX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_LX diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 30c2486..e0f0198 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_10XXX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SSE select SSE2 select MMCONF_SUPPORT_DEFAULT diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 1a811f4..34bf71d 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_FXX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select MMX select SSE select SSE2 diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig index 46377be..a92724c 100644 --- a/src/cpu/amd/sc520/Kconfig +++ b/src/cpu/amd/sc520/Kconfig @@ -1,3 +1,6 @@ config CPU_AMD_SC520 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig index f46c6ff..b354444 100644 --- a/src/cpu/armltd/cortex-a9/Kconfig +++ b/src/cpu/armltd/cortex-a9/Kconfig @@ -1,6 +1,9 @@ config CPU_ARMLTD_CORTEX_A9 bool - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select EARLY_CONSOLE default n diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig index aea8889..da8834c 100644 --- a/src/cpu/dmp/vortex86ex/Kconfig +++ b/src/cpu/dmp/vortex86ex/Kconfig @@ -19,5 +19,8 @@ config CPU_DMP_VORTEX86EX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig index fa96f8d..d5aa4c8 100644 --- a/src/cpu/intel/ep80579/Kconfig +++ b/src/cpu/intel/ep80579/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_EP80579 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SSE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 22d01e6..527de90 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -28,7 +28,10 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 1ea9c2a..b4d18c3 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -9,4 +9,4 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c cpu_incs += $(src)/cpu/intel/fsp_model_206ax/cache_as_ram.inc -CC := $(CC) -I$(CONFIG_MICROCODE_INCLUDE_PATH) +CC := $(CC_binary) -I$(CONFIG_MICROCODE_INCLUDE_PATH) diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 97309ae..1726128 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -6,7 +6,10 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select BACKUP_DEFAULT_SMM_REGION select SMP select SSE2 diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 63c1939..e504a68 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -26,14 +26,14 @@ rmodules-y += sipi_vector.S rmodules-y += sipi_header.c $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_DOTO), 0)) $(SIPI_BIN): $(SIPI_ELF).rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 4d6add6..346d218 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_1067X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index ea6f5ca..3a9b4e5 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_106CX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 4c7456d..48dfc82 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -5,7 +5,10 @@ if CPU_INTEL_MODEL_2065X config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE select SSE2 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 64b2a0a..60d0899 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -8,7 +8,10 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index b3fa7bd..6a417ec 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_65X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 7558bc2..4e3d6aa 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_67X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 670163a..b926b43 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -20,6 +20,9 @@ config CPU_INTEL_MODEL_68X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_69x/Kconfig b/src/cpu/intel/model_69x/Kconfig index e4a0e6c..7ea9cdc 100644 --- a/src/cpu/intel/model_69x/Kconfig +++ b/src/cpu/intel/model_69x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_69X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 4dc6fe6..c0da73b 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6BX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig index e6d5f1e..74c5b33 100644 --- a/src/cpu/intel/model_6dx/Kconfig +++ b/src/cpu/intel/model_6dx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6DX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index eee864d..6b6d5d9 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6EX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index b8de303..a7de42c 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6FX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index 49cfe2d..ef04e89 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6XX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig index 2ed68d1..d985254 100644 --- a/src/cpu/intel/model_f0x/Kconfig +++ b/src/cpu/intel/model_f0x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F0X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig index 3bdb7f6..33e587f 100644 --- a/src/cpu/intel/model_f1x/Kconfig +++ b/src/cpu/intel/model_f1x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F1X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 62393a8..9cef453 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F2X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 5c9d0a3..d9f0f93 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F3X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 849dcd0..3375326 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F4X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index e54e4db..5284bf9 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,4 +19,7 @@ config CPU_QEMU_X86 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index b8042e3..3dbfef7 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5250 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 6207adf..ab86349 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5420 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index 22a02ad..5432c24 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -1,5 +1,8 @@ config CPU_TI_AM335X - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index 5b10bd8..2017371 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -28,14 +28,14 @@ get_header_size= \ $(obj)/omap-header.bin: $$(omap-header-objs) $$(header_ld) $(obj)/coreboot.rom @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -include $(obj)/config.h \ + $(CC_binary) -nostdlib -nostartfiles -static -include $(obj)/config.h \ -Wl,--defsym,header_load_size=$(strip \ $(call get_header_size,$(obj)/coreboot.rom, \ $(CONFIG_CBFS_PREFIX)/romstage \ ) \ ) \ -o $@.tmp $< -T $(header_ld) - $(OBJCOPY) --only-section=".header" -O binary $@.tmp $@ + $(OBJCOPY_binary) --only-section=".header" -O binary $@.tmp $@ $(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin @printf " HEADER $(subst $(obj)/,,$(@))\n" diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig index 566f07c..b898f81 100644 --- a/src/cpu/via/c3/Kconfig +++ b/src/cpu/via/c3/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C3 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig index d5f1a41..c4d27f7 100644 --- a/src/cpu/via/c7/Kconfig +++ b/src/cpu/via/c7/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C7 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig index 0f4f994..b4471a1 100644 --- a/src/cpu/via/nano/Kconfig +++ b/src/cpu/via/nano/Kconfig @@ -24,7 +24,10 @@ if CPU_VIA_NANO config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 514d96c..bc6a116 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -16,13 +16,13 @@ endif rmodules-$(CONFIG_PARALLEL_MP) += sipi_vector.S $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_ELF:.elf=.o), 0)) $(SIPI_BIN): $(SIPI_RMOD) - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 9720630..2d31f07 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -32,32 +32,32 @@ ramstage-srcs += $(obj)/cpu/x86/smm/smmstub # SMM Stub Module. The stub is used as a trampoline for relocation and normal # SMM handling. $(obj)/cpu/x86/smm/smmstub.o: $$(smmstub-objs) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the SMM stub module with a 0-byte heap. $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0)) $(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smmstub.ramstage.o: $(obj)/cpu/x86/smm/smmstub @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) # C-based SMM handler. -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smm.elf, $(obj)/cpu/x86/smm/smm.o, $(CONFIG_SMM_MODULE_HEAP_SIZE))) $(obj)/cpu/x86/smm/smm: $(obj)/cpu/x86/smm/smm.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smm.ramstage.o: $(obj)/cpu/x86/smm/smm @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) else # CONFIG_SMM_MODULES @@ -79,18 +79,18 @@ endif smm-y += smihandler.c -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions - $(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o - $(NM) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map - $(OBJCOPY) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm + $(CC_ramstage) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o + $(NM_ramstage) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map + $(OBJCOPY_ramstage) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm # change to the target path because objcopy will use the path name in its # ELF symbol names. $(obj)/cpu/x86/smm/smm_wrap.ramstage.o: $(obj)/cpu/x86/smm/smm_wrap @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(obj)/cpu/x86/smm; $(OBJCOPY) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o + cd $(obj)/cpu/x86/smm; $(OBJCOPY_ramstage) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o endif # CONFIG_SMM_MODULES diff --git a/src/device/Kconfig b/src/device/Kconfig index 932b4de..8f5a0f8 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -91,14 +91,14 @@ config ON_DEVICE_ROM_RUN choice prompt "Option ROM execution type" - default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 - default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 + default PCI_OPTION_ROM_RUN_YABEL if !ARCH_BINARY_X86 + default PCI_OPTION_ROM_RUN_REALMODE if ARCH_BINARY_X86 depends on VGA_ROM_RUN || GEODE_VSA config PCI_OPTION_ROM_RUN_REALMODE prompt "Native mode" bool - depends on ARCH_X86 + depends on ARCH_BINARY_X86 help If you select this option, PCI Option ROMs will be executed natively on the CPU in real mode. No CPU emulation is involved, @@ -161,7 +161,7 @@ config YABEL_VIRTMEM_LOCATION config YABEL_DIRECTHW prompt "Direct hardware access" bool - depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 + depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_BINARY_X86 help YABEL consists of two parts: It uses x86emu for the CPU emulation and additionally provides a PC system emulation that filters bad device diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index bd41b12..5df4843 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -9,7 +9,7 @@ ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c -ramstage-$(CONFIG_ARCH_X86) += pnp_device.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-$(CONFIG_PCI) += pci_early.c ramstage-y += smbus_ops.c diff --git a/src/device/device.c b/src/device/device.c index e068cee..2b808e7 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -40,7 +40,7 @@ #include <stdlib.h> #include <string.h> #include <smp/spinlock.h> -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/ebda.h> #endif #include <timer.h> @@ -1189,7 +1189,7 @@ void dev_initialize(void) printk(BIOS_INFO, "Initializing devices...\n"); -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 /* Ensure EBDA is prepared before Option ROMs. */ setup_default_ebda(); #endif diff --git a/src/device/oprom/include/io.h b/src/device/oprom/include/io.h index 96dd572..6adce71 100644 --- a/src/device/oprom/include/io.h +++ b/src/device/oprom/include/io.h @@ -1,4 +1,4 @@ -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/io.h> #else void outb(u8 val, u16 port); diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 2c3dc33..851917a 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -48,7 +48,7 @@ unsigned long tb_freq = 0; u64 get_time(void) { u64 act = 0; -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 u32 eax, edx; __asm__ __volatile__( diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index 017aab9..1fce2ce 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -128,7 +128,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr); static inline void out32le(void *addr, u32 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 *((u32*) addr) = cpu_to_le32(val); #else asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -139,7 +139,7 @@ static inline u32 in32le(void *addr) { u32 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le32(*((u32 *) addr)); #else asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr)); @@ -150,7 +150,7 @@ in32le(void *addr) static inline void out16le(void *addr, u16 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 *((u16*) addr) = cpu_to_le16(val); #else asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -161,7 +161,7 @@ static inline u16 in16le(void *addr) { u16 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le16(*((u16*) addr)); #else asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr)); diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 94f610d..1449f52 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -26,7 +26,7 @@ #include <device/resource.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/io.h> #else // these are not used, only needed for linking, must be overridden using X86emu_setupPioFuncs diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index f11e4b8..413b4ae 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -37,4 +37,4 @@ subdirs-y += ti subdirs-y += ipmi subdirs-y += elog subdirs-y += xpowers -subdirs-$(CONFIG_ARCH_X86) += pc80 +subdirs-$(CONFIG_ARCH_BINARY_X86) += pc80 diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index 51cd6c3..685f073 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -52,7 +52,7 @@ static void rtc_set_checksum(int range_start, int range_end, int cks_loc) } #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #define RTC_CONTROL_DEFAULT (RTC_24H) #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ) #else diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index a979437..bb71f69 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -5,9 +5,9 @@ config DRIVERS_UART config DRIVERS_UART_8250IO bool "Serial port on SuperIO" - depends on !ARCH_ARMV7 + depends on !ARCH_BINARY_ARMV7 default n if NO_UART_ON_SUPERIO - default y if ARCH_X86 + default y if ARCH_BINARY_X86 # Select this for mainboard without SuperIO serial port. config NO_UART_ON_SUPERIO diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 342db3e..2d63b5f 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -21,7 +21,7 @@ config EC_GOOGLE_CHROMEEC_I2C_CHIP default 0x1e config EC_GOOGLE_CHROMEEC_LPC - depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. + depends on EC_GOOGLE_CHROMEEC && ARCH_BINARY_X86 # Needs Plug-and-play. def_bool y help Google Chrome EC via LPC bus. diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f8cf3b1..3e2550c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,7 +56,7 @@ romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c endif -romstage-$(CONFIG_ARCH_X86) += gcc.c +romstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c @@ -83,7 +83,7 @@ ramstage-y += cbfs.c ramstage-y += lzma.c #ramstage-y += lzmadecode.c ramstage-y += stack.c -ramstage-$(CONFIG_ARCH_X86) += gcc.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -143,8 +143,8 @@ RMODULE_LDFLAGS := -nostartfiles -Wl,--emit-relocs -Wl,-z,defs -Wl,-Bsymbolic - # rmdoule is named $(1).rmod define rmodule_link $(strip $(1)): $(strip $(2)) $$(RMODULE_LDSCRIPT) $$(obj)/ldoptions $$(RMODTOOL) - $$(CC) $$(CFLAGS) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME) -Wl,--end-group - $$(NM) -n $$@ > $$(basename $$(a)).map + $$(CC_ramstage) $$(CFLAGS_ramstage) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group + $$(NM_ramstage) -n $$@ > $$(basename $$(a)).map $(strip $(1)).rmod: $(strip $(1)) $$(RMODTOOL) -i $$^ -o $$@ diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c index 50c037e..a6bd270 100644 --- a/src/lib/cbfs_core.c +++ b/src/lib/cbfs_core.c @@ -118,7 +118,7 @@ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) // TODO Add a "size" in CBFS header for a platform independent way to // determine the end of CBFS data. -#if defined(CONFIG_ARCH_X86) && CONFIG_ARCH_X86 +#if defined(CONFIG_ARCH_BINARY_X86) && CONFIG_ARCH_BINARY_X86 romsize -= htonl(header->bootblocksize); #endif DEBUG("CBFS location: 0x%x~0x%x, align: %d\n", offset, romsize, align); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 8e7f85d..b2dd048 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -38,7 +38,7 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/gnvs.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <cpu/x86/mtrr.h> #endif diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/advansus/a785e-i/Makefile.inc +++ b/src/mainboard/advansus/a785e-i/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/asus/m5a88-v/Makefile.inc +++ b/src/mainboard/asus/m5a88-v/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/avalue/eax-785e/Makefile.inc +++ b/src/mainboard/avalue/eax-785e/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/bifferos/bifferboard/Kconfig b/src/mainboard/bifferos/bifferboard/Kconfig index 4ee9958..d97a889 100644 --- a/src/mainboard/bifferos/bifferboard/Kconfig +++ b/src/mainboard/bifferos/bifferboard/Kconfig @@ -2,7 +2,10 @@ if BOARD_BIFFEROS_BIFFERBOARD config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select ROMCC select BOARD_ROMSIZE_KB_128 select NORTHBRIDGE_RDC_R8610 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1b3ee05..a57d273 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -8,7 +8,10 @@ if SOC_INTEL_BAYTRAIL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select CACHE_MRC_SETTINGS select CAR_MIGRATION select COLLECT_TIMESTAMPS diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc index e34fa89..4b55827 100644 --- a/src/superio/Makefile.inc +++ b/src/superio/Makefile.inc @@ -28,4 +28,4 @@ subdirs-y += smsc subdirs-y += via subdirs-y += winbond -ramstage-$(CONFIG_ARCH_X86) += common/conf_mode.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += common/conf_mode.c diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index 203efab..177302c 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -48,5 +48,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index e1bafbe..4c5ec84 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -86,5 +86,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### \ No newline at end of file diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc index f457277..509b3ad 100644 --- a/src/vendorcode/amd/agesa/f14/Makefile.inc +++ b/src/vendorcode/amd/agesa/f14/Makefile.inc @@ -67,7 +67,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 2a7acce..d8ee520 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -529,5 +529,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 00ace78..ee174bf 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -91,7 +91,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 0e68895..4d497f1 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -98,5 +98,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index feeb2cd..491f810 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -113,7 +113,11 @@ NB_CIMX_CFLAGS = export CIMX_ROOT export NB_CIMX_INC export NB_CIMX_CFLAGS -CC := $(CC) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) + +CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_binary := $(CC_binary) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index 10d03e6..24e7ce1 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -72,7 +72,10 @@ SB_CIMX_CFLAGS = export CIMX_ROOT export SB_CIMX_INC export SB_CIMX_CFLAGS -CC := $(CC) $(SB_CIMX_CFLAGS) $(SB_CIMX_INC) +CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC) +CC_romstage := $(CC_romstage) $(SB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC) +CC_binary := $(CC_binary) $(SB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc index 3fb1d54..553ebae 100644 --- a/src/vendorcode/amd/cimx/sb800/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc @@ -79,7 +79,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 4a3417f..e26a0fe 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -82,7 +82,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 21e1750..9f4afa8 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -19,9 +19,9 @@ romstage-y += chromeos.c ramstage-y += chromeos.c -romstage-$(CONFIG_ARCH_X86) += vbnv.c -ramstage-$(CONFIG_ARCH_X86) += vbnv.c -romstage-$(CONFIG_ARCH_X86) += vboot.c +romstage-$(CONFIG_ARCH_BINARY_X86) += vbnv.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += vbnv.c +romstage-$(CONFIG_ARCH_BINARY_X86) += vboot.c ramstage-y += gnvs.c romstage-y += fmap.c ramstage-y += fmap.c @@ -33,9 +33,9 @@ romstage-srcs += src/mainboard/$(MAINBOARDDIR)/chromeos.c endif ifeq ($(MOCK_TPM),1) -CFLAGS += -DMOCK_TPM=1 +CFLAGS_common += -DMOCK_TPM=1 else -CFLAGS += -DMOCK_TPM=0 +CFLAGS_common += -DMOCK_TPM=0 endif ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) @@ -43,7 +43,7 @@ romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a -VB_FIRMWARE_ARCH := $(ARCHDIR-y) +VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-BINARY-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. @@ -62,11 +62,11 @@ VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memcpy.rmodules.o VBOOT_STUB_DEPS += $(VB_LIB) # Remove the '-include' option since that will break vboot's build and ensure # vboot_reference can get to coreboot's include files. -VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS))) +VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS_binary))) VBOOT_CFLAGS += -DVBOOT_DEBUG $(VBOOT_STUB_DOTO): $(VBOOT_STUB_DEPS) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_binary) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the vbootstub module with a 64KiB-byte heap. $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) @@ -75,6 +75,7 @@ $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) $(VB_LIB): @printf " MAKE $(subst $(obj)/,,$(@))\n" $(Q)FIRMWARE_ARCH=$(VB_FIRMWARE_ARCH) \ + CC="$(CC_binary)" \ CFLAGS="$(VBOOT_CFLAGS)" \ make -C $(VB_SOURCE) \ BUILD=../$(dir $(VB_LIB)) \ diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc index 8569af0..79c648d 100644 --- a/src/vendorcode/intel/Makefile.inc +++ b/src/vendorcode/intel/Makefile.inc @@ -23,5 +23,8 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c) FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) ramstage-y += $(FSP_C_INPUTS) -CC := $(CC) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_binary := $(CC_binary) -Isrc/vendorcode/intel/$(FSP_PATH)include endif

1 0

Patch set updated for coreboot: 0e62b5e Clean arch-level Kconfig files
by Furquan Shaikh 29 Apr '14

29 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5579 -gerrit commit 0e62b5e603ac5f9d175380a8a88cc38931f16cd3 Author: Furquan Shaikh <furquan(a)google.com> Date: Fri Apr 25 14:35:45 2014 -0700 Clean arch-level Kconfig files General cleanup of arch-level (x86 and arm) Kconfig files: 1) Move MAX_REBOOT_CNT to top level Kconfig 2) Remove ARCH_MEM* options 3) Make PC80_system option depend on ARCH_BINARY_X86 to be default y 4) Include all arch-level Kconfigs by default (Necessary for arch-aware stages) 5) Move stage-specific arch options to arch-level Kconfigs Change-Id: I09eca097c128f38632249d6a1de816f055cdcfd0 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/Kconfig | 62 +++++--------------------------------------------- src/arch/armv7/Kconfig | 25 ++++++++++++-------- src/arch/x86/Kconfig | 28 +++++++++++++---------- src/lib/Makefile.inc | 38 ------------------------------- 4 files changed, 38 insertions(+), 115 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index e85ab62..2448711 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -226,66 +226,10 @@ endmenu source src/mainboard/Kconfig -# This option is used to set the architecture of a mainboard to X86. -# It is usually set in mainboard/*/Kconfig. -config ARCH_BINARY_X86 - bool - default n - select PCI - -config ARCH_BINARY_ARMV7 - bool - default n - -# This option is used to set the architecture of bootblock stage -config ARCH_BOOTBLOCK_ARMV7 - bool - default n - -config ARCH_BOOTBLOCK_X86 - bool - default n - -# This option is used to set the architecture of romstage stage -config ARCH_ROMSTAGE_ARMV7 - bool - default n - -config ARCH_ROMSTAGE_X86 - bool - default n - -# This option is used to set the architecture of ramstage stage -config ARCH_RAMSTAGE_ARMV7 - bool - default n - -config ARCH_RAMSTAGE_X86 - bool - default n - - # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_BINARY_X86 source src/arch/x86/Kconfig -endif - -if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig -endif - -config HAVE_ARCH_MEMSET - bool - default n - -config HAVE_ARCH_MEMCPY - bool - default n - -config HAVE_ARCH_MEMMOVE - bool - default n source src/vendorcode/Kconfig @@ -1147,3 +1091,9 @@ config REG_SCRIPT default n help Internal option that controls whether we compile in register scripts. + +# Maximum reboot count +# TODO: Improve description. +config MAX_REBOOT_CNT + int + default 3 diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index 4f9fc34..2089707 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -4,15 +4,22 @@ menu "Architecture (armv7)" config ARM_ARCH_OPTIONS bool default y - select HAVE_ARCH_MEMSET - select HAVE_ARCH_MEMCPY - select HAVE_ARCH_MEMMOVE - -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 + +config ARCH_BINARY_ARMV7 + bool + default n + +config ARCH_BOOTBLOCK_ARMV7 + bool + default n + +config ARCH_ROMSTAGE_ARMV7 + bool + default n + +config ARCH_RAMSTAGE_ARMV7 + bool + default n choice prompt "Bootblock behaviour" diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 36c9356..877f6bc 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -1,11 +1,21 @@ menu "Architecture (x86)" -config X86_ARCH_OPTIONS +config ARCH_BINARY_X86 bool - default y - select HAVE_ARCH_MEMSET - select HAVE_ARCH_MEMCPY - select HAVE_ARCH_MEMMOVE + default n + select PCI + +config ARCH_BOOTBLOCK_X86 + bool + default n + +config ARCH_ROMSTAGE_X86 + bool + default n + +config ARCH_RAMSTAGE_X86 + bool + default n # This is an SMP option. It relates to starting up APs. # It is usually set in mainboard/*/Kconfig. @@ -34,12 +44,6 @@ config STACK_SIZE hex default 0x1000 -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 - # This is something you almost certainly don't want to mess with. # How many SIPIs do we send when starting up APs and cores? # The answer in 2000 or so was '2'. Nowadays, on many systems, @@ -84,7 +88,7 @@ config ROMCC config PC80_SYSTEM bool - default y + default y if ARCH_BINARY_X86 config BOOTBLOCK_MAINBOARD_INIT string diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 3e2550c..07de0d0 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -19,27 +19,10 @@ subdirs-y += loaders bootblock-y += cbfs.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -bootblock-y += memset.c -endif bootblock-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -bootblock-y += memcpy.c -endif bootblock-y += memcmp.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -bootblock-y += memmove.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -romstage-y += memset.c -rmodules-y += memset.c -endif romstage-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -romstage-y += memcpy.c -rmodules-y += memcpy.c -endif romstage-y += memcmp.c rmodules-y += memcmp.c romstage-y += cbfs.c @@ -53,26 +36,14 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c endif romstage-y += compute_ip_checksum.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -romstage-y += memmove.c -endif romstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c ramstage-y += coreboot_table.c ramstage-y += bootmem.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -ramstage-y += memset.c -endif ramstage-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -ramstage-y += memcpy.c -endif ramstage-y += memcmp.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -ramstage-y += memmove.c -endif ramstage-y += malloc.c smm-$(CONFIG_SMM_TSEG) += malloc.c ramstage-y += delay.c @@ -114,15 +85,6 @@ ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += ramstage_cache.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -smm-y += memset.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -smm-y += memcpy.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -smm-y += memmove.c -endif smm-y += cbfs.c memcmp.c smm-y += gcc.c

1 0

Patch set updated for coreboot: c8f9aa5 Move redundant Makefile rules from arch to top level.
by Furquan Shaikh 29 Apr '14

29 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5571 -gerrit commit c8f9aa5fc7b376e1c5d8b052681d24d5835a12e0 Author: Furquan Shaikh <furquan(a)google.com> Date: Tue Apr 22 16:33:22 2014 -0700 Move redundant Makefile rules from arch to top level. Remove all the common Makefile rules like coreboot.pre, coreboot.pre1 and others from arch level Makefile.inc to top level Makefile.inc. Also, organize Makefile.inc at arch level into per-stage rules and variables. Change-Id: I7dc5b2d31c959b55bb92d9c7811427c4dada1db5 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile.inc | 157 +++++++++++++++++ src/arch/armv7/Makefile.inc | 264 +++++++++++----------------- src/arch/x86/Makefile.inc | 409 +++++++++++++++----------------------------- 3 files changed, 390 insertions(+), 440 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 72f3951..ba73d98 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -408,3 +408,160 @@ crossgcc-clean: clean-for-update tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/rmodtool $(objutil)/nvramtool/nvramtool $(objutil)/romcc/romcc $(objutil)/sconfig/sconfig +######################################################################################################################################################################## +# Common recipes for all stages +######################################################################################################################################################################## + +$(objcbfs)/%.bin: $(objcbfs)/%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY) -O binary $< $@ + +$(objcbfs)/%.elf: $(objcbfs)/%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY) --strip-debug $@.tmp + $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + +######################################################################################################################################################################## +# Build the final rom image +######################################################################################################################################################################## + +COREBOOT_ROM_DEPENDENCIES:= +ifeq ($(CONFIG_PAYLOAD_ELF),y) +COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) +endif +ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) +COREBOOT_ROM_DEPENDENCIES+=seabios +endif +ifeq ($(CONFIG_PAYLOAD_FILO),y) +COREBOOT_ROM_DEPENDENCIES+=filo +endif +ifeq ($(CONFIG_PAYLOAD_GRUB2),y) +COREBOOT_ROM_DEPENDENCIES+=grub2 +endif + +extract_nth=$(word $(1), $(subst |, ,$(2))) + +ifneq ($(CONFIG_UPDATE_IMAGE),y) +prebuild-files = \ + $(foreach file,$(cbfs-files), \ + $(CBFSTOOL) $@.tmp \ + add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ + -f $(call extract_nth,1,$(file)) \ + -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ + $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) +prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) + +$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) + $(CBFSTOOL) $@.tmp create -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ + -B $(objcbfs)/bootblock.bin -a 64 \ + $(CBFSTOOL_PRE1_OPTS) + $(prebuild-files) true + $(call add-cpu-microcode-to-cbfs,$@.tmp) + mv $@.tmp $@ +else +.PHONY: $(obj)/coreboot.pre1 +$(obj)/coreboot.pre1: $(CBFSTOOL) + mv $(obj)/coreboot.rom $@ +endif + +ifeq ($(CONFIG_PAYLOAD_LINUX),y) +LINUX_ADDITIONAL_CONFIG:= +ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),) + LINUX_ADDITIONAL_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE) +endif +ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_INITRD))),) + LINUX_ADDITIONAL_CONFIG+=-I $(CONFIG_LINUX_INITRD) +endif +endif + +ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) +REFCODE_BLOB=$(obj)/refcode.rmod +$(REFCODE_BLOB): $(RMODTOOL) + $(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@ +endif + +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB) + @printf " CBFS $(subst $(obj)/,,$(@))\n" + cp $(obj)/coreboot.pre $@.tmp + $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) +ifeq ($(CONFIG_PAYLOAD_NONE),y) + @printf " PAYLOAD none (as specified by user)\n" +endif +ifeq ($(CONFIG_PAYLOAD_ELF),y) + @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PAYLOAD_LINUX),y) + @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) $(LINUX_ADDITIONAL_CONFIG) +endif +ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) + @printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) +ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) + @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" + $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup +endif +endif +endif +ifeq ($(CONFIG_PAYLOAD_FILO),y) + @printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PAYLOAD_GRUB2),y) + @printf " PAYLOAD GRUB2 (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y) + @printf " PAYLOAD Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) + @printf " CONFIG $(DOTCONFIG)\n" + if [ -f $(DOTCONFIG) ]; then \ + echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ + sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ + $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi +endif +ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) + $(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) + $(CBFSTOOL) $@.tmp add-stage -f $(REFCODE_BLOB) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PXE_ROM),y) + $(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw +endif +ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) +ifeq ($(CONFIG_CPU_MICROCODE_IN_CBFS),y) + @printf " UPDATE-FIT \n" + $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) +endif +endif + mv $@.tmp $@ + @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" + $(CBFSTOOL) $@ print + +cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg +bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) +bootsplash.jpg-type := bootsplash + +ifeq ($(CONFIG_ARCH_ARMV7),y) +ROMSTAGE_ELF := romstage.elf +endif +ifeq ($(CONFIG_ARCH_X86),y) +ROMSTAGE_ELF := romstage_xip.elf +endif + +$(obj)/coreboot.pre: $(objcbfs)/$(ROMSTAGE_ELF) $(obj)/coreboot.pre1 $(CBFSTOOL) + @printf " CBFS $(subst $(obj)/,,$(@))\n" + cp $(obj)/coreboot.pre1 $@.tmp + $(CBFSTOOL) $@.tmp add-stage \ + -f $(objcbfs)/$(ROMSTAGE_ELF) \ + -n $(CONFIG_CBFS_PREFIX)/romstage -c none \ + $(CBFSTOOL_PRE_OPTS) + mv $@.tmp $@ diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 6395b0c..a419dcd 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -22,91 +22,18 @@ ## ################################################################################ +################################################################################ # Take care of subdirectories +################################################################################ subdirs-y += boot/ subdirs-y += lib/ ################################################################################ -# Build the final rom image -COREBOOT_ROM_DEPENDENCIES:= -ifeq ($(CONFIG_PAYLOAD_ELF),y) -COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) -endif - -extract_nth=$(word $(1), $(subst |, ,$(2))) - -ifneq ($(CONFIG_UPDATE_IMAGE),y) -prebuild-files = \ - $(foreach file,$(cbfs-files), \ - $(CBFSTOOL) $@.tmp \ - add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ - -f $(call extract_nth,1,$(file)) \ - -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ - $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) -prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) - -# TODO Change -b to Kconfig variable. -$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) - $(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ - -B $(objcbfs)/bootblock.bin -a 64 \ - -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \ - -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \ - -o $(CONFIG_CBFS_ROM_OFFSET) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - $(CBFSTOOL) $@.tmp add-stage \ - -f $(objcbfs)/romstage.elf -b 0 \ - -n $(CONFIG_CBFS_PREFIX)/romstage -c none - $(prebuild-files) true - $(call add-cpu-microcode-to-cbfs,$@.tmp) - mv $@.tmp $@ -else -.PHONY: $(obj)/coreboot.pre -$(obj)/coreboot.pre: $(CBFSTOOL) - mv $(obj)/coreboot.rom $@ -endif - -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) -ifeq ($(CONFIG_PAYLOAD_NONE),y) - @printf " PAYLOAD none (as specified by user)\n" -endif -ifeq ($(CONFIG_PAYLOAD_ELF),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) - @printf " CONFIG $(DOTCONFIG)\n" - if [ -f $(DOTCONFIG) ]; then \ - echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ - sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ - $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi -endif - mv $@.tmp $@ - @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" - $(CBFSTOOL) $@ print - -bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) -bootsplash.jpg-type := bootsplash - +# ARM specific options ################################################################################ -# armv7 specific tools -################################################################################ -# Common recipes for all stages - -$(objcbfs)/%.bin: $(objcbfs)/%.elf - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ - -$(objcbfs)/%.elf: $(objcbfs)/%.debug - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp - mv $@.tmp $@ +CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) +CBFSTOOL_PRE_OPTS = -b 0 stages_c = $(src)/arch/armv7/stages.c stages_o = $(obj)/arch/armv7/stages.o @@ -115,26 +42,6 @@ $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -I. $(INCLUDES) -c -o $@ $< -marm - -################################################################################ -# Build the ramstage (stage 2) - -$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< -endif - -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - CFLAGS += \ -ffixed-r8\ -march=armv7-a\ @@ -143,82 +50,16 @@ CFLAGS += \ -mthumb\ -mthumb-interwork -ldscripts = -ldscripts += $(src)/arch/armv7/romstage.ld - -#crt0s += $(src)/cpu/arm/fpu_enable.inc -# FIXME: CONFIG_NEON or something similar for ARM? -#ifeq ($(CONFIG_SSE),y) -#crt0s += $(src)/cpu/arm/sse_enable.inc -#endif - -crt0s += $(cpu_incs) -crt0s += $(cpu_incs-y) - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ - -# Things that appear in every board -ramstage-y += exception.c -ramstage-y += exception_asm.S +################################################################################ +# Bootblock +################################################################################ bootblock-y += cache.c - -romstage-y += cache.c -romstage-y += div0.c - -ramstage-y += div0.c -#ramstage-y += interrupts.c -ramstage-y += cache.c -ramstage-y += mmu.c - -romstage-y += eabi_compat.c -ramstage-y += eabi_compat.c bootblock-y += eabi_compat.c - -ramstage-y += boot.c -ramstage-y += tables.c - -romstage-y += memset.S -ramstage-y += memset.S bootblock-y += memset.S -romstage-y += memcpy.S -ramstage-y += memcpy.S bootblock-y += memcpy.S -romstage-y += memmove.S -ramstage-y += memmove.S bootblock-y += memmove.S -romstage-srcs += $(objgenerated)/crt0.s -ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) -ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c -endif -ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c -endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl -# make doesn't have arithmetic operators or greater-than comparisons -ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl -endif -ifeq ($(CONFIG_ACPI_SSDTX_NUM),5) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl -endif -endif - -ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c -endif - -################################################################################ -# Build the bootblock - bootblock_lds = $(src)/arch/armv7/bootblock.lds bootblock_lds += $(chipset_bootblock_lds) @@ -262,6 +103,30 @@ else endif ################################################################################ +# Romstage +################################################################################ + +romstage-y += cache.c +romstage-y += div0.c +romstage-y += eabi_compat.c +romstage-y += memset.S +romstage-y += memcpy.S +romstage-y += memmove.S +romstage-srcs += $(objgenerated)/crt0.s + +ldscripts = +ldscripts += $(src)/arch/armv7/romstage.ld + + +#crt0s += $(src)/cpu/arm/fpu_enable.inc +# FIXME: CONFIG_NEON or something similar for ARM? +#ifeq ($(CONFIG_SSE),y) +#crt0s += $(src)/cpu/arm/sse_enable.inc +#endif + +crt0s += $(cpu_incs) +crt0s += $(cpu_incs-y) + # Build the romstage $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @@ -290,3 +155,68 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h + @printf " CC romstage.inc\n" + $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +################################################################################ +# Ramstage +################################################################################ + +# Things that appear in every board +ramstage-y += exception.c +ramstage-y += exception_asm.S +ramstage-y += div0.c +#ramstage-y += interrupts.c +ramstage-y += cache.c +ramstage-y += mmu.c +ramstage-y += eabi_compat.c +ramstage-y += boot.c +ramstage-y += tables.c +ramstage-y += memset.S +ramstage-y += memcpy.S +ramstage-y += memmove.S +ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) + +# Build the ramstage (stage 2) + +$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld +else + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< +endif + +$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group +else + $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +endif + +ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c +endif +ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c +endif +ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl +# make doesn't have arithmetic operators or greater-than comparisons +ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl +endif +ifeq ($(CONFIG_ACPI_SSDTX_NUM),5) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl +endif +endif + +ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c +endif + diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index db8e500..79caabd 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -21,7 +21,9 @@ ## ################################################################################ +################################################################################ # Take care of subdirectories +################################################################################ subdirs-y += boot # subdirs-y += init subdirs-y += lib @@ -42,128 +44,6 @@ cmos_layout.bin-type = 0x01aa OPTION_TABLE_H:=$(obj)/option_table.h endif -################################################################################ -# Build the final rom image -COREBOOT_ROM_DEPENDENCIES:= -ifeq ($(CONFIG_PAYLOAD_ELF),y) -COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) -endif -ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) -COREBOOT_ROM_DEPENDENCIES+=seabios -endif -ifeq ($(CONFIG_PAYLOAD_FILO),y) -COREBOOT_ROM_DEPENDENCIES+=filo -endif -ifeq ($(CONFIG_PAYLOAD_GRUB2),y) -COREBOOT_ROM_DEPENDENCIES+=grub2 -endif - -extract_nth=$(word $(1), $(subst |, ,$(2))) - -ifneq ($(CONFIG_UPDATE_IMAGE),y) -prebuild-files = \ - $(foreach file,$(cbfs-files), \ - $(CBFSTOOL) $@.tmp \ - add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ - -f $(call extract_nth,1,$(file)) \ - -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ - $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) -prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) - -$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) - $(CBFSTOOL) $@.tmp create -m x86 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ - -B $(objcbfs)/bootblock.bin -a 64 \ - -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) - $(prebuild-files) true - $(call add-cpu-microcode-to-cbfs,$@.tmp) - mv $@.tmp $@ -else -.PHONY: $(obj)/coreboot.pre1 -$(obj)/coreboot.pre1: $(CBFSTOOL) - mv $(obj)/coreboot.rom $@ -endif - -ifeq ($(CONFIG_PAYLOAD_LINUX),y) -LINUX_ADDITIONAL_CONFIG:= -ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),) - LINUX_ADDITIONAL_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE) -endif -ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_INITRD))),) - LINUX_ADDITIONAL_CONFIG+=-I $(CONFIG_LINUX_INITRD) -endif -endif - -ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) -REFCODE_BLOB=$(obj)/refcode.rmod -$(REFCODE_BLOB): $(RMODTOOL) - $(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@ -endif - -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) -ifeq ($(CONFIG_PAYLOAD_NONE),y) - @printf " PAYLOAD none (as specified by user)\n" -endif -ifeq ($(CONFIG_PAYLOAD_ELF),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_PAYLOAD_LINUX),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) $(LINUX_ADDITIONAL_CONFIG) -endif -ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) - @printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) -ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) - @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" - $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup -endif -endif -endif -ifeq ($(CONFIG_PAYLOAD_FILO),y) - @printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif - -ifeq ($(CONFIG_PAYLOAD_GRUB2),y) - @printf " PAYLOAD GRUB2 (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif - -ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y) - @printf " PAYLOAD Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) - @printf " CONFIG $(DOTCONFIG)\n" - if [ -f $(DOTCONFIG) ]; then \ - echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ - sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ - $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi -endif -ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) - $(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) - $(CBFSTOOL) $@.tmp add-stage -f $(CONFIG_REFCODE_BLOB_FILE) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_PXE_ROM),y) - $(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw -endif -ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) -ifeq ($(CONFIG_CPU_MICROCODE_ADDED_DURING_BUILD),y) - @printf " UPDATE-FIT \n" - $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -endif -endif - mv $@.tmp $@ - @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" - $(CBFSTOOL) $@ print - stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID)) cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)) @@ -173,9 +53,8 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE)) mbi.bin-type := mbi -cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg -bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) -bootsplash.jpg-type := bootsplash +CBFSTOOL_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) +CBFSTOOL_PRE_OPTS = -b $(shell cat $(objcbfs)/base_xip.txt) ################################################################################ # i386 specific tools @@ -189,158 +68,11 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l @printf " OPTION $(subst $(obj)/,,$(@))\n" $(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -L $@ -################################################################################ -# Common recipes for all stages - -$(objcbfs)/%.bin: $(objcbfs)/%.elf - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ - -$(objcbfs)/%.elf: $(objcbfs)/%.debug - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp - mv $@.tmp $@ ################################################################################ -# Build the ramstage (stage 2) - -ramstage-libs ?= - -ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y) - -$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE))) - -# The rmodule_link defintion creates an elf file with .rmod extension. -$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod - cp $< $@ - -else - -$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< -endif - -endif - -$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group -else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - +# Bootblock ################################################################################ -# done - -crt0s = $(src)/arch/x86/init/prologue.inc -ldscripts = -ldscripts += $(src)/arch/x86/init/romstage.ld -crt0s += $(src)/cpu/x86/32bit/entry32.inc -ldscripts += $(src)/cpu/x86/32bit/entry32.lds - -crt0s += $(src)/cpu/x86/fpu_enable.inc -ifeq ($(CONFIG_SSE),y) -crt0s += $(src)/cpu/x86/sse_enable.inc -endif - -crt0s += $(cpu_incs) -crt0s += $(cpu_incs-y) - -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc - -ifeq ($(CONFIG_ROMCC),y) -crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc -endif - -ifeq ($(CONFIG_ROMCC),y) -ifeq ($(CONFIG_MMX),y) - ifeq ($(CONFIG_SSE),y) - ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE - else - ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE - endif -else - ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE -endif - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ -else - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc - @printf " POST romstage.inc\n" - sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \ - -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp - mv $@.tmp $@ -endif - -# Things that appear in every board -romstage-srcs += $(objgenerated)/crt0.s -ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) -ifeq ($(CONFIG_GENERATE_MP_TABLE),y) -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c -endif -endif -ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c -endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c -endif -endif -ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),) -smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c -endif -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c -endif - -################################################################################ -# Build the final rom image - -$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre1 $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/romstage_xip.elf \ - -n $(CONFIG_CBFS_PREFIX)/romstage -c none \ - -b $(shell cat $(objcbfs)/base_xip.txt) - mv $@.tmp $@ - -################################################################################ # Build the bootblock bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb @@ -404,6 +136,58 @@ else endif ################################################################################ +# Romstage +################################################################################ + +crt0s = $(src)/arch/x86/init/prologue.inc +ldscripts = +ldscripts += $(src)/arch/x86/init/romstage.ld +crt0s += $(src)/cpu/x86/32bit/entry32.inc +ldscripts += $(src)/cpu/x86/32bit/entry32.lds + +crt0s += $(src)/cpu/x86/fpu_enable.inc +ifeq ($(CONFIG_SSE),y) +crt0s += $(src)/cpu/x86/sse_enable.inc +endif + +crt0s += $(cpu_incs) +crt0s += $(cpu_incs-y) + +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc + +ifeq ($(CONFIG_ROMCC),y) +crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc +endif + +ifeq ($(CONFIG_ROMCC),y) +ifeq ($(CONFIG_MMX),y) + ifeq ($(CONFIG_SSE),y) + ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE + else + ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE + endif +else + ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE +endif + +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h + printf " ROMCC romstage.inc\n" + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ +else + +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h + @printf " CC romstage.inc\n" + $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc + @printf " POST romstage.inc\n" + sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \ + -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp + mv $@.tmp $@ +endif + +romstage-srcs += $(objgenerated)/crt0.s + # Build the romstage romstage-libs ?= @@ -460,6 +244,85 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ +################################################################################ +# Ramstage +################################################################################ + +ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) +ifeq ($(CONFIG_GENERATE_MP_TABLE),y) +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c +endif +endif +ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c +endif +ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c +endif +endif +ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),) +smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c +endif +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c +endif + +# Build the ramstage (stage 2) + +ramstage-libs ?= + +ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y) + +$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE))) + +# The rmodule_link defintion creates an elf file with .rmod extension. +$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod + cp $< $@ + +else + +$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld +else + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< +endif + +endif + +$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group +else + $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group +endif + + +################################################################################ + seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \

1 0

New patch to review for coreboot: 63aeff8 console: Do not translate `\n` to `\r` in CBMEM console
by Paul Menzel 28 Apr '14

28 Apr '14

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5600 -gerrit commit 63aeff8af4c9046edb8ae7cd365df27ec85f96e6 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Mon Apr 28 23:09:27 2014 +0200 console: Do not translate `\n` to `\r` in CBMEM console coreboot messages written to CBMEM console and read with `cbmem -c`, currently have a control character at the end. coreboot-4.0-5833-gcf7b498 Mon Apr 28 09:53:22 CEST 2014 booting...^M This happens in the function `printk()` where a new line character `\n` is replaced by a carriage return character `\r` in the function `printk()`. This was introduced for serial/UART consoles, but is not needed for CBMEM console. So do not replace the new line character there. The logic is only changed for CBMEM console but the change is probably also useful for other consoles. Change-Id: Ia37db2c7a9ac941fecdd45538bf2c45f115ff874 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/console/console.c | 4 ++++ src/console/printk.c | 2 -- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index 9b1c255..3a5305d 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -39,6 +39,10 @@ void console_hw_init(void) void console_tx_byte(unsigned char byte) { __cbmemc_tx_byte(byte); + + if (byte == '\n') + console_tx_byte('\r'); + __spkmodem_tx_byte(byte); __qemu_debugcon_tx_byte(byte); diff --git a/src/console/printk.c b/src/console/printk.c index 40ea404..223e6a3 100644 --- a/src/console/printk.c +++ b/src/console/printk.c @@ -17,8 +17,6 @@ DECLARE_SPIN_LOCK(console_lock) void do_putchar(unsigned char byte) { - if (byte == '\n') - console_tx_byte('\r'); console_tx_byte(byte); }

1 0

Patch set updated for coreboot: a32f5dc Introduce stage-specific architecture for coreboot
by Furquan Shaikh 28 Apr '14

28 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5577 -gerrit commit a32f5dc6f669660c37ab2659a659f9aa3f03d22a Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Apr 23 10:18:48 2014 -0700 Introduce stage-specific architecture for coreboot Make all three coreboot stages (bootblock, romstage and ramstage) aware of the architecture specific to that stage i.e. we will have CONFIG_ARCH variables for each of the three stages. This allows us to have an SOC with any combination of architectures and thus every stage can be made to run on a completely different architecture independent of others. Thus, bootblock can have an x86 arch whereas romstage and ramstage can have arm32 and arm64 arch respectively. These arch specific options can be considered as either arch or modes eg: x86 running in different modes or ARM having different arch types (v4, v7, v8). In addition to different architectures/modes per stage, a separate binary arch is introduced to help to indentify the arch of CBFS binaries. Also, for now this arch type is used at places which are not clearly part of any of the above stages (eg seabios and others). The original CONFIG_ARCH variable is thus removed and replaced by CONFIG_BINARY_ARCH. Ultimate goal is to get rid of all the occurences of CONFIG_BINARY_ARCH and when we understand the arch for currently not-so-sure components. However, the general idea is that CONFIG_BINARY_ARCH should be declared as the topmost arch of the SoC or the arch which is actually responsible for loading the kernel. In order to meet these requirements, changes have been made to CC, LD, OBJCOPY and family to add CC_bootblock, CC_romstage, CC_ramstage, CC_binary and similarly others. Few additional macros have been introduced to identify the class to be used at various points, e.g.: CC_$(class) derives the $(class) part from the name of the stage being compiled. Conflicts: src/arch/armv7/Makefile.inc src/arch/x86/Makefile.inc Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile | 90 +++++++++++++++++++++-------- Makefile.inc | 66 +++++++++++++-------- src/Kconfig | 50 ++++++++++++---- src/arch/armv7/Makefile.inc | 50 ++++++++++------ src/arch/x86/Kconfig | 4 +- src/arch/x86/Makefile.inc | 83 ++++++++++++++++---------- src/arch/x86/boot/Makefile.inc | 8 +++ src/arch/x86/lib/Makefile.inc | 21 +++++-- src/console/Kconfig | 2 +- src/cpu/Kconfig | 6 +- src/cpu/Makefile.inc | 4 +- src/cpu/allwinner/a10/Kconfig | 5 +- src/cpu/amd/agesa/Kconfig | 5 +- src/cpu/amd/geode_gx1/Kconfig | 5 +- src/cpu/amd/geode_gx2/Kconfig | 5 +- src/cpu/amd/geode_lx/Kconfig | 5 +- src/cpu/amd/model_10xxx/Kconfig | 5 +- src/cpu/amd/model_fxx/Kconfig | 5 +- src/cpu/amd/sc520/Kconfig | 5 +- src/cpu/armltd/cortex-a9/Kconfig | 5 +- src/cpu/dmp/vortex86ex/Kconfig | 5 +- src/cpu/intel/ep80579/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/cpu/intel/haswell/Kconfig | 5 +- src/cpu/intel/haswell/Makefile.inc | 6 +- src/cpu/intel/model_1067x/Kconfig | 5 +- src/cpu/intel/model_106cx/Kconfig | 5 +- src/cpu/intel/model_2065x/Kconfig | 5 +- src/cpu/intel/model_206ax/Kconfig | 5 +- src/cpu/intel/model_65x/Kconfig | 5 +- src/cpu/intel/model_67x/Kconfig | 5 +- src/cpu/intel/model_68x/Kconfig | 5 +- src/cpu/intel/model_69x/Kconfig | 5 +- src/cpu/intel/model_6bx/Kconfig | 5 +- src/cpu/intel/model_6dx/Kconfig | 5 +- src/cpu/intel/model_6ex/Kconfig | 5 +- src/cpu/intel/model_6fx/Kconfig | 5 +- src/cpu/intel/model_6xx/Kconfig | 5 +- src/cpu/intel/model_f0x/Kconfig | 5 +- src/cpu/intel/model_f1x/Kconfig | 5 +- src/cpu/intel/model_f2x/Kconfig | 5 +- src/cpu/intel/model_f3x/Kconfig | 5 +- src/cpu/intel/model_f4x/Kconfig | 5 +- src/cpu/qemu-x86/Kconfig | 5 +- src/cpu/samsung/exynos5250/Kconfig | 5 +- src/cpu/samsung/exynos5420/Kconfig | 5 +- src/cpu/ti/am335x/Kconfig | 5 +- src/cpu/ti/am335x/Makefile.inc | 4 +- src/cpu/via/c3/Kconfig | 5 +- src/cpu/via/c7/Kconfig | 5 +- src/cpu/via/nano/Kconfig | 5 +- src/cpu/x86/Makefile.inc | 6 +- src/cpu/x86/smm/Makefile.inc | 26 ++++----- src/device/Kconfig | 8 +-- src/device/Makefile.inc | 2 +- src/device/device.c | 4 +- src/device/oprom/include/io.h | 2 +- src/device/oprom/yabel/compat/functions.c | 2 +- src/device/oprom/yabel/device.h | 8 +-- src/device/oprom/yabel/io.c | 2 +- src/drivers/Makefile.inc | 2 +- src/drivers/pc80/mc146818rtc.c | 2 +- src/drivers/uart/Kconfig | 4 +- src/ec/google/chromeec/Kconfig | 2 +- src/lib/Makefile.inc | 8 +-- src/lib/cbfs_core.c | 2 +- src/lib/coreboot_table.c | 2 +- src/mainboard/advansus/a785e-i/Makefile.inc | 2 +- src/mainboard/asus/m5a88-v/Makefile.inc | 2 +- src/mainboard/avalue/eax-785e/Makefile.inc | 2 +- src/mainboard/bifferos/bifferboard/Kconfig | 5 +- src/soc/intel/baytrail/Kconfig | 5 +- src/superio/Makefile.inc | 2 +- src/vendorcode/amd/agesa/f10/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f12/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f14/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15tn/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f16kb/Makefile.inc | 5 +- src/vendorcode/amd/cimx/rd890/Makefile.inc | 6 +- src/vendorcode/amd/cimx/sb700/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb800/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb900/Makefile.inc | 5 +- src/vendorcode/google/chromeos/Makefile.inc | 17 +++--- src/vendorcode/intel/Makefile.inc | 5 +- 86 files changed, 527 insertions(+), 232 deletions(-) diff --git a/Makefile b/Makefile index b709d14..b3da4a6 100644 --- a/Makefile +++ b/Makefile @@ -113,33 +113,74 @@ else include $(HAVE_DOTCONFIG) -ARCHDIR-$(CONFIG_ARCH_ARMV7) := armv7 -ARCHDIR-$(CONFIG_ARCH_X86) := x86 +# Each stage of coreboot can have a different arch. For this we need separate +# config vars +# bootblock arch +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_ARMV7) := armv7 +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_X86) := i386 -ARCH-y := $(ARCHDIR-y) +# romstage arch +ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_ARMV7) := armv7 +ARCH-ROMSTAGE-$(CONFIG_ARCH_ROMSTAGE_X86) := i386 -# If architecture folder name is different from GCC binutils architecture name, -# override here. -ARCH-$(CONFIG_ARCH_ARMV7) := armv7 -ARCH-$(CONFIG_ARCH_X86) := i386 +# ramstage arch +ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_ARMV7) := armv7 +ARCH-RAMSTAGE-$(CONFIG_ARCH_RAMSTAGE_X86) := i386 -ifneq ($(INNER_SCANBUILD),y) -CC := $(CC_$(ARCH-y)) -endif -CPP := $(CPP_$(ARCH-y)) -AS := $(AS_$(ARCH-y)) -LD := $(LD_$(ARCH-y)) -NM := $(NM_$(ARCH-y)) -OBJCOPY := $(OBJCOPY_$(ARCH-y)) -OBJDUMP := $(OBJDUMP_$(ARCH-y)) -READELF := $(READELF_$(ARCH-y)) -STRIP := $(STRIP_$(ARCH-y)) -AR := $(AR_$(ARCH-y)) +# overall binary arch +ARCH-BINARY-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-BINARY-$(CONFIG_ARCH_BINARY_X86) := i386 -CFLAGS += $(CFLAGS_$(ARCH-y)) +ARCHDIR-armv7 := armv7 +ARCHDIR-i386 := x86 -LIBGCC_FILE_NAME := $(shell test -r `$(CC) -print-libgcc-file-name` && \ - $(CC) -print-libgcc-file-name) +# If architecture folder name is different from GCC binutils architecture name, +# override here. +ARCH-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-$(CONFIG_ARCH_BINARY_X86) := i386 + +# Since there can be a different arch for each stage, we can have a different cc +# for each stage +CC_bootblock := $(CC_$(ARCH-BOOTBLOCK-y)) +CC_romstage := $(CC_$(ARCH-ROMSTAGE-y)) +CC_ramstage := $(CC_$(ARCH-RAMSTAGE-y)) +CC_binary := $(CC_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different nm +# for each stage +NM_bootblock := $(NM_$(ARCH-BOOTBLOCK-y)) +NM_romstage := $(NM_$(ARCH-ROMSTAGE-y)) +NM_ramstage := $(NM_$(ARCH-RAMSTAGE-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different +# objcopy for each stage +OBJCOPY_bootblock := $(OBJCOPY_$(ARCH-BOOTBLOCK-y)) +OBJCOPY_romstage := $(OBJCOPY_$(ARCH-ROMSTAGE-y)) +OBJCOPY_ramstage := $(OBJCOPY_$(ARCH-RAMSTAGE-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) + +# CFLAGS +CFLAGS_bootblock += $(CFLAGS_$(ARCH-BOOTBLOCK-y)) +CFLAGS_romstage += $(CFLAGS_$(ARCH-ROMSTAGE-y)) +CFLAGS_ramstage += $(CFLAGS_$(ARCH-RAMSTAGE-y)) +CFLAGS_binary += $(CFLAGS_$(ARCH-BINARY-y)) + +AS_binary := $(AS_$(ARCH-BINARY-y)) +LD_binary := $(LD_$(ARCH-BINARY-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) +OBJDUMP_binary := $(OBJDUMP_$(ARCH-BINARY-y)) +READELF_binary := $(READELF_$(ARCH-BINARY-y)) +STRIP_binary := $(STRIP_$(ARCH-BINARY-y)) +AR_binary := $(AR_$(ARCH-BINARY-y)) + +LIBGCC_FILE_NAME_bootblock := $(shell test -r `$(CC_bootblock) -print-libgcc-file-name` && \ + $(CC_bootblock) -print-libgcc-file-name) +LIBGCC_FILE_NAME_romstage := $(shell test -r `$(CC_romstage) -print-libgcc-file-name` && \ + $(CC_romstage) -print-libgcc-file-name) +LIBGCC_FILE_NAME_ramstage := $(shell test -r `$(CC_ramstage) -print-libgcc-file-name` && \ + $(CC_ramstage) -print-libgcc-file-name) ifneq ($(INNER_SCANBUILD),y) ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) @@ -264,7 +305,8 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$< + $(eval cc-class := $(call find-class-comm,$(class))) + $(CC_$(cc-class)) $(3) -MMD $$$$(CFLAGS_$(cc-class)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef @@ -285,7 +327,7 @@ printall: @echo alldirs:=$(alldirs) @echo allsrcs=$(allsrcs) @echo DEPENDENCIES=$(DEPENDENCIES) - @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME) + @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME_$(class)) @$(foreach class,$(special-classes),echo $(class):='$($(class))'; ) endif diff --git a/Makefile.inc b/Makefile.inc index a552a42..dc39716 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -65,7 +65,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool -subdirs-y += src/arch/$(ARCHDIR-y) +subdirs-y += src/arch/armv7 src/arch/x86 subdirs-y += src/mainboard/$(MAINBOARDDIR) subdirs-y += site-local @@ -105,7 +105,7 @@ files-in-dir=$(filter-out $(call dir-wildcards,$(call filter-out-dirs,$(1),$(dir # reduce command line length by linking the objects of each # directory into an intermediate file ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \ - $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD) -o $$@ -r $$^ ) \ + $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_binary) -o $$@ -r $$^ ) \ $(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs)))) romstage-c-ccopts:=-D__PRE_RAM__ @@ -146,10 +146,10 @@ smm-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-y)/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c - $(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex endef @@ -168,7 +168,7 @@ cbfs-files-processor-nvramtool= \ # arg2: binary file name cbfs-files-processor-vsa= \ $(eval $(2): $(1) ; \ - printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) + printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY_binary) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD_binary) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) ####################################################################### # Add handler for arbitrary files in CBFS @@ -211,19 +211,29 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include +INCLUDES := -Isrc -Isrc/include -I$(obj) INCLUDES += -Isrc/device/oprom/include # abspath is a workaround for romcc INCLUDES += -include $(src)/include/kconfig.h -CFLAGS = $(INCLUDES) -Os -pipe -g -nostdinc -CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -CFLAGS += -Wstrict-aliasing -Wshadow +INCLUDES_binary := -Isrc/arch/$(ARCHDIR-$(ARCH-BINARY-y))/include +INCLUDES_bootblock := -Isrc/arch/$(ARCHDIR-$(ARCH-BOOTBLOCK-y))/include +INCLUDES_romstage := -Isrc/arch/$(ARCHDIR-$(ARCH-ROMSTAGE-y))/include +INCLUDES_ramstage := -Isrc/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include + +CFLAGS_common = $(INCLUDES) -Os -pipe -g -nostdinc +CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wstrict-aliasing -Wshadow ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y) -CFLAGS += -Werror +CFLAGS_common += -Werror endif -CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer +CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer + +CFLAGS_binary = $(CFLAGS_common) $(INCLUDES_binary) +CFLAGS_bootblock = $(CFLAGS_common) $(INCLUDES_bootblock) +CFLAGS_romstage = $(CFLAGS_common) $(INCLUDES_romstage) +CFLAGS_ramstage = $(CFLAGS_common) $(INCLUDES_ramstage) additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \ $(objutil)/ifdfake $(objutil)/options @@ -245,9 +255,9 @@ $(obj)/build.h: .xcompile printf "#define COREBOOT_BUILD_WEEKDAY_BCD 0x`LANG= date +"%w"`\n" >> $(obj)/build.ht printf "#define COREBOOT_DMI_DATE \"`LANG= date +"%m/%d/%Y"`\"\n" >> $(obj)/build.ht printf "\n" >> $(obj)/build.ht - printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD_binary) --version | head -n1)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_BY \"$(subst \,@,$(shell PATH=$$PATH:/usr/ucb whoami))\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_HOST \"$(shell hostname -s 2>/dev/null || hostname 2>/dev/null)\"\n" >> $(obj)/build.ht @@ -315,15 +325,15 @@ $(objutil)/%.o: $(objutil)/%.c $(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(CFLAGS) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -D__PRE_RAM__ $(CFLAGS) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< ####################################################################### # Clean up rules @@ -339,7 +349,7 @@ clean-for-update-target: rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.* rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC)" LD="$(LD)" + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC_binary)" LD="$(LD_binary)" clean-target: rm -f $(obj)/coreboot* @@ -412,16 +422,22 @@ tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/ # Common recipes for all stages ######################################################################################################################################################################## +find-class = $(if $(filter $(1),$(basename $(1))),$(1),$(call find-class,$(basename $(1)))) + +find-class-comm = $(if $(CC_$(call find-class,$(1))),$(call find-class,$(1)),binary) + $(objcbfs)/%.bin: $(objcbfs)/%.elf + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_$(class)) -O binary $< $@ $(objcbfs)/%.elf: $(objcbfs)/%.debug + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + $(NM_$(class)) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_$(class)) --strip-debug $@.tmp + $(OBJCOPY_$(class)) --add-gnu-debuglink=$< $@.tmp mv $@.tmp $@ ######################################################################################################################################################################## @@ -550,10 +566,10 @@ cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) bootsplash.jpg-type := bootsplash -ifeq ($(CONFIG_ARCH_ARMV7),y) +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) ROMSTAGE_ELF := romstage.elf endif -ifeq ($(CONFIG_ARCH_X86),y) +ifeq ($(CONFIG_ARCH_BINARY_X86),y) ROMSTAGE_ELF := romstage_xip.elf endif diff --git a/src/Kconfig b/src/Kconfig index 6356b19..e85ab62 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -228,22 +228,50 @@ source src/mainboard/Kconfig # This option is used to set the architecture of a mainboard to X86. # It is usually set in mainboard/*/Kconfig. -config ARCH_X86 +config ARCH_BINARY_X86 bool default n select PCI -config ARCH_ARMV7 +config ARCH_BINARY_ARMV7 bool default n +# This option is used to set the architecture of bootblock stage +config ARCH_BOOTBLOCK_ARMV7 + bool + default n + +config ARCH_BOOTBLOCK_X86 + bool + default n + +# This option is used to set the architecture of romstage stage +config ARCH_ROMSTAGE_ARMV7 + bool + default n + +config ARCH_ROMSTAGE_X86 + bool + default n + +# This option is used to set the architecture of ramstage stage +config ARCH_RAMSTAGE_ARMV7 + bool + default n + +config ARCH_RAMSTAGE_X86 + bool + default n + + # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_X86 +if ARCH_BINARY_X86 source src/arch/x86/Kconfig endif -if ARCH_ARMV7 +if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig endif @@ -334,7 +362,7 @@ config TIMER_QUEUE config COOP_MULTITASKING def_bool n - depends on TIMER_QUEUE && ARCH_X86 + depends on TIMER_QUEUE && ARCH_BINARY_X86 help Cooperative multitasking allows callbacks to be multiplexed on the main thread of ramstage. With this enabled it allows for multiple @@ -433,7 +461,7 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM by the board and/or chipset. config HAVE_REFCODE_BLOB - depends on ARCH_X86 + depends on ARCH_BINARY_X86 bool "An external reference code blob should be put into cbfs." default n help @@ -518,7 +546,7 @@ config GENERATE_PIRQ_TABLE If unsure, say Y. config GENERATE_SMBIOS_TABLES - depends on ARCH_X86 + depends on ARCH_BINARY_X86 bool "Generate SMBIOS tables" default y help @@ -532,8 +560,8 @@ menu "Payload" choice prompt "Add a payload" - default PAYLOAD_NONE if !ARCH_X86 - default PAYLOAD_SEABIOS if ARCH_X86 + default PAYLOAD_NONE if !ARCH_BINARY_X86 + default PAYLOAD_SEABIOS if ARCH_BINARY_X86 config PAYLOAD_NONE bool "None" @@ -567,7 +595,7 @@ config PAYLOAD_LINUX config PAYLOAD_SEABIOS bool "SeaBIOS" - depends on ARCH_X86 + depends on ARCH_BINARY_X86 help Select this option if you want to build a coreboot image with a SeaBIOS payload. If you don't know what this is @@ -1115,7 +1143,7 @@ config POWER_BUTTON_IS_OPTIONAL config REG_SCRIPT bool - default y if ARCH_X86 + default y if ARCH_BINARY_X86 default n help Internal option that controls whether we compile in register scripts. diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index a419dcd..241ecb5 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -32,6 +32,7 @@ subdirs-y += lib/ # ARM specific options ################################################################################ +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) CBFSTOOL_PRE_OPTS = -b 0 @@ -40,20 +41,23 @@ stages_o = $(obj)/arch/armv7/stages.o $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -I. $(INCLUDES) -c -o $@ $< -marm + $(CC_binary) -I. $(INCLUDES) $(INCLUDES_binary) -c -o $@ $< -marm -CFLAGS += \ +CFLAGS_common += \ -ffixed-r8\ -march=armv7-a\ -marm\ -mno-unaligned-access\ -mthumb\ -mthumb-interwork +endif # CONFIG_ARCH_BINARY_ARMV7 ################################################################################ # Bootblock ################################################################################ +ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y) + bootblock-y += cache.c bootblock-y += eabi_compat.c bootblock-y += memset.S @@ -81,31 +85,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_bootblock) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ + $(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \ -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ + $(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_bootblock) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group endif +endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y) + romstage-y += cache.c romstage-y += div0.c romstage-y += eabi_compat.c @@ -132,9 +140,9 @@ crt0s += $(cpu_incs-y) $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions @@ -149,21 +157,24 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_ARMV7 ################################################################################ # Ramstage ################################################################################ -# Things that appear in every board +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y) + ramstage-y += exception.c ramstage-y += exception_asm.S ramstage-y += div0.c @@ -183,17 +194,17 @@ ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld + $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< endif -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) +$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) @@ -220,3 +231,4 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c endif +endif # CONFIG_ARCH_RAMSTAGE_ARMV7 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8854e6b..36c9356 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -13,14 +13,14 @@ config X86_ARCH_OPTIONS config AP_IN_SIPI_WAIT bool default n - depends on ARCH_X86 && SMP + depends on ARCH_BINARY_X86 && SMP # Aligns 16bit entry code in bootblock so that hyper-threading CPUs # can boot AP CPUs to enable their shared caches. config SIPI_VECTOR_IN_ROM bool default n - depends on ARCH_X86 + depends on ARCH_BINARY_X86 config RAMBASE hex diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 79caabd..8a85100 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -53,8 +53,10 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE)) mbi.bin-type := mbi +ifeq ($(CONFIG_ARCH_BINARY_X86),y) CBFSTOOL_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) CBFSTOOL_PRE_OPTS = -b $(shell cat $(objcbfs)/base_xip.txt) +endif ################################################################################ # i386 specific tools @@ -75,6 +77,8 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l # Build the bootblock +ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86),y) + bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds @@ -114,31 +118,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC_bootblock) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ + $(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< + $(CC_bootblock) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< endif +endif # CONFIG_ARCH_BOOTBLOCK_X86 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + crt0s = $(src)/arch/x86/init/prologue.inc ldscripts = ldscripts += $(src)/arch/x86/init/romstage.ld @@ -170,14 +178,26 @@ else ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE endif +$(objcbfs)/romstage_%.bin: $(objcbfs)/romstage_%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY_romstage) -O binary $< $@ + +$(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM_romstage) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_romstage) --strip-debug $@.tmp + $(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" @@ -195,21 +215,21 @@ romstage-libs ?= $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_null.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif - $(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ + $(NM_romstage) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ echo "Forbidden global variables in romstage:"; \ - $(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ + $(NM_romstage) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ else true; fi $(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_xip.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions @@ -238,16 +258,20 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_X86 ################################################################################ # Ramstage ################################################################################ +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) @@ -305,30 +329,31 @@ else $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld + $(LD_ramstage) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< endif endif -$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) +$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $$(ramstage-libs) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif +endif # CONFIG_ARCH_RAMSTAGE_X86 ################################################################################ seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ - AS="$(AS)" CPP="$(CPP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ + AS="$(AS_binary)" CPP="$(CPP)" \ CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ @@ -337,8 +362,8 @@ seabios: filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) @@ -346,6 +371,6 @@ filo: grub2: $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER) diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 928fc03..061074c 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -1,6 +1,13 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c romstage-$(CONFIG_BROKEN_CAR_MIGRATE) += cbmem.c +endif # CONFIG_ARCH_ROMSTAGE_X86 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-y += boot.c ramstage-y += gdt.c ramstage-y += tables.c @@ -14,3 +21,4 @@ ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S $(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h +endif # CONFIG_ARCH_RAMSTAGE_X86 \ No newline at end of file diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index 8b7418b..03e6c88 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -1,3 +1,16 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + +romstage-y += cbfs_and_run.c +romstage-y += memset.c +romstage-y += memcpy.c +romstage-y += memmove.c +romstage-y += rom_media.c + +endif # CONFIG_ARCH_ROMSTAGE_X86 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-y += c_start.S ramstage-y += cpu.c ramstage-y += pci_ops_conf1.c @@ -12,12 +25,6 @@ ramstage-y += rom_media.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S -romstage-y += cbfs_and_run.c -romstage-y += memset.c -romstage-y += memcpy.c -romstage-y += memmove.c -romstage-y += rom_media.c - smm-y += memset.c smm-y += memcpy.c smm-y += memmove.c @@ -26,3 +33,5 @@ smm-y += rom_media.c rmodules-y += memset.c rmodules-y += memcpy.c rmodules-y += memmove.c + +endif # CONFIG_ARCH_RAMSTAGE_X86 \ No newline at end of file diff --git a/src/console/Kconfig b/src/console/Kconfig index 65fc1aa..c3d88a2 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -2,7 +2,7 @@ menu "Console" config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on ARCH_ARMV7 + depends on ARCH_BINARY_ARMV7 default n help Use console during the bootblock if supported diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 6fced37..59407c2 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -14,7 +14,7 @@ source src/cpu/via/Kconfig source src/cpu/qemu-x86/Kconfig source src/cpu/x86/Kconfig -if ARCH_X86 +if ARCH_BINARY_X86 config CACHE_AS_RAM bool @@ -62,7 +62,7 @@ config SSE2 streaming SIMD instructions. Some parts of coreboot can be built with more efficient code if SSE2 instructions are available. -endif # ARCH_X86 +endif # ARCH_BINARY_X86 config SUPPORT_CPU_UCODE_IN_CBFS bool @@ -80,7 +80,7 @@ config CPU_MICROCODE_ADDED_DURING_BUILD default y if CPU_MICROCODE_CBFS_GENERATE || CPU_MICROCODE_CBFS_EXTERNAL choice - prompt "Include CPU microcode in CBFS" if ARCH_X86 + prompt "Include CPU microcode in CBFS" if ARCH_BINARY_X86 default CPU_MICROCODE_CBFS_GENERATE if SUPPORT_CPU_UCODE_IN_CBFS default CPU_MICROCODE_CBFS_NONE if !SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index f206fdc..e66585b 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -42,13 +42,13 @@ endif # final microcode file. $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs) @printf " LD $(subst $(obj)/,,$(@))\n" - $(LD) -static --entry=0 $+ -o $@ + $(LD_binary) -static --entry=0 $+ -o $@ # We have a lot of useless data in the large blob, and we are only interested in # the data section, so we only copy that part to the final microcode file $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o @printf " MICROCODE $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -j .data -O binary $< $@ + $(OBJCOPY_binary) -j .data -O binary $< $@ ifeq ($(cbfs_include_ucode),y) # Add CPU microcode to specified rom image $(1) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index f76a7b6..0e13f94 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -6,7 +6,10 @@ if CPU_ALLWINNER_A10 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index fa36f38..7670f17 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -26,7 +26,10 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_TN default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER diff --git a/src/cpu/amd/geode_gx1/Kconfig b/src/cpu/amd/geode_gx1/Kconfig index b87e8bc..f04c8d5 100644 --- a/src/cpu/amd/geode_gx1/Kconfig +++ b/src/cpu/amd/geode_gx1/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX1 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_GX1 diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig index b96c770..9d74830 100644 --- a/src/cpu/amd/geode_gx2/Kconfig +++ b/src/cpu/amd/geode_gx2/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX2 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_GX2 diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index 6aceab2..9527ea7 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_GEODE_LX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_LX diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 30c2486..e0f0198 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_10XXX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SSE select SSE2 select MMCONF_SUPPORT_DEFAULT diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 1a811f4..34bf71d 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_FXX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select MMX select SSE select SSE2 diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig index 46377be..a92724c 100644 --- a/src/cpu/amd/sc520/Kconfig +++ b/src/cpu/amd/sc520/Kconfig @@ -1,3 +1,6 @@ config CPU_AMD_SC520 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig index f46c6ff..b354444 100644 --- a/src/cpu/armltd/cortex-a9/Kconfig +++ b/src/cpu/armltd/cortex-a9/Kconfig @@ -1,6 +1,9 @@ config CPU_ARMLTD_CORTEX_A9 bool - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select EARLY_CONSOLE default n diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig index aea8889..da8834c 100644 --- a/src/cpu/dmp/vortex86ex/Kconfig +++ b/src/cpu/dmp/vortex86ex/Kconfig @@ -19,5 +19,8 @@ config CPU_DMP_VORTEX86EX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig index fa96f8d..d5aa4c8 100644 --- a/src/cpu/intel/ep80579/Kconfig +++ b/src/cpu/intel/ep80579/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_EP80579 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SSE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 22d01e6..527de90 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -28,7 +28,10 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 1ea9c2a..b4d18c3 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -9,4 +9,4 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c cpu_incs += $(src)/cpu/intel/fsp_model_206ax/cache_as_ram.inc -CC := $(CC) -I$(CONFIG_MICROCODE_INCLUDE_PATH) +CC := $(CC_binary) -I$(CONFIG_MICROCODE_INCLUDE_PATH) diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 97309ae..1726128 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -6,7 +6,10 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select BACKUP_DEFAULT_SMM_REGION select SMP select SSE2 diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 63c1939..e504a68 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -26,14 +26,14 @@ rmodules-y += sipi_vector.S rmodules-y += sipi_header.c $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_DOTO), 0)) $(SIPI_BIN): $(SIPI_ELF).rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 4d6add6..346d218 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_1067X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index ea6f5ca..3a9b4e5 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_106CX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 4c7456d..48dfc82 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -5,7 +5,10 @@ if CPU_INTEL_MODEL_2065X config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE select SSE2 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 64b2a0a..60d0899 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -8,7 +8,10 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index b3fa7bd..6a417ec 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_65X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 7558bc2..4e3d6aa 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_67X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 670163a..b926b43 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -20,6 +20,9 @@ config CPU_INTEL_MODEL_68X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_69x/Kconfig b/src/cpu/intel/model_69x/Kconfig index e4a0e6c..7ea9cdc 100644 --- a/src/cpu/intel/model_69x/Kconfig +++ b/src/cpu/intel/model_69x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_69X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 4dc6fe6..c0da73b 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6BX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig index e6d5f1e..74c5b33 100644 --- a/src/cpu/intel/model_6dx/Kconfig +++ b/src/cpu/intel/model_6dx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6DX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index eee864d..6b6d5d9 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6EX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index b8de303..a7de42c 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6FX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index 49cfe2d..ef04e89 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6XX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig index 2ed68d1..d985254 100644 --- a/src/cpu/intel/model_f0x/Kconfig +++ b/src/cpu/intel/model_f0x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F0X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig index 3bdb7f6..33e587f 100644 --- a/src/cpu/intel/model_f1x/Kconfig +++ b/src/cpu/intel/model_f1x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F1X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 62393a8..9cef453 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F2X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 5c9d0a3..d9f0f93 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F3X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 849dcd0..3375326 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F4X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index e54e4db..5284bf9 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,4 +19,7 @@ config CPU_QEMU_X86 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index b8042e3..3dbfef7 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5250 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 6207adf..ab86349 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5420 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index 22a02ad..5432c24 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -1,5 +1,8 @@ config CPU_TI_AM335X - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index 5b10bd8..2017371 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -28,14 +28,14 @@ get_header_size= \ $(obj)/omap-header.bin: $$(omap-header-objs) $$(header_ld) $(obj)/coreboot.rom @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -include $(obj)/config.h \ + $(CC_binary) -nostdlib -nostartfiles -static -include $(obj)/config.h \ -Wl,--defsym,header_load_size=$(strip \ $(call get_header_size,$(obj)/coreboot.rom, \ $(CONFIG_CBFS_PREFIX)/romstage \ ) \ ) \ -o $@.tmp $< -T $(header_ld) - $(OBJCOPY) --only-section=".header" -O binary $@.tmp $@ + $(OBJCOPY_binary) --only-section=".header" -O binary $@.tmp $@ $(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin @printf " HEADER $(subst $(obj)/,,$(@))\n" diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig index 566f07c..b898f81 100644 --- a/src/cpu/via/c3/Kconfig +++ b/src/cpu/via/c3/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C3 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig index d5f1a41..c4d27f7 100644 --- a/src/cpu/via/c7/Kconfig +++ b/src/cpu/via/c7/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C7 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig index 0f4f994..b4471a1 100644 --- a/src/cpu/via/nano/Kconfig +++ b/src/cpu/via/nano/Kconfig @@ -24,7 +24,10 @@ if CPU_VIA_NANO config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 514d96c..bc6a116 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -16,13 +16,13 @@ endif rmodules-$(CONFIG_PARALLEL_MP) += sipi_vector.S $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_ELF:.elf=.o), 0)) $(SIPI_BIN): $(SIPI_RMOD) - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 9720630..2d31f07 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -32,32 +32,32 @@ ramstage-srcs += $(obj)/cpu/x86/smm/smmstub # SMM Stub Module. The stub is used as a trampoline for relocation and normal # SMM handling. $(obj)/cpu/x86/smm/smmstub.o: $$(smmstub-objs) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the SMM stub module with a 0-byte heap. $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0)) $(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smmstub.ramstage.o: $(obj)/cpu/x86/smm/smmstub @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) # C-based SMM handler. -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smm.elf, $(obj)/cpu/x86/smm/smm.o, $(CONFIG_SMM_MODULE_HEAP_SIZE))) $(obj)/cpu/x86/smm/smm: $(obj)/cpu/x86/smm/smm.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smm.ramstage.o: $(obj)/cpu/x86/smm/smm @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) else # CONFIG_SMM_MODULES @@ -79,18 +79,18 @@ endif smm-y += smihandler.c -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions - $(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o - $(NM) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map - $(OBJCOPY) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm + $(CC_ramstage) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o + $(NM_ramstage) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map + $(OBJCOPY_ramstage) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm # change to the target path because objcopy will use the path name in its # ELF symbol names. $(obj)/cpu/x86/smm/smm_wrap.ramstage.o: $(obj)/cpu/x86/smm/smm_wrap @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(obj)/cpu/x86/smm; $(OBJCOPY) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o + cd $(obj)/cpu/x86/smm; $(OBJCOPY_ramstage) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o endif # CONFIG_SMM_MODULES diff --git a/src/device/Kconfig b/src/device/Kconfig index 932b4de..8f5a0f8 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -91,14 +91,14 @@ config ON_DEVICE_ROM_RUN choice prompt "Option ROM execution type" - default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 - default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 + default PCI_OPTION_ROM_RUN_YABEL if !ARCH_BINARY_X86 + default PCI_OPTION_ROM_RUN_REALMODE if ARCH_BINARY_X86 depends on VGA_ROM_RUN || GEODE_VSA config PCI_OPTION_ROM_RUN_REALMODE prompt "Native mode" bool - depends on ARCH_X86 + depends on ARCH_BINARY_X86 help If you select this option, PCI Option ROMs will be executed natively on the CPU in real mode. No CPU emulation is involved, @@ -161,7 +161,7 @@ config YABEL_VIRTMEM_LOCATION config YABEL_DIRECTHW prompt "Direct hardware access" bool - depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 + depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_BINARY_X86 help YABEL consists of two parts: It uses x86emu for the CPU emulation and additionally provides a PC system emulation that filters bad device diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index bd41b12..5df4843 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -9,7 +9,7 @@ ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c -ramstage-$(CONFIG_ARCH_X86) += pnp_device.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-$(CONFIG_PCI) += pci_early.c ramstage-y += smbus_ops.c diff --git a/src/device/device.c b/src/device/device.c index e068cee..2b808e7 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -40,7 +40,7 @@ #include <stdlib.h> #include <string.h> #include <smp/spinlock.h> -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/ebda.h> #endif #include <timer.h> @@ -1189,7 +1189,7 @@ void dev_initialize(void) printk(BIOS_INFO, "Initializing devices...\n"); -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 /* Ensure EBDA is prepared before Option ROMs. */ setup_default_ebda(); #endif diff --git a/src/device/oprom/include/io.h b/src/device/oprom/include/io.h index 96dd572..6adce71 100644 --- a/src/device/oprom/include/io.h +++ b/src/device/oprom/include/io.h @@ -1,4 +1,4 @@ -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/io.h> #else void outb(u8 val, u16 port); diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 2c3dc33..851917a 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -48,7 +48,7 @@ unsigned long tb_freq = 0; u64 get_time(void) { u64 act = 0; -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 u32 eax, edx; __asm__ __volatile__( diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index 017aab9..1fce2ce 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -128,7 +128,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr); static inline void out32le(void *addr, u32 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 *((u32*) addr) = cpu_to_le32(val); #else asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -139,7 +139,7 @@ static inline u32 in32le(void *addr) { u32 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le32(*((u32 *) addr)); #else asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr)); @@ -150,7 +150,7 @@ in32le(void *addr) static inline void out16le(void *addr, u16 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 *((u16*) addr) = cpu_to_le16(val); #else asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -161,7 +161,7 @@ static inline u16 in16le(void *addr) { u16 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le16(*((u16*) addr)); #else asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr)); diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 94f610d..1449f52 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -26,7 +26,7 @@ #include <device/resource.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/io.h> #else // these are not used, only needed for linking, must be overridden using X86emu_setupPioFuncs diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index f11e4b8..413b4ae 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -37,4 +37,4 @@ subdirs-y += ti subdirs-y += ipmi subdirs-y += elog subdirs-y += xpowers -subdirs-$(CONFIG_ARCH_X86) += pc80 +subdirs-$(CONFIG_ARCH_BINARY_X86) += pc80 diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index 51cd6c3..685f073 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -52,7 +52,7 @@ static void rtc_set_checksum(int range_start, int range_end, int cks_loc) } #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #define RTC_CONTROL_DEFAULT (RTC_24H) #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ) #else diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index a979437..bb71f69 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -5,9 +5,9 @@ config DRIVERS_UART config DRIVERS_UART_8250IO bool "Serial port on SuperIO" - depends on !ARCH_ARMV7 + depends on !ARCH_BINARY_ARMV7 default n if NO_UART_ON_SUPERIO - default y if ARCH_X86 + default y if ARCH_BINARY_X86 # Select this for mainboard without SuperIO serial port. config NO_UART_ON_SUPERIO diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 342db3e..2d63b5f 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -21,7 +21,7 @@ config EC_GOOGLE_CHROMEEC_I2C_CHIP default 0x1e config EC_GOOGLE_CHROMEEC_LPC - depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. + depends on EC_GOOGLE_CHROMEEC && ARCH_BINARY_X86 # Needs Plug-and-play. def_bool y help Google Chrome EC via LPC bus. diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f8cf3b1..3e2550c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,7 +56,7 @@ romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c endif -romstage-$(CONFIG_ARCH_X86) += gcc.c +romstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c @@ -83,7 +83,7 @@ ramstage-y += cbfs.c ramstage-y += lzma.c #ramstage-y += lzmadecode.c ramstage-y += stack.c -ramstage-$(CONFIG_ARCH_X86) += gcc.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -143,8 +143,8 @@ RMODULE_LDFLAGS := -nostartfiles -Wl,--emit-relocs -Wl,-z,defs -Wl,-Bsymbolic - # rmdoule is named $(1).rmod define rmodule_link $(strip $(1)): $(strip $(2)) $$(RMODULE_LDSCRIPT) $$(obj)/ldoptions $$(RMODTOOL) - $$(CC) $$(CFLAGS) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME) -Wl,--end-group - $$(NM) -n $$@ > $$(basename $$(a)).map + $$(CC_ramstage) $$(CFLAGS_ramstage) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group + $$(NM_ramstage) -n $$@ > $$(basename $$(a)).map $(strip $(1)).rmod: $(strip $(1)) $$(RMODTOOL) -i $$^ -o $$@ diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c index 50c037e..a6bd270 100644 --- a/src/lib/cbfs_core.c +++ b/src/lib/cbfs_core.c @@ -118,7 +118,7 @@ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) // TODO Add a "size" in CBFS header for a platform independent way to // determine the end of CBFS data. -#if defined(CONFIG_ARCH_X86) && CONFIG_ARCH_X86 +#if defined(CONFIG_ARCH_BINARY_X86) && CONFIG_ARCH_BINARY_X86 romsize -= htonl(header->bootblocksize); #endif DEBUG("CBFS location: 0x%x~0x%x, align: %d\n", offset, romsize, align); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 8e7f85d..b2dd048 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -38,7 +38,7 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/gnvs.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <cpu/x86/mtrr.h> #endif diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/advansus/a785e-i/Makefile.inc +++ b/src/mainboard/advansus/a785e-i/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/asus/m5a88-v/Makefile.inc +++ b/src/mainboard/asus/m5a88-v/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/avalue/eax-785e/Makefile.inc +++ b/src/mainboard/avalue/eax-785e/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/bifferos/bifferboard/Kconfig b/src/mainboard/bifferos/bifferboard/Kconfig index 4ee9958..d97a889 100644 --- a/src/mainboard/bifferos/bifferboard/Kconfig +++ b/src/mainboard/bifferos/bifferboard/Kconfig @@ -2,7 +2,10 @@ if BOARD_BIFFEROS_BIFFERBOARD config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select ROMCC select BOARD_ROMSIZE_KB_128 select NORTHBRIDGE_RDC_R8610 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1b3ee05..a57d273 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -8,7 +8,10 @@ if SOC_INTEL_BAYTRAIL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select CACHE_MRC_SETTINGS select CAR_MIGRATION select COLLECT_TIMESTAMPS diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc index e34fa89..4b55827 100644 --- a/src/superio/Makefile.inc +++ b/src/superio/Makefile.inc @@ -28,4 +28,4 @@ subdirs-y += smsc subdirs-y += via subdirs-y += winbond -ramstage-$(CONFIG_ARCH_X86) += common/conf_mode.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += common/conf_mode.c diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index 203efab..177302c 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -48,5 +48,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index e1bafbe..4c5ec84 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -86,5 +86,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### \ No newline at end of file diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc index f457277..509b3ad 100644 --- a/src/vendorcode/amd/agesa/f14/Makefile.inc +++ b/src/vendorcode/amd/agesa/f14/Makefile.inc @@ -67,7 +67,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 2a7acce..d8ee520 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -529,5 +529,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 00ace78..ee174bf 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -91,7 +91,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 0e68895..4d497f1 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -98,5 +98,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index feeb2cd..491f810 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -113,7 +113,11 @@ NB_CIMX_CFLAGS = export CIMX_ROOT export NB_CIMX_INC export NB_CIMX_CFLAGS -CC := $(CC) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) + +CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_binary := $(CC_binary) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index 10d03e6..24e7ce1 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -72,7 +72,10 @@ SB_CIMX_CFLAGS = export CIMX_ROOT export SB_CIMX_INC export SB_CIMX_CFLAGS -CC := $(CC) $(SB_CIMX_CFLAGS) $(SB_CIMX_INC) +CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC) +CC_romstage := $(CC_romstage) $(SB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC) +CC_binary := $(CC_binary) $(SB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc index 3fb1d54..553ebae 100644 --- a/src/vendorcode/amd/cimx/sb800/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc @@ -79,7 +79,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 4a3417f..e26a0fe 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -82,7 +82,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 21e1750..9f4afa8 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -19,9 +19,9 @@ romstage-y += chromeos.c ramstage-y += chromeos.c -romstage-$(CONFIG_ARCH_X86) += vbnv.c -ramstage-$(CONFIG_ARCH_X86) += vbnv.c -romstage-$(CONFIG_ARCH_X86) += vboot.c +romstage-$(CONFIG_ARCH_BINARY_X86) += vbnv.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += vbnv.c +romstage-$(CONFIG_ARCH_BINARY_X86) += vboot.c ramstage-y += gnvs.c romstage-y += fmap.c ramstage-y += fmap.c @@ -33,9 +33,9 @@ romstage-srcs += src/mainboard/$(MAINBOARDDIR)/chromeos.c endif ifeq ($(MOCK_TPM),1) -CFLAGS += -DMOCK_TPM=1 +CFLAGS_common += -DMOCK_TPM=1 else -CFLAGS += -DMOCK_TPM=0 +CFLAGS_common += -DMOCK_TPM=0 endif ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) @@ -43,7 +43,7 @@ romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a -VB_FIRMWARE_ARCH := $(ARCHDIR-y) +VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-BINARY-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. @@ -62,11 +62,11 @@ VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memcpy.rmodules.o VBOOT_STUB_DEPS += $(VB_LIB) # Remove the '-include' option since that will break vboot's build and ensure # vboot_reference can get to coreboot's include files. -VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS))) +VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS_binary))) VBOOT_CFLAGS += -DVBOOT_DEBUG $(VBOOT_STUB_DOTO): $(VBOOT_STUB_DEPS) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_binary) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the vbootstub module with a 64KiB-byte heap. $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) @@ -75,6 +75,7 @@ $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) $(VB_LIB): @printf " MAKE $(subst $(obj)/,,$(@))\n" $(Q)FIRMWARE_ARCH=$(VB_FIRMWARE_ARCH) \ + CC="$(CC_binary)" \ CFLAGS="$(VBOOT_CFLAGS)" \ make -C $(VB_SOURCE) \ BUILD=../$(dir $(VB_LIB)) \ diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc index 8569af0..79c648d 100644 --- a/src/vendorcode/intel/Makefile.inc +++ b/src/vendorcode/intel/Makefile.inc @@ -23,5 +23,8 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c) FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) ramstage-y += $(FSP_C_INPUTS) -CC := $(CC) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_binary := $(CC_binary) -Isrc/vendorcode/intel/$(FSP_PATH)include endif

1 0

Patch set updated for coreboot: db07a7c Clean arch-level Kconfig files
by Furquan Shaikh 28 Apr '14

28 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5579 -gerrit commit db07a7ce3d63a5e25c31486620bbbc59e2e39731 Author: Furquan Shaikh <furquan(a)google.com> Date: Fri Apr 25 14:35:45 2014 -0700 Clean arch-level Kconfig files General cleanup of arch-level (x86 and arm) Kconfig files: 1) Move MAX_REBOOT_CNT to top level Kconfig 2) Remove ARCH_MEM* options 3) Make PC80_system option depend on ARCH_BINARY_X86 to be default y 4) Include all arch-level Kconfigs by default (Necessary for arch-aware stages) 5) Move stage-specific arch options to arch-level Kconfigs Change-Id: I09eca097c128f38632249d6a1de816f055cdcfd0 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/Kconfig | 62 +++++--------------------------------------------- src/arch/armv7/Kconfig | 25 ++++++++++++-------- src/arch/x86/Kconfig | 28 +++++++++++++---------- src/lib/Makefile.inc | 38 ------------------------------- 4 files changed, 38 insertions(+), 115 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index e85ab62..2448711 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -226,66 +226,10 @@ endmenu source src/mainboard/Kconfig -# This option is used to set the architecture of a mainboard to X86. -# It is usually set in mainboard/*/Kconfig. -config ARCH_BINARY_X86 - bool - default n - select PCI - -config ARCH_BINARY_ARMV7 - bool - default n - -# This option is used to set the architecture of bootblock stage -config ARCH_BOOTBLOCK_ARMV7 - bool - default n - -config ARCH_BOOTBLOCK_X86 - bool - default n - -# This option is used to set the architecture of romstage stage -config ARCH_ROMSTAGE_ARMV7 - bool - default n - -config ARCH_ROMSTAGE_X86 - bool - default n - -# This option is used to set the architecture of ramstage stage -config ARCH_RAMSTAGE_ARMV7 - bool - default n - -config ARCH_RAMSTAGE_X86 - bool - default n - - # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_BINARY_X86 source src/arch/x86/Kconfig -endif - -if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig -endif - -config HAVE_ARCH_MEMSET - bool - default n - -config HAVE_ARCH_MEMCPY - bool - default n - -config HAVE_ARCH_MEMMOVE - bool - default n source src/vendorcode/Kconfig @@ -1147,3 +1091,9 @@ config REG_SCRIPT default n help Internal option that controls whether we compile in register scripts. + +# Maximum reboot count +# TODO: Improve description. +config MAX_REBOOT_CNT + int + default 3 diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index 4f9fc34..2089707 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -4,15 +4,22 @@ menu "Architecture (armv7)" config ARM_ARCH_OPTIONS bool default y - select HAVE_ARCH_MEMSET - select HAVE_ARCH_MEMCPY - select HAVE_ARCH_MEMMOVE - -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 + +config ARCH_BINARY_ARMV7 + bool + default n + +config ARCH_BOOTBLOCK_ARMV7 + bool + default n + +config ARCH_ROMSTAGE_ARMV7 + bool + default n + +config ARCH_RAMSTAGE_ARMV7 + bool + default n choice prompt "Bootblock behaviour" diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 36c9356..877f6bc 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -1,11 +1,21 @@ menu "Architecture (x86)" -config X86_ARCH_OPTIONS +config ARCH_BINARY_X86 bool - default y - select HAVE_ARCH_MEMSET - select HAVE_ARCH_MEMCPY - select HAVE_ARCH_MEMMOVE + default n + select PCI + +config ARCH_BOOTBLOCK_X86 + bool + default n + +config ARCH_ROMSTAGE_X86 + bool + default n + +config ARCH_RAMSTAGE_X86 + bool + default n # This is an SMP option. It relates to starting up APs. # It is usually set in mainboard/*/Kconfig. @@ -34,12 +44,6 @@ config STACK_SIZE hex default 0x1000 -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 - # This is something you almost certainly don't want to mess with. # How many SIPIs do we send when starting up APs and cores? # The answer in 2000 or so was '2'. Nowadays, on many systems, @@ -84,7 +88,7 @@ config ROMCC config PC80_SYSTEM bool - default y + default y if ARCH_BINARY_X86 config BOOTBLOCK_MAINBOARD_INIT string diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 3e2550c..07de0d0 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -19,27 +19,10 @@ subdirs-y += loaders bootblock-y += cbfs.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -bootblock-y += memset.c -endif bootblock-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -bootblock-y += memcpy.c -endif bootblock-y += memcmp.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -bootblock-y += memmove.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -romstage-y += memset.c -rmodules-y += memset.c -endif romstage-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -romstage-y += memcpy.c -rmodules-y += memcpy.c -endif romstage-y += memcmp.c rmodules-y += memcmp.c romstage-y += cbfs.c @@ -53,26 +36,14 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c endif romstage-y += compute_ip_checksum.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -romstage-y += memmove.c -endif romstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c ramstage-y += coreboot_table.c ramstage-y += bootmem.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -ramstage-y += memset.c -endif ramstage-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -ramstage-y += memcpy.c -endif ramstage-y += memcmp.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -ramstage-y += memmove.c -endif ramstage-y += malloc.c smm-$(CONFIG_SMM_TSEG) += malloc.c ramstage-y += delay.c @@ -114,15 +85,6 @@ ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += ramstage_cache.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -smm-y += memset.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -smm-y += memcpy.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -smm-y += memmove.c -endif smm-y += cbfs.c memcmp.c smm-y += gcc.c

1 0

Patch set updated for coreboot: f2c6035 Move redundant Makefile rules from arch to top level.
by Furquan Shaikh 28 Apr '14

28 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5571 -gerrit commit f2c6035623a1de0bc3efa6b13a4a49555bda2b7a Author: Furquan Shaikh <furquan(a)google.com> Date: Tue Apr 22 16:33:22 2014 -0700 Move redundant Makefile rules from arch to top level. Remove all the common Makefile rules like coreboot.pre, coreboot.pre1 and others from arch level Makefile.inc to top level Makefile.inc. Also, organize Makefile.inc at arch level into per-stage rules and variables. Change-Id: I7dc5b2d31c959b55bb92d9c7811427c4dada1db5 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile.inc | 157 +++++++++++++++++ src/arch/armv7/Makefile.inc | 264 +++++++++++----------------- src/arch/x86/Makefile.inc | 409 +++++++++++++++----------------------------- 3 files changed, 390 insertions(+), 440 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 72f3951..a552a42 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -408,3 +408,160 @@ crossgcc-clean: clean-for-update tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/rmodtool $(objutil)/nvramtool/nvramtool $(objutil)/romcc/romcc $(objutil)/sconfig/sconfig +######################################################################################################################################################################## +# Common recipes for all stages +######################################################################################################################################################################## + +$(objcbfs)/%.bin: $(objcbfs)/%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY) -O binary $< $@ + +$(objcbfs)/%.elf: $(objcbfs)/%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY) --strip-debug $@.tmp + $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + +######################################################################################################################################################################## +# Build the final rom image +######################################################################################################################################################################## + +COREBOOT_ROM_DEPENDENCIES:= +ifeq ($(CONFIG_PAYLOAD_ELF),y) +COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) +endif +ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) +COREBOOT_ROM_DEPENDENCIES+=seabios +endif +ifeq ($(CONFIG_PAYLOAD_FILO),y) +COREBOOT_ROM_DEPENDENCIES+=filo +endif +ifeq ($(CONFIG_PAYLOAD_GRUB2),y) +COREBOOT_ROM_DEPENDENCIES+=grub2 +endif + +extract_nth=$(word $(1), $(subst |, ,$(2))) + +ifneq ($(CONFIG_UPDATE_IMAGE),y) +prebuild-files = \ + $(foreach file,$(cbfs-files), \ + $(CBFSTOOL) $@.tmp \ + add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ + -f $(call extract_nth,1,$(file)) \ + -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ + $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) +prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) + +$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) + $(CBFSTOOL) $@.tmp create -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ + -B $(objcbfs)/bootblock.bin -a 64 \ + $(CBFSTOOL_PRE1_OPTS) + $(prebuild-files) true + $(call add-cpu-microcode-to-cbfs,$@.tmp) + mv $@.tmp $@ +else +.PHONY: $(obj)/coreboot.pre1 +$(obj)/coreboot.pre1: $(CBFSTOOL) + mv $(obj)/coreboot.rom $@ +endif + +ifeq ($(CONFIG_PAYLOAD_LINUX),y) +LINUX_ADDITIONAL_CONFIG:= +ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),) + LINUX_ADDITIONAL_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE) +endif +ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_INITRD))),) + LINUX_ADDITIONAL_CONFIG+=-I $(CONFIG_LINUX_INITRD) +endif +endif + +ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) +REFCODE_BLOB=$(obj)/refcode.rmod +$(REFCODE_BLOB): $(RMODTOOL) + $(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@ +endif + +$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB) + @printf " CBFS $(subst $(obj)/,,$(@))\n" + cp $(obj)/coreboot.pre $@.tmp + $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) +ifeq ($(CONFIG_PAYLOAD_NONE),y) + @printf " PAYLOAD none (as specified by user)\n" +endif +ifeq ($(CONFIG_PAYLOAD_ELF),y) + @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PAYLOAD_LINUX),y) + @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) $(LINUX_ADDITIONAL_CONFIG) +endif +ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) + @printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) +ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) + @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" + $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup +endif +endif +endif +ifeq ($(CONFIG_PAYLOAD_FILO),y) + @printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PAYLOAD_GRUB2),y) + @printf " PAYLOAD GRUB2 (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y) + @printf " PAYLOAD Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" + $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) + @printf " CONFIG $(DOTCONFIG)\n" + if [ -f $(DOTCONFIG) ]; then \ + echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ + sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ + $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi +endif +ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) + $(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) + $(CBFSTOOL) $@.tmp add-stage -f $(REFCODE_BLOB) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG) +endif +ifeq ($(CONFIG_PXE_ROM),y) + $(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw +endif +ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) +ifeq ($(CONFIG_CPU_MICROCODE_IN_CBFS),y) + @printf " UPDATE-FIT \n" + $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) +endif +endif + mv $@.tmp $@ + @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" + $(CBFSTOOL) $@ print + +cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg +bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) +bootsplash.jpg-type := bootsplash + +ifeq ($(CONFIG_ARCH_ARMV7),y) +ROMSTAGE_ELF := romstage.elf +endif +ifeq ($(CONFIG_ARCH_X86),y) +ROMSTAGE_ELF := romstage_xip.elf +endif + +$(obj)/coreboot.pre: $(objcbfs)/$(ROMSTAGE_ELF) $(obj)/coreboot.pre1 $(CBFSTOOL) + @printf " CBFS $(subst $(obj)/,,$(@))\n" + cp $(obj)/coreboot.pre1 $@.tmp + $(CBFSTOOL) $@.tmp add-stage \ + -f $(objcbfs)/$(ROMSTAGE_ELF) \ + -n $(CONFIG_CBFS_PREFIX)/romstage -c none \ + $(CBFSTOOL_PRE_OPTS) + mv $@.tmp $@ diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index 6395b0c..a419dcd 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -22,91 +22,18 @@ ## ################################################################################ +################################################################################ # Take care of subdirectories +################################################################################ subdirs-y += boot/ subdirs-y += lib/ ################################################################################ -# Build the final rom image -COREBOOT_ROM_DEPENDENCIES:= -ifeq ($(CONFIG_PAYLOAD_ELF),y) -COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) -endif - -extract_nth=$(word $(1), $(subst |, ,$(2))) - -ifneq ($(CONFIG_UPDATE_IMAGE),y) -prebuild-files = \ - $(foreach file,$(cbfs-files), \ - $(CBFSTOOL) $@.tmp \ - add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ - -f $(call extract_nth,1,$(file)) \ - -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ - $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) -prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) - -# TODO Change -b to Kconfig variable. -$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $(objcbfs)/romstage.elf $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) - $(CBFSTOOL) $@.tmp create -m armv7 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ - -B $(objcbfs)/bootblock.bin -a 64 \ - -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) \ - -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) \ - -o $(CONFIG_CBFS_ROM_OFFSET) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - $(CBFSTOOL) $@.tmp add-stage \ - -f $(objcbfs)/romstage.elf -b 0 \ - -n $(CONFIG_CBFS_PREFIX)/romstage -c none - $(prebuild-files) true - $(call add-cpu-microcode-to-cbfs,$@.tmp) - mv $@.tmp $@ -else -.PHONY: $(obj)/coreboot.pre -$(obj)/coreboot.pre: $(CBFSTOOL) - mv $(obj)/coreboot.rom $@ -endif - -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) -ifeq ($(CONFIG_PAYLOAD_NONE),y) - @printf " PAYLOAD none (as specified by user)\n" -endif -ifeq ($(CONFIG_PAYLOAD_ELF),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_NAME))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) - @printf " CONFIG $(DOTCONFIG)\n" - if [ -f $(DOTCONFIG) ]; then \ - echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ - sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ - $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi -endif - mv $@.tmp $@ - @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" - $(CBFSTOOL) $@ print - -bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) -bootsplash.jpg-type := bootsplash - +# ARM specific options ################################################################################ -# armv7 specific tools -################################################################################ -# Common recipes for all stages - -$(objcbfs)/%.bin: $(objcbfs)/%.elf - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ - -$(objcbfs)/%.elf: $(objcbfs)/%.debug - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp - mv $@.tmp $@ +CBFSTOOL_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) +CBFSTOOL_PRE_OPTS = -b 0 stages_c = $(src)/arch/armv7/stages.c stages_o = $(obj)/arch/armv7/stages.o @@ -115,26 +42,6 @@ $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -I. $(INCLUDES) -c -o $@ $< -marm - -################################################################################ -# Build the ramstage (stage 2) - -$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< -endif - -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group -else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - CFLAGS += \ -ffixed-r8\ -march=armv7-a\ @@ -143,82 +50,16 @@ CFLAGS += \ -mthumb\ -mthumb-interwork -ldscripts = -ldscripts += $(src)/arch/armv7/romstage.ld - -#crt0s += $(src)/cpu/arm/fpu_enable.inc -# FIXME: CONFIG_NEON or something similar for ARM? -#ifeq ($(CONFIG_SSE),y) -#crt0s += $(src)/cpu/arm/sse_enable.inc -#endif - -crt0s += $(cpu_incs) -crt0s += $(cpu_incs-y) - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ - -# Things that appear in every board -ramstage-y += exception.c -ramstage-y += exception_asm.S +################################################################################ +# Bootblock +################################################################################ bootblock-y += cache.c - -romstage-y += cache.c -romstage-y += div0.c - -ramstage-y += div0.c -#ramstage-y += interrupts.c -ramstage-y += cache.c -ramstage-y += mmu.c - -romstage-y += eabi_compat.c -ramstage-y += eabi_compat.c bootblock-y += eabi_compat.c - -ramstage-y += boot.c -ramstage-y += tables.c - -romstage-y += memset.S -ramstage-y += memset.S bootblock-y += memset.S -romstage-y += memcpy.S -ramstage-y += memcpy.S bootblock-y += memcpy.S -romstage-y += memmove.S -ramstage-y += memmove.S bootblock-y += memmove.S -romstage-srcs += $(objgenerated)/crt0.s -ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) -ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c -endif -ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c -endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl -# make doesn't have arithmetic operators or greater-than comparisons -ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl -endif -ifeq ($(CONFIG_ACPI_SSDTX_NUM),5) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl -endif -endif - -ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c -endif - -################################################################################ -# Build the bootblock - bootblock_lds = $(src)/arch/armv7/bootblock.lds bootblock_lds += $(chipset_bootblock_lds) @@ -262,6 +103,30 @@ else endif ################################################################################ +# Romstage +################################################################################ + +romstage-y += cache.c +romstage-y += div0.c +romstage-y += eabi_compat.c +romstage-y += memset.S +romstage-y += memcpy.S +romstage-y += memmove.S +romstage-srcs += $(objgenerated)/crt0.s + +ldscripts = +ldscripts += $(src)/arch/armv7/romstage.ld + + +#crt0s += $(src)/cpu/arm/fpu_enable.inc +# FIXME: CONFIG_NEON or something similar for ARM? +#ifeq ($(CONFIG_SSE),y) +#crt0s += $(src)/cpu/arm/sse_enable.inc +#endif + +crt0s += $(cpu_incs) +crt0s += $(cpu_incs-y) + # Build the romstage $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @@ -290,3 +155,68 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h + @printf " CC romstage.inc\n" + $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +################################################################################ +# Ramstage +################################################################################ + +# Things that appear in every board +ramstage-y += exception.c +ramstage-y += exception_asm.S +ramstage-y += div0.c +#ramstage-y += interrupts.c +ramstage-y += cache.c +ramstage-y += mmu.c +ramstage-y += eabi_compat.c +ramstage-y += boot.c +ramstage-y += tables.c +ramstage-y += memset.S +ramstage-y += memcpy.S +ramstage-y += memmove.S +ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) + +# Build the ramstage (stage 2) + +$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld +else + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< +endif + +$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group +else + $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +endif + +ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c +endif +ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c +endif +ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl +# make doesn't have arithmetic operators or greater-than comparisons +ifeq ($(subst 5,4,$(CONFIG_ACPI_SSDTX_NUM)),4) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl +endif +ifeq ($(CONFIG_ACPI_SSDTX_NUM),5) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl +endif +endif + +ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c +endif + diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index db8e500..79caabd 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -21,7 +21,9 @@ ## ################################################################################ +################################################################################ # Take care of subdirectories +################################################################################ subdirs-y += boot # subdirs-y += init subdirs-y += lib @@ -42,128 +44,6 @@ cmos_layout.bin-type = 0x01aa OPTION_TABLE_H:=$(obj)/option_table.h endif -################################################################################ -# Build the final rom image -COREBOOT_ROM_DEPENDENCIES:= -ifeq ($(CONFIG_PAYLOAD_ELF),y) -COREBOOT_ROM_DEPENDENCIES+=$(CONFIG_PAYLOAD_FILE) -endif -ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) -COREBOOT_ROM_DEPENDENCIES+=seabios -endif -ifeq ($(CONFIG_PAYLOAD_FILO),y) -COREBOOT_ROM_DEPENDENCIES+=filo -endif -ifeq ($(CONFIG_PAYLOAD_GRUB2),y) -COREBOOT_ROM_DEPENDENCIES+=grub2 -endif - -extract_nth=$(word $(1), $(subst |, ,$(2))) - -ifneq ($(CONFIG_UPDATE_IMAGE),y) -prebuild-files = \ - $(foreach file,$(cbfs-files), \ - $(CBFSTOOL) $@.tmp \ - add$(if $(filter stage,$(call extract_nth,3,$(file))),-stage)$(if $(filter payload,$(call extract_nth,3,$(file))),-payload) \ - -f $(call extract_nth,1,$(file)) \ - -n $(call extract_nth,2,$(file)) $(if $(filter-out stage,$(call extract_nth,3,$(file))),-t $(call extract_nth,3,$(file))) \ - $(if $(call extract_nth,4,$(file)),-b $(call extract_nth,4,$(file))) &&) -prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file))) - -$(obj)/coreboot.pre1: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) - $(CBFSTOOL) $@.tmp create -m x86 -s $(CONFIG_COREBOOT_ROMSIZE_KB)K \ - -B $(objcbfs)/bootblock.bin -a 64 \ - -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) - $(prebuild-files) true - $(call add-cpu-microcode-to-cbfs,$@.tmp) - mv $@.tmp $@ -else -.PHONY: $(obj)/coreboot.pre1 -$(obj)/coreboot.pre1: $(CBFSTOOL) - mv $(obj)/coreboot.rom $@ -endif - -ifeq ($(CONFIG_PAYLOAD_LINUX),y) -LINUX_ADDITIONAL_CONFIG:= -ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_COMMAND_LINE))),) - LINUX_ADDITIONAL_CONFIG+=-C $(CONFIG_LINUX_COMMAND_LINE) -endif -ifneq ($(strip $(call strip_quotes,$(CONFIG_LINUX_INITRD))),) - LINUX_ADDITIONAL_CONFIG+=-I $(CONFIG_LINUX_INITRD) -endif -endif - -ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) -REFCODE_BLOB=$(obj)/refcode.rmod -$(REFCODE_BLOB): $(RMODTOOL) - $(RMODTOOL) -i $(CONFIG_REFCODE_BLOB_FILE) -o $@ -endif - -$(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/ramstage.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB) $(REFCODE_BLOB) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/ramstage.elf -n $(CONFIG_CBFS_PREFIX)/ramstage -c $(CBFS_COMPRESS_FLAG) -ifeq ($(CONFIG_PAYLOAD_NONE),y) - @printf " PAYLOAD none (as specified by user)\n" -endif -ifeq ($(CONFIG_PAYLOAD_ELF),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_PAYLOAD_LINUX),y) - @printf " PAYLOAD $(CONFIG_PAYLOAD_FILE) (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) $(LINUX_ADDITIONAL_CONFIG) -endif -ifeq ($(CONFIG_PAYLOAD_SEABIOS),y) - @printf " PAYLOAD SeaBIOS (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),) -ifneq ($(CONFIG_SEABIOS_PS2_TIMEOUT),0) - @printf " SeaBIOS Wait up to $(CONFIG_SEABIOS_PS2_TIMEOUT) ms for PS/2 keyboard controller initialization\n" - $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_PS2_TIMEOUT) -n etc/ps2-keyboard-spinup -endif -endif -endif -ifeq ($(CONFIG_PAYLOAD_FILO),y) - @printf " PAYLOAD FILO (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif - -ifeq ($(CONFIG_PAYLOAD_GRUB2),y) - @printf " PAYLOAD GRUB2 (internal, compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif - -ifeq ($(CONFIG_PAYLOAD_TIANOCORE),y) - @printf " PAYLOAD Tiano Core (compression: $(CBFS_PAYLOAD_COMPRESS_FLAG))\n" - $(CBFSTOOL) $@.tmp add-payload -f $(CONFIG_PAYLOAD_FILE) -n $(CONFIG_CBFS_PREFIX)/payload -c $(CBFS_PAYLOAD_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_INCLUDE_CONFIG_FILE),y) - @printf " CONFIG $(DOTCONFIG)\n" - if [ -f $(DOTCONFIG) ]; then \ - echo "# This image was built using git revision" `git rev-parse HEAD` > $(obj)/config.tmp ; \ - sed -e '/^#/d' -e '/^ *$$/d' $(DOTCONFIG) >> $(obj)/config.tmp ; \ - $(CBFSTOOL) $@.tmp add -f $(obj)/config.tmp -n config -t raw; rm -f $(obj)/config.tmp ; fi -endif -ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) - $(CBFSTOOL) $@.tmp add-stage -f $(VBOOT_STUB) -n $(CONFIG_CBFS_PREFIX)/vboot -c $(CBFS_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_HAVE_REFCODE_BLOB),y) - $(CBFSTOOL) $@.tmp add-stage -f $(CONFIG_REFCODE_BLOB_FILE) -n $(CONFIG_CBFS_PREFIX)/refcode -c $(CBFS_COMPRESS_FLAG) -endif -ifeq ($(CONFIG_PXE_ROM),y) - $(CBFSTOOL) $@.tmp add -f $(CONFIG_PXE_ROM_FILE) -n pci$(CONFIG_PXE_ROM_ID).rom -t raw -endif -ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) -ifeq ($(CONFIG_CPU_MICROCODE_ADDED_DURING_BUILD),y) - @printf " UPDATE-FIT \n" - $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -endif -endif - mv $@.tmp $@ - @printf " CBFSPRINT $(subst $(obj)/,,$(@))\n\n" - $(CBFSTOOL) $@ print - stripped_vgabios_id = $(call strip_quotes,$(CONFIG_VGA_BIOS_ID)) cbfs-files-$(CONFIG_VGA_BIOS) += pci$(stripped_vgabios_id).rom pci$(stripped_vgabios_id).rom-file := $(call strip_quotes,$(CONFIG_VGA_BIOS_FILE)) @@ -173,9 +53,8 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE)) mbi.bin-type := mbi -cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg -bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) -bootsplash.jpg-type := bootsplash +CBFSTOOL_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) +CBFSTOOL_PRE_OPTS = -b $(shell cat $(objcbfs)/base_xip.txt) ################################################################################ # i386 specific tools @@ -189,158 +68,11 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l @printf " OPTION $(subst $(obj)/,,$(@))\n" $(NVRAMTOOL) -y $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.layout -L $@ -################################################################################ -# Common recipes for all stages - -$(objcbfs)/%.bin: $(objcbfs)/%.elf - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ - -$(objcbfs)/%.elf: $(objcbfs)/%.debug - @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp - mv $@.tmp $@ ################################################################################ -# Build the ramstage (stage 2) - -ramstage-libs ?= - -ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y) - -$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE))) - -# The rmodule_link defintion creates an elf file with .rmod extension. -$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod - cp $< $@ - -else - -$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld -else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< -endif - -endif - -$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) - @printf " CC $(subst $(obj)/,,$(@))\n" -ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group -else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group -endif - +# Bootblock ################################################################################ -# done - -crt0s = $(src)/arch/x86/init/prologue.inc -ldscripts = -ldscripts += $(src)/arch/x86/init/romstage.ld -crt0s += $(src)/cpu/x86/32bit/entry32.inc -ldscripts += $(src)/cpu/x86/32bit/entry32.lds - -crt0s += $(src)/cpu/x86/fpu_enable.inc -ifeq ($(CONFIG_SSE),y) -crt0s += $(src)/cpu/x86/sse_enable.inc -endif - -crt0s += $(cpu_incs) -crt0s += $(cpu_incs-y) - -crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc - -ifeq ($(CONFIG_ROMCC),y) -crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc -endif - -ifeq ($(CONFIG_ROMCC),y) -ifeq ($(CONFIG_MMX),y) - ifeq ($(CONFIG_SSE),y) - ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE - else - ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE - endif -else - ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE -endif - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ -else - -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h - @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ -$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc - @printf " POST romstage.inc\n" - sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \ - -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp - mv $@.tmp $@ -endif - -# Things that appear in every board -romstage-srcs += $(objgenerated)/crt0.s -ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) -ifeq ($(CONFIG_GENERATE_MP_TABLE),y) -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c -endif -endif -ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c -endif -ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c -endif -endif -ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),) -smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c -endif -endif -ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),) -ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c -endif - -################################################################################ -# Build the final rom image - -$(obj)/coreboot.pre: $(objcbfs)/romstage_xip.elf $(obj)/coreboot.pre1 $(CBFSTOOL) - @printf " CBFS $(subst $(obj)/,,$(@))\n" - cp $(obj)/coreboot.pre1 $@.tmp - $(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/romstage_xip.elf \ - -n $(CONFIG_CBFS_PREFIX)/romstage -c none \ - -b $(shell cat $(objcbfs)/base_xip.txt) - mv $@.tmp $@ - -################################################################################ # Build the bootblock bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb @@ -404,6 +136,58 @@ else endif ################################################################################ +# Romstage +################################################################################ + +crt0s = $(src)/arch/x86/init/prologue.inc +ldscripts = +ldscripts += $(src)/arch/x86/init/romstage.ld +crt0s += $(src)/cpu/x86/32bit/entry32.inc +ldscripts += $(src)/cpu/x86/32bit/entry32.lds + +crt0s += $(src)/cpu/x86/fpu_enable.inc +ifeq ($(CONFIG_SSE),y) +crt0s += $(src)/cpu/x86/sse_enable.inc +endif + +crt0s += $(cpu_incs) +crt0s += $(cpu_incs-y) + +crt0s += $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc + +ifeq ($(CONFIG_ROMCC),y) +crt0s += $(src)/arch/x86/init/crt0_romcc_epilogue.inc +endif + +ifeq ($(CONFIG_ROMCC),y) +ifeq ($(CONFIG_MMX),y) + ifeq ($(CONFIG_SSE),y) + ROMCCFLAGS := -mcpu=p4 -O2 # MMX, SSE + else + ROMCCFLAGS := -mcpu=p2 -O2 # MMX, !SSE + endif +else + ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE +endif + +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h + printf " ROMCC romstage.inc\n" + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ +else + +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h + @printf " CC romstage.inc\n" + $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +$(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc + @printf " POST romstage.inc\n" + sed -e 's/\.rodata/.rom.data/g' -e 's/\^\.text/.section .rom.text/g' \ + -e 's/\^\.section \.text/.section .rom.text/g' $^ > $@.tmp + mv $@.tmp $@ +endif + +romstage-srcs += $(objgenerated)/crt0.s + # Build the romstage romstage-libs ?= @@ -460,6 +244,85 @@ $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/b @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ +################################################################################ +# Ramstage +################################################################################ + +ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) +ifeq ($(CONFIG_GENERATE_MP_TABLE),y) +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/mptable.c +endif +endif +ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/irq_tables.c +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/reset.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c +endif +ifeq ($(CONFIG_GENERATE_ACPI_TABLES),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/acpi_tables.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/dsdt.asl +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt2.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt2.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt3.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt3.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt4.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt4.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/ssdt5.asl),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/ssdt5.asl +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/fadt.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/fadt.c +endif +endif +ifeq ($(CONFIG_HAVE_SMI_HANDLER),y) +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/smihandler.c),) +smm-srcs += src/mainboard/$(MAINBOARDDIR)/smihandler.c +endif +endif +ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c),) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c +endif + +# Build the ramstage (stage 2) + +ramstage-libs ?= + +ifeq ($(CONFIG_RELOCATABLE_RAMSTAGE),y) + +$(eval $(call rmodule_link,$(objcbfs)/ramstage.debug, $(objgenerated)/ramstage.o, $(CONFIG_HEAP_SIZE))) + +# The rmodule_link defintion creates an elf file with .rmod extension. +$(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod + cp $< $@ + +else + +$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld +else + $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< +endif + +endif + +$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) + @printf " CC $(subst $(obj)/,,$(@))\n" +ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) + $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group +else + $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group +endif + + +################################################################################ + seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \

1 0

Patch set updated for coreboot: cb3e094 Move ARCH_* from board/Kconfig to cpu or soc Kconfig.
by Furquan Shaikh 28 Apr '14

28 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5570 -gerrit commit cb3e094737c1fec25b584de6f1177d3e92ab2865 Author: Furquan Shaikh <furquan(a)google.com> Date: Tue Apr 22 15:16:54 2014 -0700 Move ARCH_* from board/Kconfig to cpu or soc Kconfig. CONFIG_ARCH is a property of the cpu or soc rather than a property of the board. Hence, move ARCH_* from every single board to respective cpu or soc Kconfigs. Also update abuild to ignore ARCH_ from mainboards. Change-Id: I6ec1206de5a20601c32d001a384a47f46e6ce479 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/cpu/Kconfig | 7 +-- src/cpu/allwinner/a10/Kconfig | 1 + src/cpu/amd/agesa/Kconfig | 1 + src/cpu/amd/geode_gx1/Kconfig | 1 + src/cpu/amd/geode_gx2/Kconfig | 1 + src/cpu/amd/geode_lx/Kconfig | 1 + src/cpu/amd/model_10xxx/Kconfig | 1 + src/cpu/amd/model_fxx/Kconfig | 1 + src/cpu/amd/sc520/Kconfig | 1 + src/cpu/armltd/cortex-a9/Kconfig | 2 +- src/cpu/dmp/vortex86ex/Kconfig | 1 + src/cpu/intel/ep80579/Kconfig | 1 + src/cpu/intel/fsp_model_206ax/Kconfig | 1 + src/cpu/intel/haswell/Kconfig | 1 + src/cpu/intel/model_1067x/Kconfig | 1 + src/cpu/intel/model_106cx/Kconfig | 1 + src/cpu/intel/model_2065x/Kconfig | 1 + src/cpu/intel/model_206ax/Kconfig | 1 + src/cpu/intel/model_65x/Kconfig | 1 + src/cpu/intel/model_67x/Kconfig | 1 + src/cpu/intel/model_68x/Kconfig | 1 + src/cpu/intel/model_69x/Kconfig | 1 + src/cpu/intel/model_6bx/Kconfig | 1 + src/cpu/intel/model_6dx/Kconfig | 1 + src/cpu/intel/model_6ex/Kconfig | 1 + src/cpu/intel/model_6fx/Kconfig | 1 + src/cpu/intel/model_6xx/Kconfig | 1 + src/cpu/intel/model_f0x/Kconfig | 1 + src/cpu/intel/model_f1x/Kconfig | 1 + src/cpu/intel/model_f2x/Kconfig | 1 + src/cpu/intel/model_f3x/Kconfig | 1 + src/cpu/intel/model_f4x/Kconfig | 1 + src/cpu/qemu-x86/Kconfig | 1 + src/cpu/samsung/exynos5250/Kconfig | 2 +- src/cpu/samsung/exynos5420/Kconfig | 2 +- src/cpu/ti/am335x/Kconfig | 2 +- src/cpu/via/c3/Kconfig | 1 + src/cpu/via/c7/Kconfig | 1 + src/cpu/via/nano/Kconfig | 1 + src/mainboard/a-trend/atc-6220/Kconfig | 1 - src/mainboard/a-trend/atc-6240/Kconfig | 1 - src/mainboard/aaeon/pfm-540i_revb/Kconfig | 1 - src/mainboard/abit/be6-ii_v2_0/Kconfig | 1 - src/mainboard/advansus/a785e-i/Kconfig | 1 - src/mainboard/advantech/pcm-5820/Kconfig | 1 - src/mainboard/amd/bimini_fam10/Kconfig | 1 - src/mainboard/amd/db800/Kconfig | 1 - src/mainboard/amd/dbm690t/Kconfig | 1 - src/mainboard/amd/dinar/Kconfig | 1 - src/mainboard/amd/inagua/Kconfig | 1 - src/mainboard/amd/mahogany/Kconfig | 1 - src/mainboard/amd/mahogany_fam10/Kconfig | 1 - src/mainboard/amd/norwich/Kconfig | 1 - src/mainboard/amd/olivehill/Kconfig | 1 - src/mainboard/amd/parmer/Kconfig | 1 - src/mainboard/amd/persimmon/Kconfig | 1 - src/mainboard/amd/pistachio/Kconfig | 1 - src/mainboard/amd/rumba/Kconfig | 1 - src/mainboard/amd/serengeti_cheetah/Kconfig | 1 - src/mainboard/amd/serengeti_cheetah_fam10/Kconfig | 1 - src/mainboard/amd/south_station/Kconfig | 1 - src/mainboard/amd/thatcher/Kconfig | 1 - src/mainboard/amd/tilapia_fam10/Kconfig | 1 - src/mainboard/amd/torpedo/Kconfig | 1 - src/mainboard/amd/union_station/Kconfig | 1 - src/mainboard/aopen/dxplplusu/Kconfig | 1 - src/mainboard/arima/hdama/Kconfig | 1 - src/mainboard/artecgroup/dbe61/Kconfig | 1 - src/mainboard/asi/mb_5blgp/Kconfig | 1 - src/mainboard/asi/mb_5blmp/Kconfig | 1 - src/mainboard/asrock/939a785gmh/Kconfig | 1 - src/mainboard/asrock/e350m1/Kconfig | 1 - src/mainboard/asrock/imb-a180/Kconfig | 1 - src/mainboard/asus/a8n_e/Kconfig | 1 - src/mainboard/asus/a8n_sli/Kconfig | 1 - src/mainboard/asus/a8v-e_deluxe/Kconfig | 1 - src/mainboard/asus/a8v-e_se/Kconfig | 1 - src/mainboard/asus/dsbf/Kconfig | 1 - src/mainboard/asus/f2a85-m/Kconfig | 1 - src/mainboard/asus/k8v-x/Kconfig | 1 - src/mainboard/asus/m2n-e/Kconfig | 1 - src/mainboard/asus/m2v-mx_se/Kconfig | 1 - src/mainboard/asus/m2v/Kconfig | 1 - src/mainboard/asus/m4a78-em/Kconfig | 1 - src/mainboard/asus/m4a785-m/Kconfig | 1 - src/mainboard/asus/m4a785t-m/Kconfig | 1 - src/mainboard/asus/m5a88-v/Kconfig | 1 - src/mainboard/asus/mew-am/Kconfig | 1 - src/mainboard/asus/mew-vm/Kconfig | 1 - src/mainboard/asus/p2b-d/Kconfig | 1 - src/mainboard/asus/p2b-ds/Kconfig | 1 - src/mainboard/asus/p2b-f/Kconfig | 1 - src/mainboard/asus/p2b-ls/Kconfig | 1 - src/mainboard/asus/p2b/Kconfig | 1 - src/mainboard/asus/p3b-f/Kconfig | 1 - src/mainboard/avalue/eax-785e/Kconfig | 1 - src/mainboard/axus/tc320/Kconfig | 1 - src/mainboard/azza/pt-6ibd/Kconfig | 1 - src/mainboard/bachmann/ot200/Kconfig | 1 - src/mainboard/bcom/winnet100/Kconfig | 1 - src/mainboard/bcom/winnetp680/Kconfig | 1 - src/mainboard/biostar/m6tba/Kconfig | 1 - src/mainboard/broadcom/blast/Kconfig | 1 - src/mainboard/compaq/deskpro_en_sff_p600/Kconfig | 1 - src/mainboard/cubietech/cubieboard/Kconfig | 1 - src/mainboard/digitallogic/adl855pc/Kconfig | 1 - src/mainboard/digitallogic/msm586seg/Kconfig | 1 - src/mainboard/digitallogic/msm800sev/Kconfig | 1 - src/mainboard/dmp/vortex86ex/Kconfig | 1 - src/mainboard/eaglelion/5bcm/Kconfig | 1 - src/mainboard/ecs/p6iwp-fe/Kconfig | 1 - src/mainboard/emulation/qemu-armv7/Kconfig | 1 - src/mainboard/emulation/qemu-i440fx/Kconfig | 1 - src/mainboard/emulation/qemu-q35/Kconfig | 1 - src/mainboard/getac/p470/Kconfig | 1 - src/mainboard/gigabyte/ga-6bxc/Kconfig | 1 - src/mainboard/gigabyte/ga-6bxe/Kconfig | 1 - src/mainboard/gigabyte/ga_2761gxdk/Kconfig | 1 - src/mainboard/gigabyte/m57sli/Kconfig | 1 - src/mainboard/gigabyte/ma785gm/Kconfig | 1 - src/mainboard/gigabyte/ma785gmt/Kconfig | 1 - src/mainboard/gigabyte/ma78gm/Kconfig | 1 - src/mainboard/gizmosphere/gizmo/Kconfig | 1 - src/mainboard/google/bolt/Kconfig | 1 - src/mainboard/google/butterfly/Kconfig | 1 - src/mainboard/google/falco/Kconfig | 1 - src/mainboard/google/link/Kconfig | 1 - src/mainboard/google/parrot/Kconfig | 1 - src/mainboard/google/peppy/Kconfig | 1 - src/mainboard/google/pit/Kconfig | 1 - src/mainboard/google/rambi/Kconfig | 1 - src/mainboard/google/slippy/Kconfig | 1 - src/mainboard/google/snow/Kconfig | 1 - src/mainboard/google/stout/Kconfig | 1 - src/mainboard/hp/dl145_g1/Kconfig | 1 - src/mainboard/hp/dl145_g3/Kconfig | 1 - src/mainboard/hp/dl165_g6_fam10/Kconfig | 1 - src/mainboard/hp/e_vectra_p2706t/Kconfig | 1 - src/mainboard/hp/pavilion_m6_1035dx/Kconfig | 1 - src/mainboard/ibase/mb899/Kconfig | 1 - src/mainboard/ibm/e325/Kconfig | 1 - src/mainboard/ibm/e326/Kconfig | 1 - src/mainboard/iei/juki-511p/Kconfig | 1 - src/mainboard/iei/kino-780am2-fam10/Kconfig | 1 - src/mainboard/iei/nova4899r/Kconfig | 1 - src/mainboard/iei/pcisa-lx-800-r10/Kconfig | 1 - src/mainboard/iei/pm-lx-800-r11/Kconfig | 1 - src/mainboard/iei/pm-lx2-800-r10/Kconfig | 1 - src/mainboard/iei/rocky-512/Kconfig | 1 - src/mainboard/intel/baskingridge/Kconfig | 1 - src/mainboard/intel/cougar_canyon2/Kconfig | 1 - src/mainboard/intel/d810e2cb/Kconfig | 1 - src/mainboard/intel/d945gclf/Kconfig | 1 - src/mainboard/intel/eagleheights/Kconfig | 1 - src/mainboard/intel/emeraldlake2/Kconfig | 1 - src/mainboard/intel/jarrell/Kconfig | 1 - src/mainboard/intel/mtarvon/Kconfig | 1 - src/mainboard/intel/truxton/Kconfig | 1 - src/mainboard/intel/wtm2/Kconfig | 1 - src/mainboard/intel/xe7501devkit/Kconfig | 1 - src/mainboard/iwave/iWRainbowG6/Kconfig | 1 - src/mainboard/iwill/dk8_htx/Kconfig | 1 - src/mainboard/iwill/dk8s2/Kconfig | 1 - src/mainboard/iwill/dk8x/Kconfig | 1 - src/mainboard/jetway/j7f2/Kconfig | 1 - src/mainboard/jetway/j7f4k1g2e/Kconfig | 1 - src/mainboard/jetway/j7f4k1g5d/Kconfig | 1 - src/mainboard/jetway/nf81-t56n-lf/Kconfig | 1 - src/mainboard/jetway/pa78vm5/Kconfig | 1 - src/mainboard/kontron/986lcd-m/Kconfig | 1 - src/mainboard/kontron/kt690/Kconfig | 1 - src/mainboard/kontron/ktqm77/Kconfig | 1 - src/mainboard/lanner/em8510/Kconfig | 1 - src/mainboard/lenovo/t530/Kconfig | 1 - src/mainboard/lenovo/t60/Kconfig | 1 - src/mainboard/lenovo/x201/Kconfig | 1 - src/mainboard/lenovo/x230/Kconfig | 1 - src/mainboard/lenovo/x60/Kconfig | 1 - src/mainboard/linutop/linutop1/Kconfig | 1 - src/mainboard/lippert/frontrunner-af/Kconfig | 1 - src/mainboard/lippert/frontrunner/Kconfig | 1 - src/mainboard/lippert/hurricane-lx/Kconfig | 1 - src/mainboard/lippert/literunner-lx/Kconfig | 1 - src/mainboard/lippert/roadrunner-lx/Kconfig | 1 - src/mainboard/lippert/spacerunner-lx/Kconfig | 1 - src/mainboard/lippert/toucan-af/Kconfig | 1 - src/mainboard/mitac/6513wu/Kconfig | 1 - src/mainboard/msi/ms6119/Kconfig | 1 - src/mainboard/msi/ms6147/Kconfig | 1 - src/mainboard/msi/ms6156/Kconfig | 1 - src/mainboard/msi/ms6178/Kconfig | 1 - src/mainboard/msi/ms7135/Kconfig | 1 - src/mainboard/msi/ms7260/Kconfig | 1 - src/mainboard/msi/ms9185/Kconfig | 1 - src/mainboard/msi/ms9282/Kconfig | 1 - src/mainboard/msi/ms9652_fam10/Kconfig | 1 - src/mainboard/nec/powermate2000/Kconfig | 1 - src/mainboard/newisys/khepri/Kconfig | 1 - src/mainboard/nokia/ip530/Kconfig | 1 - src/mainboard/nvidia/l1_2pvv/Kconfig | 1 - src/mainboard/pcengines/alix1c/Kconfig | 1 - src/mainboard/pcengines/alix2c/Kconfig | 1 - src/mainboard/pcengines/alix2d/Kconfig | 1 - src/mainboard/pcengines/alix6/Kconfig | 1 - src/mainboard/rca/rm4100/Kconfig | 1 - src/mainboard/roda/rk886ex/Kconfig | 1 - src/mainboard/roda/rk9/Kconfig | 1 - src/mainboard/samsung/lumpy/Kconfig | 1 - src/mainboard/samsung/stumpy/Kconfig | 1 - src/mainboard/siemens/sitemp_g1p1/Kconfig | 1 - src/mainboard/soyo/sy-6ba-plus-iii/Kconfig | 1 - src/mainboard/sunw/ultra40/Kconfig | 1 - src/mainboard/supermicro/h8dme/Kconfig | 1 - src/mainboard/supermicro/h8dmr/Kconfig | 1 - src/mainboard/supermicro/h8dmr_fam10/Kconfig | 1 - src/mainboard/supermicro/h8qgi/Kconfig | 1 - src/mainboard/supermicro/h8qme_fam10/Kconfig | 1 - src/mainboard/supermicro/h8scm/Kconfig | 1 - src/mainboard/supermicro/h8scm_fam10/Kconfig | 1 - src/mainboard/supermicro/x6dai_g/Kconfig | 1 - src/mainboard/supermicro/x6dhe_g/Kconfig | 1 - src/mainboard/supermicro/x6dhe_g2/Kconfig | 1 - src/mainboard/supermicro/x6dhr_ig/Kconfig | 1 - src/mainboard/supermicro/x6dhr_ig2/Kconfig | 1 - src/mainboard/supermicro/x7db8/Kconfig | 1 - src/mainboard/technexion/tim5690/Kconfig | 1 - src/mainboard/technexion/tim8690/Kconfig | 1 - src/mainboard/technologic/ts5300/Kconfig | 1 - src/mainboard/televideo/tc7020/Kconfig | 1 - src/mainboard/thomson/ip1000/Kconfig | 1 - src/mainboard/ti/beaglebone/Kconfig | 1 - src/mainboard/traverse/geos/Kconfig | 1 - src/mainboard/tyan/s1846/Kconfig | 1 - src/mainboard/tyan/s2735/Kconfig | 1 - src/mainboard/tyan/s2850/Kconfig | 1 - src/mainboard/tyan/s2875/Kconfig | 1 - src/mainboard/tyan/s2880/Kconfig | 1 - src/mainboard/tyan/s2881/Kconfig | 1 - src/mainboard/tyan/s2882/Kconfig | 1 - src/mainboard/tyan/s2885/Kconfig | 1 - src/mainboard/tyan/s2891/Kconfig | 1 - src/mainboard/tyan/s2892/Kconfig | 1 - src/mainboard/tyan/s2895/Kconfig | 1 - src/mainboard/tyan/s2912/Kconfig | 1 - src/mainboard/tyan/s2912_fam10/Kconfig | 1 - src/mainboard/tyan/s4880/Kconfig | 1 - src/mainboard/tyan/s4882/Kconfig | 1 - src/mainboard/tyan/s8226/Kconfig | 1 - src/mainboard/via/epia-cn/Kconfig | 1 - src/mainboard/via/epia-m/Kconfig | 1 - src/mainboard/via/epia-m700/Kconfig | 1 - src/mainboard/via/epia-m850/Kconfig | 1 - src/mainboard/via/epia-mii/Kconfig | 1 - src/mainboard/via/epia-ml/Kconfig | 1 - src/mainboard/via/epia-n/Kconfig | 1 - src/mainboard/via/epia/Kconfig | 1 - src/mainboard/via/pc2500e/Kconfig | 1 - src/mainboard/via/vt8454c/Kconfig | 1 - src/mainboard/winent/mb6047/Kconfig | 1 - src/mainboard/winent/pl6064/Kconfig | 1 - src/mainboard/wyse/s50/Kconfig | 1 - src/soc/Kconfig | 2 - src/soc/intel/baytrail/Kconfig | 1 + util/abuild/abuild | 75 +---------------------- 264 files changed, 42 insertions(+), 307 deletions(-) diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index bf5ce8e..6fced37 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -1,17 +1,12 @@ # Warning: This file is included whether or not the if is here. # The if controls how the evaluation occurs. # (See also src/Kconfig) -if ARCH_ARMV7 source src/cpu/allwinner/Kconfig source src/cpu/armltd/Kconfig source src/cpu/samsung/Kconfig source src/cpu/ti/Kconfig -endif # ARCH_ARM - -if ARCH_X86 - source src/cpu/amd/Kconfig source src/cpu/dmp/Kconfig source src/cpu/intel/Kconfig @@ -19,6 +14,8 @@ source src/cpu/via/Kconfig source src/cpu/qemu-x86/Kconfig source src/cpu/x86/Kconfig +if ARCH_X86 + config CACHE_AS_RAM bool default !ROMCC diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index 267e1f4..f76a7b6 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -6,6 +6,7 @@ if CPU_ALLWINNER_A10 config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index a73c5ce..fa36f38 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -26,6 +26,7 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_TN default y if CPU_AMD_AGESA_FAMILY16_KB default n + select ARCH_X86 select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER diff --git a/src/cpu/amd/geode_gx1/Kconfig b/src/cpu/amd/geode_gx1/Kconfig index fa1d052..b87e8bc 100644 --- a/src/cpu/amd/geode_gx1/Kconfig +++ b/src/cpu/amd/geode_gx1/Kconfig @@ -19,6 +19,7 @@ config CPU_AMD_GEODE_GX1 bool + select ARCH_X86 if CPU_AMD_GEODE_GX1 diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig index fe5a291..b96c770 100644 --- a/src/cpu/amd/geode_gx2/Kconfig +++ b/src/cpu/amd/geode_gx2/Kconfig @@ -19,6 +19,7 @@ config CPU_AMD_GEODE_GX2 bool + select ARCH_X86 if CPU_AMD_GEODE_GX2 diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index ac59c3f..6aceab2 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -1,5 +1,6 @@ config CPU_AMD_GEODE_LX bool + select ARCH_X86 if CPU_AMD_GEODE_LX diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index bc20219..30c2486 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,5 +1,6 @@ config CPU_AMD_MODEL_10XXX bool + select ARCH_X86 select SSE select SSE2 select MMCONF_SUPPORT_DEFAULT diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 2ea381e..1a811f4 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,5 +1,6 @@ config CPU_AMD_MODEL_FXX bool + select ARCH_X86 select MMX select SSE select SSE2 diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig index 6d9494e..46377be 100644 --- a/src/cpu/amd/sc520/Kconfig +++ b/src/cpu/amd/sc520/Kconfig @@ -1,2 +1,3 @@ config CPU_AMD_SC520 bool + select ARCH_X86 diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig index 04861a6..f46c6ff 100644 --- a/src/cpu/armltd/cortex-a9/Kconfig +++ b/src/cpu/armltd/cortex-a9/Kconfig @@ -1,6 +1,6 @@ config CPU_ARMLTD_CORTEX_A9 - depends on ARCH_ARMV7 bool + select ARCH_ARMV7 select EARLY_CONSOLE default n diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig index 54db4e0..aea8889 100644 --- a/src/cpu/dmp/vortex86ex/Kconfig +++ b/src/cpu/dmp/vortex86ex/Kconfig @@ -19,4 +19,5 @@ config CPU_DMP_VORTEX86EX bool + select ARCH_X86 select UDELAY_TSC diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig index 380869a..fa96f8d 100644 --- a/src/cpu/intel/ep80579/Kconfig +++ b/src/cpu/intel/ep80579/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_EP80579 bool + select ARCH_X86 select SSE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 6a008bf..22d01e6 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -28,6 +28,7 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index b13d686..97309ae 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -6,6 +6,7 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select BACKUP_DEFAULT_SMM_REGION select SMP select SSE2 diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 7d5bf94..4d6add6 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,5 +1,6 @@ config CPU_INTEL_MODEL_1067X bool + select ARCH_X86 select SMP select SSE2 select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index c438008..ea6f5ca 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -1,5 +1,6 @@ config CPU_INTEL_MODEL_106CX bool + select ARCH_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index bbb4eb1..4c7456d 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -5,6 +5,7 @@ if CPU_INTEL_MODEL_2065X config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select SMP select SSE select SSE2 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 90af45d..64b2a0a 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -8,6 +8,7 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index e8f0767..b3fa7bd 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_65X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 74ef8d5..7558bc2 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_67X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 9d9983e..670163a 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -20,5 +20,6 @@ config CPU_INTEL_MODEL_68X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_69x/Kconfig b/src/cpu/intel/model_69x/Kconfig index 4e88979..e4a0e6c 100644 --- a/src/cpu/intel/model_69x/Kconfig +++ b/src/cpu/intel/model_69x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_69X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 26b5995..4dc6fe6 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_6BX bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig index 546d9ec..e6d5f1e 100644 --- a/src/cpu/intel/model_6dx/Kconfig +++ b/src/cpu/intel/model_6dx/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_6DX bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index 8187838..eee864d 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -1,5 +1,6 @@ config CPU_INTEL_MODEL_6EX bool + select ARCH_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index 3335a26..b8de303 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,5 +1,6 @@ config CPU_INTEL_MODEL_6FX bool + select ARCH_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index b572385..49cfe2d 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_6XX bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig index 0616589..2ed68d1 100644 --- a/src/cpu/intel/model_f0x/Kconfig +++ b/src/cpu/intel/model_f0x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_F0X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig index fd64920..3bdb7f6 100644 --- a/src/cpu/intel/model_f1x/Kconfig +++ b/src/cpu/intel/model_f1x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_F1X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 8483d33..62393a8 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_F2X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 8ae2dcf..5c9d0a3 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_F3X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index c21a274..849dcd0 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,4 +1,5 @@ config CPU_INTEL_MODEL_F4X bool + select ARCH_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index 6c5c3fd..e54e4db 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,3 +19,4 @@ config CPU_QEMU_X86 bool + select ARCH_X86 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 9320184..b8042e3 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -1,5 +1,5 @@ config CPU_SAMSUNG_EXYNOS5250 - depends on ARCH_ARMV7 + select ARCH_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 5f78cc5..6207adf 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -1,5 +1,5 @@ config CPU_SAMSUNG_EXYNOS5420 - depends on ARCH_ARMV7 + select ARCH_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index fdc5824..22a02ad 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -1,5 +1,5 @@ config CPU_TI_AM335X - depends on ARCH_ARMV7 + select ARCH_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig index 259a1f2..566f07c 100644 --- a/src/cpu/via/c3/Kconfig +++ b/src/cpu/via/c3/Kconfig @@ -5,6 +5,7 @@ if CPU_VIA_C3 config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select UDELAY_TSC select MMX select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig index ebbb8f9..d5f1a41 100644 --- a/src/cpu/via/c7/Kconfig +++ b/src/cpu/via/c7/Kconfig @@ -5,6 +5,7 @@ if CPU_VIA_C7 config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig index 674c0f3..0f4f994 100644 --- a/src/cpu/via/nano/Kconfig +++ b/src/cpu/via/nano/Kconfig @@ -24,6 +24,7 @@ if CPU_VIA_NANO config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/mainboard/a-trend/atc-6220/Kconfig b/src/mainboard/a-trend/atc-6220/Kconfig index 81c23a8..036d8e6 100644 --- a/src/mainboard/a-trend/atc-6220/Kconfig +++ b/src/mainboard/a-trend/atc-6220/Kconfig @@ -20,7 +20,6 @@ if BOARD_A_TREND_ATC_6220 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/a-trend/atc-6240/Kconfig b/src/mainboard/a-trend/atc-6240/Kconfig index da94c7f..d19f92d 100644 --- a/src/mainboard/a-trend/atc-6240/Kconfig +++ b/src/mainboard/a-trend/atc-6240/Kconfig @@ -20,7 +20,6 @@ if BOARD_A_TREND_ATC_6240 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/aaeon/pfm-540i_revb/Kconfig b/src/mainboard/aaeon/pfm-540i_revb/Kconfig index 9986987..6b156b2 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/Kconfig +++ b/src/mainboard/aaeon/pfm-540i_revb/Kconfig @@ -2,7 +2,6 @@ if BOARD_AAEON_PFM_540I_REVB config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/abit/be6-ii_v2_0/Kconfig b/src/mainboard/abit/be6-ii_v2_0/Kconfig index feb00de..5dc1ca0 100644 --- a/src/mainboard/abit/be6-ii_v2_0/Kconfig +++ b/src/mainboard/abit/be6-ii_v2_0/Kconfig @@ -20,7 +20,6 @@ if BOARD_ABIT_BE6_II_V2_0 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/advansus/a785e-i/Kconfig b/src/mainboard/advansus/a785e-i/Kconfig index 32500d6..52ec827 100644 --- a/src/mainboard/advansus/a785e-i/Kconfig +++ b/src/mainboard/advansus/a785e-i/Kconfig @@ -2,7 +2,6 @@ if BOARD_ADVANSUS_A785E_I config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_ASB2 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/advantech/pcm-5820/Kconfig b/src/mainboard/advantech/pcm-5820/Kconfig index 25ff69c..86bcd7a 100644 --- a/src/mainboard/advantech/pcm-5820/Kconfig +++ b/src/mainboard/advantech/pcm-5820/Kconfig @@ -20,7 +20,6 @@ if BOARD_ADVANTECH_PCM_5820 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/amd/bimini_fam10/Kconfig b/src/mainboard/amd/bimini_fam10/Kconfig index a04c131..f9557b2 100644 --- a/src/mainboard/amd/bimini_fam10/Kconfig +++ b/src/mainboard/amd/bimini_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_BIMINI_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_ASB2 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/amd/db800/Kconfig b/src/mainboard/amd/db800/Kconfig index ee2aa0f..c6f99e9 100644 --- a/src/mainboard/amd/db800/Kconfig +++ b/src/mainboard/amd/db800/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_DB800 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/amd/dbm690t/Kconfig b/src/mainboard/amd/dbm690t/Kconfig index ba68a54..70d63ad 100644 --- a/src/mainboard/amd/dbm690t/Kconfig +++ b/src/mainboard/amd/dbm690t/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_DBM690T config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_S1G1 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_RS690 diff --git a/src/mainboard/amd/dinar/Kconfig b/src/mainboard/amd/dinar/Kconfig index 6768a57..0464479 100644 --- a/src/mainboard/amd/dinar/Kconfig +++ b/src/mainboard/amd/dinar/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_DINAR config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15 select CPU_AMD_SOCKET_G34 select NORTHBRIDGE_AMD_AGESA_FAMILY15 diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig index 6713ce7..2948b52 100644 --- a/src/mainboard/amd/inagua/Kconfig +++ b/src/mainboard/amd/inagua/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_INAGUA config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/amd/mahogany/Kconfig b/src/mainboard/amd/mahogany/Kconfig index 7e3486f..394ad77 100644 --- a/src/mainboard/amd/mahogany/Kconfig +++ b/src/mainboard/amd/mahogany/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_MAHOGANY config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/amd/mahogany_fam10/Kconfig b/src/mainboard/amd/mahogany_fam10/Kconfig index 2bc6a1d..b719592 100644 --- a/src/mainboard/amd/mahogany_fam10/Kconfig +++ b/src/mainboard/amd/mahogany_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_MAHOGANY_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2R2 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/amd/norwich/Kconfig b/src/mainboard/amd/norwich/Kconfig index dec8e01..eb83c1e 100644 --- a/src/mainboard/amd/norwich/Kconfig +++ b/src/mainboard/amd/norwich/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_NORWICH config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/amd/olivehill/Kconfig b/src/mainboard/amd/olivehill/Kconfig index 8be5a18..452f16d 100644 --- a/src/mainboard/amd/olivehill/Kconfig +++ b/src/mainboard/amd/olivehill/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_OLIVEHILL config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select SOUTHBRIDGE_AMD_AGESA_YANGTZE diff --git a/src/mainboard/amd/parmer/Kconfig b/src/mainboard/amd/parmer/Kconfig index 16fadfa..df26b2b 100644 --- a/src/mainboard/amd/parmer/Kconfig +++ b/src/mainboard/amd/parmer/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_PARMER config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/amd/persimmon/Kconfig b/src/mainboard/amd/persimmon/Kconfig index e09a170..1e03edb 100644 --- a/src/mainboard/amd/persimmon/Kconfig +++ b/src/mainboard/amd/persimmon/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_PERSIMMON config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/amd/pistachio/Kconfig b/src/mainboard/amd/pistachio/Kconfig index 2eb6612..9a91eec 100644 --- a/src/mainboard/amd/pistachio/Kconfig +++ b/src/mainboard/amd/pistachio/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_PISTACHIO config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/amd/rumba/Kconfig b/src/mainboard/amd/rumba/Kconfig index d600a58..2aea274 100644 --- a/src/mainboard/amd/rumba/Kconfig +++ b/src/mainboard/amd/rumba/Kconfig @@ -20,7 +20,6 @@ if BOARD_AMD_RUMBA config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX2 select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig index 5a6f022..53dd595 100644 --- a/src/mainboard/amd/serengeti_cheetah/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_SERENGETI_CHEETAH config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select SOUTHBRIDGE_AMD_AMD8132 select SOUTHBRIDGE_AMD_AMD8151 select CPU_AMD_SOCKET_F diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig index 37cbfa4..04a1ce0 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_SERENGETI_CHEETAH_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F_1207 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/amd/south_station/Kconfig b/src/mainboard/amd/south_station/Kconfig index 346a556..9709c61 100644 --- a/src/mainboard/amd/south_station/Kconfig +++ b/src/mainboard/amd/south_station/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_SOUTHSTATION config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/amd/thatcher/Kconfig b/src/mainboard/amd/thatcher/Kconfig index 66374f2..1f12883 100644 --- a/src/mainboard/amd/thatcher/Kconfig +++ b/src/mainboard/amd/thatcher/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_THATCHER config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/amd/tilapia_fam10/Kconfig b/src/mainboard/amd/tilapia_fam10/Kconfig index 111ac29..7ebf487 100644 --- a/src/mainboard/amd/tilapia_fam10/Kconfig +++ b/src/mainboard/amd/tilapia_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_AMD_TILAPIA_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/amd/torpedo/Kconfig b/src/mainboard/amd/torpedo/Kconfig index 2e16bb4..85d9d93 100644 --- a/src/mainboard/amd/torpedo/Kconfig +++ b/src/mainboard/amd/torpedo/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_TORPEDO config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select DIMM_DDR3 select DIMM_UNREGISTERED select CPU_AMD_AGESA_FAMILY12 diff --git a/src/mainboard/amd/union_station/Kconfig b/src/mainboard/amd/union_station/Kconfig index 69f6548..2d0cadb 100644 --- a/src/mainboard/amd/union_station/Kconfig +++ b/src/mainboard/amd/union_station/Kconfig @@ -21,7 +21,6 @@ if BOARD_AMD_UNIONSTATION config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/aopen/dxplplusu/Kconfig b/src/mainboard/aopen/dxplplusu/Kconfig index c620c9a..1802b5a 100644 --- a/src/mainboard/aopen/dxplplusu/Kconfig +++ b/src/mainboard/aopen/dxplplusu/Kconfig @@ -2,7 +2,6 @@ if BOARD_AOPEN_DXPLPLUSU config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7505 select SOUTHBRIDGE_INTEL_I82870 diff --git a/src/mainboard/arima/hdama/Kconfig b/src/mainboard/arima/hdama/Kconfig index 2b6f758..49860b3 100644 --- a/src/mainboard/arima/hdama/Kconfig +++ b/src/mainboard/arima/hdama/Kconfig @@ -2,7 +2,6 @@ if BOARD_ARIMA_HDAMA config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/artecgroup/dbe61/Kconfig b/src/mainboard/artecgroup/dbe61/Kconfig index 99a6218..c512f7b 100644 --- a/src/mainboard/artecgroup/dbe61/Kconfig +++ b/src/mainboard/artecgroup/dbe61/Kconfig @@ -2,7 +2,6 @@ if BOARD_ARTECGROUP_DBE61 || BOARD_LINUTOP_LINUTOP1 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/asi/mb_5blgp/Kconfig b/src/mainboard/asi/mb_5blgp/Kconfig index 08ab2e0..f69f6ef 100644 --- a/src/mainboard/asi/mb_5blgp/Kconfig +++ b/src/mainboard/asi/mb_5blgp/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASI_MB_5BLGP config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/asi/mb_5blmp/Kconfig b/src/mainboard/asi/mb_5blmp/Kconfig index e8c8dde..a40c86c 100644 --- a/src/mainboard/asi/mb_5blmp/Kconfig +++ b/src/mainboard/asi/mb_5blmp/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASI_MB_5BLMP config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/asrock/939a785gmh/Kconfig b/src/mainboard/asrock/939a785gmh/Kconfig index 9d3dd5c..cfaa599 100644 --- a/src/mainboard/asrock/939a785gmh/Kconfig +++ b/src/mainboard/asrock/939a785gmh/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASROCK_939A785GMH config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_939 select K8_HT_FREQ_1G_SUPPORT select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/asrock/e350m1/Kconfig b/src/mainboard/asrock/e350m1/Kconfig index 561f4bc..664c6c7 100644 --- a/src/mainboard/asrock/e350m1/Kconfig +++ b/src/mainboard/asrock/e350m1/Kconfig @@ -21,7 +21,6 @@ if BOARD_ASROCK_E350M1 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/asrock/imb-a180/Kconfig b/src/mainboard/asrock/imb-a180/Kconfig index ccd060e..d27e1d4 100644 --- a/src/mainboard/asrock/imb-a180/Kconfig +++ b/src/mainboard/asrock/imb-a180/Kconfig @@ -21,7 +21,6 @@ if BOARD_ASROCK_IMB_A180 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY16_KB select NORTHBRIDGE_AMD_AGESA_FAMILY16_KB select SOUTHBRIDGE_AMD_AGESA_YANGTZE diff --git a/src/mainboard/asus/a8n_e/Kconfig b/src/mainboard/asus/a8n_e/Kconfig index 43a2d2c..86601ed 100644 --- a/src/mainboard/asus/a8n_e/Kconfig +++ b/src/mainboard/asus/a8n_e/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_A8N_E || BOARD_ASUS_A8N_SLI config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_939 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/asus/a8n_sli/Kconfig b/src/mainboard/asus/a8n_sli/Kconfig index fdeaf87..e2ac03d 100644 --- a/src/mainboard/asus/a8n_sli/Kconfig +++ b/src/mainboard/asus/a8n_sli/Kconfig @@ -1,7 +1,6 @@ if BOARD_ASUS_A8N_SLI # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/asus/a8v-e_deluxe/Kconfig b/src/mainboard/asus/a8v-e_deluxe/Kconfig index e953ed4..a1533c4 100644 --- a/src/mainboard/asus/a8v-e_deluxe/Kconfig +++ b/src/mainboard/asus/a8v-e_deluxe/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_A8V_E_DELUXE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_939 select K8_HT_FREQ_1G_SUPPORT select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/asus/a8v-e_se/Kconfig b/src/mainboard/asus/a8v-e_se/Kconfig index c5b9374..dcc75fa 100644 --- a/src/mainboard/asus/a8v-e_se/Kconfig +++ b/src/mainboard/asus/a8v-e_se/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_A8V_E_SE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_939 select K8_HT_FREQ_1G_SUPPORT select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/asus/dsbf/Kconfig b/src/mainboard/asus/dsbf/Kconfig index 99aa56d..c130a9f 100644 --- a/src/mainboard/asus/dsbf/Kconfig +++ b/src/mainboard/asus/dsbf/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_DSBF config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_LGA771 select SOUTHBRIDGE_INTEL_I3100 select NORTHBRIDGE_INTEL_I5000 diff --git a/src/mainboard/asus/f2a85-m/Kconfig b/src/mainboard/asus/f2a85-m/Kconfig index 3859156..2280451 100644 --- a/src/mainboard/asus/f2a85-m/Kconfig +++ b/src/mainboard/asus/f2a85-m/Kconfig @@ -22,7 +22,6 @@ if BOARD_ASUS_F2A85_M config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/asus/k8v-x/Kconfig b/src/mainboard/asus/k8v-x/Kconfig index 51426ac..0e829f0 100644 --- a/src/mainboard/asus/k8v-x/Kconfig +++ b/src/mainboard/asus/k8v-x/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_K8V_X config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_754 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_VIA_VT8237R diff --git a/src/mainboard/asus/m2n-e/Kconfig b/src/mainboard/asus/m2n-e/Kconfig index 959ad6c..5f7a39e 100644 --- a/src/mainboard/asus/m2n-e/Kconfig +++ b/src/mainboard/asus/m2n-e/Kconfig @@ -22,7 +22,6 @@ if BOARD_ASUS_M2N_E config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/asus/m2v-mx_se/Kconfig b/src/mainboard/asus/m2v-mx_se/Kconfig index f76ff7b..2c1331f 100644 --- a/src/mainboard/asus/m2v-mx_se/Kconfig +++ b/src/mainboard/asus/m2v-mx_se/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_M2V_MX_SE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/asus/m2v/Kconfig b/src/mainboard/asus/m2v/Kconfig index 263bad9..0993096 100644 --- a/src/mainboard/asus/m2v/Kconfig +++ b/src/mainboard/asus/m2v/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_M2V config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select QRANK_DIMM_SUPPORT diff --git a/src/mainboard/asus/m4a78-em/Kconfig b/src/mainboard/asus/m4a78-em/Kconfig index 197b3a0..744b881 100644 --- a/src/mainboard/asus/m4a78-em/Kconfig +++ b/src/mainboard/asus/m4a78-em/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_M4A78_EM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDFAM10 diff --git a/src/mainboard/asus/m4a785-m/Kconfig b/src/mainboard/asus/m4a785-m/Kconfig index f6ba242..9e49ba0 100644 --- a/src/mainboard/asus/m4a785-m/Kconfig +++ b/src/mainboard/asus/m4a785-m/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_M4A785M config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDFAM10 diff --git a/src/mainboard/asus/m4a785t-m/Kconfig b/src/mainboard/asus/m4a785t-m/Kconfig index af4fb7c..1a709bc 100644 --- a/src/mainboard/asus/m4a785t-m/Kconfig +++ b/src/mainboard/asus/m4a785t-m/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_M4A785TM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/asus/m5a88-v/Kconfig b/src/mainboard/asus/m5a88-v/Kconfig index 7ff25d4..ae59599 100644 --- a/src/mainboard/asus/m5a88-v/Kconfig +++ b/src/mainboard/asus/m5a88-v/Kconfig @@ -2,7 +2,6 @@ if BOARD_ASUS_M5A88_V config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/asus/mew-am/Kconfig b/src/mainboard/asus/mew-am/Kconfig index ffd6e22..ad08c31 100644 --- a/src/mainboard/asus/mew-am/Kconfig +++ b/src/mainboard/asus/mew-am/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_MEW_AM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/asus/mew-vm/Kconfig b/src/mainboard/asus/mew-vm/Kconfig index 341c533..58910be 100644 --- a/src/mainboard/asus/mew-vm/Kconfig +++ b/src/mainboard/asus/mew-vm/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_MEW_VM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/asus/p2b-d/Kconfig b/src/mainboard/asus/p2b-d/Kconfig index 54a1bae..b84a142 100644 --- a/src/mainboard/asus/p2b-d/Kconfig +++ b/src/mainboard/asus/p2b-d/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_P2B_D config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/asus/p2b-ds/Kconfig b/src/mainboard/asus/p2b-ds/Kconfig index 652b31a..6a70e71 100644 --- a/src/mainboard/asus/p2b-ds/Kconfig +++ b/src/mainboard/asus/p2b-ds/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_P2B_DS config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/asus/p2b-f/Kconfig b/src/mainboard/asus/p2b-f/Kconfig index e0554ca..07fa744 100644 --- a/src/mainboard/asus/p2b-f/Kconfig +++ b/src/mainboard/asus/p2b-f/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_P2B_F config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/asus/p2b-ls/Kconfig b/src/mainboard/asus/p2b-ls/Kconfig index f138463..3822eb7 100644 --- a/src/mainboard/asus/p2b-ls/Kconfig +++ b/src/mainboard/asus/p2b-ls/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_P2B_LS config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/asus/p2b/Kconfig b/src/mainboard/asus/p2b/Kconfig index a57f7fb..b1b5597 100644 --- a/src/mainboard/asus/p2b/Kconfig +++ b/src/mainboard/asus/p2b/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_P2B config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/asus/p3b-f/Kconfig b/src/mainboard/asus/p3b-f/Kconfig index d47dfdb..07cd91f 100644 --- a/src/mainboard/asus/p3b-f/Kconfig +++ b/src/mainboard/asus/p3b-f/Kconfig @@ -20,7 +20,6 @@ if BOARD_ASUS_P3B_F config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/avalue/eax-785e/Kconfig b/src/mainboard/avalue/eax-785e/Kconfig index abfaaec..3b96d19 100644 --- a/src/mainboard/avalue/eax-785e/Kconfig +++ b/src/mainboard/avalue/eax-785e/Kconfig @@ -2,7 +2,6 @@ if BOARD_AVALUE_EAX_785E config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/axus/tc320/Kconfig b/src/mainboard/axus/tc320/Kconfig index 868c8d1..97c33aa 100644 --- a/src/mainboard/axus/tc320/Kconfig +++ b/src/mainboard/axus/tc320/Kconfig @@ -20,7 +20,6 @@ if BOARD_AXUS_TC320 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/azza/pt-6ibd/Kconfig b/src/mainboard/azza/pt-6ibd/Kconfig index 50ac62b..8897102 100644 --- a/src/mainboard/azza/pt-6ibd/Kconfig +++ b/src/mainboard/azza/pt-6ibd/Kconfig @@ -20,7 +20,6 @@ if BOARD_AZZA_PT_6IBD config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/bachmann/ot200/Kconfig b/src/mainboard/bachmann/ot200/Kconfig index 23b206e..baef807 100644 --- a/src/mainboard/bachmann/ot200/Kconfig +++ b/src/mainboard/bachmann/ot200/Kconfig @@ -2,7 +2,6 @@ if BOARD_BACHMANN_OT200 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/bcom/winnet100/Kconfig b/src/mainboard/bcom/winnet100/Kconfig index d0a7807..503c92b 100644 --- a/src/mainboard/bcom/winnet100/Kconfig +++ b/src/mainboard/bcom/winnet100/Kconfig @@ -20,7 +20,6 @@ if BOARD_BCOM_WINNET100 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/bcom/winnetp680/Kconfig b/src/mainboard/bcom/winnetp680/Kconfig index 78e014e..f6a80af 100644 --- a/src/mainboard/bcom/winnetp680/Kconfig +++ b/src/mainboard/bcom/winnetp680/Kconfig @@ -2,7 +2,6 @@ if BOARD_BCOM_WINNETP680 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C7 select NORTHBRIDGE_VIA_CN700 select SOUTHBRIDGE_VIA_VT8237R diff --git a/src/mainboard/biostar/m6tba/Kconfig b/src/mainboard/biostar/m6tba/Kconfig index 8d86ab4..d83ceac 100644 --- a/src/mainboard/biostar/m6tba/Kconfig +++ b/src/mainboard/biostar/m6tba/Kconfig @@ -20,7 +20,6 @@ if BOARD_BIOSTAR_M6TBA config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/broadcom/blast/Kconfig b/src/mainboard/broadcom/blast/Kconfig index 502576c..a02fa12 100644 --- a/src/mainboard/broadcom/blast/Kconfig +++ b/src/mainboard/broadcom/blast/Kconfig @@ -2,7 +2,6 @@ if BOARD_BROADCOM_BLAST config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_BROADCOM_BCM5780 diff --git a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig b/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig index 1242a94..62f038c 100644 --- a/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig +++ b/src/mainboard/compaq/deskpro_en_sff_p600/Kconfig @@ -20,7 +20,6 @@ if BOARD_COMPAQ_DESKPRO_EN_SFF_P600 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/cubietech/cubieboard/Kconfig b/src/mainboard/cubietech/cubieboard/Kconfig index 6cb84cf..176a3b3 100644 --- a/src/mainboard/cubietech/cubieboard/Kconfig +++ b/src/mainboard/cubietech/cubieboard/Kconfig @@ -2,7 +2,6 @@ if BOARD_CUBIETECH_CUBIEBOARD config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_ARMV7 select CPU_ALLWINNER_A10 select BOARD_ROMSIZE_KB_4096 select DRIVER_XPOWERS_AXP209 diff --git a/src/mainboard/digitallogic/adl855pc/Kconfig b/src/mainboard/digitallogic/adl855pc/Kconfig index a20a5c8..8c57a89 100644 --- a/src/mainboard/digitallogic/adl855pc/Kconfig +++ b/src/mainboard/digitallogic/adl855pc/Kconfig @@ -2,7 +2,6 @@ if BOARD_DIGITALLOGIC_ADL855PC config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA479M select NORTHBRIDGE_INTEL_I855 select SOUTHBRIDGE_INTEL_I82801DX diff --git a/src/mainboard/digitallogic/msm586seg/Kconfig b/src/mainboard/digitallogic/msm586seg/Kconfig index d54037a..4cd6f11 100644 --- a/src/mainboard/digitallogic/msm586seg/Kconfig +++ b/src/mainboard/digitallogic/msm586seg/Kconfig @@ -2,7 +2,6 @@ if BOARD_DIGITALLOGIC_MSM586SEG config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SC520 select HAVE_PIRQ_TABLE select HAVE_OPTION_TABLE diff --git a/src/mainboard/digitallogic/msm800sev/Kconfig b/src/mainboard/digitallogic/msm800sev/Kconfig index 0b54906..bc8e3ac 100644 --- a/src/mainboard/digitallogic/msm800sev/Kconfig +++ b/src/mainboard/digitallogic/msm800sev/Kconfig @@ -2,7 +2,6 @@ if BOARD_DIGITALLOGIC_MSM800SEV config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/dmp/vortex86ex/Kconfig b/src/mainboard/dmp/vortex86ex/Kconfig index 4b130b8..b164ca5 100644 --- a/src/mainboard/dmp/vortex86ex/Kconfig +++ b/src/mainboard/dmp/vortex86ex/Kconfig @@ -21,7 +21,6 @@ if BOARD_DMP_EX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_DMP_VORTEX86EX select NORTHBRIDGE_DMP_VORTEX86EX select SOUTHBRIDGE_DMP_VORTEX86EX diff --git a/src/mainboard/eaglelion/5bcm/Kconfig b/src/mainboard/eaglelion/5bcm/Kconfig index cc507f0..3c0a800 100644 --- a/src/mainboard/eaglelion/5bcm/Kconfig +++ b/src/mainboard/eaglelion/5bcm/Kconfig @@ -20,7 +20,6 @@ if BOARD_EAGLELION_5BCM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/ecs/p6iwp-fe/Kconfig b/src/mainboard/ecs/p6iwp-fe/Kconfig index c88d976..99170be 100644 --- a/src/mainboard/ecs/p6iwp-fe/Kconfig +++ b/src/mainboard/ecs/p6iwp-fe/Kconfig @@ -21,7 +21,6 @@ if BOARD_ECS_P6IWP_FE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index 040ed9c..7865abd 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -23,7 +23,6 @@ if BOARD_EMULATION_QEMU_ARMV7 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_ARMV7 select CPU_ARMLTD_CORTEX_A9 select DRIVERS_UART_PL011 select BOARD_ROMSIZE_KB_4096 diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index b9df41e..0a750df 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -2,7 +2,6 @@ if BOARD_EMULATION_QEMU_X86_I440FX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_QEMU_X86 select SOUTHBRIDGE_INTEL_I82371EB select CACHE_AS_RAM diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index ad7576b..674d890 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -2,7 +2,6 @@ if BOARD_EMULATION_QEMU_X86_Q35 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_QEMU_X86 select SOUTHBRIDGE_INTEL_I82801IX select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS diff --git a/src/mainboard/getac/p470/Kconfig b/src/mainboard/getac/p470/Kconfig index db42233..3696b14 100644 --- a/src/mainboard/getac/p470/Kconfig +++ b/src/mainboard/getac/p470/Kconfig @@ -20,7 +20,6 @@ if BOARD_GETAC_P470 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/mainboard/gigabyte/ga-6bxc/Kconfig b/src/mainboard/gigabyte/ga-6bxc/Kconfig index 62625fb..8ea1abd 100644 --- a/src/mainboard/gigabyte/ga-6bxc/Kconfig +++ b/src/mainboard/gigabyte/ga-6bxc/Kconfig @@ -20,7 +20,6 @@ if BOARD_GIGABYTE_GA_6BXC config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/gigabyte/ga-6bxe/Kconfig b/src/mainboard/gigabyte/ga-6bxe/Kconfig index 6e3462e..5b35e7d 100644 --- a/src/mainboard/gigabyte/ga-6bxe/Kconfig +++ b/src/mainboard/gigabyte/ga-6bxe/Kconfig @@ -21,7 +21,6 @@ if BOARD_GIGABYTE_GA_6BXE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig index 9b0ef05..3fbb8cd 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig +++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig @@ -2,7 +2,6 @@ if BOARD_GIGABYTE_GA_2761GXDK config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig index 1ffa552..491df9c 100644 --- a/src/mainboard/gigabyte/m57sli/Kconfig +++ b/src/mainboard/gigabyte/m57sli/Kconfig @@ -2,7 +2,6 @@ if BOARD_GIGABYTE_M57SLI config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/gigabyte/ma785gm/Kconfig b/src/mainboard/gigabyte/ma785gm/Kconfig index 7582320..94b449f 100644 --- a/src/mainboard/gigabyte/ma785gm/Kconfig +++ b/src/mainboard/gigabyte/ma785gm/Kconfig @@ -2,7 +2,6 @@ if BOARD_GIGABYTE_MA785GM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/gigabyte/ma785gmt/Kconfig b/src/mainboard/gigabyte/ma785gmt/Kconfig index 0ea4eb7..f98c0dd 100644 --- a/src/mainboard/gigabyte/ma785gmt/Kconfig +++ b/src/mainboard/gigabyte/ma785gmt/Kconfig @@ -2,7 +2,6 @@ if BOARD_GIGABYTE_MA785GMT config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM3 select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/gigabyte/ma78gm/Kconfig b/src/mainboard/gigabyte/ma78gm/Kconfig index d663eca..4a87aab 100644 --- a/src/mainboard/gigabyte/ma78gm/Kconfig +++ b/src/mainboard/gigabyte/ma78gm/Kconfig @@ -2,7 +2,6 @@ if BOARD_GIGABYTE_MA78GM config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2R2 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/gizmosphere/gizmo/Kconfig b/src/mainboard/gizmosphere/gizmo/Kconfig index a4252e3..ff95b29 100755 --- a/src/mainboard/gizmosphere/gizmo/Kconfig +++ b/src/mainboard/gizmosphere/gizmo/Kconfig @@ -22,7 +22,6 @@ if BOARD_GIZMOSPHERE_GIZMO config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/google/bolt/Kconfig b/src/mainboard/google/bolt/Kconfig index 47d41ed..0910661 100644 --- a/src/mainboard/google/bolt/Kconfig +++ b/src/mainboard/google/bolt/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_BOLT config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_HASWELL select SOUTHBRIDGE_INTEL_LYNXPOINT diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig index 51ce13b..1b7fe32 100644 --- a/src/mainboard/google/butterfly/Kconfig +++ b/src/mainboard/google/butterfly/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_BUTTERFLY config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/google/falco/Kconfig b/src/mainboard/google/falco/Kconfig index 5d19ffc..b369d62 100644 --- a/src/mainboard/google/falco/Kconfig +++ b/src/mainboard/google/falco/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_FALCO config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_HASWELL select SOUTHBRIDGE_INTEL_LYNXPOINT diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index efe9519..fcecca0 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_LINK config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig index d8a4e7a..23cea06 100644 --- a/src/mainboard/google/parrot/Kconfig +++ b/src/mainboard/google/parrot/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_PARROT config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/google/peppy/Kconfig b/src/mainboard/google/peppy/Kconfig index f401feb..204e28d 100644 --- a/src/mainboard/google/peppy/Kconfig +++ b/src/mainboard/google/peppy/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_PEPPY config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_HASWELL select SOUTHBRIDGE_INTEL_LYNXPOINT diff --git a/src/mainboard/google/pit/Kconfig b/src/mainboard/google/pit/Kconfig index e7e9a31..861740f 100644 --- a/src/mainboard/google/pit/Kconfig +++ b/src/mainboard/google/pit/Kconfig @@ -21,7 +21,6 @@ if BOARD_GOOGLE_PIT config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_ARMV7 select CPU_SAMSUNG_EXYNOS5420 select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_SPI diff --git a/src/mainboard/google/rambi/Kconfig b/src/mainboard/google/rambi/Kconfig index 00af512..c0cb8ca 100644 --- a/src/mainboard/google/rambi/Kconfig +++ b/src/mainboard/google/rambi/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_RAMBI config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 select SOC_INTEL_BAYTRAIL select EC_GOOGLE_CHROMEEC select EC_SOFTWARE_SYNC diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig index ba6a6fe..3c34938 100644 --- a/src/mainboard/google/slippy/Kconfig +++ b/src/mainboard/google/slippy/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_SLIPPY config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_HASWELL select SOUTHBRIDGE_INTEL_LYNXPOINT diff --git a/src/mainboard/google/snow/Kconfig b/src/mainboard/google/snow/Kconfig index e808eb8..14e26a9 100644 --- a/src/mainboard/google/snow/Kconfig +++ b/src/mainboard/google/snow/Kconfig @@ -21,7 +21,6 @@ if BOARD_GOOGLE_SNOW config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_ARMV7 select CPU_SAMSUNG_EXYNOS5250 select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_I2C diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig index d5e265f..e683455 100644 --- a/src/mainboard/google/stout/Kconfig +++ b/src/mainboard/google/stout/Kconfig @@ -2,7 +2,6 @@ if BOARD_GOOGLE_STOUT config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/hp/dl145_g1/Kconfig b/src/mainboard/hp/dl145_g1/Kconfig index a169b88..0c6d642 100644 --- a/src/mainboard/hp/dl145_g1/Kconfig +++ b/src/mainboard/hp/dl145_g1/Kconfig @@ -2,7 +2,6 @@ if BOARD_HP_DL145_G1 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8131 diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig index be3f009..9885e2b 100644 --- a/src/mainboard/hp/dl145_g3/Kconfig +++ b/src/mainboard/hp/dl145_g3/Kconfig @@ -2,7 +2,6 @@ if BOARD_HP_DL145_G3 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/hp/dl165_g6_fam10/Kconfig b/src/mainboard/hp/dl165_g6_fam10/Kconfig index b72b8dd..ba8c799 100644 --- a/src/mainboard/hp/dl165_g6_fam10/Kconfig +++ b/src/mainboard/hp/dl165_g6_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_HP_DL165_G6_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F_1207 select NORTHBRIDGE_AMD_AMDFAM10 select SOUTHBRIDGE_BROADCOM_BCM21000 diff --git a/src/mainboard/hp/e_vectra_p2706t/Kconfig b/src/mainboard/hp/e_vectra_p2706t/Kconfig index e78238c..c5aa340 100644 --- a/src/mainboard/hp/e_vectra_p2706t/Kconfig +++ b/src/mainboard/hp/e_vectra_p2706t/Kconfig @@ -24,7 +24,6 @@ if BOARD_HP_E_VECTRA_P2706T config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig index d6cdb10..202f831 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig +++ b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig @@ -21,7 +21,6 @@ if BOARD_HP_PAVILION_M6_1035DX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/ibase/mb899/Kconfig b/src/mainboard/ibase/mb899/Kconfig index 72b916f..8975be2 100644 --- a/src/mainboard/ibase/mb899/Kconfig +++ b/src/mainboard/ibase/mb899/Kconfig @@ -2,7 +2,6 @@ if BOARD_IBASE_MB899 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/mainboard/ibm/e325/Kconfig b/src/mainboard/ibm/e325/Kconfig index 0a8442b..d002dce 100644 --- a/src/mainboard/ibm/e325/Kconfig +++ b/src/mainboard/ibm/e325/Kconfig @@ -2,7 +2,6 @@ if BOARD_IBM_E325 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/ibm/e326/Kconfig b/src/mainboard/ibm/e326/Kconfig index 2016ef9..5632c30 100644 --- a/src/mainboard/ibm/e326/Kconfig +++ b/src/mainboard/ibm/e326/Kconfig @@ -2,7 +2,6 @@ if BOARD_IBM_E326 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/iei/juki-511p/Kconfig b/src/mainboard/iei/juki-511p/Kconfig index 03dffff..e17d69a 100644 --- a/src/mainboard/iei/juki-511p/Kconfig +++ b/src/mainboard/iei/juki-511p/Kconfig @@ -20,7 +20,6 @@ if BOARD_IEI_JUKI_511P || BOARD_IEI_ROCKY_512 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/iei/kino-780am2-fam10/Kconfig b/src/mainboard/iei/kino-780am2-fam10/Kconfig index 62c8671..05abdf6 100644 --- a/src/mainboard/iei/kino-780am2-fam10/Kconfig +++ b/src/mainboard/iei/kino-780am2-fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_IEI_KINO_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2R2 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/iei/nova4899r/Kconfig b/src/mainboard/iei/nova4899r/Kconfig index 36db67b..8d0a9a4 100644 --- a/src/mainboard/iei/nova4899r/Kconfig +++ b/src/mainboard/iei/nova4899r/Kconfig @@ -20,7 +20,6 @@ if BOARD_IEI_NOVA_4899R config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig index 69e106e..74a3c10 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/Kconfig +++ b/src/mainboard/iei/pcisa-lx-800-r10/Kconfig @@ -2,7 +2,6 @@ if BOARD_IEI_PCISA_LX_800_R10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/iei/pm-lx-800-r11/Kconfig b/src/mainboard/iei/pm-lx-800-r11/Kconfig index e443c6c..61c2772 100644 --- a/src/mainboard/iei/pm-lx-800-r11/Kconfig +++ b/src/mainboard/iei/pm-lx-800-r11/Kconfig @@ -23,7 +23,6 @@ if BOARD_IEI_PM_LX_800_R11 config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/iei/pm-lx2-800-r10/Kconfig b/src/mainboard/iei/pm-lx2-800-r10/Kconfig index 1485c94..8e92e69 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/Kconfig +++ b/src/mainboard/iei/pm-lx2-800-r10/Kconfig @@ -23,7 +23,6 @@ if BOARD_IEI_PM_LX2_800_R10 config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/iei/rocky-512/Kconfig b/src/mainboard/iei/rocky-512/Kconfig index 0d6ac38..864da86 100644 --- a/src/mainboard/iei/rocky-512/Kconfig +++ b/src/mainboard/iei/rocky-512/Kconfig @@ -1,7 +1,6 @@ if BOARD_IEI_ROCKY_512 # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/intel/baskingridge/Kconfig b/src/mainboard/intel/baskingridge/Kconfig index 710094e..b52df97 100644 --- a/src/mainboard/intel/baskingridge/Kconfig +++ b/src/mainboard/intel/baskingridge/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_BASKING_RIDGE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_HASWELL select SOUTHBRIDGE_INTEL_LYNXPOINT diff --git a/src/mainboard/intel/cougar_canyon2/Kconfig b/src/mainboard/intel/cougar_canyon2/Kconfig index 61f1c6d..774bbb8 100644 --- a/src/mainboard/intel/cougar_canyon2/Kconfig +++ b/src/mainboard/intel/cougar_canyon2/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_COUGAR_CANYON2 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_FSP_IVYBRIDGE select SOUTHBRIDGE_INTEL_FSP_BD82X6X diff --git a/src/mainboard/intel/d810e2cb/Kconfig b/src/mainboard/intel/d810e2cb/Kconfig index 91edf33..85b0e6c 100644 --- a/src/mainboard/intel/d810e2cb/Kconfig +++ b/src/mainboard/intel/d810e2cb/Kconfig @@ -20,7 +20,6 @@ if BOARD_INTEL_D810E2CB config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_FC_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801BX diff --git a/src/mainboard/intel/d945gclf/Kconfig b/src/mainboard/intel/d945gclf/Kconfig index b676eb6..490aa80 100644 --- a/src/mainboard/intel/d945gclf/Kconfig +++ b/src/mainboard/intel/d945gclf/Kconfig @@ -20,7 +20,6 @@ if BOARD_INTEL_D945GCLF config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_441 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GC diff --git a/src/mainboard/intel/eagleheights/Kconfig b/src/mainboard/intel/eagleheights/Kconfig index e74705b..bc0799c 100644 --- a/src/mainboard/intel/eagleheights/Kconfig +++ b/src/mainboard/intel/eagleheights/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_EAGLEHEIGHTS config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_BGA956 select NORTHBRIDGE_INTEL_I3100 select SOUTHBRIDGE_INTEL_I3100 diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index 01082d4..77aa910 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_EMERALDLAKE2 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/intel/jarrell/Kconfig b/src/mainboard/intel/jarrell/Kconfig index 2a62777..6ecbc87 100644 --- a/src/mainboard/intel/jarrell/Kconfig +++ b/src/mainboard/intel/jarrell/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_JARRELL config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 select SOUTHBRIDGE_INTEL_PXHD diff --git a/src/mainboard/intel/mtarvon/Kconfig b/src/mainboard/intel/mtarvon/Kconfig index af40cad..4097fa7 100644 --- a/src/mainboard/intel/mtarvon/Kconfig +++ b/src/mainboard/intel/mtarvon/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_MTARVON config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA479M select NORTHBRIDGE_INTEL_I3100 select SOUTHBRIDGE_INTEL_I3100 diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig index 5f7de08..5aa4b57 100644 --- a/src/mainboard/intel/truxton/Kconfig +++ b/src/mainboard/intel/truxton/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_TRUXTON config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_EP80579 select NORTHBRIDGE_INTEL_I3100 select SOUTHBRIDGE_INTEL_I3100 diff --git a/src/mainboard/intel/wtm2/Kconfig b/src/mainboard/intel/wtm2/Kconfig index 00ea604..6fd3813 100644 --- a/src/mainboard/intel/wtm2/Kconfig +++ b/src/mainboard/intel/wtm2/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_WTM2 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_HASWELL select SOUTHBRIDGE_INTEL_LYNXPOINT diff --git a/src/mainboard/intel/xe7501devkit/Kconfig b/src/mainboard/intel/xe7501devkit/Kconfig index 276b1f7..923d39a 100644 --- a/src/mainboard/intel/xe7501devkit/Kconfig +++ b/src/mainboard/intel/xe7501devkit/Kconfig @@ -2,7 +2,6 @@ if BOARD_INTEL_XE7501DEVKIT config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7501 select SOUTHBRIDGE_INTEL_I82870 diff --git a/src/mainboard/iwave/iWRainbowG6/Kconfig b/src/mainboard/iwave/iWRainbowG6/Kconfig index c6c15d5..e29615e 100644 --- a/src/mainboard/iwave/iWRainbowG6/Kconfig +++ b/src/mainboard/iwave/iWRainbowG6/Kconfig @@ -3,7 +3,6 @@ if BOARD_IWAVE_RAINBOW_G6 # TODO: move options to chipset components as appropriate config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_441 select NORTHBRIDGE_INTEL_SCH select SOUTHBRIDGE_INTEL_SCH diff --git a/src/mainboard/iwill/dk8_htx/Kconfig b/src/mainboard/iwill/dk8_htx/Kconfig index 6ccee76..11b11b9 100644 --- a/src/mainboard/iwill/dk8_htx/Kconfig +++ b/src/mainboard/iwill/dk8_htx/Kconfig @@ -2,7 +2,6 @@ if BOARD_IWILL_DK8_HTX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/iwill/dk8s2/Kconfig b/src/mainboard/iwill/dk8s2/Kconfig index d7fefd8..c270f6f 100644 --- a/src/mainboard/iwill/dk8s2/Kconfig +++ b/src/mainboard/iwill/dk8s2/Kconfig @@ -2,7 +2,6 @@ if BOARD_IWILL_DK8S2 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/iwill/dk8x/Kconfig b/src/mainboard/iwill/dk8x/Kconfig index bdbeb69..8457944 100644 --- a/src/mainboard/iwill/dk8x/Kconfig +++ b/src/mainboard/iwill/dk8x/Kconfig @@ -2,7 +2,6 @@ if BOARD_IWILL_DK8X config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/jetway/j7f2/Kconfig b/src/mainboard/jetway/j7f2/Kconfig index 811b37e..d2b413b 100644 --- a/src/mainboard/jetway/j7f2/Kconfig +++ b/src/mainboard/jetway/j7f2/Kconfig @@ -2,7 +2,6 @@ if BOARD_JETWAY_J7F2 || BOARD_JETWAY_J7F4K1G2E || BOARD_JETWAY_J7F4K1G5D config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C7 select NORTHBRIDGE_VIA_CN700 select SOUTHBRIDGE_VIA_VT8237R diff --git a/src/mainboard/jetway/j7f4k1g2e/Kconfig b/src/mainboard/jetway/j7f4k1g2e/Kconfig index b46e29e..8c8bbaf 100644 --- a/src/mainboard/jetway/j7f4k1g2e/Kconfig +++ b/src/mainboard/jetway/j7f4k1g2e/Kconfig @@ -1,7 +1,6 @@ if BOARD_JETWAY_J7F4K1G2E # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/jetway/j7f4k1g5d/Kconfig b/src/mainboard/jetway/j7f4k1g5d/Kconfig index edd75f8..d59e703 100644 --- a/src/mainboard/jetway/j7f4k1g5d/Kconfig +++ b/src/mainboard/jetway/j7f4k1g5d/Kconfig @@ -1,7 +1,6 @@ if BOARD_JETWAY_J7F4K1G5D # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/jetway/nf81-t56n-lf/Kconfig b/src/mainboard/jetway/nf81-t56n-lf/Kconfig index 85d7558..0f85386 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/Kconfig +++ b/src/mainboard/jetway/nf81-t56n-lf/Kconfig @@ -22,7 +22,6 @@ if BOARD_JETWAY_NF81_T56N_LF config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/jetway/pa78vm5/Kconfig b/src/mainboard/jetway/pa78vm5/Kconfig index 01c4a59..106b610 100644 --- a/src/mainboard/jetway/pa78vm5/Kconfig +++ b/src/mainboard/jetway/pa78vm5/Kconfig @@ -2,7 +2,6 @@ if BOARD_JETWAY_PA78VM5 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2R2 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/kontron/986lcd-m/Kconfig b/src/mainboard/kontron/986lcd-m/Kconfig index 29d4da4..f5d4f8c 100644 --- a/src/mainboard/kontron/986lcd-m/Kconfig +++ b/src/mainboard/kontron/986lcd-m/Kconfig @@ -2,7 +2,6 @@ if BOARD_KONTRON_986LCD_M config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/mainboard/kontron/kt690/Kconfig b/src/mainboard/kontron/kt690/Kconfig index b0b0195..2891736 100644 --- a/src/mainboard/kontron/kt690/Kconfig +++ b/src/mainboard/kontron/kt690/Kconfig @@ -2,7 +2,6 @@ if BOARD_KONTRON_KT690 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_S1G1 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_RS690 diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index e9d1ce7..96153f7 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -2,7 +2,6 @@ if BOARD_KONTRON_KTQM77 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/lanner/em8510/Kconfig b/src/mainboard/lanner/em8510/Kconfig index 1a306cf..e042e81 100644 --- a/src/mainboard/lanner/em8510/Kconfig +++ b/src/mainboard/lanner/em8510/Kconfig @@ -2,7 +2,6 @@ if BOARD_LANNER_EM8510 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA479M select NORTHBRIDGE_INTEL_I855 select SOUTHBRIDGE_INTEL_I82801DX diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index 701b2ed..99b5849 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -2,7 +2,6 @@ if BOARD_LENOVO_T530 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index 6a743d5..cb2bb39 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -2,7 +2,6 @@ if BOARD_LENOVO_T60 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig index 860a953..ff9f0ae 100644 --- a/src/mainboard/lenovo/x201/Kconfig +++ b/src/mainboard/lenovo/x201/Kconfig @@ -2,7 +2,6 @@ if BOARD_LENOVO_X201 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select NORTHBRIDGE_INTEL_NEHALEM select SOUTHBRIDGE_INTEL_IBEXPEAK select EC_LENOVO_PMH7 diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig index cd1f761..2ce51a8 100644 --- a/src/mainboard/lenovo/x230/Kconfig +++ b/src/mainboard/lenovo/x230/Kconfig @@ -2,7 +2,6 @@ if BOARD_LENOVO_X230 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 7ed2665..1158046 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -2,7 +2,6 @@ if BOARD_LENOVO_X60 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/mainboard/linutop/linutop1/Kconfig b/src/mainboard/linutop/linutop1/Kconfig index feb5f78..c8f9a24 100644 --- a/src/mainboard/linutop/linutop1/Kconfig +++ b/src/mainboard/linutop/linutop1/Kconfig @@ -1,7 +1,6 @@ if BOARD_LINUTOP_LINUTOP1 # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/lippert/frontrunner-af/Kconfig b/src/mainboard/lippert/frontrunner-af/Kconfig index f598882..7dd71e9 100644 --- a/src/mainboard/lippert/frontrunner-af/Kconfig +++ b/src/mainboard/lippert/frontrunner-af/Kconfig @@ -21,7 +21,6 @@ if BOARD_LIPPERT_FRONTRUNNER_AF config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/lippert/frontrunner/Kconfig b/src/mainboard/lippert/frontrunner/Kconfig index ba1d5f1..fdba7ba 100644 --- a/src/mainboard/lippert/frontrunner/Kconfig +++ b/src/mainboard/lippert/frontrunner/Kconfig @@ -2,7 +2,6 @@ if BOARD_LIPPERT_FRONTRUNNER config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX2 select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5535 diff --git a/src/mainboard/lippert/hurricane-lx/Kconfig b/src/mainboard/lippert/hurricane-lx/Kconfig index 234f216..04c2220 100644 --- a/src/mainboard/lippert/hurricane-lx/Kconfig +++ b/src/mainboard/lippert/hurricane-lx/Kconfig @@ -2,7 +2,6 @@ if BOARD_LIPPERT_HURRICANE_LX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/lippert/literunner-lx/Kconfig b/src/mainboard/lippert/literunner-lx/Kconfig index c4684c9..c3aab0e 100644 --- a/src/mainboard/lippert/literunner-lx/Kconfig +++ b/src/mainboard/lippert/literunner-lx/Kconfig @@ -2,7 +2,6 @@ if BOARD_LIPPERT_LITERUNNER_LX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/lippert/roadrunner-lx/Kconfig b/src/mainboard/lippert/roadrunner-lx/Kconfig index f5ec9b9..051713a 100644 --- a/src/mainboard/lippert/roadrunner-lx/Kconfig +++ b/src/mainboard/lippert/roadrunner-lx/Kconfig @@ -2,7 +2,6 @@ if BOARD_LIPPERT_ROADRUNNER_LX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/lippert/spacerunner-lx/Kconfig b/src/mainboard/lippert/spacerunner-lx/Kconfig index c4a2ce8..65645fd 100644 --- a/src/mainboard/lippert/spacerunner-lx/Kconfig +++ b/src/mainboard/lippert/spacerunner-lx/Kconfig @@ -2,7 +2,6 @@ if BOARD_LIPPERT_SPACERUNNER_LX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/lippert/toucan-af/Kconfig b/src/mainboard/lippert/toucan-af/Kconfig index 7660acb..63200b3 100644 --- a/src/mainboard/lippert/toucan-af/Kconfig +++ b/src/mainboard/lippert/toucan-af/Kconfig @@ -21,7 +21,6 @@ if BOARD_LIPPERT_TOUCAN_AF config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY14 select NORTHBRIDGE_AMD_AGESA_FAMILY14 select SOUTHBRIDGE_AMD_CIMX_SB800 diff --git a/src/mainboard/mitac/6513wu/Kconfig b/src/mainboard/mitac/6513wu/Kconfig index e552982..6228a6e 100644 --- a/src/mainboard/mitac/6513wu/Kconfig +++ b/src/mainboard/mitac/6513wu/Kconfig @@ -20,7 +20,6 @@ if BOARD_MITAC_6513WU config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/msi/ms6119/Kconfig b/src/mainboard/msi/ms6119/Kconfig index 7705522..00ed0d9 100644 --- a/src/mainboard/msi/ms6119/Kconfig +++ b/src/mainboard/msi/ms6119/Kconfig @@ -20,7 +20,6 @@ if BOARD_MSI_MS_6119 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/msi/ms6147/Kconfig b/src/mainboard/msi/ms6147/Kconfig index 9b51a49..fa4af80 100644 --- a/src/mainboard/msi/ms6147/Kconfig +++ b/src/mainboard/msi/ms6147/Kconfig @@ -20,7 +20,6 @@ if BOARD_MSI_MS_6147 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/msi/ms6156/Kconfig b/src/mainboard/msi/ms6156/Kconfig index 58654f6..840751c 100644 --- a/src/mainboard/msi/ms6156/Kconfig +++ b/src/mainboard/msi/ms6156/Kconfig @@ -20,7 +20,6 @@ if BOARD_MSI_MS_6156 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/msi/ms6178/Kconfig b/src/mainboard/msi/ms6178/Kconfig index 4baee5e..cc70e76 100644 --- a/src/mainboard/msi/ms6178/Kconfig +++ b/src/mainboard/msi/ms6178/Kconfig @@ -20,7 +20,6 @@ if BOARD_MSI_MS_6178 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/msi/ms7135/Kconfig b/src/mainboard/msi/ms7135/Kconfig index 76b6625..f2cfd9a 100644 --- a/src/mainboard/msi/ms7135/Kconfig +++ b/src/mainboard/msi/ms7135/Kconfig @@ -2,7 +2,6 @@ if BOARD_MSI_MS7135 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_754 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index 27bd3e5..c8ff25e 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -2,7 +2,6 @@ if BOARD_MSI_MS7260 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_AM2 select DIMM_DDR2 select NORTHBRIDGE_AMD_AMDK8 diff --git a/src/mainboard/msi/ms9185/Kconfig b/src/mainboard/msi/ms9185/Kconfig index 7823d56..0b0ff1c 100644 --- a/src/mainboard/msi/ms9185/Kconfig +++ b/src/mainboard/msi/ms9185/Kconfig @@ -2,7 +2,6 @@ if BOARD_MSI_MS9185 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/msi/ms9282/Kconfig b/src/mainboard/msi/ms9282/Kconfig index 1359a89..76903e2 100644 --- a/src/mainboard/msi/ms9282/Kconfig +++ b/src/mainboard/msi/ms9282/Kconfig @@ -2,7 +2,6 @@ if BOARD_MSI_MS9282 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/msi/ms9652_fam10/Kconfig b/src/mainboard/msi/ms9652_fam10/Kconfig index 42ceff4..e305551 100644 --- a/src/mainboard/msi/ms9652_fam10/Kconfig +++ b/src/mainboard/msi/ms9652_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_MSI_MS9652_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F_1207 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/nec/powermate2000/Kconfig b/src/mainboard/nec/powermate2000/Kconfig index 82c2f9d..6fddcc1 100644 --- a/src/mainboard/nec/powermate2000/Kconfig +++ b/src/mainboard/nec/powermate2000/Kconfig @@ -20,7 +20,6 @@ if BOARD_NEC_POWERMATE_2000 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I82810 select SOUTHBRIDGE_INTEL_I82801AX diff --git a/src/mainboard/newisys/khepri/Kconfig b/src/mainboard/newisys/khepri/Kconfig index 94de54b..e3d5698 100644 --- a/src/mainboard/newisys/khepri/Kconfig +++ b/src/mainboard/newisys/khepri/Kconfig @@ -2,7 +2,6 @@ if BOARD_NEWISYS_KHEPRI config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/nokia/ip530/Kconfig b/src/mainboard/nokia/ip530/Kconfig index 58d6d37..bb72688 100644 --- a/src/mainboard/nokia/ip530/Kconfig +++ b/src/mainboard/nokia/ip530/Kconfig @@ -20,7 +20,6 @@ if BOARD_NOKIA_IP530 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_PGA370 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig index e04caaa..4fe3b4d 100644 --- a/src/mainboard/nvidia/l1_2pvv/Kconfig +++ b/src/mainboard/nvidia/l1_2pvv/Kconfig @@ -2,7 +2,6 @@ if BOARD_NVIDIA_L1_2PVV config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/pcengines/alix1c/Kconfig b/src/mainboard/pcengines/alix1c/Kconfig index fab8710..bbd78a3 100644 --- a/src/mainboard/pcengines/alix1c/Kconfig +++ b/src/mainboard/pcengines/alix1c/Kconfig @@ -2,7 +2,6 @@ if BOARD_PCENGINES_ALIX1C config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/pcengines/alix2c/Kconfig b/src/mainboard/pcengines/alix2c/Kconfig index e2ff77c..8bed484 100644 --- a/src/mainboard/pcengines/alix2c/Kconfig +++ b/src/mainboard/pcengines/alix2c/Kconfig @@ -1,7 +1,6 @@ if BOARD_PCENGINES_ALIX2C # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/pcengines/alix2d/Kconfig b/src/mainboard/pcengines/alix2d/Kconfig index 7ea32c3..a350e11 100644 --- a/src/mainboard/pcengines/alix2d/Kconfig +++ b/src/mainboard/pcengines/alix2d/Kconfig @@ -2,7 +2,6 @@ if BOARD_PCENGINES_ALIX2C || BOARD_PCENGINES_ALIX2D || BOARD_PCENGINES_ALIX6 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/pcengines/alix6/Kconfig b/src/mainboard/pcengines/alix6/Kconfig index 4329f19..41b9cf4 100644 --- a/src/mainboard/pcengines/alix6/Kconfig +++ b/src/mainboard/pcengines/alix6/Kconfig @@ -1,7 +1,6 @@ if BOARD_PCENGINES_ALIX6 # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/rca/rm4100/Kconfig b/src/mainboard/rca/rm4100/Kconfig index ecbd2cc..975977f 100644 --- a/src/mainboard/rca/rm4100/Kconfig +++ b/src/mainboard/rca/rm4100/Kconfig @@ -2,7 +2,6 @@ if BOARD_RCA_RM4100 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCBGA479 select NORTHBRIDGE_INTEL_I82830 select SOUTHBRIDGE_INTEL_I82801DX diff --git a/src/mainboard/roda/rk886ex/Kconfig b/src/mainboard/roda/rk886ex/Kconfig index 365980e..94290d5 100644 --- a/src/mainboard/roda/rk886ex/Kconfig +++ b/src/mainboard/roda/rk886ex/Kconfig @@ -2,7 +2,6 @@ if BOARD_RODA_RK886EX config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCPGA478 select NORTHBRIDGE_INTEL_I945 select NORTHBRIDGE_INTEL_SUBTYPE_I945GM diff --git a/src/mainboard/roda/rk9/Kconfig b/src/mainboard/roda/rk9/Kconfig index 2c1944a..67fc88a 100644 --- a/src/mainboard/roda/rk9/Kconfig +++ b/src/mainboard/roda/rk9/Kconfig @@ -2,7 +2,6 @@ if BOARD_RODA_RK9 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_BGA956 select NORTHBRIDGE_INTEL_GM45 select SOUTHBRIDGE_INTEL_I82801IX diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig index 500427a..9c8c466 100644 --- a/src/mainboard/samsung/lumpy/Kconfig +++ b/src/mainboard/samsung/lumpy/Kconfig @@ -2,7 +2,6 @@ if BOARD_SAMSUNG_LUMPY config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select BOARD_ROMSIZE_KB_8192 select MAINBOARD_HAS_CHROMEOS select CPU_INTEL_SOCKET_RPGA989 diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig index e1e0cfa..e38efe0 100644 --- a/src/mainboard/samsung/stumpy/Kconfig +++ b/src/mainboard/samsung/stumpy/Kconfig @@ -2,7 +2,6 @@ if BOARD_SAMSUNG_STUMPY config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select BOARD_ROMSIZE_KB_8192 select MAINBOARD_HAS_CHROMEOS select CPU_INTEL_SOCKET_RPGA989 diff --git a/src/mainboard/siemens/sitemp_g1p1/Kconfig b/src/mainboard/siemens/sitemp_g1p1/Kconfig index 8d0ff80..dff329f 100644 --- a/src/mainboard/siemens/sitemp_g1p1/Kconfig +++ b/src/mainboard/siemens/sitemp_g1p1/Kconfig @@ -2,7 +2,6 @@ if BOARD_SIEMENS_SITEMP_G1P1 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_S1G1 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_RS690 diff --git a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig b/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig index 096aa7c..a268bad 100644 --- a/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig +++ b/src/mainboard/soyo/sy-6ba-plus-iii/Kconfig @@ -20,7 +20,6 @@ if BOARD_SOYO_SY_6BA_PLUS_III config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/sunw/ultra40/Kconfig b/src/mainboard/sunw/ultra40/Kconfig index 80e08c4..f95fc8c 100644 --- a/src/mainboard/sunw/ultra40/Kconfig +++ b/src/mainboard/sunw/ultra40/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUNW_ULTRA40 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig index bfcb724..62ae51a 100644 --- a/src/mainboard/supermicro/h8dme/Kconfig +++ b/src/mainboard/supermicro/h8dme/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_H8DME config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index 546dfa5..32f0391 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_H8DMR config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/supermicro/h8dmr_fam10/Kconfig b/src/mainboard/supermicro/h8dmr_fam10/Kconfig index 2f48b32..e1ce4e7 100644 --- a/src/mainboard/supermicro/h8dmr_fam10/Kconfig +++ b/src/mainboard/supermicro/h8dmr_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_H8DMR_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F_1207 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/supermicro/h8qgi/Kconfig b/src/mainboard/supermicro/h8qgi/Kconfig index 2ff782a..2ca73be 100644 --- a/src/mainboard/supermicro/h8qgi/Kconfig +++ b/src/mainboard/supermicro/h8qgi/Kconfig @@ -21,7 +21,6 @@ if BOARD_SUPERMICRO_H8QGI config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15 select CPU_AMD_SOCKET_G34 select NORTHBRIDGE_AMD_AGESA_FAMILY15 diff --git a/src/mainboard/supermicro/h8qme_fam10/Kconfig b/src/mainboard/supermicro/h8qme_fam10/Kconfig index 27172ff..8d91f6f 100644 --- a/src/mainboard/supermicro/h8qme_fam10/Kconfig +++ b/src/mainboard/supermicro/h8qme_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_H8QME_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F_1207 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/supermicro/h8scm/Kconfig b/src/mainboard/supermicro/h8scm/Kconfig index 7260f99..4a58d04 100644 --- a/src/mainboard/supermicro/h8scm/Kconfig +++ b/src/mainboard/supermicro/h8scm/Kconfig @@ -21,7 +21,6 @@ if BOARD_SUPERMICRO_H8SCM config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15 select CPU_AMD_SOCKET_C32 select NORTHBRIDGE_AMD_AGESA_FAMILY15 diff --git a/src/mainboard/supermicro/h8scm_fam10/Kconfig b/src/mainboard/supermicro/h8scm_fam10/Kconfig index 87cfc73..de48dba 100644 --- a/src/mainboard/supermicro/h8scm_fam10/Kconfig +++ b/src/mainboard/supermicro/h8scm_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_H9SCM_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_C32_NON_AGESA select DIMM_DDR3 select DIMM_REGISTERED diff --git a/src/mainboard/supermicro/x6dai_g/Kconfig b/src/mainboard/supermicro/x6dai_g/Kconfig index 90a800c..4999320 100644 --- a/src/mainboard/supermicro/x6dai_g/Kconfig +++ b/src/mainboard/supermicro/x6dai_g/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_X6DAI_G config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7525 select SOUTHBRIDGE_INTEL_ESB6300 diff --git a/src/mainboard/supermicro/x6dhe_g/Kconfig b/src/mainboard/supermicro/x6dhe_g/Kconfig index ab8d00b..d520415 100644 --- a/src/mainboard/supermicro/x6dhe_g/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_X6DHE_G config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 select SOUTHBRIDGE_INTEL_ESB6300 diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig index b4630fe..159c9c3 100644 --- a/src/mainboard/supermicro/x6dhe_g2/Kconfig +++ b/src/mainboard/supermicro/x6dhe_g2/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_X6DHE_G2 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 select SOUTHBRIDGE_INTEL_I82801EX diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig index 0b25fcd..e02b2dd 100644 --- a/src/mainboard/supermicro/x6dhr_ig/Kconfig +++ b/src/mainboard/supermicro/x6dhr_ig/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_X6DHR_IG config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 select SOUTHBRIDGE_INTEL_I82801EX diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig index 70df01a..9c8e4a6 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig +++ b/src/mainboard/supermicro/x6dhr_ig2/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_X6DHR_IG2 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7520 select SOUTHBRIDGE_INTEL_I82801EX diff --git a/src/mainboard/supermicro/x7db8/Kconfig b/src/mainboard/supermicro/x7db8/Kconfig index 7becacb..f5b0e11 100644 --- a/src/mainboard/supermicro/x7db8/Kconfig +++ b/src/mainboard/supermicro/x7db8/Kconfig @@ -2,7 +2,6 @@ if BOARD_SUPERMICRO_X7DB8 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_LGA771 select SOUTHBRIDGE_INTEL_I3100 select NORTHBRIDGE_INTEL_I5000 diff --git a/src/mainboard/technexion/tim5690/Kconfig b/src/mainboard/technexion/tim5690/Kconfig index c0aca27..072919d 100644 --- a/src/mainboard/technexion/tim5690/Kconfig +++ b/src/mainboard/technexion/tim5690/Kconfig @@ -2,7 +2,6 @@ if BOARD_TECHNEXION_TIM5690 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_S1G1 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_RS690 diff --git a/src/mainboard/technexion/tim8690/Kconfig b/src/mainboard/technexion/tim8690/Kconfig index 890b7ac..4e0b25a 100644 --- a/src/mainboard/technexion/tim8690/Kconfig +++ b/src/mainboard/technexion/tim8690/Kconfig @@ -2,7 +2,6 @@ if BOARD_TECHNEXION_TIM8690 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_S1G1 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_RS690 diff --git a/src/mainboard/technologic/ts5300/Kconfig b/src/mainboard/technologic/ts5300/Kconfig index 8def16d..0006fd7 100644 --- a/src/mainboard/technologic/ts5300/Kconfig +++ b/src/mainboard/technologic/ts5300/Kconfig @@ -2,7 +2,6 @@ if BOARD_TECHNOLOGIC_TS5300 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SC520 select ROMCC select HAVE_OPTION_TABLE diff --git a/src/mainboard/televideo/tc7020/Kconfig b/src/mainboard/televideo/tc7020/Kconfig index ab41e5b..6d77f59 100644 --- a/src/mainboard/televideo/tc7020/Kconfig +++ b/src/mainboard/televideo/tc7020/Kconfig @@ -20,7 +20,6 @@ if BOARD_TELEVIDEO_TC7020 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX1 select NORTHBRIDGE_AMD_GX1 select SOUTHBRIDGE_AMD_CS5530 diff --git a/src/mainboard/thomson/ip1000/Kconfig b/src/mainboard/thomson/ip1000/Kconfig index b1988dd..971c41c 100644 --- a/src/mainboard/thomson/ip1000/Kconfig +++ b/src/mainboard/thomson/ip1000/Kconfig @@ -2,7 +2,6 @@ if BOARD_THOMSON_IP1000 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MFCBGA479 select NORTHBRIDGE_INTEL_I82830 select SOUTHBRIDGE_INTEL_I82801DX diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig index c842a5d..7dd0edc 100644 --- a/src/mainboard/ti/beaglebone/Kconfig +++ b/src/mainboard/ti/beaglebone/Kconfig @@ -21,7 +21,6 @@ if BOARD_TI_BEAGLEBONE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_ARMV7 select CPU_TI_AM335X select BOARD_ROMSIZE_KB_4096 diff --git a/src/mainboard/traverse/geos/Kconfig b/src/mainboard/traverse/geos/Kconfig index 3139d7d..945ab09 100644 --- a/src/mainboard/traverse/geos/Kconfig +++ b/src/mainboard/traverse/geos/Kconfig @@ -2,7 +2,6 @@ if BOARD_TRAVERSE_GEOS config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/tyan/s1846/Kconfig b/src/mainboard/tyan/s1846/Kconfig index b4e6c92..e491d3f 100644 --- a/src/mainboard/tyan/s1846/Kconfig +++ b/src/mainboard/tyan/s1846/Kconfig @@ -20,7 +20,6 @@ if BOARD_TYAN_S1846 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SLOT_1 select NORTHBRIDGE_INTEL_I440BX select SOUTHBRIDGE_INTEL_I82371EB diff --git a/src/mainboard/tyan/s2735/Kconfig b/src/mainboard/tyan/s2735/Kconfig index f908908..a13db8b 100644 --- a/src/mainboard/tyan/s2735/Kconfig +++ b/src/mainboard/tyan/s2735/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2735 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_INTEL_SOCKET_MPGA604 select NORTHBRIDGE_INTEL_E7501 select SOUTHBRIDGE_INTEL_I82870 diff --git a/src/mainboard/tyan/s2850/Kconfig b/src/mainboard/tyan/s2850/Kconfig index 88ab969..e6e3df2 100644 --- a/src/mainboard/tyan/s2850/Kconfig +++ b/src/mainboard/tyan/s2850/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2850 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/tyan/s2875/Kconfig b/src/mainboard/tyan/s2875/Kconfig index 8e77709..30aa01e 100644 --- a/src/mainboard/tyan/s2875/Kconfig +++ b/src/mainboard/tyan/s2875/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2875 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8151 diff --git a/src/mainboard/tyan/s2880/Kconfig b/src/mainboard/tyan/s2880/Kconfig index c6fed4b..5186337 100644 --- a/src/mainboard/tyan/s2880/Kconfig +++ b/src/mainboard/tyan/s2880/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2880 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8131 diff --git a/src/mainboard/tyan/s2881/Kconfig b/src/mainboard/tyan/s2881/Kconfig index fcc93f3..6c759e1 100644 --- a/src/mainboard/tyan/s2881/Kconfig +++ b/src/mainboard/tyan/s2881/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2881 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8131 diff --git a/src/mainboard/tyan/s2882/Kconfig b/src/mainboard/tyan/s2882/Kconfig index 0a0909a..646b5a8 100644 --- a/src/mainboard/tyan/s2882/Kconfig +++ b/src/mainboard/tyan/s2882/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2882 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8131 diff --git a/src/mainboard/tyan/s2885/Kconfig b/src/mainboard/tyan/s2885/Kconfig index aab6732..86e43f8 100644 --- a/src/mainboard/tyan/s2885/Kconfig +++ b/src/mainboard/tyan/s2885/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2885 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/tyan/s2891/Kconfig b/src/mainboard/tyan/s2891/Kconfig index ddd7ed0..85206df 100644 --- a/src/mainboard/tyan/s2891/Kconfig +++ b/src/mainboard/tyan/s2891/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2891 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/tyan/s2892/Kconfig b/src/mainboard/tyan/s2892/Kconfig index ddf2901..a550942 100644 --- a/src/mainboard/tyan/s2892/Kconfig +++ b/src/mainboard/tyan/s2892/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2892 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/tyan/s2895/Kconfig b/src/mainboard/tyan/s2895/Kconfig index 0201eb4..c8510aa 100644 --- a/src/mainboard/tyan/s2895/Kconfig +++ b/src/mainboard/tyan/s2895/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2895 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 731cc5c..84be620 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2912 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/tyan/s2912_fam10/Kconfig b/src/mainboard/tyan/s2912_fam10/Kconfig index a7f9954..e13d7c4 100644 --- a/src/mainboard/tyan/s2912_fam10/Kconfig +++ b/src/mainboard/tyan/s2912_fam10/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S2912_FAM10 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_F_1207 select DIMM_DDR2 select DIMM_REGISTERED diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig index 449aa39..d4feacb 100644 --- a/src/mainboard/tyan/s4880/Kconfig +++ b/src/mainboard/tyan/s4880/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S4880 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig index ec1f7a9..2bd3854 100644 --- a/src/mainboard/tyan/s4882/Kconfig +++ b/src/mainboard/tyan/s4882/Kconfig @@ -2,7 +2,6 @@ if BOARD_TYAN_S4882 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_AMD_AMD8111 diff --git a/src/mainboard/tyan/s8226/Kconfig b/src/mainboard/tyan/s8226/Kconfig index e8d2f88..1aa5da4 100644 --- a/src/mainboard/tyan/s8226/Kconfig +++ b/src/mainboard/tyan/s8226/Kconfig @@ -21,7 +21,6 @@ if BOARD_TYAN_S8226 config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 select CPU_AMD_AGESA_FAMILY15 select CPU_AMD_SOCKET_C32 select NORTHBRIDGE_AMD_AGESA_FAMILY15 diff --git a/src/mainboard/via/epia-cn/Kconfig b/src/mainboard/via/epia-cn/Kconfig index e7920e7..266e7e9 100644 --- a/src/mainboard/via/epia-cn/Kconfig +++ b/src/mainboard/via/epia-cn/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_EPIA_CN config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C7 select NORTHBRIDGE_VIA_CN700 select SOUTHBRIDGE_VIA_VT8237R diff --git a/src/mainboard/via/epia-m/Kconfig b/src/mainboard/via/epia-m/Kconfig index 3e8a93d..f05c99c 100644 --- a/src/mainboard/via/epia-m/Kconfig +++ b/src/mainboard/via/epia-m/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_EPIA_M || BOARD_VIA_EPIA_MII || BOARD_VIA_EPIA_ML config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C3 select NORTHBRIDGE_VIA_VT8623 select SOUTHBRIDGE_VIA_VT8235 diff --git a/src/mainboard/via/epia-m700/Kconfig b/src/mainboard/via/epia-m700/Kconfig index fcadabc..c64f8d2 100644 --- a/src/mainboard/via/epia-m700/Kconfig +++ b/src/mainboard/via/epia-m700/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_EPIA_M700 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C7 select NORTHBRIDGE_VIA_VX800 select SUPERIO_WINBOND_W83697HF diff --git a/src/mainboard/via/epia-m850/Kconfig b/src/mainboard/via/epia-m850/Kconfig index 01ef032..65fd478 100644 --- a/src/mainboard/via/epia-m850/Kconfig +++ b/src/mainboard/via/epia-m850/Kconfig @@ -21,7 +21,6 @@ if BOARD_VIA_EPIA_M850 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_NANO select NORTHBRIDGE_VIA_VX900 select SUPERIO_FINTEK_F81865F diff --git a/src/mainboard/via/epia-mii/Kconfig b/src/mainboard/via/epia-mii/Kconfig index 6106ad2..ff31b93 100644 --- a/src/mainboard/via/epia-mii/Kconfig +++ b/src/mainboard/via/epia-mii/Kconfig @@ -1,7 +1,6 @@ if BOARD_VIA_EPIA_MII # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/via/epia-ml/Kconfig b/src/mainboard/via/epia-ml/Kconfig index 54eac0d..5e7b6ab 100644 --- a/src/mainboard/via/epia-ml/Kconfig +++ b/src/mainboard/via/epia-ml/Kconfig @@ -1,7 +1,6 @@ if BOARD_VIA_EPIA_ML # Dummy for abuild -#select ARCH_X86 config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/via/epia-n/Kconfig b/src/mainboard/via/epia-n/Kconfig index 2b327b7..3ea6878 100644 --- a/src/mainboard/via/epia-n/Kconfig +++ b/src/mainboard/via/epia-n/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_EPIA_N config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C3 select NORTHBRIDGE_VIA_CN400 select SOUTHBRIDGE_VIA_VT8237R diff --git a/src/mainboard/via/epia/Kconfig b/src/mainboard/via/epia/Kconfig index 60ce4f5..7ee1ed8 100644 --- a/src/mainboard/via/epia/Kconfig +++ b/src/mainboard/via/epia/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_EPIA config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C3 select NORTHBRIDGE_VIA_VT8601 select SOUTHBRIDGE_VIA_VT8231 diff --git a/src/mainboard/via/pc2500e/Kconfig b/src/mainboard/via/pc2500e/Kconfig index 70aa8d7..97f2088 100644 --- a/src/mainboard/via/pc2500e/Kconfig +++ b/src/mainboard/via/pc2500e/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_PC2500E config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C7 select NORTHBRIDGE_VIA_CN700 select SOUTHBRIDGE_VIA_VT8237R diff --git a/src/mainboard/via/vt8454c/Kconfig b/src/mainboard/via/vt8454c/Kconfig index 14eebe6..da71c87 100644 --- a/src/mainboard/via/vt8454c/Kconfig +++ b/src/mainboard/via/vt8454c/Kconfig @@ -2,7 +2,6 @@ if BOARD_VIA_VT8454C config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_VIA_C7 select NORTHBRIDGE_VIA_CX700 select SUPERIO_VIA_VT1211 diff --git a/src/mainboard/winent/mb6047/Kconfig b/src/mainboard/winent/mb6047/Kconfig index 507340c..ee34d1a 100644 --- a/src/mainboard/winent/mb6047/Kconfig +++ b/src/mainboard/winent/mb6047/Kconfig @@ -2,7 +2,6 @@ if BOARD_WINENT_MB6047 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_SOCKET_940 select NORTHBRIDGE_AMD_AMDK8 select SOUTHBRIDGE_NVIDIA_CK804 diff --git a/src/mainboard/winent/pl6064/Kconfig b/src/mainboard/winent/pl6064/Kconfig index 7db7de5..3a36f29 100644 --- a/src/mainboard/winent/pl6064/Kconfig +++ b/src/mainboard/winent/pl6064/Kconfig @@ -2,7 +2,6 @@ if BOARD_WINENT_PL6064 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_LX select NORTHBRIDGE_AMD_LX select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/mainboard/wyse/s50/Kconfig b/src/mainboard/wyse/s50/Kconfig index d8d2628..fbb5246 100644 --- a/src/mainboard/wyse/s50/Kconfig +++ b/src/mainboard/wyse/s50/Kconfig @@ -20,7 +20,6 @@ if BOARD_WYSE_S50 config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select ARCH_X86 select CPU_AMD_GEODE_GX2 select NORTHBRIDGE_AMD_GX2 select SOUTHBRIDGE_AMD_CS5536 diff --git a/src/soc/Kconfig b/src/soc/Kconfig index ac29205..823d76c 100644 --- a/src/soc/Kconfig +++ b/src/soc/Kconfig @@ -1,3 +1 @@ -if ARCH_X86 source src/soc/intel/Kconfig -endif diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 2360b36..1b3ee05 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -8,6 +8,7 @@ if SOC_INTEL_BAYTRAIL config CPU_SPECIFIC_OPTIONS def_bool y + select ARCH_X86 select CACHE_MRC_SETTINGS select CAR_MIGRATION select COLLECT_TIMESTAMPS diff --git a/util/abuild/abuild b/util/abuild/abuild index a5a57c9..fc49797 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -72,9 +72,6 @@ silent= # clang mode enabled by -sb option. scanbuild=false -# stackprotect mode enabled by -ns option. -stackprotect=false - ARCH=`uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \ -e s/i86pc/i386/ \ -e s/arm.*/arm/ -e s/sa110/arm/ -e s/x86_64/amd64/ \ @@ -284,80 +281,12 @@ function build_target return fi - # default setting - - CC="${CROSS_COMPILE}gcc" - CROSS_COMPILE="" - found_crosscompiler=false - if which $TARCH-elf-gcc 2>/dev/null >/dev/null; then - # i386-elf target needs --divide, for i386-linux, that's the default - if [ "$TARCH" = "i386" ]; then - CC="$CC -Wa,--divide" - fi - CROSS_COMPILE="$TARCH-elf-" - CC=gcc - CROSS_TEXT=", using $CROSS_COMPILE$CC" - found_crosscompiler=true - fi - HOSTCC='gcc' printf "Building $VENDOR/$MAINBOARD; " mkdir -p $TOP/$TARGET/${VENDOR}_${MAINBOARD} $TOP/$TARGET/abuild XMLFILE=$TOP/$TARGET/abuild/${VENDOR}_${MAINBOARD}.xml - if [ "$ARCH" = "$TARCH" -o $found_crosscompiler = true ]; then - printf "$TARCH: ok$CROSS_TEXT\n" - else - # FIXME this is basically the same as above. - found_crosscompiler=false - if [ "$ARCH" == amd64 -a "$TARCH" == i386 ]; then - CC="gcc -m32" - found_crosscompiler=true - fi - if [ "$ARCH" == ppc64 -a "$TARCH" == ppc ]; then - CC="gcc -m32" - found_crosscompiler=true - fi - if [ "$found_crosscompiler" == "false" -a "$TARCH" == ppc ];then - for prefix in powerpc-eabi- powerpc-linux- ppc_74xx- \ - powerpc-7450-linux-gnu- powerpc-elf-; do - if ${prefix}gcc --version > /dev/null 2> /dev/null ; then - found_crosscompiler=true - CROSS_COMPILE=$prefix - fi - done - fi - if [ "$found_crosscompiler" == "false" -a "$TARCH" == ARMV7 ];then - for prefix in armv7a-eabi- armv7-a-eabi- armv7a-cros-linux-gnueabi-; do - if ${prefix}gcc --version > /dev/null 2> /dev/null ; then - found_crosscompiler=true - CROSS_COMPILE=$prefix - fi - done - fi - - # TBD: look for suitable cross compiler suite - # cross-$TARCH-gcc and cross-$TARCH-ld - - # Check result: - if [ $found_crosscompiler == "false" ]; then - printf "$TARCH: skipped, we're $ARCH\n\n" - junit "<testcase classname='board' name='$TARCH/$VENDOR/$MAINBOARD' >" - junit " <failure type='NoCrossCompiler'>No cross-compiler for $TARCH found</failure>" - junit "</testcase>" - - return 0 - else - printf "$TARCH: ok, $ARCH using ${CROSS_COMPILE}gcc\n" - fi - fi - - CC=${CROSS_COMPILE}$CC - - if [ "$stackprotect" = "true" ]; then - CC="$CC -fno-stack-protector" - fi stime=`perl -e 'print time();' 2>/dev/null || date +%s` create_buildenv $VENDOR $MAINBOARD $CONFIG @@ -457,7 +386,6 @@ function myhelp printf " [-T|--test] submit image(s) to automated test system\n" printf " [-c|--cpus <numcpus>] build on <numcpus> at the same time\n" printf " [-s|--silent] omit compiler calls in logs\n" - printf " [-ns|--nostackprotect] use gcc -fno-stack-protector option\n" printf " [-sb|--scan-build] use clang's static analyzer\n" printf " [-y|--ccache] use ccache\n" printf " [-C|--config] configure-only mode\n" @@ -505,7 +433,7 @@ cmdline="$* -c 1" getoptbrand="`getopt -V`" if [ "${getoptbrand:0:6}" == "getopt" ]; then # Detected GNU getopt that supports long options. - args=`getopt -l version,verbose,help,all,target:,payloads:,test,cpus:,silent,junit,config,loglevel:,remove,prefix:,update,nostackprotect,scan-build,ccache,blobs -o Vvhat:p:Tc:sJCl:rP:uyB -- "$@"` || exit 1 + args=`getopt -l version,verbose,help,all,target:,payloads:,test,cpus:,silent,junit,config,loglevel:,remove,prefix:,update,scan-build,ccache,blobs -o Vvhat:p:Tc:sJCl:rP:uyB -- "$@"` || exit 1 eval set -- $args else # Detected non-GNU getopt @@ -539,7 +467,6 @@ while true ; do expr "$1" : '-\?[0-9]\+$' > /dev/null && test 0$1 -gt 1 && cpuconfig="on $1 cpus in parallel" shift;; -s|--silent) shift; silent="-s";; - -ns|--nostackprotect) shift; stackprotect=true;; -sb|--scan-build) shift scanbuild=true customizing="${customizing}, scan-build"

1 0

Patch set updated for coreboot: 573fa0e Introduce stage-specific architecture for coreboot
by Furquan Shaikh 28 Apr '14

28 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5577 -gerrit commit 573fa0e845d81d58593505de72b048193ebadc41 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Apr 23 10:18:48 2014 -0700 Introduce stage-specific architecture for coreboot Make all three coreboot stages (bootblock, romstage and ramstage) aware of the architecture specific to that stage i.e. we will have CONFIG_ARCH variables for each of the three stages. This allows us to have an SOC with any combination of architectures and thus every stage can be made to run on a completely different architecture independent of others. Thus, bootblock can have an x86 arch whereas romstage and ramstage can have arm32 and arm64 arch respectively. These arch specific options can be considered as either arch or modes eg: x86 running in different modes or ARM having different arch types (v4, v7, v8). In addition to different architectures/modes per stage, a separate binary arch is introduced to help to indentify the arch of CBFS binaries. Also, for now this arch type is used at places which are not clearly part of any of the above stages (eg seabios and others). The original CONFIG_ARCH variable is thus removed and replaced by CONFIG_BINARY_ARCH. Ultimate goal is to get rid of all the occurences of CONFIG_BINARY_ARCH and when we understand the arch for currently not-so-sure components. However, the general idea is that CONFIG_BINARY_ARCH should be declared as the topmost arch of the SoC or the arch which is actually responsible for loading the kernel. In order to meet these requirements, changes have been made to CC, LD, OBJCOPY and family to add CC_bootblock, CC_romstage, CC_ramstage, CC_binary and similarly others. Few additional macros have been introduced to identify the class to be used at various points, e.g.: CC_$(class) derives the $(class) part from the name of the stage being compiled. Change-Id: I923f3d4fb097d21071030b104c372cc138c68c7b Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile | 90 +++++++++++++++++++++-------- Makefile.inc | 66 +++++++++++++-------- src/Kconfig | 50 ++++++++++++---- src/arch/armv7/Makefile.inc | 50 ++++++++++------ src/arch/x86/Kconfig | 4 +- src/arch/x86/Makefile.inc | 85 +++++++++++++++++---------- src/arch/x86/boot/Makefile.inc | 8 +++ src/arch/x86/lib/Makefile.inc | 21 +++++-- src/console/Kconfig | 2 +- src/cpu/Kconfig | 6 +- src/cpu/Makefile.inc | 4 +- src/cpu/allwinner/a10/Kconfig | 5 +- src/cpu/amd/agesa/Kconfig | 5 +- src/cpu/amd/geode_gx1/Kconfig | 5 +- src/cpu/amd/geode_gx2/Kconfig | 5 +- src/cpu/amd/geode_lx/Kconfig | 5 +- src/cpu/amd/model_10xxx/Kconfig | 5 +- src/cpu/amd/model_fxx/Kconfig | 5 +- src/cpu/amd/sc520/Kconfig | 5 +- src/cpu/armltd/cortex-a9/Kconfig | 5 +- src/cpu/dmp/vortex86ex/Kconfig | 5 +- src/cpu/intel/ep80579/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Kconfig | 5 +- src/cpu/intel/fsp_model_206ax/Makefile.inc | 2 +- src/cpu/intel/haswell/Kconfig | 5 +- src/cpu/intel/haswell/Makefile.inc | 6 +- src/cpu/intel/model_1067x/Kconfig | 5 +- src/cpu/intel/model_106cx/Kconfig | 5 +- src/cpu/intel/model_2065x/Kconfig | 5 +- src/cpu/intel/model_206ax/Kconfig | 5 +- src/cpu/intel/model_65x/Kconfig | 5 +- src/cpu/intel/model_67x/Kconfig | 5 +- src/cpu/intel/model_68x/Kconfig | 5 +- src/cpu/intel/model_69x/Kconfig | 5 +- src/cpu/intel/model_6bx/Kconfig | 5 +- src/cpu/intel/model_6dx/Kconfig | 5 +- src/cpu/intel/model_6ex/Kconfig | 5 +- src/cpu/intel/model_6fx/Kconfig | 5 +- src/cpu/intel/model_6xx/Kconfig | 5 +- src/cpu/intel/model_f0x/Kconfig | 5 +- src/cpu/intel/model_f1x/Kconfig | 5 +- src/cpu/intel/model_f2x/Kconfig | 5 +- src/cpu/intel/model_f3x/Kconfig | 5 +- src/cpu/intel/model_f4x/Kconfig | 5 +- src/cpu/qemu-x86/Kconfig | 5 +- src/cpu/samsung/exynos5250/Kconfig | 5 +- src/cpu/samsung/exynos5420/Kconfig | 5 +- src/cpu/ti/am335x/Kconfig | 5 +- src/cpu/ti/am335x/Makefile.inc | 4 +- src/cpu/via/c3/Kconfig | 5 +- src/cpu/via/c7/Kconfig | 5 +- src/cpu/via/nano/Kconfig | 5 +- src/cpu/x86/Makefile.inc | 6 +- src/cpu/x86/smm/Makefile.inc | 26 ++++----- src/device/Kconfig | 8 +-- src/device/Makefile.inc | 2 +- src/device/device.c | 4 +- src/device/oprom/include/io.h | 2 +- src/device/oprom/yabel/compat/functions.c | 2 +- src/device/oprom/yabel/device.h | 8 +-- src/device/oprom/yabel/io.c | 2 +- src/drivers/Makefile.inc | 2 +- src/drivers/pc80/mc146818rtc.c | 2 +- src/drivers/uart/Kconfig | 4 +- src/ec/google/chromeec/Kconfig | 2 +- src/lib/Makefile.inc | 8 +-- src/lib/cbfs_core.c | 2 +- src/lib/coreboot_table.c | 2 +- src/mainboard/advansus/a785e-i/Makefile.inc | 2 +- src/mainboard/asus/m5a88-v/Makefile.inc | 2 +- src/mainboard/avalue/eax-785e/Makefile.inc | 2 +- src/mainboard/bifferos/bifferboard/Kconfig | 5 +- src/soc/intel/baytrail/Kconfig | 5 +- src/superio/Makefile.inc | 2 +- src/vendorcode/amd/agesa/f10/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f12/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f14/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f15tn/Makefile.inc | 5 +- src/vendorcode/amd/agesa/f16kb/Makefile.inc | 5 +- src/vendorcode/amd/cimx/rd890/Makefile.inc | 6 +- src/vendorcode/amd/cimx/sb700/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb800/Makefile.inc | 5 +- src/vendorcode/amd/cimx/sb900/Makefile.inc | 5 +- src/vendorcode/google/chromeos/Makefile.inc | 17 +++--- src/vendorcode/intel/Makefile.inc | 5 +- 86 files changed, 529 insertions(+), 232 deletions(-) diff --git a/Makefile b/Makefile index b709d14..5207bba 100644 --- a/Makefile +++ b/Makefile @@ -113,33 +113,74 @@ else include $(HAVE_DOTCONFIG) -ARCHDIR-$(CONFIG_ARCH_ARMV7) := armv7 -ARCHDIR-$(CONFIG_ARCH_X86) := x86 +# Each stage of coreboot can have a different arch. For this we need separate +# config vars +# bootblock arch +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_ARMV7) := armv7 +ARCH-BOOTBLOCK-$(CONFIG_ARCH_BOOTBLOCK_X86) := i386 -ARCH-y := $(ARCHDIR-y) +# romstage arch +ARCH-ROMSTAGE-$(CONFIG_ARCH_BOOTBLOCK_ARMV7) := armv7 +ARCH-ROMSTAGE-$(CONFIG_ARCH_BOOTBLOCK_X86) := i386 -# If architecture folder name is different from GCC binutils architecture name, -# override here. -ARCH-$(CONFIG_ARCH_ARMV7) := armv7 -ARCH-$(CONFIG_ARCH_X86) := i386 +# ramstage arch +ARCH-RAMSTAGE-$(CONFIG_ARCH_BOOTBLOCK_ARMV7) := armv7 +ARCH-RAMSTAGE-$(CONFIG_ARCH_BOOTBLOCK_X86) := i386 -ifneq ($(INNER_SCANBUILD),y) -CC := $(CC_$(ARCH-y)) -endif -CPP := $(CPP_$(ARCH-y)) -AS := $(AS_$(ARCH-y)) -LD := $(LD_$(ARCH-y)) -NM := $(NM_$(ARCH-y)) -OBJCOPY := $(OBJCOPY_$(ARCH-y)) -OBJDUMP := $(OBJDUMP_$(ARCH-y)) -READELF := $(READELF_$(ARCH-y)) -STRIP := $(STRIP_$(ARCH-y)) -AR := $(AR_$(ARCH-y)) +# overall binary arch +ARCH-BINARY-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-BINARY-$(CONFIG_ARCH_BINARY_X86) := i386 -CFLAGS += $(CFLAGS_$(ARCH-y)) +ARCHDIR-armv7 := armv7 +ARCHDIR-i386 := x86 -LIBGCC_FILE_NAME := $(shell test -r `$(CC) -print-libgcc-file-name` && \ - $(CC) -print-libgcc-file-name) +# If architecture folder name is different from GCC binutils architecture name, +# override here. +ARCH-$(CONFIG_ARCH_BINARY_ARMV7) := armv7 +ARCH-$(CONFIG_ARCH_BINARY_X86) := i386 + +# Since there can be a different arch for each stage, we can have a different cc +# for each stage +CC_bootblock := $(CC_$(ARCH-BOOTBLOCK-y)) +CC_romstage := $(CC_$(ARCH-ROMSTAGE-y)) +CC_ramstage := $(CC_$(ARCH-RAMSTAGE-y)) +CC_binary := $(CC_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different nm +# for each stage +NM_bootblock := $(NM_$(ARCH-BOOTBLOCK-y)) +NM_romstage := $(NM_$(ARCH-ROMSTAGE-y)) +NM_ramstage := $(NM_$(ARCH-RAMSTAGE-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) + +# Since there can be a different arch for each stage, we can have a different +# objcopy for each stage +OBJCOPY_bootblock := $(OBJCOPY_$(ARCH-BOOTBLOCK-y)) +OBJCOPY_romstage := $(OBJCOPY_$(ARCH-ROMSTAGE-y)) +OBJCOPY_ramstage := $(OBJCOPY_$(ARCH-RAMSTAGE-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) + +# CFLAGS +CFLAGS_bootblock += $(CFLAGS_$(ARCH-BOOTBLOCK-y)) +CFLAGS_romstage += $(CFLAGS_$(ARCH-ROMSTAGE-y)) +CFLAGS_ramstage += $(CFLAGS_$(ARCH-RAMSTAGE-y)) +CFLAGS_binary += $(CFLAGS_$(ARCH-BINARY-y)) + +AS_binary := $(AS_$(ARCH-BINARY-y)) +LD_binary := $(LD_$(ARCH-BINARY-y)) +NM_binary := $(NM_$(ARCH-BINARY-y)) +OBJCOPY_binary := $(OBJCOPY_$(ARCH-BINARY-y)) +OBJDUMP_binary := $(OBJDUMP_$(ARCH-BINARY-y)) +READELF_binary := $(READELF_$(ARCH-BINARY-y)) +STRIP_binary := $(STRIP_$(ARCH-BINARY-y)) +AR_binary := $(AR_$(ARCH-BINARY-y)) + +LIBGCC_FILE_NAME_bootblock := $(shell test -r `$(CC_bootblock) -print-libgcc-file-name` && \ + $(CC_bootblock) -print-libgcc-file-name) +LIBGCC_FILE_NAME_romstage := $(shell test -r `$(CC_romstage) -print-libgcc-file-name` && \ + $(CC_romstage) -print-libgcc-file-name) +LIBGCC_FILE_NAME_ramstage := $(shell test -r `$(CC_ramstage) -print-libgcc-file-name` && \ + $(CC_ramstage) -print-libgcc-file-name) ifneq ($(INNER_SCANBUILD),y) ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) @@ -264,7 +305,8 @@ ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h $(4) @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" - $(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$< + $(eval cc-class := $(call find-class-comm,$(class))) + $(CC_$(cc-class)) $(3) -MMD $$$$(CFLAGS_$(cc-class)) -c -o $$$$@ $$$$< en$(EMPTY)def end$(EMPTY)if endef @@ -285,7 +327,7 @@ printall: @echo alldirs:=$(alldirs) @echo allsrcs=$(allsrcs) @echo DEPENDENCIES=$(DEPENDENCIES) - @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME) + @echo LIBGCC_FILE_NAME=$(LIBGCC_FILE_NAME_$(class)) @$(foreach class,$(special-classes),echo $(class):='$($(class))'; ) endif diff --git a/Makefile.inc b/Makefile.inc index 326358e..90337c0 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -65,7 +65,7 @@ PHONY+= clean-abuild coreboot lint lint-stable build-dirs subdirs-y := src/lib src/console src/device src/ec src/southbridge src/soc subdirs-y += src/northbridge src/superio src/drivers src/cpu src/vendorcode subdirs-y += util/cbfstool util/sconfig util/nvramtool -subdirs-y += src/arch/$(ARCHDIR-y) +subdirs-y += src/arch/armv7 src/arch/x86 subdirs-y += src/mainboard/$(MAINBOARDDIR) subdirs-y += site-local @@ -105,7 +105,7 @@ files-in-dir=$(filter-out $(call dir-wildcards,$(call filter-out-dirs,$(1),$(dir # reduce command line length by linking the objects of each # directory into an intermediate file ramstage-postprocess=$(foreach d,$(sort $(dir $(1))), \ - $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD) -o $$@ -r $$^ ) \ + $(eval $(d)ramstage.o: $(call files-in-dir,$(d),$(1)); $$(LD_binary) -o $$@ -r $$^ ) \ $(eval ramstage-objs:=$(d)ramstage.o $(filter-out $(call files-in-dir,$(d),$(1)),$(ramstage-objs)))) romstage-c-ccopts:=-D__PRE_RAM__ @@ -146,10 +146,10 @@ smm-c-deps:=$$(OPTION_TABLE_H) define ramstage-objs_asl_template $(obj)/$(1).ramstage.o: src/$(1).asl $(obj)/config.h @printf " IASL $$(subst $(top)/,,$$(@))\n" - $(CC) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-y)/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl + $(CC_ramstage) -x assembler-with-cpp -E -MMD -MT $$(@) -D__ACPI__ -P -include $(src)/include/kconfig.h -I$(obj) -I$(src) -I$(src)/include -I$(src)/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include -I$(src)/mainboard/$(MAINBOARDDIR) $$< -o $$(basename $$(a)).asl cd $$(dir $$@); $(IASL) -p $$(notdir $$@) -tc $$(notdir $$(basename $$(a))).asl mv $$(basename $$(a)).hex $$(basename $$(a)).c - $(CC) $$(CFLAGS) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c + $(CC_ramstage) $$(CFLAGS_ramstage) $$(if $$(subst dsdt,,$$(basename $$(notdir $(1)))), -DAmlCode=AmlCode_$$(basename $$(notdir $(1)))) -c -o $$@ $$(basename $$(a)).c # keep %.o: %.c rule from catching the temporary .c file after a make clean mv $$(basename $$(a)).c $$(basename $$(a)).hex endef @@ -168,7 +168,7 @@ cbfs-files-processor-nvramtool= \ # arg2: binary file name cbfs-files-processor-vsa= \ $(eval $(2): $(1) ; \ - printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) + printf " CREATE $(2) (from $(1))\n"; $(OBJCOPY_binary) --set-start 0x20 --adjust-vma 0x60000 -I binary -O elf32-i386 -B i386 $(1) $(2).tmp && $(LD_binary) -m elf_i386 -e 0x60020 --section-start .data=0x60000 $(2).tmp -o $(2)) ####################################################################### # Add handler for arbitrary files in CBFS @@ -211,19 +211,29 @@ ifneq ($(CONFIG_LOCALVERSION),"") COREBOOT_EXTRA_VERSION := -$(call strip_quotes,$(CONFIG_LOCALVERSION)) endif -INCLUDES := -Isrc -Isrc/include -I$(obj) -Isrc/arch/$(ARCHDIR-y)/include +INCLUDES := -Isrc -Isrc/include -I$(obj) INCLUDES += -Isrc/device/oprom/include # abspath is a workaround for romcc INCLUDES += -include $(src)/include/kconfig.h -CFLAGS = $(INCLUDES) -Os -pipe -g -nostdinc -CFLAGS += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs -CFLAGS += -Wstrict-aliasing -Wshadow +INCLUDES_binary := -Isrc/arch/$(ARCHDIR-$(ARCH-BINARY-y))/include +INCLUDES_bootblock := -Isrc/arch/$(ARCHDIR-$(ARCH-BOOTBLOCK-y))/include +INCLUDES_romstage := -Isrc/arch/$(ARCHDIR-$(ARCH-ROMSTAGE-y))/include +INCLUDES_ramstage := -Isrc/arch/$(ARCHDIR-$(ARCH-RAMSTAGE-y))/include + +CFLAGS_common = $(INCLUDES) -Os -pipe -g -nostdinc +CFLAGS_common += -nostdlib -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes +CFLAGS_common += -Wwrite-strings -Wredundant-decls -Wno-trigraphs +CFLAGS_common += -Wstrict-aliasing -Wshadow ifeq ($(CONFIG_WARNINGS_ARE_ERRORS),y) -CFLAGS += -Werror +CFLAGS_common += -Werror endif -CFLAGS += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer +CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer + +CFLAGS_binary = $(CFLAGS_common) $(INCLUDES_binary) +CFLAGS_bootblock = $(CFLAGS_common) $(INCLUDES_bootblock) +CFLAGS_romstage = $(CFLAGS_common) $(INCLUDES_romstage) +CFLAGS_ramstage = $(CFLAGS_common) $(INCLUDES_ramstage) additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \ $(objutil)/ifdfake $(objutil)/options @@ -245,9 +255,9 @@ $(obj)/build.h: .xcompile printf "#define COREBOOT_BUILD_WEEKDAY_BCD 0x`LANG= date +"%w"`\n" >> $(obj)/build.ht printf "#define COREBOOT_DMI_DATE \"`LANG= date +"%m/%d/%Y"`\"\n" >> $(obj)/build.ht printf "\n" >> $(obj)/build.ht - printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS) --version | head -n1)\"\n" >> $(obj)/build.ht - printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_COMPILER \"$(shell LANG= $(CC_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_ASSEMBLER \"$(shell LANG= $(AS_binary) --version | head -n1)\"\n" >> $(obj)/build.ht + printf "#define COREBOOT_LINKER \"$(shell LANG= $(LD_binary) --version | head -n1)\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_TIME \"`LANG= date +%T`\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_BY \"$(subst \,@,$(shell PATH=$$PATH:/usr/ucb whoami))\"\n" >> $(obj)/build.ht printf "#define COREBOOT_COMPILE_HOST \"$(shell hostname -s 2>/dev/null || hostname 2>/dev/null)\"\n" >> $(obj)/build.ht @@ -315,15 +325,15 @@ $(objutil)/%.o: $(objutil)/%.c $(obj)/%.ramstage.o $(abspath $(obj))/%.ramstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(CFLAGS) -c -o $@ $< + $(CC_ramstage) -MMD $(CFLAGS_ramstage) -c -o $@ $< $(obj)/%.romstage.o $(abspath $(obj))/%.romstage.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -D__PRE_RAM__ $(CFLAGS) -c -o $@ $< + $(CC_romstage) -MMD -D__PRE_RAM__ $(CFLAGS_romstage) -c -o $@ $< $(obj)/%.bootblock.o $(abspath $(obj))/%.bootblock.o: $(obj)/%.c $(obj)/config.h $(OPTION_TABLE_H) @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD $(bootblock-c-ccopts) $(CFLAGS) -c -o $@ $< + $(CC_bootblock) -MMD $(bootblock-c-ccopts) $(CFLAGS_bootblock) -c -o $@ $< ####################################################################### # Clean up rules @@ -339,7 +349,7 @@ clean-for-update-target: rm -f $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc rm -f $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.* $(obj)/mainboard/$(MAINBOARDDIR)/dsdt.* rm -f $(obj)/cpu/x86/smm/smm_bin.c $(obj)/cpu/x86/smm/smm.* $(obj)/cpu/x86/smm/smm - $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC)" LD="$(LD)" + $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc clean OUT=$(abspath $(obj)) HOSTCC="$(HOSTCC)" CC="$(CC_binary)" LD="$(LD_binary)" clean-target: rm -f $(obj)/coreboot* @@ -412,16 +422,22 @@ tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/ # Common recipes for all stages ######################################################################################################################################################################## +find-class = $(if $(filter $(1),$(basename $(1))),$(1),$(call find-class,$(basename $(1)))) + +find-class-comm = $(if $(CC_$(call find-class,$(1))),$(call find-class,$(1)),binary) + $(objcbfs)/%.bin: $(objcbfs)/%.elf + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_$(class)) -O binary $< $@ $(objcbfs)/%.elf: $(objcbfs)/%.debug + $(eval class := $(call find-class-comm,$(@F))) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" cp $< $@.tmp - $(NM) -n $@.tmp | sort > $(basename $(a)).map - $(OBJCOPY) --strip-debug $@.tmp - $(OBJCOPY) --add-gnu-debuglink=$< $@.tmp + $(NM_$(class)) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_$(class)) --strip-debug $@.tmp + $(OBJCOPY_$(class)) --add-gnu-debuglink=$< $@.tmp mv $@.tmp $@ ######################################################################################################################################################################## @@ -550,10 +566,10 @@ cbfs-files-$(CONFIG_BOOTSPLASH) += bootsplash.jpg bootsplash.jpg-file := $(call strip_quotes,$(CONFIG_BOOTSPLASH_FILE)) bootsplash.jpg-type := bootsplash -ifeq ($(CONFIG_ARCH_ARMV7),y) +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) ROMSTAGE_ELF := romstage.elf endif -ifeq ($(CONFIG_ARCH_X86),y) +ifeq ($(CONFIG_ARCH_BINARY_X86),y) ROMSTAGE_ELF := romstage_xip.elf endif diff --git a/src/Kconfig b/src/Kconfig index 6356b19..e85ab62 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -228,22 +228,50 @@ source src/mainboard/Kconfig # This option is used to set the architecture of a mainboard to X86. # It is usually set in mainboard/*/Kconfig. -config ARCH_X86 +config ARCH_BINARY_X86 bool default n select PCI -config ARCH_ARMV7 +config ARCH_BINARY_ARMV7 bool default n +# This option is used to set the architecture of bootblock stage +config ARCH_BOOTBLOCK_ARMV7 + bool + default n + +config ARCH_BOOTBLOCK_X86 + bool + default n + +# This option is used to set the architecture of romstage stage +config ARCH_ROMSTAGE_ARMV7 + bool + default n + +config ARCH_ROMSTAGE_X86 + bool + default n + +# This option is used to set the architecture of ramstage stage +config ARCH_RAMSTAGE_ARMV7 + bool + default n + +config ARCH_RAMSTAGE_X86 + bool + default n + + # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_X86 +if ARCH_BINARY_X86 source src/arch/x86/Kconfig endif -if ARCH_ARMV7 +if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig endif @@ -334,7 +362,7 @@ config TIMER_QUEUE config COOP_MULTITASKING def_bool n - depends on TIMER_QUEUE && ARCH_X86 + depends on TIMER_QUEUE && ARCH_BINARY_X86 help Cooperative multitasking allows callbacks to be multiplexed on the main thread of ramstage. With this enabled it allows for multiple @@ -433,7 +461,7 @@ config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM by the board and/or chipset. config HAVE_REFCODE_BLOB - depends on ARCH_X86 + depends on ARCH_BINARY_X86 bool "An external reference code blob should be put into cbfs." default n help @@ -518,7 +546,7 @@ config GENERATE_PIRQ_TABLE If unsure, say Y. config GENERATE_SMBIOS_TABLES - depends on ARCH_X86 + depends on ARCH_BINARY_X86 bool "Generate SMBIOS tables" default y help @@ -532,8 +560,8 @@ menu "Payload" choice prompt "Add a payload" - default PAYLOAD_NONE if !ARCH_X86 - default PAYLOAD_SEABIOS if ARCH_X86 + default PAYLOAD_NONE if !ARCH_BINARY_X86 + default PAYLOAD_SEABIOS if ARCH_BINARY_X86 config PAYLOAD_NONE bool "None" @@ -567,7 +595,7 @@ config PAYLOAD_LINUX config PAYLOAD_SEABIOS bool "SeaBIOS" - depends on ARCH_X86 + depends on ARCH_BINARY_X86 help Select this option if you want to build a coreboot image with a SeaBIOS payload. If you don't know what this is @@ -1115,7 +1143,7 @@ config POWER_BUTTON_IS_OPTIONAL config REG_SCRIPT bool - default y if ARCH_X86 + default y if ARCH_BINARY_X86 default n help Internal option that controls whether we compile in register scripts. diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index aa85cc6..e90716a 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -32,6 +32,7 @@ subdirs-y += lib/ # ARM specific options ################################################################################ +ifeq ($(CONFIG_ARCH_BINARY_ARMV7),y) COREBOOT_PRE1_OPTS = -m armv7 -b $(CONFIG_BOOTBLOCK_ROM_OFFSET) -H $(CONFIG_CBFS_HEADER_ROM_OFFSET) -o $(CONFIG_CBFS_ROM_OFFSET) COREBOOT_PRE_OPTS = -b 0 @@ -40,20 +41,23 @@ stages_o = $(obj)/arch/armv7/stages.o $(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -I. $(INCLUDES) -c -o $@ $< -marm + $(CC_binary) -I. $(INCLUDES) $(INCLUDES_binary) -c -o $@ $< -marm -CFLAGS += \ +CFLAGS_common += \ -ffixed-r8\ -march=armv7-a\ -marm\ -mno-unaligned-access\ -mthumb\ -mthumb-interwork +endif # CONFIG_ARCH_BINARY_ARMV7 ################################################################################ # Bootblock ################################################################################ +ifeq ($(CONFIG_ARCH_BOOTBLOCK_ARMV7),y) + bootblock-y += cache.c bootblock-y += eabi_compat.c bootblock-y += memset.S @@ -81,31 +85,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_bootblock) $(bootblock-S-ccopts) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ + $(CC_bootblock) $(bootblock-c-ccopts) $(INCLUDES) $(INCLUDES_bootblock) -MM \ -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ + $(CC_bootblock) $(bootblock-c-ccopts) -c -S $(CFLAGS_bootblock) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_bootblock) -nostdlib -nostartfiles -include $(obj)/config.h -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $(objgenerated)/bootblock.o $(bootblock-objs) $(stages) $(LIBGCC_FILE_NAME_bootblock) -Wl,--end-group endif +endif # CONFIG_ARCH_BOOTBLOCK_ARMV7 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV7),y) + romstage-y += cache.c romstage-y += div0.c romstage-y += eabi_compat.c @@ -132,9 +140,9 @@ crt0s += $(cpu_incs-y) $(objcbfs)/romstage.debug: $$(romstage-objs) $(stages_o) $(objgenerated)/romstage.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) $(romstage-objs) -T $(objgenerated)/romstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage.ld -Wl,--start-group $(romstage-objs) $(stages_o) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage.ld: $$(ldscripts) $(obj)/ldoptions @@ -149,21 +157,24 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) -Wa,-acdlns -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_ARMV7 ################################################################################ # Ramstage ################################################################################ -# Things that appear in every board +ifeq ($(CONFIG_ARCH_RAMSTAGE_ARMV7),y) + ramstage-y += exception.c ramstage-y += exception_asm.S ramstage-y += div0.c @@ -183,17 +194,17 @@ ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/armv7/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld + $(LD_ramstage) -m armelf_linux_eabi -o $@ -L$(obj) $< -T $(src)/arch/armv7/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/armv7/ramstage.ld $< endif -$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME) +$(objgenerated)/ramstage.o: $(stages_o) $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m -m armelf_linux_eabi -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --wrap __uidiv --start-group $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--start-group $(stages_o) $(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif ifeq ($(CONFIG_GENERATE_PIRQ_TABLE),y) @@ -220,3 +231,4 @@ ifeq ($(CONFIG_HAVE_BUS_CONFIG),y) ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/get_bus_conf.c endif +endif # CONFIG_ARCH_RAMSTAGE_ARMV7 \ No newline at end of file diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8854e6b..36c9356 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -13,14 +13,14 @@ config X86_ARCH_OPTIONS config AP_IN_SIPI_WAIT bool default n - depends on ARCH_X86 && SMP + depends on ARCH_BINARY_X86 && SMP # Aligns 16bit entry code in bootblock so that hyper-threading CPUs # can boot AP CPUs to enable their shared caches. config SIPI_VECTOR_IN_ROM bool default n - depends on ARCH_X86 + depends on ARCH_BINARY_X86 config RAMBASE hex diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index a09c66f..4d96f2f 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -53,9 +53,13 @@ cbfs-files-$(CONFIG_INTEL_MBI) += mbi.bin mbi.bin-file := $(call strip_quotes,$(CONFIG_MBI_FILE)) mbi.bin-type := mbi +ifeq ($(CONFIG_ARCH_BINARY_X86),y) + COREBOOT_PRE1_OPTS = -m x86 -o $$(( $(CONFIG_ROM_SIZE) - $(CONFIG_CBFS_SIZE) )) COREBOOT_PRE_OPTS = -b $(shell cat $(objcbfs)/base_xip.txt) +endif + ################################################################################ # i386 specific tools NVRAMTOOL:=$(objutil)/nvramtool/nvramtool @@ -75,6 +79,8 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l # Build the bootblock +ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86),y) + bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds @@ -114,31 +120,35 @@ $(objgenerated)/bootblock_inc.S: $$(bootblock_inc) printf '$(foreach crt0,$(bootblock_inc),#include "$(crt0)"\n)' > $@ $(objgenerated)/bootblock.o: $(objgenerated)/bootblock.s - @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + @printf " CC $(subst $(obj)/,,$(@))\n" + $(CC_bootblock) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ + $(CC_bootblock) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ $(objgenerated)/bootblock.inc: $(src)/arch/x86/init/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(objutil)/romcc/romcc $(OPTION_TABLE_H) @printf " ROMCC $(subst $(obj)/,,$(@))\n" - $(CC) $(INCLUDES) -MM -MT$(objgenerated)/bootblock.inc \ + $(CC_bootblock) $(INCLUDES) $(INCLUDES_bootblock) -MM -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d - $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(bootblock_romccflags) -I. $(INCLUDES) $(INCLUDES_bootblock) $< -o $@ $(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld + $(LD_bootblock) -m elf_i386 -static -o $@ -L$(obj) $< -T $(objgenerated)/bootblock.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< + $(CC_bootblock) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $< endif +endif # CONFIG_ARCH_BOOTBLOCK_X86 + ################################################################################ # Romstage ################################################################################ +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + crt0s = $(src)/arch/x86/init/prologue.inc ldscripts = ldscripts += $(src)/arch/x86/init/romstage.ld @@ -170,14 +180,26 @@ else ROMCCFLAGS := -mcpu=i386 -O2 # !MMX, !SSE endif +$(objcbfs)/romstage_%.bin: $(objcbfs)/romstage_%.elf + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + $(OBJCOPY_romstage) -O binary $< $@ + +$(objcbfs)/romstage_%.elf: $(objcbfs)/romstage_%.debug + @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" + cp $< $@.tmp + $(NM_romstage) -n $@.tmp | sort > $(basename $(a)).map + $(OBJCOPY_romstage) --strip-debug $@.tmp + $(OBJCOPY_romstage) --add-gnu-debuglink=$< $@.tmp + mv $@.tmp $@ + $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(objutil)/romcc/romcc $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h printf " ROMCC romstage.inc\n" - $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $< -o $@ + $(ROMCC) -c -S $(ROMCCFLAGS) -D__PRE_RAM__ -I. $(INCLUDES) $(INCLUDES_romstage) $< -o $@ else $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc: $(src)/mainboard/$(MAINBOARDDIR)/romstage.c $(OPTION_TABLE_H) $(obj)/build.h $(obj)/config.h @printf " CC romstage.inc\n" - $(CC) -MMD $(CFLAGS) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ + $(CC_romstage) -MMD $(CFLAGS_romstage) -D__PRE_RAM__ -I$(src) -I. -I$(obj) -c -S $< -o $@ $(obj)/mainboard/$(MAINBOARDDIR)/romstage.inc: $(obj)/mainboard/$(MAINBOARDDIR)/romstage.pre.inc @printf " POST romstage.inc\n" @@ -195,21 +217,21 @@ romstage-libs ?= $(objcbfs)/romstage_null.debug: $$(romstage-objs) $(objgenerated)/romstage_null.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_null.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_null.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_null.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif - $(NM) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ + $(NM_romstage) $@ | grep -q " [DdBb] "; if [ $$? -eq 0 ]; then \ echo "Forbidden global variables in romstage:"; \ - $(NM) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ + $(NM_romstage) $@ | grep " [DdBb] "; test "$(CONFIG_CPU_AMD_AGESA)" = y; \ else true; fi $(objcbfs)/romstage_xip.debug: $$(romstage-objs) $(objgenerated)/romstage_xip.ld $$(romstage-libs) @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) --end-group -T $(objgenerated)/romstage_xip.ld + $(LD_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) --end-group -T $(objgenerated)/romstage_xip.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_romstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/romstage_xip.ld -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(romstage-objs) $(romstage-libs) $(LIBGCC_FILE_NAME_romstage) -Wl,--end-group endif $(objgenerated)/romstage_null.ld: $$(ldscripts) $(obj)/ldoptions @@ -238,16 +260,20 @@ $(objgenerated)/crt0.romstage.S: $$(crt0s) $(objgenerated)/crt0.romstage.o: $(objgenerated)/crt0.s @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm + $(CC_romstage) $(DISASSEMBLY) -c -o $@ $< > $(basename $(a)).disasm $(objgenerated)/crt0.s: $(objgenerated)/crt0.romstage.S $(obj)/config.h $(obj)/build.h @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + $(CC_romstage) $(INCLUDES) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/x86/include -I$(obj) -include $(obj)/config.h -include $(obj)/build.h -I. -I$(src) $< -o $@ + +endif # CONFIG_ARCH_ROMSTAGE_X86 ################################################################################ # Ramstage ################################################################################ +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c) ifeq ($(CONFIG_GENERATE_MP_TABLE),y) ifneq ($(wildcard src/mainboard/$(MAINBOARDDIR)/mptable.c),) @@ -305,30 +331,31 @@ else $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(src)/arch/x86/ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld + $(LD_ramstage) -m elf_i386 -o $@ -L$(obj) $< -T $(src)/arch/x86/ramstage.ld else - $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< + $(CC_ramstage) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/ramstage.ld $< endif endif -$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME) $$(ramstage-libs) +$(objgenerated)/ramstage.o: $$(ramstage-objs) $(LIBGCC_FILE_NAME_ramstage) $$(ramstage-libs) @printf " CC $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) - $(LD) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) --end-group + $(LD_ramstage) -m elf_i386 -r -o $@ --wrap __divdi3 --wrap __udivdi3 --wrap __moddi3 --wrap __umoddi3 --start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) --end-group else - $(CC) $(CFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME) -Wl,--end-group + $(CC_ramstage) $(CFLAGS_ramstage) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(ramstage-objs) $(ramstage-libs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group endif +endif # CONFIG_ARCH_RAMSTAGE_X86 ################################################################################ seabios: $(MAKE) -C payloads/external/SeaBIOS -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ - AS="$(AS)" CPP="$(CPP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ + AS="$(AS_binary)" CPP="$(CPP)" \ CONFIG_SEABIOS_MASTER=$(CONFIG_SEABIOS_MASTER) \ CONFIG_SEABIOS_STABLE=$(CONFIG_SEABIOS_STABLE) \ CONFIG_SEABIOS_THREAD_OPTIONROMS=$(CONFIG_SEABIOS_THREAD_OPTIONROMS) \ @@ -337,8 +364,8 @@ seabios: filo: $(MAKE) -C payloads/external/FILO -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_FILO_MASTER=$(CONFIG_FILO_MASTER) \ CONFIG_FILO_STABLE=$(CONFIG_FILO_STABLE) @@ -346,6 +373,6 @@ filo: grub2: $(MAKE) -C payloads/external/GRUB2 -f Makefile.inc \ HOSTCC="$(HOSTCC)" \ - CC="$(CC)" LD="$(LD)" OBJDUMP="$(OBJDUMP)" \ - OBJCOPY="$(OBJCOPY)" STRIP="$(STRIP)" \ + CC="$(CC_binary)" LD="$(LD_binary)" OBJDUMP="$(OBJDUMP_binary)" \ + OBJCOPY="$(OBJCOPY_binary)" STRIP="$(STRIP_binary)" \ CONFIG_GRUB2_MASTER=$(CONFIG_GRUB2_MASTER) diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc index 928fc03..061074c 100644 --- a/src/arch/x86/boot/Makefile.inc +++ b/src/arch/x86/boot/Makefile.inc @@ -1,6 +1,13 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c romstage-$(CONFIG_BROKEN_CAR_MIGRATE) += cbmem.c +endif # CONFIG_ARCH_ROMSTAGE_X86 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-y += boot.c ramstage-y += gdt.c ramstage-y += tables.c @@ -14,3 +21,4 @@ ramstage-$(CONFIG_HAVE_ACPI_RESUME) += wakeup.S $(obj)/arch/x86/boot/smbios.ramstage.o: $(obj)/build.h +endif # CONFIG_ARCH_RAMSTAGE_X86 \ No newline at end of file diff --git a/src/arch/x86/lib/Makefile.inc b/src/arch/x86/lib/Makefile.inc index 8b7418b..03e6c88 100644 --- a/src/arch/x86/lib/Makefile.inc +++ b/src/arch/x86/lib/Makefile.inc @@ -1,3 +1,16 @@ + +ifeq ($(CONFIG_ARCH_ROMSTAGE_X86),y) + +romstage-y += cbfs_and_run.c +romstage-y += memset.c +romstage-y += memcpy.c +romstage-y += memmove.c +romstage-y += rom_media.c + +endif # CONFIG_ARCH_ROMSTAGE_X86 + +ifeq ($(CONFIG_ARCH_RAMSTAGE_X86),y) + ramstage-y += c_start.S ramstage-y += cpu.c ramstage-y += pci_ops_conf1.c @@ -12,12 +25,6 @@ ramstage-y += rom_media.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S -romstage-y += cbfs_and_run.c -romstage-y += memset.c -romstage-y += memcpy.c -romstage-y += memmove.c -romstage-y += rom_media.c - smm-y += memset.c smm-y += memcpy.c smm-y += memmove.c @@ -26,3 +33,5 @@ smm-y += rom_media.c rmodules-y += memset.c rmodules-y += memcpy.c rmodules-y += memmove.c + +endif # CONFIG_ARCH_RAMSTAGE_X86 \ No newline at end of file diff --git a/src/console/Kconfig b/src/console/Kconfig index 65fc1aa..c3d88a2 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -2,7 +2,7 @@ menu "Console" config BOOTBLOCK_CONSOLE bool "Enable early (bootblock) console output." - depends on ARCH_ARMV7 + depends on ARCH_BINARY_ARMV7 default n help Use console during the bootblock if supported diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index 6fced37..59407c2 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -14,7 +14,7 @@ source src/cpu/via/Kconfig source src/cpu/qemu-x86/Kconfig source src/cpu/x86/Kconfig -if ARCH_X86 +if ARCH_BINARY_X86 config CACHE_AS_RAM bool @@ -62,7 +62,7 @@ config SSE2 streaming SIMD instructions. Some parts of coreboot can be built with more efficient code if SSE2 instructions are available. -endif # ARCH_X86 +endif # ARCH_BINARY_X86 config SUPPORT_CPU_UCODE_IN_CBFS bool @@ -80,7 +80,7 @@ config CPU_MICROCODE_ADDED_DURING_BUILD default y if CPU_MICROCODE_CBFS_GENERATE || CPU_MICROCODE_CBFS_EXTERNAL choice - prompt "Include CPU microcode in CBFS" if ARCH_X86 + prompt "Include CPU microcode in CBFS" if ARCH_BINARY_X86 default CPU_MICROCODE_CBFS_GENERATE if SUPPORT_CPU_UCODE_IN_CBFS default CPU_MICROCODE_CBFS_NONE if !SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc index f206fdc..e66585b 100644 --- a/src/cpu/Makefile.inc +++ b/src/cpu/Makefile.inc @@ -42,13 +42,13 @@ endif # final microcode file. $(obj)/cpu_microcode_blob.o: $$(cpu_microcode-objs) @printf " LD $(subst $(obj)/,,$(@))\n" - $(LD) -static --entry=0 $+ -o $@ + $(LD_binary) -static --entry=0 $+ -o $@ # We have a lot of useless data in the large blob, and we are only interested in # the data section, so we only copy that part to the final microcode file $(obj)/cpu_microcode_blob.bin: $(obj)/cpu_microcode_blob.o @printf " MICROCODE $(subst $(obj)/,,$(@))\n" - $(OBJCOPY) -j .data -O binary $< $@ + $(OBJCOPY_binary) -j .data -O binary $< $@ ifeq ($(cbfs_include_ucode),y) # Add CPU microcode to specified rom image $(1) diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index f76a7b6..0e13f94 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -6,7 +6,10 @@ if CPU_ALLWINNER_A10 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/amd/agesa/Kconfig b/src/cpu/amd/agesa/Kconfig index fa36f38..7670f17 100644 --- a/src/cpu/amd/agesa/Kconfig +++ b/src/cpu/amd/agesa/Kconfig @@ -26,7 +26,10 @@ config CPU_AMD_AGESA default y if CPU_AMD_AGESA_FAMILY15_TN default y if CPU_AMD_AGESA_FAMILY16_KB default n - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select TSC_SYNC_LFENCE select UDELAY_LAPIC select LAPIC_MONOTONIC_TIMER diff --git a/src/cpu/amd/geode_gx1/Kconfig b/src/cpu/amd/geode_gx1/Kconfig index b87e8bc..f04c8d5 100644 --- a/src/cpu/amd/geode_gx1/Kconfig +++ b/src/cpu/amd/geode_gx1/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX1 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_GX1 diff --git a/src/cpu/amd/geode_gx2/Kconfig b/src/cpu/amd/geode_gx2/Kconfig index b96c770..9d74830 100644 --- a/src/cpu/amd/geode_gx2/Kconfig +++ b/src/cpu/amd/geode_gx2/Kconfig @@ -19,7 +19,10 @@ config CPU_AMD_GEODE_GX2 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_GX2 diff --git a/src/cpu/amd/geode_lx/Kconfig b/src/cpu/amd/geode_lx/Kconfig index 6aceab2..9527ea7 100644 --- a/src/cpu/amd/geode_lx/Kconfig +++ b/src/cpu/amd/geode_lx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_GEODE_LX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 if CPU_AMD_GEODE_LX diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig index 30c2486..e0f0198 100644 --- a/src/cpu/amd/model_10xxx/Kconfig +++ b/src/cpu/amd/model_10xxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_10XXX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SSE select SSE2 select MMCONF_SUPPORT_DEFAULT diff --git a/src/cpu/amd/model_fxx/Kconfig b/src/cpu/amd/model_fxx/Kconfig index 1a811f4..34bf71d 100644 --- a/src/cpu/amd/model_fxx/Kconfig +++ b/src/cpu/amd/model_fxx/Kconfig @@ -1,6 +1,9 @@ config CPU_AMD_MODEL_FXX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select MMX select SSE select SSE2 diff --git a/src/cpu/amd/sc520/Kconfig b/src/cpu/amd/sc520/Kconfig index 46377be..a92724c 100644 --- a/src/cpu/amd/sc520/Kconfig +++ b/src/cpu/amd/sc520/Kconfig @@ -1,3 +1,6 @@ config CPU_AMD_SC520 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig index f46c6ff..b354444 100644 --- a/src/cpu/armltd/cortex-a9/Kconfig +++ b/src/cpu/armltd/cortex-a9/Kconfig @@ -1,6 +1,9 @@ config CPU_ARMLTD_CORTEX_A9 bool - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select EARLY_CONSOLE default n diff --git a/src/cpu/dmp/vortex86ex/Kconfig b/src/cpu/dmp/vortex86ex/Kconfig index aea8889..da8834c 100644 --- a/src/cpu/dmp/vortex86ex/Kconfig +++ b/src/cpu/dmp/vortex86ex/Kconfig @@ -19,5 +19,8 @@ config CPU_DMP_VORTEX86EX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC diff --git a/src/cpu/intel/ep80579/Kconfig b/src/cpu/intel/ep80579/Kconfig index fa96f8d..d5aa4c8 100644 --- a/src/cpu/intel/ep80579/Kconfig +++ b/src/cpu/intel/ep80579/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_EP80579 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SSE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/fsp_model_206ax/Kconfig b/src/cpu/intel/fsp_model_206ax/Kconfig index 22d01e6..527de90 100644 --- a/src/cpu/intel/fsp_model_206ax/Kconfig +++ b/src/cpu/intel/fsp_model_206ax/Kconfig @@ -28,7 +28,10 @@ if CPU_INTEL_FSP_MODEL_206AX || CPU_INTEL_FSP_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/fsp_model_206ax/Makefile.inc b/src/cpu/intel/fsp_model_206ax/Makefile.inc index 1ea9c2a..b4d18c3 100644 --- a/src/cpu/intel/fsp_model_206ax/Makefile.inc +++ b/src/cpu/intel/fsp_model_206ax/Makefile.inc @@ -9,4 +9,4 @@ cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c cpu_incs += $(src)/cpu/intel/fsp_model_206ax/cache_as_ram.inc -CC := $(CC) -I$(CONFIG_MICROCODE_INCLUDE_PATH) +CC := $(CC_binary) -I$(CONFIG_MICROCODE_INCLUDE_PATH) diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 97309ae..1726128 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -6,7 +6,10 @@ if CPU_INTEL_HASWELL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select BACKUP_DEFAULT_SMM_REGION select SMP select SSE2 diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index 63c1939..e504a68 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -26,14 +26,14 @@ rmodules-y += sipi_vector.S rmodules-y += sipi_header.c $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_DOTO), 0)) $(SIPI_BIN): $(SIPI_ELF).rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig index 4d6add6..346d218 100644 --- a/src/cpu/intel/model_1067x/Kconfig +++ b/src/cpu/intel/model_1067x/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_1067X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig index ea6f5ca..3a9b4e5 100644 --- a/src/cpu/intel/model_106cx/Kconfig +++ b/src/cpu/intel/model_106cx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_106CX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 4c7456d..48dfc82 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -5,7 +5,10 @@ if CPU_INTEL_MODEL_2065X config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE select SSE2 diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 64b2a0a..60d0899 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -8,7 +8,10 @@ if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_65x/Kconfig b/src/cpu/intel/model_65x/Kconfig index b3fa7bd..6a417ec 100644 --- a/src/cpu/intel/model_65x/Kconfig +++ b/src/cpu/intel/model_65x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_65X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_67x/Kconfig b/src/cpu/intel/model_67x/Kconfig index 7558bc2..4e3d6aa 100644 --- a/src/cpu/intel/model_67x/Kconfig +++ b/src/cpu/intel/model_67x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_67X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_68x/Kconfig b/src/cpu/intel/model_68x/Kconfig index 670163a..b926b43 100644 --- a/src/cpu/intel/model_68x/Kconfig +++ b/src/cpu/intel/model_68x/Kconfig @@ -20,6 +20,9 @@ config CPU_INTEL_MODEL_68X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_69x/Kconfig b/src/cpu/intel/model_69x/Kconfig index e4a0e6c..7ea9cdc 100644 --- a/src/cpu/intel/model_69x/Kconfig +++ b/src/cpu/intel/model_69x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_69X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6bx/Kconfig b/src/cpu/intel/model_6bx/Kconfig index 4dc6fe6..c0da73b 100644 --- a/src/cpu/intel/model_6bx/Kconfig +++ b/src/cpu/intel/model_6bx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6BX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6dx/Kconfig b/src/cpu/intel/model_6dx/Kconfig index e6d5f1e..74c5b33 100644 --- a/src/cpu/intel/model_6dx/Kconfig +++ b/src/cpu/intel/model_6dx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6DX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig index eee864d..6b6d5d9 100644 --- a/src/cpu/intel/model_6ex/Kconfig +++ b/src/cpu/intel/model_6ex/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6EX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig index b8de303..a7de42c 100644 --- a/src/cpu/intel/model_6fx/Kconfig +++ b/src/cpu/intel/model_6fx/Kconfig @@ -1,6 +1,9 @@ config CPU_INTEL_MODEL_6FX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SSE2 select UDELAY_LAPIC diff --git a/src/cpu/intel/model_6xx/Kconfig b/src/cpu/intel/model_6xx/Kconfig index 49cfe2d..ef04e89 100644 --- a/src/cpu/intel/model_6xx/Kconfig +++ b/src/cpu/intel/model_6xx/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_6XX bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f0x/Kconfig b/src/cpu/intel/model_f0x/Kconfig index 2ed68d1..d985254 100644 --- a/src/cpu/intel/model_f0x/Kconfig +++ b/src/cpu/intel/model_f0x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F0X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f1x/Kconfig b/src/cpu/intel/model_f1x/Kconfig index 3bdb7f6..33e587f 100644 --- a/src/cpu/intel/model_f1x/Kconfig +++ b/src/cpu/intel/model_f1x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F1X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f2x/Kconfig b/src/cpu/intel/model_f2x/Kconfig index 62393a8..9cef453 100644 --- a/src/cpu/intel/model_f2x/Kconfig +++ b/src/cpu/intel/model_f2x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F2X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f3x/Kconfig b/src/cpu/intel/model_f3x/Kconfig index 5c9d0a3..d9f0f93 100644 --- a/src/cpu/intel/model_f3x/Kconfig +++ b/src/cpu/intel/model_f3x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F3X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/intel/model_f4x/Kconfig b/src/cpu/intel/model_f4x/Kconfig index 849dcd0..3375326 100644 --- a/src/cpu/intel/model_f4x/Kconfig +++ b/src/cpu/intel/model_f4x/Kconfig @@ -1,5 +1,8 @@ config CPU_INTEL_MODEL_F4X bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select SMP select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index e54e4db..5284bf9 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -19,4 +19,7 @@ config CPU_QEMU_X86 bool - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index b8042e3..3dbfef7 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5250 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index 6207adf..ab86349 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -1,5 +1,8 @@ config CPU_SAMSUNG_EXYNOS5420 - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select EARLY_CONSOLE diff --git a/src/cpu/ti/am335x/Kconfig b/src/cpu/ti/am335x/Kconfig index 22a02ad..5432c24 100644 --- a/src/cpu/ti/am335x/Kconfig +++ b/src/cpu/ti/am335x/Kconfig @@ -1,5 +1,8 @@ config CPU_TI_AM335X - select ARCH_ARMV7 + select ARCH_BINARY_ARMV7 + select ARCH_BOOTBLOCK_ARMV7 + select ARCH_ROMSTAGE_ARMV7 + select ARCH_RAMSTAGE_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index 5b10bd8..2017371 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -28,14 +28,14 @@ get_header_size= \ $(obj)/omap-header.bin: $$(omap-header-objs) $$(header_ld) $(obj)/coreboot.rom @printf " CC $(subst $(obj)/,,$(@))\n" - $(CC) -nostdlib -nostartfiles -static -include $(obj)/config.h \ + $(CC_binary) -nostdlib -nostartfiles -static -include $(obj)/config.h \ -Wl,--defsym,header_load_size=$(strip \ $(call get_header_size,$(obj)/coreboot.rom, \ $(CONFIG_CBFS_PREFIX)/romstage \ ) \ ) \ -o $@.tmp $< -T $(header_ld) - $(OBJCOPY) --only-section=".header" -O binary $@.tmp $@ + $(OBJCOPY_binary) --only-section=".header" -O binary $@.tmp $@ $(obj)/MLO: $(obj)/coreboot.rom $(obj)/omap-header.bin @printf " HEADER $(subst $(obj)/,,$(@))\n" diff --git a/src/cpu/via/c3/Kconfig b/src/cpu/via/c3/Kconfig index 566f07c..b898f81 100644 --- a/src/cpu/via/c3/Kconfig +++ b/src/cpu/via/c3/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C3 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS diff --git a/src/cpu/via/c7/Kconfig b/src/cpu/via/c7/Kconfig index d5f1a41..c4d27f7 100644 --- a/src/cpu/via/c7/Kconfig +++ b/src/cpu/via/c7/Kconfig @@ -5,7 +5,10 @@ if CPU_VIA_C7 config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/via/nano/Kconfig b/src/cpu/via/nano/Kconfig index 0f4f994..b4471a1 100644 --- a/src/cpu/via/nano/Kconfig +++ b/src/cpu/via/nano/Kconfig @@ -24,7 +24,10 @@ if CPU_VIA_NANO config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select UDELAY_TSC select MMX select SSE2 diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 514d96c..bc6a116 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -16,13 +16,13 @@ endif rmodules-$(CONFIG_PARALLEL_MP) += sipi_vector.S $(SIPI_DOTO): $(dir $(SIPI_ELF))sipi_vector.rmodules.o - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ $(eval $(call rmodule_link,$(SIPI_ELF), $(SIPI_ELF:.elf=.o), 0)) $(SIPI_BIN): $(SIPI_RMOD) - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(SIPI_BIN).ramstage.o: $(SIPI_BIN) @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) diff --git a/src/cpu/x86/smm/Makefile.inc b/src/cpu/x86/smm/Makefile.inc index 9720630..2d31f07 100644 --- a/src/cpu/x86/smm/Makefile.inc +++ b/src/cpu/x86/smm/Makefile.inc @@ -32,32 +32,32 @@ ramstage-srcs += $(obj)/cpu/x86/smm/smmstub # SMM Stub Module. The stub is used as a trampoline for relocation and normal # SMM handling. $(obj)/cpu/x86/smm/smmstub.o: $$(smmstub-objs) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the SMM stub module with a 0-byte heap. $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smmstub.elf, $(obj)/cpu/x86/smm/smmstub.o, 0)) $(obj)/cpu/x86/smm/smmstub: $(obj)/cpu/x86/smm/smmstub.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smmstub.ramstage.o: $(obj)/cpu/x86/smm/smmstub @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) # C-based SMM handler. -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(eval $(call rmodule_link,$(obj)/cpu/x86/smm/smm.elf, $(obj)/cpu/x86/smm/smm.o, $(CONFIG_SMM_MODULE_HEAP_SIZE))) $(obj)/cpu/x86/smm/smm: $(obj)/cpu/x86/smm/smm.elf.rmod - $(OBJCOPY) -O binary $< $@ + $(OBJCOPY_ramstage) -O binary $< $@ $(obj)/cpu/x86/smm/smm.ramstage.o: $(obj)/cpu/x86/smm/smm @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(dir $@); $(OBJCOPY) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) + cd $(dir $@); $(OBJCOPY_ramstage) -I binary $(notdir $<) -O elf32-i386 -B i386 $(notdir $@) else # CONFIG_SMM_MODULES @@ -79,18 +79,18 @@ endif smm-y += smihandler.c -$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME) -Wl,--end-group +$(obj)/cpu/x86/smm/smm.o: $$(smm-objs) $(LIBGCC_FILE_NAME_ramstage) + $(CC_ramstage) $(LDFLAGS) -nostdlib -r -o $@ -Wl,--wrap,__divdi3 -Wl,--wrap,__udivdi3 -Wl,--wrap,__moddi3 -Wl,--wrap,__umoddi3 -Wl,--start-group $(smm-objs) $(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group $(obj)/cpu/x86/smm/smm_wrap: $(obj)/cpu/x86/smm/smm.o $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/ldoptions - $(CC) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o - $(NM) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map - $(OBJCOPY) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm + $(CC_ramstage) $(SMM_LDFLAGS) -nostdlib -nostartfiles -static -o $(obj)/cpu/x86/smm/smm.elf -T $(src)/cpu/x86/smm/$(SMM_LDSCRIPT) $(obj)/cpu/x86/smm/smm.o + $(NM_ramstage) -n $(obj)/cpu/x86/smm/smm.elf | sort > $(obj)/cpu/x86/smm/smm.map + $(OBJCOPY_ramstage) -O binary $(obj)/cpu/x86/smm/smm.elf $(obj)/cpu/x86/smm/smm # change to the target path because objcopy will use the path name in its # ELF symbol names. $(obj)/cpu/x86/smm/smm_wrap.ramstage.o: $(obj)/cpu/x86/smm/smm_wrap @printf " OBJCOPY $(subst $(obj)/,,$(@))\n" - cd $(obj)/cpu/x86/smm; $(OBJCOPY) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o + cd $(obj)/cpu/x86/smm; $(OBJCOPY_ramstage) -I binary smm -O elf32-i386 -B i386 smm_wrap.ramstage.o endif # CONFIG_SMM_MODULES diff --git a/src/device/Kconfig b/src/device/Kconfig index 932b4de..8f5a0f8 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -91,14 +91,14 @@ config ON_DEVICE_ROM_RUN choice prompt "Option ROM execution type" - default PCI_OPTION_ROM_RUN_YABEL if !ARCH_X86 - default PCI_OPTION_ROM_RUN_REALMODE if ARCH_X86 + default PCI_OPTION_ROM_RUN_YABEL if !ARCH_BINARY_X86 + default PCI_OPTION_ROM_RUN_REALMODE if ARCH_BINARY_X86 depends on VGA_ROM_RUN || GEODE_VSA config PCI_OPTION_ROM_RUN_REALMODE prompt "Native mode" bool - depends on ARCH_X86 + depends on ARCH_BINARY_X86 help If you select this option, PCI Option ROMs will be executed natively on the CPU in real mode. No CPU emulation is involved, @@ -161,7 +161,7 @@ config YABEL_VIRTMEM_LOCATION config YABEL_DIRECTHW prompt "Direct hardware access" bool - depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_X86 + depends on PCI_OPTION_ROM_RUN_YABEL && ARCH_BINARY_X86 help YABEL consists of two parts: It uses x86emu for the CPU emulation and additionally provides a PC system emulation that filters bad device diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index bd41b12..5df4843 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -9,7 +9,7 @@ ramstage-$(CONFIG_PCIEXP_PLUGIN_SUPPORT) += pciexp_device.c ramstage-$(CONFIG_AGP_PLUGIN_SUPPORT) += agp_device.c ramstage-$(CONFIG_CARDBUS_PLUGIN_SUPPORT) += cardbus_device.c ramstage-$(CONFIG_AZALIA_PLUGIN_SUPPORT) += azalia_device.c -ramstage-$(CONFIG_ARCH_X86) += pnp_device.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-$(CONFIG_PCI) += pci_early.c ramstage-y += smbus_ops.c diff --git a/src/device/device.c b/src/device/device.c index e068cee..2b808e7 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -40,7 +40,7 @@ #include <stdlib.h> #include <string.h> #include <smp/spinlock.h> -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/ebda.h> #endif #include <timer.h> @@ -1189,7 +1189,7 @@ void dev_initialize(void) printk(BIOS_INFO, "Initializing devices...\n"); -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 /* Ensure EBDA is prepared before Option ROMs. */ setup_default_ebda(); #endif diff --git a/src/device/oprom/include/io.h b/src/device/oprom/include/io.h index 96dd572..6adce71 100644 --- a/src/device/oprom/include/io.h +++ b/src/device/oprom/include/io.h @@ -1,4 +1,4 @@ -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/io.h> #else void outb(u8 val, u16 port); diff --git a/src/device/oprom/yabel/compat/functions.c b/src/device/oprom/yabel/compat/functions.c index 2c3dc33..851917a 100644 --- a/src/device/oprom/yabel/compat/functions.c +++ b/src/device/oprom/yabel/compat/functions.c @@ -48,7 +48,7 @@ unsigned long tb_freq = 0; u64 get_time(void) { u64 act = 0; -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 u32 eax, edx; __asm__ __volatile__( diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index 017aab9..1fce2ce 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -128,7 +128,7 @@ u8 biosemu_dev_translate_address(int type, unsigned long * addr); static inline void out32le(void *addr, u32 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 *((u32*) addr) = cpu_to_le32(val); #else asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -139,7 +139,7 @@ static inline u32 in32le(void *addr) { u32 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le32(*((u32 *) addr)); #else asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr)); @@ -150,7 +150,7 @@ in32le(void *addr) static inline void out16le(void *addr, u16 val) { -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 *((u16*) addr) = cpu_to_le16(val); #else asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr)); @@ -161,7 +161,7 @@ static inline u16 in16le(void *addr) { u16 val; -#if CONFIG_ARCH_X86 || CONFIG_ARCH_ARMV7 +#if CONFIG_ARCH_BINARY_X86 || CONFIG_ARCH_BINARY_ARMV7 val = cpu_to_le16(*((u16*) addr)); #else asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr)); diff --git a/src/device/oprom/yabel/io.c b/src/device/oprom/yabel/io.c index 94f610d..1449f52 100644 --- a/src/device/oprom/yabel/io.c +++ b/src/device/oprom/yabel/io.c @@ -26,7 +26,7 @@ #include <device/resource.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <arch/io.h> #else // these are not used, only needed for linking, must be overridden using X86emu_setupPioFuncs diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index f11e4b8..413b4ae 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -37,4 +37,4 @@ subdirs-y += ti subdirs-y += ipmi subdirs-y += elog subdirs-y += xpowers -subdirs-$(CONFIG_ARCH_X86) += pc80 +subdirs-$(CONFIG_ARCH_BINARY_X86) += pc80 diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index 51cd6c3..685f073 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -52,7 +52,7 @@ static void rtc_set_checksum(int range_start, int range_end, int cks_loc) } #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #define RTC_CONTROL_DEFAULT (RTC_24H) #define RTC_FREQ_SELECT_DEFAULT (RTC_REF_CLCK_32KHZ | RTC_RATE_1024HZ) #else diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index a979437..bb71f69 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -5,9 +5,9 @@ config DRIVERS_UART config DRIVERS_UART_8250IO bool "Serial port on SuperIO" - depends on !ARCH_ARMV7 + depends on !ARCH_BINARY_ARMV7 default n if NO_UART_ON_SUPERIO - default y if ARCH_X86 + default y if ARCH_BINARY_X86 # Select this for mainboard without SuperIO serial port. config NO_UART_ON_SUPERIO diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig index 342db3e..2d63b5f 100644 --- a/src/ec/google/chromeec/Kconfig +++ b/src/ec/google/chromeec/Kconfig @@ -21,7 +21,7 @@ config EC_GOOGLE_CHROMEEC_I2C_CHIP default 0x1e config EC_GOOGLE_CHROMEEC_LPC - depends on EC_GOOGLE_CHROMEEC && ARCH_X86 # Needs Plug-and-play. + depends on EC_GOOGLE_CHROMEEC && ARCH_BINARY_X86 # Needs Plug-and-play. def_bool y help Google Chrome EC via LPC bus. diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f8cf3b1..3e2550c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,7 +56,7 @@ romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c endif -romstage-$(CONFIG_ARCH_X86) += gcc.c +romstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c @@ -83,7 +83,7 @@ ramstage-y += cbfs.c ramstage-y += lzma.c #ramstage-y += lzmadecode.c ramstage-y += stack.c -ramstage-$(CONFIG_ARCH_X86) += gcc.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c @@ -143,8 +143,8 @@ RMODULE_LDFLAGS := -nostartfiles -Wl,--emit-relocs -Wl,-z,defs -Wl,-Bsymbolic - # rmdoule is named $(1).rmod define rmodule_link $(strip $(1)): $(strip $(2)) $$(RMODULE_LDSCRIPT) $$(obj)/ldoptions $$(RMODTOOL) - $$(CC) $$(CFLAGS) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME) -Wl,--end-group - $$(NM) -n $$@ > $$(basename $$(a)).map + $$(CC_ramstage) $$(CFLAGS_ramstage) $$(RMODULE_LDFLAGS) -Wl,--defsym=__heap_size=$(strip $(3)) -o $$@ -Wl,--start-group $(strip $(2)) $$(LIBGCC_FILE_NAME_ramstage) -Wl,--end-group + $$(NM_ramstage) -n $$@ > $$(basename $$(a)).map $(strip $(1)).rmod: $(strip $(1)) $$(RMODTOOL) -i $$^ -o $$@ diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c index 50c037e..a6bd270 100644 --- a/src/lib/cbfs_core.c +++ b/src/lib/cbfs_core.c @@ -118,7 +118,7 @@ struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) // TODO Add a "size" in CBFS header for a platform independent way to // determine the end of CBFS data. -#if defined(CONFIG_ARCH_X86) && CONFIG_ARCH_X86 +#if defined(CONFIG_ARCH_BINARY_X86) && CONFIG_ARCH_BINARY_X86 romsize -= htonl(header->bootblocksize); #endif DEBUG("CBFS location: 0x%x~0x%x, align: %d\n", offset, romsize, align); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 8e7f85d..b2dd048 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -38,7 +38,7 @@ #include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/gnvs.h> #endif -#if CONFIG_ARCH_X86 +#if CONFIG_ARCH_BINARY_X86 #include <cpu/x86/mtrr.h> #endif diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/advansus/a785e-i/Makefile.inc +++ b/src/mainboard/advansus/a785e-i/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/asus/m5a88-v/Makefile.inc b/src/mainboard/asus/m5a88-v/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/asus/m5a88-v/Makefile.inc +++ b/src/mainboard/asus/m5a88-v/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/avalue/eax-785e/Makefile.inc b/src/mainboard/avalue/eax-785e/Makefile.inc index 924f9d6..0bbc26f 100644 --- a/src/mainboard/avalue/eax-785e/Makefile.inc +++ b/src/mainboard/avalue/eax-785e/Makefile.inc @@ -11,5 +11,5 @@ ifneq ($(CONFIG_CPU_AMD_AGESA),y) -I$(AGESA_ROOT)/Proc/CPU/ \ -I$(AGESA_ROOT)/Proc/CPU/Family - CFLAGS += $(AGESA_INC) + CFLAGS_common += $(AGESA_INC) endif diff --git a/src/mainboard/bifferos/bifferboard/Kconfig b/src/mainboard/bifferos/bifferboard/Kconfig index 4ee9958..d97a889 100644 --- a/src/mainboard/bifferos/bifferboard/Kconfig +++ b/src/mainboard/bifferos/bifferboard/Kconfig @@ -2,7 +2,10 @@ if BOARD_BIFFEROS_BIFFERBOARD config BOARD_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select ROMCC select BOARD_ROMSIZE_KB_128 select NORTHBRIDGE_RDC_R8610 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1b3ee05..a57d273 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -8,7 +8,10 @@ if SOC_INTEL_BAYTRAIL config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_X86 + select ARCH_BINARY_X86 + select ARCH_BOOTBLOCK_X86 + select ARCH_ROMSTAGE_X86 + select ARCH_RAMSTAGE_X86 select CACHE_MRC_SETTINGS select CAR_MIGRATION select COLLECT_TIMESTAMPS diff --git a/src/superio/Makefile.inc b/src/superio/Makefile.inc index e34fa89..4b55827 100644 --- a/src/superio/Makefile.inc +++ b/src/superio/Makefile.inc @@ -28,4 +28,4 @@ subdirs-y += smsc subdirs-y += via subdirs-y += winbond -ramstage-$(CONFIG_ARCH_X86) += common/conf_mode.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += common/conf_mode.c diff --git a/src/vendorcode/amd/agesa/f10/Makefile.inc b/src/vendorcode/amd/agesa/f10/Makefile.inc index 203efab..177302c 100644 --- a/src/vendorcode/amd/agesa/f10/Makefile.inc +++ b/src/vendorcode/amd/agesa/f10/Makefile.inc @@ -48,5 +48,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f12/Makefile.inc b/src/vendorcode/amd/agesa/f12/Makefile.inc index e1bafbe..4c5ec84 100644 --- a/src/vendorcode/amd/agesa/f12/Makefile.inc +++ b/src/vendorcode/amd/agesa/f12/Makefile.inc @@ -86,5 +86,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### \ No newline at end of file diff --git a/src/vendorcode/amd/agesa/f14/Makefile.inc b/src/vendorcode/amd/agesa/f14/Makefile.inc index f457277..509b3ad 100644 --- a/src/vendorcode/amd/agesa/f14/Makefile.inc +++ b/src/vendorcode/amd/agesa/f14/Makefile.inc @@ -67,7 +67,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f15/Makefile.inc b/src/vendorcode/amd/agesa/f15/Makefile.inc index 2a7acce..d8ee520 100644 --- a/src/vendorcode/amd/agesa/f15/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15/Makefile.inc @@ -529,5 +529,8 @@ AGESA_CFLAGS = -msse3 -fno-zero-initialized-in-bss -fno-strict-aliasing export AGESA_ROOT export AGESA_INC export AGESA_CFLAGS -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) diff --git a/src/vendorcode/amd/agesa/f15tn/Makefile.inc b/src/vendorcode/amd/agesa/f15tn/Makefile.inc index 00ace78..ee174bf 100644 --- a/src/vendorcode/amd/agesa/f15tn/Makefile.inc +++ b/src/vendorcode/amd/agesa/f15tn/Makefile.inc @@ -91,7 +91,10 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### classes-y += libagesa diff --git a/src/vendorcode/amd/agesa/f16kb/Makefile.inc b/src/vendorcode/amd/agesa/f16kb/Makefile.inc index 0e68895..4d497f1 100644 --- a/src/vendorcode/amd/agesa/f16kb/Makefile.inc +++ b/src/vendorcode/amd/agesa/f16kb/Makefile.inc @@ -98,5 +98,8 @@ AGESA_CFLAGS =-march=k8-sse3 -mtune=k8-sse3 -fno-zero-initialized-in-bss -fno-st export AGESA_ROOT := $(AGESA_ROOT) export AGESA_INC := $(AGESA_INC) export AGESA_CFLAGS := $(AGESA_CFLAGS) -CC := $(CC) $(AGESA_INC) $(AGESA_CFLAGS) +CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS) +CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS) +CC_binary := $(CC_binary) $(AGESA_INC) $(AGESA_CFLAGS) ####################################################################### diff --git a/src/vendorcode/amd/cimx/rd890/Makefile.inc b/src/vendorcode/amd/cimx/rd890/Makefile.inc index feeb2cd..491f810 100644 --- a/src/vendorcode/amd/cimx/rd890/Makefile.inc +++ b/src/vendorcode/amd/cimx/rd890/Makefile.inc @@ -113,7 +113,11 @@ NB_CIMX_CFLAGS = export CIMX_ROOT export NB_CIMX_INC export NB_CIMX_CFLAGS -CC := $(CC) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) + +CC_bootblock := $(CC_bootblock) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_romstage := $(CC_romstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) +CC_binary := $(CC_binary) $(NB_CIMX_CFLAGS) $(NB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb700/Makefile.inc b/src/vendorcode/amd/cimx/sb700/Makefile.inc index 10d03e6..24e7ce1 100644 --- a/src/vendorcode/amd/cimx/sb700/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb700/Makefile.inc @@ -72,7 +72,10 @@ SB_CIMX_CFLAGS = export CIMX_ROOT export SB_CIMX_INC export SB_CIMX_CFLAGS -CC := $(CC) $(SB_CIMX_CFLAGS) $(SB_CIMX_INC) +CC_bootblock := $(CC_bootblock) $(SB_CIMX_INC) +CC_romstage := $(CC_romstage) $(SB_CIMX_INC) +CC_ramstage := $(CC_ramstage) $(SB_CIMX_INC) +CC_binary := $(CC_binary) $(SB_CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb800/Makefile.inc b/src/vendorcode/amd/cimx/sb800/Makefile.inc index 3fb1d54..553ebae 100644 --- a/src/vendorcode/amd/cimx/sb800/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb800/Makefile.inc @@ -79,7 +79,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/amd/cimx/sb900/Makefile.inc b/src/vendorcode/amd/cimx/sb900/Makefile.inc index 4a3417f..e26a0fe 100644 --- a/src/vendorcode/amd/cimx/sb900/Makefile.inc +++ b/src/vendorcode/amd/cimx/sb900/Makefile.inc @@ -82,7 +82,10 @@ CIMX_CFLAGS = export CIMX_ROOT export CIMX_INC export CIMX_CFLAGS -CC := $(CC) $(CIMX_INC) +CC_bootblock := $(CC_bootblock) $(CIMX_INC) +CC_romstage := $(CC_romstage) $(CIMX_INC) +CC_ramstage := $(CC_ramstage) $(CIMX_INC) +CC_binary := $(CC_binary) $(CIMX_INC) ####################################################################### diff --git a/src/vendorcode/google/chromeos/Makefile.inc b/src/vendorcode/google/chromeos/Makefile.inc index 21e1750..9f4afa8 100644 --- a/src/vendorcode/google/chromeos/Makefile.inc +++ b/src/vendorcode/google/chromeos/Makefile.inc @@ -19,9 +19,9 @@ romstage-y += chromeos.c ramstage-y += chromeos.c -romstage-$(CONFIG_ARCH_X86) += vbnv.c -ramstage-$(CONFIG_ARCH_X86) += vbnv.c -romstage-$(CONFIG_ARCH_X86) += vboot.c +romstage-$(CONFIG_ARCH_BINARY_X86) += vbnv.c +ramstage-$(CONFIG_ARCH_BINARY_X86) += vbnv.c +romstage-$(CONFIG_ARCH_BINARY_X86) += vboot.c ramstage-y += gnvs.c romstage-y += fmap.c ramstage-y += fmap.c @@ -33,9 +33,9 @@ romstage-srcs += src/mainboard/$(MAINBOARDDIR)/chromeos.c endif ifeq ($(MOCK_TPM),1) -CFLAGS += -DMOCK_TPM=1 +CFLAGS_common += -DMOCK_TPM=1 else -CFLAGS += -DMOCK_TPM=0 +CFLAGS_common += -DMOCK_TPM=0 endif ifeq ($(CONFIG_VBOOT_VERIFY_FIRMWARE),y) @@ -43,7 +43,7 @@ romstage-y += vboot_loader.c rmodules-y += vboot_wrapper.c VB_LIB = $(obj)/external/vboot_reference/vboot_fw.a -VB_FIRMWARE_ARCH := $(ARCHDIR-y) +VB_FIRMWARE_ARCH := $(ARCHDIR-$(ARCH-BINARY-y)) VB_SOURCE := vboot_reference # Add the vboot include paths. @@ -62,11 +62,11 @@ VBOOT_STUB_DEPS += $(obj)/arch/x86/lib/memcpy.rmodules.o VBOOT_STUB_DEPS += $(VB_LIB) # Remove the '-include' option since that will break vboot's build and ensure # vboot_reference can get to coreboot's include files. -VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS))) +VBOOT_CFLAGS += $(patsubst -I%,-I../%,$(filter-out -include $(src)/include/kconfig.h, $(CFLAGS_binary))) VBOOT_CFLAGS += -DVBOOT_DEBUG $(VBOOT_STUB_DOTO): $(VBOOT_STUB_DEPS) - $(CC) $(LDFLAGS) -nostdlib -r -o $@ $^ + $(CC_binary) $(LDFLAGS) -nostdlib -r -o $@ $^ # Link the vbootstub module with a 64KiB-byte heap. $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) @@ -75,6 +75,7 @@ $(eval $(call rmodule_link,$(VBOOT_STUB_ELF), $(VBOOT_STUB_DOTO), 0x10000)) $(VB_LIB): @printf " MAKE $(subst $(obj)/,,$(@))\n" $(Q)FIRMWARE_ARCH=$(VB_FIRMWARE_ARCH) \ + CC="$(CC_binary)" \ CFLAGS="$(VBOOT_CFLAGS)" \ make -C $(VB_SOURCE) \ BUILD=../$(dir $(VB_LIB)) \ diff --git a/src/vendorcode/intel/Makefile.inc b/src/vendorcode/intel/Makefile.inc index 8569af0..79c648d 100644 --- a/src/vendorcode/intel/Makefile.inc +++ b/src/vendorcode/intel/Makefile.inc @@ -23,5 +23,8 @@ FSP_SRC_FILES := $(wildcard src/vendorcode/intel/$(FSP_PATH)srx/*.c) FSP_C_INPUTS := $(foreach file, $(FSP_SRC_FILES), $(FSP_PATH)srx/$(notdir $(file))) ramstage-y += $(FSP_C_INPUTS) -CC := $(CC) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_bootblock := $(CC_bootblock) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_romstage := $(CC_romstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_ramstage := $(CC_ramstage) -Isrc/vendorcode/intel/$(FSP_PATH)include +CC_binary := $(CC_binary) -Isrc/vendorcode/intel/$(FSP_PATH)include endif

1 0

Patch set updated for coreboot: b5e7e2e Clean arch-level Kconfig files
by Furquan Shaikh 28 Apr '14

28 Apr '14

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5579 -gerrit commit b5e7e2e786ed55b3b6fff97a0858b9413db430f2 Author: Furquan Shaikh <furquan(a)google.com> Date: Fri Apr 25 14:35:45 2014 -0700 Clean arch-level Kconfig files General cleanup of arch-level (x86 and arm) Kconfig files: 1) Move common stuff to top-level Makefile. 2) Remove unwanted config options. 3) Make options default to n instead of y 4) Include all arch-level Kconfigs by default (Necessary for arch-aware stages) Change-Id: I09eca097c128f38632249d6a1de816f055cdcfd0 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/Kconfig | 24 +++++++----------------- src/arch/armv7/Kconfig | 9 --------- src/arch/x86/Kconfig | 11 +---------- src/lib/Makefile.inc | 38 -------------------------------------- 4 files changed, 8 insertions(+), 74 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index e85ab62..bad55f8 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -232,6 +232,7 @@ config ARCH_BINARY_X86 bool default n select PCI + select PC80_SYSTEM config ARCH_BINARY_ARMV7 bool @@ -267,25 +268,8 @@ config ARCH_RAMSTAGE_X86 # Warning: The file is included whether or not the if is here. # but the if controls how the evaluation occurs. -if ARCH_BINARY_X86 source src/arch/x86/Kconfig -endif - -if ARCH_BINARY_ARMV7 source src/arch/armv7/Kconfig -endif - -config HAVE_ARCH_MEMSET - bool - default n - -config HAVE_ARCH_MEMCPY - bool - default n - -config HAVE_ARCH_MEMMOVE - bool - default n source src/vendorcode/Kconfig @@ -1147,3 +1131,9 @@ config REG_SCRIPT default n help Internal option that controls whether we compile in register scripts. + +# Maximum reboot count +# TODO: Improve description. +config MAX_REBOOT_CNT + int + default 3 diff --git a/src/arch/armv7/Kconfig b/src/arch/armv7/Kconfig index 4f9fc34..f521323 100644 --- a/src/arch/armv7/Kconfig +++ b/src/arch/armv7/Kconfig @@ -4,15 +4,6 @@ menu "Architecture (armv7)" config ARM_ARCH_OPTIONS bool default y - select HAVE_ARCH_MEMSET - select HAVE_ARCH_MEMCPY - select HAVE_ARCH_MEMMOVE - -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 choice prompt "Bootblock behaviour" diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 36c9356..b4f919e 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -3,9 +3,6 @@ menu "Architecture (x86)" config X86_ARCH_OPTIONS bool default y - select HAVE_ARCH_MEMSET - select HAVE_ARCH_MEMCPY - select HAVE_ARCH_MEMMOVE # This is an SMP option. It relates to starting up APs. # It is usually set in mainboard/*/Kconfig. @@ -34,12 +31,6 @@ config STACK_SIZE hex default 0x1000 -# Maximum reboot count -# TODO: Improve description. -config MAX_REBOOT_CNT - int - default 3 - # This is something you almost certainly don't want to mess with. # How many SIPIs do we send when starting up APs and cores? # The answer in 2000 or so was '2'. Nowadays, on many systems, @@ -84,7 +75,7 @@ config ROMCC config PC80_SYSTEM bool - default y + default n config BOOTBLOCK_MAINBOARD_INIT string diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 3e2550c..07de0d0 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -19,27 +19,10 @@ subdirs-y += loaders bootblock-y += cbfs.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -bootblock-y += memset.c -endif bootblock-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -bootblock-y += memcpy.c -endif bootblock-y += memcmp.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -bootblock-y += memmove.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -romstage-y += memset.c -rmodules-y += memset.c -endif romstage-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -romstage-y += memcpy.c -rmodules-y += memcpy.c -endif romstage-y += memcmp.c rmodules-y += memcmp.c romstage-y += cbfs.c @@ -53,26 +36,14 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c endif romstage-y += compute_ip_checksum.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -romstage-y += memmove.c -endif romstage-$(CONFIG_ARCH_BINARY_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c ramstage-y += coreboot_table.c ramstage-y += bootmem.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -ramstage-y += memset.c -endif ramstage-y += memchr.c -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -ramstage-y += memcpy.c -endif ramstage-y += memcmp.c -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -ramstage-y += memmove.c -endif ramstage-y += malloc.c smm-$(CONFIG_SMM_TSEG) += malloc.c ramstage-y += delay.c @@ -114,15 +85,6 @@ ramstage-$(CONFIG_REG_SCRIPT) += reg_script.c romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += ramstage_cache.c -ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) -smm-y += memset.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y) -smm-y += memcpy.c -endif -ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) -smm-y += memmove.c -endif smm-y += cbfs.c memcmp.c smm-y += gcc.c

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coreboot-gerrit April 2014