Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5389
-gerrit
commit e51d92a7d053c2a4d28d4e940c4dc1348c6a4470
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sun Mar 16 16:30:59 2014 +1100
mainboard/jetway/nf81-t56n-lf: Toggle GPIO, WDT, CIR in devicetree.cb.
Turn on WDT and GPIO support in the devicetree. Turn off CIR support.
Dispense with old commentary.
Change-Id: I2173c0e454ddc0a30e023976bdf4764d951ea5f8
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
---
src/mainboard/jetway/nf81-t56n-lf/devicetree.cb | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
index 574bb8a..8f453ef 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
+++ b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
@@ -88,11 +88,11 @@ chip northbridge/amd/agesa/family14/root_complex
irq 0x70 = 1 # Keyboard IRQ
irq 0x72 = 12 # Mouse IRQ
end
- device pnp 2e.06 off end # GPIO
-# TODO: Verify BSEL register content with vendor BIOS using
-# $ sudo isadump 0x4e 0x4f 0x7
-# which select logical device (LDN) 7. Then read that we have in 0x27, bit1
- device pnp 2e.07 off end # BSEL
+ device pnp 2e.06 on # GPIO
+ io 0x60 = 0xa00
+ end
+ device pnp 2e.07 on end # WDT
+ device pnp 2e.08 off end # CIR
device pnp 2e.0a on end # PME
end # f71869ad
end #LPC
Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5389
-gerrit
commit 95992805dbaffa83e0d694965ad669f46dabfb34
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sun Mar 16 16:30:59 2014 +1100
mainboard/jetway/nf81-t56n-lf: Turn on GPIO's in devicetree.cb.
Turn on GPIO support in the devicetree.
Change-Id: I2173c0e454ddc0a30e023976bdf4764d951ea5f8
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
---
src/mainboard/jetway/nf81-t56n-lf/devicetree.cb | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
index 574bb8a..dfaeca9 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
+++ b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb
@@ -88,7 +88,9 @@ chip northbridge/amd/agesa/family14/root_complex
irq 0x70 = 1 # Keyboard IRQ
irq 0x72 = 12 # Mouse IRQ
end
- device pnp 2e.06 off end # GPIO
+ device pnp 2e.06 on # GPIO
+ io 0x60 = 0xa00
+ end
# TODO: Verify BSEL register content with vendor BIOS using
# $ sudo isadump 0x4e 0x4f 0x7
# which select logical device (LDN) 7. Then read that we have in 0x27, bit1
the following patch was just integrated into master:
commit d35299ca8e8b29904a4b5328d0d8d409428b5c9d
Author: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde(a)gmail.com>
Date: Mon Mar 24 10:02:42 2014 +0100
util/superiotool: Register fix for Fintek F71869AD
Fixed F71869AD based on the proper datasheet:
http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html
Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d
Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde(a)gmail.com>
See http://review.coreboot.org/5405 for details.
-gerrit
W. Duijvenvoorde (w.a.n.duijvenvoorde(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5404
-gerrit
commit 9dc44d55b0917959c24bcca9e4a503734e1a5bc1
Author: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde(a)gmail.com>
Date: Mon Mar 24 09:50:25 2014 +0100
util/superiotool: Register fix for Fintek F81865F/F-I
Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf
There is a multi-function select register listed as 0x2a-1 and 0x2a-2.
These are the original names in the datasheet, but superiotool will
display register 0x29 and 0x28 and their values.
This patch renames them both to 0x2a and shows both of the default values
for them. They are both 0x00, so one of them could be dropped though.
Change-Id: Iad91f9e4755d2d1a123e56ab0fa9257be7ea9978
Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde(a)gmail.com>
---
util/superiotool/fintek.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/util/superiotool/fintek.c b/util/superiotool/fintek.c
index aba0353..b4fac9f 100644
--- a/util/superiotool/fintek.c
+++ b/util/superiotool/fintek.c
@@ -322,7 +322,7 @@ static const struct superio_registers reg_table[] = {
{EOT}}},
{0x0407, "F81865F/F-I", {
{NOLDN, NULL,
- {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a-1,0x2a-2,0x2b,0x2c,0x2d,EOT},
+ {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2a,0x2b,0x2c,0x2d,EOT},
{NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
{0x00, "FDC",
{0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
the following patch was just integrated into master:
commit e91432c994603f7113d73fd7dcc4da00983a938b
Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Date: Sun Mar 23 20:42:02 2014 +1100
mainboard/jetway/nf81-t56n-lf: Turn on PME in devicetree.cb
Change-Id: Ia58994d14ebf488a9200b02ec7af9c71ef4de9e6
Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
See http://review.coreboot.org/5401 for details.
-gerrit