coreboot-gerrit February 2014

coreboot-gerrit@coreboot.org

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Patch set updated for coreboot: 27d953e x86: always mirror payload to ram before loading
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5305 -gerrit commit 27d953eafcd9c324346915d48544e83f21f452f4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 25 20:36:56 2014 -0600 x86: always mirror payload to ram before loading Boot speeds can be sped up by mirroring the payload into main memory before doing the actual loading. Systems that would benefit from this are typically Intel ones whose SPI are memory mapped. Without the SPI being cached all accesses to the payload in SPI while being loaded result in uncacheable accesses. Instead take advantage of the on-board SPI controller which has an internal cache and prefetcher by copying 64-byte cachelines using 32-bit word copies. Change-Id: I4aac856b1b5130fa2d68a6c45a96cfeead472a52 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/x86/Makefile.inc | 1 + src/cpu/x86/mirror_payload.c | 71 ++++++++++++++++++++++++++++++++++ src/include/payload_loader.h | 3 ++ src/lib/loaders/load_and_run_payload.c | 7 ++++ 4 files changed, 82 insertions(+) diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index d5bc2fd..c26edf6 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -3,6 +3,7 @@ romstage-$(CONFIG_HAVE_ACPI_RESUME) += car.c subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c +ramstage-y += mirror_payload.c SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf SIPI_BIN=$(SIPI_ELF:.elf=) diff --git a/src/cpu/x86/mirror_payload.c b/src/cpu/x86/mirror_payload.c new file mode 100644 index 0000000..edd2641 --- /dev/null +++ b/src/cpu/x86/mirror_payload.c @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <console/console.h> +#include <bootmem.h> +#include <payload_loader.h> + +void mirror_payload(struct payload *payload) +{ + char *buffer; + size_t size; + char *src; + uintptr_t alignment_diff; + const unsigned long cacheline_size = 64; + const uintptr_t intra_cacheline_mask = cacheline_size - 1; + const uintptr_t cacheline_mask = ~intra_cacheline_mask; + + src = payload->backing_store.data; + size = payload->backing_store.size; + + /* + * Adjust size so that the start and end points are aligned to a + * cacheline. The SPI hardware controllers on Intel machines should + * cache full length cachelines as well as prefetch data. Once the + * data is mirrored in memory all accesses should hit the CPU's cache. + */ + alignment_diff = (intra_cacheline_mask & (uintptr_t)src); + size += alignment_diff; + + size = ALIGN(size, cacheline_size); + + printk(BIOS_DEBUG, "Payload aligned size: 0x%zx\n", size); + + buffer = bootmem_allocate_buffer(size); + + if (buffer == NULL) { + printk(BIOS_DEBUG, "No buffer for mirroring payload.\n"); + return; + } + + src = (void *)(cacheline_mask & (uintptr_t)src); + + /* + * Note that if mempcy is not using 32-bit moves the performance will + * degrade because the SPI hardware prefetchers look for + * cacheline-aligned 32-bit accesses to kick in. + */ + memcpy(buffer, src, size); + + /* Update the payload's backing store. */ + payload->backing_store.data = &buffer[alignment_diff]; +} diff --git a/src/include/payload_loader.h b/src/include/payload_loader.h index 7ef5806..7a3f045 100644 --- a/src/include/payload_loader.h +++ b/src/include/payload_loader.h @@ -44,6 +44,9 @@ struct payload *payload_load(void); /* Run the loaded payload. */ void payload_run(const struct payload *payload); +/* Mirror the payload to be loaded. */ +void mirror_payload(struct payload *payload); + /* architecture specific function to run payload. */ void arch_payload_run(const struct payload *payload); diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 7e1383e..2204090 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -39,6 +39,11 @@ static struct payload global_payload = { .name = CONFIG_CBFS_PREFIX "/payload", }; +void __attribute__((weak)) mirror_payload(struct payload *payload) +{ + return; +} + struct payload *payload_load(void) { int i; @@ -62,6 +67,8 @@ struct payload *payload_load(void) if (i == ARRAY_SIZE(payload_ops)) return NULL; + mirror_payload(payload); + entry = selfload(payload); if (entry == NULL)

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Patch set updated for coreboot: a93a5d0 selfboot: use bootmem infrastructure
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5303 -gerrit commit a93a5d0e8284118d5a5b871a098f8105bbab6739 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 25 00:21:10 2014 -0600 selfboot: use bootmem infrastructure Instead of packing and unpacking entries in lb_mem use the bootmem infrastructure for performing sanity checks during payload loading. Change-Id: Ica2bee7ebb0f6bf9ded31deac8cb700aa387bc7a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/payload_loader.h | 3 +- src/lib/loaders/load_and_run_payload.c | 5 +- src/lib/selfboot.c | 151 +++++++++------------------------ 3 files changed, 44 insertions(+), 115 deletions(-) diff --git a/src/include/payload_loader.h b/src/include/payload_loader.h index 4948afb..7ef5806 100644 --- a/src/include/payload_loader.h +++ b/src/include/payload_loader.h @@ -58,7 +58,6 @@ struct payload_loader_ops { }; /* Defined in src/lib/selfboot.c */ -struct lb_memory; -void *selfload(struct lb_memory *mem, struct payload *payload); +void *selfload(struct payload *payload); #endif /* PAYLOAD_LOADER_H */ diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 3e1eafb..7e1383e 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <stdlib.h> #include <console/console.h> -#include <boot/coreboot_tables.h> #include <fallback.h> #include <lib.h> #include <payload_loader.h> @@ -44,7 +43,6 @@ struct payload *payload_load(void) { int i; void *entry; - struct lb_memory *mem; const struct payload_loader_ops *ops; struct payload *payload = &global_payload; @@ -64,8 +62,7 @@ struct payload *payload_load(void) if (i == ARRAY_SIZE(payload_ops)) return NULL; - mem = get_lb_mem(); - entry = selfload(mem, payload); + entry = selfload(payload); if (entry == NULL) return NULL; diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 6dc3a75..dff66e5 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -21,19 +21,14 @@ #include <arch/byteorder.h> #include <console/console.h> #include <cpu/cpu.h> -#include <boot/coreboot_tables.h> #include <stdint.h> #include <stdlib.h> #include <string.h> #include <cbfs.h> #include <lib.h> +#include <bootmem.h> #include <payload_loader.h> -/* Maximum physical address we can use for the coreboot bounce buffer. */ -#ifndef MAX_ADDR -#define MAX_ADDR -1UL -#endif - /* from coreboot_ram.ld: */ extern unsigned char _ram_seg; extern unsigned char _eram_seg; @@ -73,12 +68,10 @@ struct segment { static unsigned long bounce_size, bounce_buffer; -static void get_bounce_buffer(struct lb_memory *mem, unsigned long req_size) +static void get_bounce_buffer(unsigned long req_size) { unsigned long lb_size; - unsigned long mem_entries; - unsigned long buffer; - int i; + void *buffer; /* When the ramstage is relocatable there is no need for a bounce * buffer. All payloads should not overlap the ramstage. @@ -94,93 +87,15 @@ static void get_bounce_buffer(struct lb_memory *mem, unsigned long req_size) * to place a copy to return to. */ lb_size = req_size + lb_size; - mem_entries = (mem->size - sizeof(*mem)) / sizeof(mem->map[0]); - buffer = 0; - for(i = 0; i < mem_entries; i++) { - unsigned long mstart, mend; - unsigned long msize; - unsigned long tbuffer; - if (mem->map[i].type != LB_MEM_RAM) - continue; - if (unpack_lb64(mem->map[i].start) > MAX_ADDR) - continue; - if (unpack_lb64(mem->map[i].size) < lb_size) - continue; - mstart = unpack_lb64(mem->map[i].start); - msize = MAX_ADDR - mstart +1; - if (msize > unpack_lb64(mem->map[i].size)) - msize = unpack_lb64(mem->map[i].size); - mend = mstart + msize; - tbuffer = mend - lb_size; - if (tbuffer < buffer) - continue; - buffer = tbuffer; - } - bounce_buffer = buffer; - bounce_size = req_size; -} - -static int valid_area(struct lb_memory *mem, unsigned long buffer, - unsigned long start, unsigned long len) -{ - /* Check through all of the memory segments and ensure - * the segment that was passed in is completely contained - * in RAM. - */ - int i; - unsigned long end = start + len; - unsigned long mem_entries = (mem->size - sizeof(*mem)) / - sizeof(mem->map[0]); - /* See if I conflict with the bounce buffer */ - if (end >= buffer) { - return 0; - } + buffer = bootmem_allocate_buffer(lb_size); - /* Walk through the table of valid memory ranges and see if I - * have a match. - */ - for(i = 0; i < mem_entries; i++) { - uint64_t mstart, mend; - uint32_t mtype; - mtype = mem->map[i].type; - mstart = unpack_lb64(mem->map[i].start); - mend = mstart + unpack_lb64(mem->map[i].size); - if ((mtype == LB_MEM_RAM) && (start >= mstart) && (end < mend)) { - break; - } - if ((mtype == LB_MEM_TABLE) && (start >= mstart) && (end < mend)) { - printk(BIOS_ERR, "Payload is overwriting coreboot tables.\n"); - break; - } - } - if (i == mem_entries) { - if (start < (1024*1024) && end <=(1024*1024)) { - printk(BIOS_DEBUG, "Payload (probably SeaBIOS) loaded" - " into a reserved area in the lower 1MB\n"); - return 1; - } - printk(BIOS_ERR, "No matching ram area found for range:\n"); - printk(BIOS_ERR, " [0x%016lx, 0x%016lx)\n", start, end); - printk(BIOS_ERR, "Ram areas\n"); - for(i = 0; i < mem_entries; i++) { - uint64_t mstart, mend; - uint32_t mtype; - mtype = mem->map[i].type; - mstart = unpack_lb64(mem->map[i].start); - mend = mstart + unpack_lb64(mem->map[i].size); - printk(BIOS_ERR, " [0x%016lx, 0x%016lx) %s\n", - (unsigned long)mstart, - (unsigned long)mend, - (mtype == LB_MEM_RAM)?"RAM":"Reserved"); + printk(BIOS_SPEW, "Bounce Buffer at %p, %lu bytes\n", buffer, lb_size); - } - return 0; - } - return 1; + bounce_buffer = (uintptr_t)buffer; + bounce_size = req_size; } - static int overlaps_coreboot(struct segment *seg) { unsigned long start, end; @@ -299,7 +214,6 @@ static int relocate_segment(unsigned long buffer, struct segment *seg) static int build_self_segment_list( struct segment *head, - struct lb_memory *mem, struct payload *payload, uintptr_t *entry) { struct segment *new; @@ -393,24 +307,48 @@ static int build_self_segment_list( static int load_self_segments( struct segment *head, - struct lb_memory *mem, struct payload *payload) { struct segment *ptr; - + const unsigned long one_meg = (1UL << 20); unsigned long bounce_high = lb_end; + for(ptr = head->next; ptr != head; ptr = ptr->next) { - if (!overlaps_coreboot(ptr)) + if (bootmem_region_targets_usable_ram(ptr->s_dstaddr, + ptr->s_memsz)) continue; -#if CONFIG_RELOCATABLE_RAMSTAGE - /* payloads are required to not overlap ramstage. */ + + if (ptr->s_dstaddr < one_meg && + (ptr->s_dstaddr + ptr->s_memsz) <= one_meg) { + printk(BIOS_DEBUG, + "Payload being loaded below 1MiB " + "without region being marked as RAM usable.\n"); + continue; + } + + /* Payload segment not targeting RAM. */ + printk(BIOS_ERR, "SELF Payload doesn't target RAM:\n"); + printk(BIOS_ERR, "Failed Segment: 0x%lx, %lu bytes\n", + ptr->s_dstaddr, ptr->s_memsz); + bootmem_dump_ranges(); return 0; -#else + } + + for(ptr = head->next; ptr != head; ptr = ptr->next) { + /* + * Add segments to bootmem memory map before a bounce buffer is + * allocated so that there aren't conflicts with the actual + * payload. + */ + bootmem_add_range(ptr->s_dstaddr, ptr->s_memsz, + LB_MEM_UNUSABLE); + + if (!overlaps_coreboot(ptr)) + continue; if (ptr->s_dstaddr + ptr->s_memsz > bounce_high) bounce_high = ptr->s_dstaddr + ptr->s_memsz; -#endif } - get_bounce_buffer(mem, bounce_high - lb_start); + get_bounce_buffer(bounce_high - lb_start); if (!bounce_buffer) { printk(BIOS_ERR, "Could not find a bounce buffer...\n"); return 0; @@ -421,11 +359,6 @@ static int load_self_segments( payload->bounce.size = bounce_size; for(ptr = head->next; ptr != head; ptr = ptr->next) { - /* Verify the memory addresses in the segment are valid */ - if (!valid_area(mem, bounce_buffer, ptr->s_dstaddr, ptr->s_memsz)) - return 0; - } - for(ptr = head->next; ptr != head; ptr = ptr->next) { unsigned char *dest, *src; printk(BIOS_DEBUG, "Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n", ptr->s_dstaddr, ptr->s_memsz, ptr->s_filesz); @@ -505,17 +438,17 @@ static int load_self_segments( return 1; } -void *selfload(struct lb_memory *mem, struct payload *payload) +void *selfload(struct payload *payload) { uintptr_t entry = 0; struct segment head; /* Preprocess the self segments */ - if (!build_self_segment_list(&head, mem, payload, &entry)) + if (!build_self_segment_list(&head, payload, &entry)) goto out; /* Load the segments */ - if (!load_self_segments(&head, mem, payload)) + if (!load_self_segments(&head, payload)) goto out; printk(BIOS_SPEW, "Loaded segments\n");

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Patch set updated for coreboot: 9d9e137 coreboot: remove unused get_lb_mem() function
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5304 -gerrit commit 9d9e137e8f39080ab16f39589f6888ebc25766df Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 25 00:24:22 2014 -0600 coreboot: remove unused get_lb_mem() function The get_lb_mem() is no longer used. Therefore, remove it. Change-Id: I2d8427c460cfbb2b7a9870dfd54f4a75738cfb88 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/boot/coreboot_tables.h | 5 ----- src/lib/coreboot_table.c | 15 +-------------- 2 files changed, 1 insertion(+), 19 deletions(-) diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 9b87f3d..c4ad572 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -338,11 +338,6 @@ unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end); -/* Routines to extract part so the coreboot table or information - * from the coreboot table. - */ -struct lb_memory *get_lb_mem(void); - void fill_lb_gpios(struct lb_gpios *gpios); #endif /* COREBOOT_TABLES_H */ diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index cb7179d..667c685 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -354,18 +354,6 @@ static unsigned long lb_table_fini(struct lb_header *head) return (unsigned long)rec + rec->size; } -/* Routines to extract part so the coreboot table or - * information from the coreboot table after we have written it. - * Currently get_lb_mem relies on a global we can change the - * implementation. - */ -static struct lb_memory *mem_ranges = NULL; - -struct lb_memory *get_lb_mem(void) -{ - return mem_ranges; -} - unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) @@ -430,8 +418,7 @@ unsigned long write_coreboot_table( /* No other memory areas can be added after the memory table has been * committed as the entries won't show up in the serialize mem table. */ - mem_ranges = lb_memory(head); - bootmem_write_memory_table(mem_ranges); + bootmem_write_memory_table(lb_memory(head)); /* Record our motherboard */ lb_mainboard(head);

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Patch set updated for coreboot: 1bd1b95 x86: always mirror payload to ram before loading
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5305 -gerrit commit 1bd1b95bc851b02a143c73852070ad58d0c0e25f Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 25 20:36:56 2014 -0600 x86: always mirror payload to ram before loading Boot speeds can be sped up by mirroring the payload into main memory before doing the actual loading. Systems that would benefit from this are typically Intel ones whose SPI are memory mapped. Without the SPI being cached all accesses to the payload in SPI while being loaded result in uncacheable accesses. Instead take advantage of the on-board SPI controller which has an internal cache and prefetcher by copying 64-byte cachelines using 32-bit word copies. Change-Id: I4aac856b1b5130fa2d68a6c45a96cfeead472a52 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/cpu/x86/Makefile.inc | 1 + src/cpu/x86/mirror_payload.c | 71 ++++++++++++++++++++++++++++++++++ src/include/payload_loader.h | 3 ++ src/lib/loaders/load_and_run_payload.c | 7 ++++ 4 files changed, 82 insertions(+) diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index d5bc2fd..c26edf6 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -3,6 +3,7 @@ romstage-$(CONFIG_HAVE_ACPI_RESUME) += car.c subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c +ramstage-y += mirror_payload.c SIPI_ELF=$(obj)/cpu/x86/sipi_vector.elf SIPI_BIN=$(SIPI_ELF:.elf=) diff --git a/src/cpu/x86/mirror_payload.c b/src/cpu/x86/mirror_payload.c new file mode 100644 index 0000000..edd2641 --- /dev/null +++ b/src/cpu/x86/mirror_payload.c @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <stdlib.h> +#include <string.h> +#include <console/console.h> +#include <bootmem.h> +#include <payload_loader.h> + +void mirror_payload(struct payload *payload) +{ + char *buffer; + size_t size; + char *src; + uintptr_t alignment_diff; + const unsigned long cacheline_size = 64; + const uintptr_t intra_cacheline_mask = cacheline_size - 1; + const uintptr_t cacheline_mask = ~intra_cacheline_mask; + + src = payload->backing_store.data; + size = payload->backing_store.size; + + /* + * Adjust size so that the start and end points are aligned to a + * cacheline. The SPI hardware controllers on Intel machines should + * cache full length cachelines as well as prefetch data. Once the + * data is mirrored in memory all accesses should hit the CPU's cache. + */ + alignment_diff = (intra_cacheline_mask & (uintptr_t)src); + size += alignment_diff; + + size = ALIGN(size, cacheline_size); + + printk(BIOS_DEBUG, "Payload aligned size: 0x%zx\n", size); + + buffer = bootmem_allocate_buffer(size); + + if (buffer == NULL) { + printk(BIOS_DEBUG, "No buffer for mirroring payload.\n"); + return; + } + + src = (void *)(cacheline_mask & (uintptr_t)src); + + /* + * Note that if mempcy is not using 32-bit moves the performance will + * degrade because the SPI hardware prefetchers look for + * cacheline-aligned 32-bit accesses to kick in. + */ + memcpy(buffer, src, size); + + /* Update the payload's backing store. */ + payload->backing_store.data = &buffer[alignment_diff]; +} diff --git a/src/include/payload_loader.h b/src/include/payload_loader.h index 7ef5806..7a3f045 100644 --- a/src/include/payload_loader.h +++ b/src/include/payload_loader.h @@ -44,6 +44,9 @@ struct payload *payload_load(void); /* Run the loaded payload. */ void payload_run(const struct payload *payload); +/* Mirror the payload to be loaded. */ +void mirror_payload(struct payload *payload); + /* architecture specific function to run payload. */ void arch_payload_run(const struct payload *payload); diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 7e1383e..2204090 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -39,6 +39,11 @@ static struct payload global_payload = { .name = CONFIG_CBFS_PREFIX "/payload", }; +void __attribute__((weak)) mirror_payload(struct payload *payload) +{ + return; +} + struct payload *payload_load(void) { int i; @@ -62,6 +67,8 @@ struct payload *payload_load(void) if (i == ARRAY_SIZE(payload_ops)) return NULL; + mirror_payload(payload); + entry = selfload(payload); if (entry == NULL)

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Patch set updated for coreboot: 6e301c3 coreboot: introduce arch_payload_run()
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5300 -gerrit commit 6e301c3e0d4fbd9044fbe6914cf9b420d86b48f3 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Mon Feb 24 22:27:39 2014 -0600 coreboot: introduce arch_payload_run() The selfboot() function relied on global variables within the selfboot.c compilation unit. Now that the bounce buffer is a part of struct payload use a new architecture-specific arch_payload_run() function for jumping to the payload. selfboot() can then be removed. Change-Id: Icec74942e94599542148561b3311ce5096ac5ea5 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/armv7/boot.c | 7 ++++--- src/arch/armv7/include/arch/stages.h | 1 - src/arch/x86/boot/boot.c | 18 ++++++++++++------ src/arch/x86/include/arch/stages.h | 1 - src/include/payload_loader.h | 4 +++- src/lib/loaders/load_and_run_payload.c | 2 +- src/lib/selfboot.c | 7 ------- 7 files changed, 20 insertions(+), 20 deletions(-) diff --git a/src/arch/armv7/boot.c b/src/arch/armv7/boot.c index 6774802..d872a79 100644 --- a/src/arch/armv7/boot.c +++ b/src/arch/armv7/boot.c @@ -19,9 +19,10 @@ #include <console/console.h> #include <arch/stages.h> +#include <payload_loader.h> -void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size) +void arch_payload_run(const struct payload *payload) { - printk(BIOS_SPEW, "entry = %p\n", entry); - stage_exit(entry); + printk(BIOS_SPEW, "entry = %p\n", payload->entry); + stage_exit(payload->entry); } diff --git a/src/arch/armv7/include/arch/stages.h b/src/arch/armv7/include/arch/stages.h index 3fd54b9..671c02b 100644 --- a/src/arch/armv7/include/arch/stages.h +++ b/src/arch/armv7/include/arch/stages.h @@ -24,6 +24,5 @@ extern void main(void); void stage_entry(void) __attribute__((section(".text.stage_entry.armv7"))); void stage_exit(void *); -void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size); #endif diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c index 3ef46a5..29070a0 100644 --- a/src/arch/x86/boot/boot.c +++ b/src/arch/x86/boot/boot.c @@ -1,12 +1,12 @@ #include <console/console.h> #include <arch/stages.h> +#include <payload_loader.h> #include <ip_checksum.h> #include <string.h> -#if CONFIG_RELOCATABLE_RAMSTAGE /* When the ramstage is relocatable the elf loading ensures an elf image cannot * be loaded over the ramstage code. */ -void jmp_to_elf_entry(void *entry, unsigned long unused1, unsigned long unused2) +static void jmp_payload_no_bounce_buffer(void *entry) { /* Jump to kernel */ __asm__ __volatile__( @@ -22,8 +22,8 @@ void jmp_to_elf_entry(void *entry, unsigned long unused1, unsigned long unused2) "r" (entry) ); } -#else -void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size) + +static void jmp_payload(void *entry, unsigned long buffer, unsigned long size) { extern unsigned char _ram_seg, _eram_seg; unsigned long lb_start, lb_size; @@ -122,6 +122,12 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size) "ri"(0), "ri" (0) ); } -#endif /* CONFIG_RELOCATABLE_RAMSTAGE */ - +void arch_payload_run(const struct payload *payload) +{ + if (IS_ENABLED(CONFIG_RELOCATABLE_RAMSTAGE)) + jmp_payload_no_bounce_buffer(payload->entry); + else + jmp_payload(payload->entry, (uintptr_t)payload->bounce.data, + payload->bounce.size); +} diff --git a/src/arch/x86/include/arch/stages.h b/src/arch/x86/include/arch/stages.h index 91d0db6..4eae698 100644 --- a/src/arch/x86/include/arch/stages.h +++ b/src/arch/x86/include/arch/stages.h @@ -23,7 +23,6 @@ #include <arch/cpu.h> void asmlinkage copy_and_run(void); -void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size); static inline void stage_exit(void *entry) { diff --git a/src/include/payload_loader.h b/src/include/payload_loader.h index 73b28bf..4948afb 100644 --- a/src/include/payload_loader.h +++ b/src/include/payload_loader.h @@ -44,6 +44,9 @@ struct payload *payload_load(void); /* Run the loaded payload. */ void payload_run(const struct payload *payload); +/* architecture specific function to run payload. */ +void arch_payload_run(const struct payload *payload); + /* Payload loading operations. */ struct payload_loader_ops { const char *name; @@ -57,6 +60,5 @@ struct payload_loader_ops { /* Defined in src/lib/selfboot.c */ struct lb_memory; void *selfload(struct lb_memory *mem, struct payload *payload); -void selfboot(void *entry); #endif /* PAYLOAD_LOADER_H */ diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index f18b57b..3e1eafb 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -93,5 +93,5 @@ void payload_run(const struct payload *payload) */ checkstack(_estack, 0); - selfboot(payload->entry); + arch_payload_run(payload); } diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index ba07480..6dc3a75 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -19,7 +19,6 @@ */ #include <arch/byteorder.h> -#include <arch/stages.h> #include <console/console.h> #include <cpu/cpu.h> #include <boot/coreboot_tables.h> @@ -526,9 +525,3 @@ void *selfload(struct lb_memory *mem, struct payload *payload) out: return NULL; } - -void selfboot(void *entry) -{ - /* Jump to kernel */ - jmp_to_elf_entry(entry, bounce_buffer, bounce_size); -}

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Patch set updated for coreboot: fb9ada4 coreboot: don't return struct lb_memory * from write_tables()
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5301 -gerrit commit fb9ada4cab5509cc60ebd60e9a6629a1fc737450 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 18 19:36:05 2014 -0600 coreboot: don't return struct lb_memory * from write_tables() No one is interrogating the write_tables() return value. Therefore, drop it. Change-Id: I97e707f071942239c9a0fa0914af3679ee7a9c3c Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/arch/armv7/tables.c | 6 ++---- src/arch/x86/boot/tables.c | 4 +--- src/include/boot/tables.h | 2 +- 3 files changed, 4 insertions(+), 8 deletions(-) diff --git a/src/arch/armv7/tables.c b/src/arch/armv7/tables.c index 7e7cbe4..20c5a9f 100644 --- a/src/arch/armv7/tables.c +++ b/src/arch/armv7/tables.c @@ -46,7 +46,7 @@ void cbmem_fail_resume(void) { } -struct lb_memory *write_tables(void) +void write_tables(void) { unsigned long table_pointer, new_table_pointer; @@ -56,7 +56,7 @@ struct lb_memory *write_tables(void) MAX_COREBOOT_TABLE_SIZE); if (!table_pointer) { printk(BIOS_ERR, "Could not add CBMEM for coreboot table.\n"); - return NULL; + return; } new_table_pointer = write_coreboot_table(0UL, 0UL, @@ -74,6 +74,4 @@ struct lb_memory *write_tables(void) /* Print CBMEM sections */ cbmem_list(); - - return get_lb_mem(); } diff --git a/src/arch/x86/boot/tables.c b/src/arch/x86/boot/tables.c index e980ed8..42e431e 100644 --- a/src/arch/x86/boot/tables.c +++ b/src/arch/x86/boot/tables.c @@ -38,7 +38,7 @@ void cbmem_arch_init(void) move_gdt(); } -struct lb_memory *write_tables(void) +void write_tables(void) { unsigned long low_table_start, low_table_end; unsigned long rom_table_start, rom_table_end; @@ -244,6 +244,4 @@ struct lb_memory *write_tables(void) /* Print CBMEM sections */ cbmem_list(); - - return get_lb_mem(); } diff --git a/src/include/boot/tables.h b/src/include/boot/tables.h index f9e91a4..e86adfc 100644 --- a/src/include/boot/tables.h +++ b/src/include/boot/tables.h @@ -3,6 +3,6 @@ #include <boot/coreboot_tables.h> -struct lb_memory *write_tables(void); +void write_tables(void); #endif /* BOOT_TABLES_H */

1 0

Patch set updated for coreboot: 780afdb coreboot: introduce notion of bootmem for memory map at boot
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5302 -gerrit commit 780afdbcd5360a901199ef47b1dde6fd59f69c76 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 18 21:55:02 2014 -0600 coreboot: introduce notion of bootmem for memory map at boot The write_coreboot_table() in coreboot_table.c was already using struct memrange for managing and building up the entries that eventually go into the lb_memory table. Abstract that concept out to a bootmem memory map. The bootmem concept can then be used as a basis for loading payloads, for example. Change-Id: I7edbbca6bbd0568f658fde39ca93b126cab88367 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/boot/coreboot_tables.h | 3 - src/include/bootmem.h | 48 ++++++++++ src/include/cbmem.h | 5 +- src/lib/Makefile.inc | 1 + src/lib/bootmem.c | 177 +++++++++++++++++++++++++++++++++++++ src/lib/cbmem.c | 6 +- src/lib/coreboot_table.c | 90 +++---------------- src/lib/dynamic_cbmem.c | 6 +- 8 files changed, 245 insertions(+), 91 deletions(-) diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 6243d45..9b87f3d 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -338,9 +338,6 @@ unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end); -void lb_add_memory_range(struct lb_memory *mem, - uint32_t type, uint64_t start, uint64_t size); - /* Routines to extract part so the coreboot table or information * from the coreboot table. */ diff --git a/src/include/bootmem.h b/src/include/bootmem.h new file mode 100644 index 0000000..656769f --- /dev/null +++ b/src/include/bootmem.h @@ -0,0 +1,48 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef BOOTMEM_H +#define BOOTMEM_H + +#include <memrange.h> +#include <stdint.h> +#include <boot/coreboot_tables.h> + +/* + * Initialize the memory address space prior to payload loading. The bootmem + * serves as the source for the lb_mem table. + */ +void bootmem_init(void); + +/* Add a range of a given type to the bootmem address space. */ +void bootmem_add_range(uint64_t start, uint64_t size, uint32_t type); + +/* Write memory coreboot table. */ +void bootmem_write_memory_table(struct lb_memory *mem); + +/* Print current range map of boot memory. */ +void bootmem_dump_ranges(void); + +/* Return 1 if region targets usable RAM, 0 otherwise. */ +int bootmem_region_targets_usable_ram(uint64_t start, uint64_t size); + +/* Allocate a temporary buffer from the unused RAM areas. */ +void *bootmem_allocate_buffer(size_t size); + +#endif /* BOOTMEM_H */ diff --git a/src/include/cbmem.h b/src/include/cbmem.h index eb307d4..7cb12b2 100644 --- a/src/include/cbmem.h +++ b/src/include/cbmem.h @@ -174,9 +174,8 @@ void *cbmem_find(u32 id); #ifndef __PRE_RAM__ /* Ramstage only functions. */ -/* Add the cbmem memory used to the memory tables. */ -struct lb_memory; -void cbmem_add_lb_mem(struct lb_memory *mem); +/* Add the cbmem memory used to the memory map at boot. */ +void cbmem_add_bootmem(void); void cbmem_list(void); void cbmem_arch_init(void); void cbmem_print_entry(int n, u32 id, u64 start, u64 size); diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 5c37329..cb75dbf 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -63,6 +63,7 @@ romstage-$(CONFIG_ARCH_X86) += gcc.c ramstage-y += hardwaremain.c ramstage-y += selfboot.c ramstage-y += coreboot_table.c +ramstage-y += bootmem.c ifneq ($(CONFIG_HAVE_ARCH_MEMSET),y) ramstage-y += memset.c endif diff --git a/src/lib/bootmem.c b/src/lib/bootmem.c new file mode 100644 index 0000000..f1bd7cc --- /dev/null +++ b/src/lib/bootmem.c @@ -0,0 +1,177 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003-2004 Eric Biederman + * Copyright (C) 2005-2010 coresystems GmbH + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <bootmem.h> +#include <cbmem.h> +#include <device/resource.h> +#include <stdlib.h> + +static struct memranges bootmem; + +void bootmem_init(void) +{ + const unsigned long cacheable = IORESOURCE_CACHEABLE; + const unsigned long reserved = IORESOURCE_RESERVE; + struct memranges *bm = &bootmem; + + /* + * Fill the memory map out. The order of operations is important in + * that each overlapping range will take over the next. Therefore, + * add cacheable resources as RAM then add the reserved resources. + */ + memranges_init(bm, cacheable, cacheable, LB_MEM_RAM); + memranges_add_resources(bm, reserved, reserved, LB_MEM_RESERVED); + + /* Add memory used by CBMEM. */ + cbmem_add_bootmem(); +} + +void bootmem_add_range(uint64_t start, uint64_t size, uint32_t type) +{ + memranges_insert(&bootmem, start, size, type); +} + +void bootmem_write_memory_table(struct lb_memory *mem) +{ + const struct range_entry *r; + struct lb_memory_range *lb_r; + + lb_r = &mem->map[0]; + + bootmem_dump_ranges(); + + memranges_each_entry(r, &bootmem) { + lb_r->start = pack_lb64(range_entry_base(r)); + lb_r->size = pack_lb64(range_entry_size(r)); + lb_r->type = range_entry_tag(r); + + lb_r++; + mem->size += sizeof(struct lb_memory_range); + } +} + +struct range_strings { + unsigned long tag; + const char *str; +}; + +static const struct range_strings type_strings[] = { + { LB_MEM_RAM, "RAM" }, + { LB_MEM_RESERVED, "RESERVED" }, + { LB_MEM_ACPI, "ACPI" }, + { LB_MEM_NVS, "NVS" }, + { LB_MEM_UNUSABLE, "UNUSABLE" }, + { LB_MEM_VENDOR_RSVD, "VENDOR RESERVED" }, + { LB_MEM_TABLE, "CONFIGURATION TABLES" }, +}; + +static const char *bootmem_range_string(unsigned long tag) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(type_strings); i++) { + if (type_strings[i].tag == tag) + return type_strings[i].str; + } + + return "UNKNOWN!"; +} + +void bootmem_dump_ranges(void) +{ + int i; + const struct range_entry *r; + + i = 0; + memranges_each_entry(r, &bootmem) { + printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n", + i, range_entry_base(r), range_entry_end(r) - 1, + bootmem_range_string(range_entry_tag(r))); + i++; + } +} + +int bootmem_region_targets_usable_ram(uint64_t start, uint64_t size) +{ + const struct range_entry *r; + uint64_t end = start + size; + + memranges_each_entry(r, &bootmem) { + /* All further bootmem entries are beyond this range. */ + if (end <= range_entry_base(r)) + break; + + if (start >= range_entry_base(r) && end <= range_entry_end(r)) { + if (range_entry_tag(r) == LB_MEM_RAM) + return 1; + } + } + return 0; +} + +void *bootmem_allocate_buffer(size_t size) +{ + const struct range_entry *r; + const struct range_entry *region; + /* All allocated buffers fall below the 32-bit boundary. */ + const resource_t max_addr = 1ULL << 32; + resource_t begin; + resource_t end; + + /* 4KiB alignment. */ + size = ALIGN(size, 4096); + region = NULL; + memranges_each_entry(r, &bootmem) { + if (range_entry_size(r) < size) + continue; + + if (range_entry_tag(r) != LB_MEM_RAM) + continue; + + if (range_entry_base(r) >= max_addr) + continue; + + end = range_entry_end(r); + if (end > max_addr) + end = max_addr; + + if ((end - range_entry_base(r)) < size) + continue; + + region = r; + } + + if (region == NULL) + return NULL; + + /* region now points to the highest usable region for the given size. */ + begin = range_entry_base(region); + end = range_entry_end(region); + if (end > max_addr) + end = max_addr; + begin = end - size; + + /* Mark buffer as unusuable for future buffer use. */ + bootmem_add_range(begin, size, LB_MEM_UNUSABLE); + + return (void *)(uintptr_t)begin; +} diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index d97f6af..33fa721 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -19,9 +19,9 @@ #include <types.h> #include <string.h> +#include <bootmem.h> #include <bootstate.h> #include <cbmem.h> -#include <boot/coreboot_tables.h> #include <console/console.h> #include <arch/early_variables.h> #if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__) @@ -265,9 +265,9 @@ BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = { init_cbmem_post_device, NULL), }; -void cbmem_add_lb_mem(struct lb_memory *mem) +void cbmem_add_bootmem(void) { - lb_add_memory_range(mem, LB_MEM_TABLE, cbmem_base, cbmem_size); + bootmem_add_range(cbmem_base, cbmem_size, LB_MEM_TABLE); } void cbmem_list(void) diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 904185a..cb7179d 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -29,7 +29,7 @@ #include <stdlib.h> #include <cbfs.h> #include <cbmem.h> -#include <memrange.h> +#include <bootmem.h> #if CONFIG_CHROMEOS #if CONFIG_GENERATE_ACPI_TABLES #include <arch/acpi.h> @@ -366,78 +366,11 @@ struct lb_memory *get_lb_mem(void) return mem_ranges; } -/* This structure keeps track of the coreboot table memory ranges. */ -static struct memranges lb_ranges; - -static struct lb_memory *build_lb_mem(struct lb_header *head) -{ - struct lb_memory *mem; - - /* Record where the lb memory ranges will live */ - mem = lb_memory(head); - mem_ranges = mem; - - /* Fill the memory map out. The order of operations is important in - * that each overlapping range will take over the next. Therefore, - * add cacheable resources as RAM then add the reserved resources. */ - memranges_init(&lb_ranges, IORESOURCE_CACHEABLE, - IORESOURCE_CACHEABLE, LB_MEM_RAM); - memranges_add_resources(&lb_ranges, IORESOURCE_RESERVE, - IORESOURCE_RESERVE, LB_MEM_RESERVED); - - return mem; -} - -static void commit_lb_memory(struct lb_memory *mem) -{ - struct range_entry *r; - struct lb_memory_range *lb_r; - int i; - - lb_r = &mem->map[0]; - i = 0; - - memranges_each_entry(r, &lb_ranges) { - const char *entry_type; - - switch (range_entry_tag(r)) { - case LB_MEM_RAM: entry_type="RAM"; break; - case LB_MEM_RESERVED: entry_type="RESERVED"; break; - case LB_MEM_ACPI: entry_type="ACPI"; break; - case LB_MEM_NVS: entry_type="NVS"; break; - case LB_MEM_UNUSABLE: entry_type="UNUSABLE"; break; - case LB_MEM_VENDOR_RSVD: entry_type="VENDOR RESERVED"; break; - case LB_MEM_TABLE: entry_type="CONFIGURATION TABLES"; break; - default: entry_type="UNKNOWN!"; break; - } - - printk(BIOS_DEBUG, "%2d. %016llx-%016llx: %s\n", - i, range_entry_base(r), range_entry_end(r)-1, - entry_type); - - lb_r->start = pack_lb64(range_entry_base(r)); - lb_r->size = pack_lb64(range_entry_size(r)); - lb_r->type = range_entry_tag(r); - - i++; - lb_r++; - mem->size += sizeof(struct lb_memory_range); - } -} - -void lb_add_memory_range(struct lb_memory *mem, - uint32_t type, uint64_t start, uint64_t size) -{ - memranges_insert(&lb_ranges, start, size, type); -} - - unsigned long write_coreboot_table( unsigned long low_table_start, unsigned long low_table_end, unsigned long rom_table_start, unsigned long rom_table_end) { struct lb_header *head; - struct lb_memory *mem; if (low_table_start || low_table_end) { printk(BIOS_DEBUG, "Writing table forward entry at 0x%08lx\n", @@ -476,30 +409,29 @@ unsigned long write_coreboot_table( } #endif - /* The Linux kernel assumes this region is reserved */ - /* Record where RAM is located */ - mem = build_lb_mem(head); + /* Initialize the memory map at boot time. */ + bootmem_init(); if (low_table_start || low_table_end) { + uint64_t size = low_table_end - low_table_start; /* Record the mptable and the the lb_table. * (This will be adjusted later) */ - lb_add_memory_range(mem, LB_MEM_TABLE, - low_table_start, low_table_end - low_table_start); + bootmem_add_range(low_table_start, size, LB_MEM_TABLE); } /* Record the pirq table, acpi tables, and maybe the mptable. However, * these only need to be added when the rom_table is sitting below * 1MiB. If it isn't that means high tables are being written. * The code below handles high tables correctly. */ - if (rom_table_end <= (1 << 20)) - lb_add_memory_range(mem, LB_MEM_TABLE, - rom_table_start, rom_table_end - rom_table_start); - - cbmem_add_lb_mem(mem); + if (rom_table_end <= (1 << 20)) { + uint64_t size = rom_table_end - rom_table_start; + bootmem_add_range(rom_table_start, size, LB_MEM_TABLE); + } /* No other memory areas can be added after the memory table has been * committed as the entries won't show up in the serialize mem table. */ - commit_lb_memory(mem); + mem_ranges = lb_memory(head); + bootmem_write_memory_table(mem_ranges); /* Record our motherboard */ lb_mainboard(head); diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c index 0cc6295..322ead0 100644 --- a/src/lib/dynamic_cbmem.c +++ b/src/lib/dynamic_cbmem.c @@ -18,7 +18,7 @@ */ #include <bootstate.h> -#include <boot/tables.h> +#include <bootmem.h> #include <console/console.h> #include <cbmem.h> #include <string.h> @@ -431,14 +431,14 @@ BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = { init_cbmem_pre_device, NULL), }; -void cbmem_add_lb_mem(struct lb_memory *mem) +void cbmem_add_bootmem(void) { unsigned long base; unsigned long top; base = (unsigned long)cbmem_base(); top = (unsigned long)get_top_aligned(); - lb_add_memory_range(mem, LB_MEM_TABLE, base, top - base); + bootmem_add_range(base, top - base, LB_MEM_TABLE); } void cbmem_list(void)

1 0

Patch set updated for coreboot: 4d1abdb selfboot: use bootmem infrastructure
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5303 -gerrit commit 4d1abdb4523e7e36f3dee87373f17e6854d05f9c Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Feb 25 00:21:10 2014 -0600 selfboot: use bootmem infrastructure Instead of packing and unpacking entries in lb_mem use the bootmem infrastructure for performing sanity checks during payload loading. Change-Id: Ica2bee7ebb0f6bf9ded31deac8cb700aa387bc7a Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/payload_loader.h | 3 +- src/lib/loaders/load_and_run_payload.c | 5 +- src/lib/selfboot.c | 151 +++++++++------------------------ 3 files changed, 44 insertions(+), 115 deletions(-) diff --git a/src/include/payload_loader.h b/src/include/payload_loader.h index 4948afb..7ef5806 100644 --- a/src/include/payload_loader.h +++ b/src/include/payload_loader.h @@ -58,7 +58,6 @@ struct payload_loader_ops { }; /* Defined in src/lib/selfboot.c */ -struct lb_memory; -void *selfload(struct lb_memory *mem, struct payload *payload); +void *selfload(struct payload *payload); #endif /* PAYLOAD_LOADER_H */ diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 3e1eafb..7e1383e 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <stdlib.h> #include <console/console.h> -#include <boot/coreboot_tables.h> #include <fallback.h> #include <lib.h> #include <payload_loader.h> @@ -44,7 +43,6 @@ struct payload *payload_load(void) { int i; void *entry; - struct lb_memory *mem; const struct payload_loader_ops *ops; struct payload *payload = &global_payload; @@ -64,8 +62,7 @@ struct payload *payload_load(void) if (i == ARRAY_SIZE(payload_ops)) return NULL; - mem = get_lb_mem(); - entry = selfload(mem, payload); + entry = selfload(payload); if (entry == NULL) return NULL; diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 6dc3a75..01277ce 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -21,19 +21,14 @@ #include <arch/byteorder.h> #include <console/console.h> #include <cpu/cpu.h> -#include <boot/coreboot_tables.h> #include <stdint.h> #include <stdlib.h> #include <string.h> #include <cbfs.h> #include <lib.h> +#include <bootmem.h> #include <payload_loader.h> -/* Maximum physical address we can use for the coreboot bounce buffer. */ -#ifndef MAX_ADDR -#define MAX_ADDR -1UL -#endif - /* from coreboot_ram.ld: */ extern unsigned char _ram_seg; extern unsigned char _eram_seg; @@ -73,12 +68,10 @@ struct segment { static unsigned long bounce_size, bounce_buffer; -static void get_bounce_buffer(struct lb_memory *mem, unsigned long req_size) +static void get_bounce_buffer(unsigned long req_size) { unsigned long lb_size; - unsigned long mem_entries; - unsigned long buffer; - int i; + void *buffer; /* When the ramstage is relocatable there is no need for a bounce * buffer. All payloads should not overlap the ramstage. @@ -94,93 +87,15 @@ static void get_bounce_buffer(struct lb_memory *mem, unsigned long req_size) * to place a copy to return to. */ lb_size = req_size + lb_size; - mem_entries = (mem->size - sizeof(*mem)) / sizeof(mem->map[0]); - buffer = 0; - for(i = 0; i < mem_entries; i++) { - unsigned long mstart, mend; - unsigned long msize; - unsigned long tbuffer; - if (mem->map[i].type != LB_MEM_RAM) - continue; - if (unpack_lb64(mem->map[i].start) > MAX_ADDR) - continue; - if (unpack_lb64(mem->map[i].size) < lb_size) - continue; - mstart = unpack_lb64(mem->map[i].start); - msize = MAX_ADDR - mstart +1; - if (msize > unpack_lb64(mem->map[i].size)) - msize = unpack_lb64(mem->map[i].size); - mend = mstart + msize; - tbuffer = mend - lb_size; - if (tbuffer < buffer) - continue; - buffer = tbuffer; - } - bounce_buffer = buffer; - bounce_size = req_size; -} -static int valid_area(struct lb_memory *mem, unsigned long buffer, - unsigned long start, unsigned long len) -{ - /* Check through all of the memory segments and ensure - * the segment that was passed in is completely contained - * in RAM. - */ - int i; - unsigned long end = start + len; - unsigned long mem_entries = (mem->size - sizeof(*mem)) / - sizeof(mem->map[0]); + buffer = bootmem_allocate_buffer(lb_size); - /* See if I conflict with the bounce buffer */ - if (end >= buffer) { - return 0; - } - - /* Walk through the table of valid memory ranges and see if I - * have a match. - */ - for(i = 0; i < mem_entries; i++) { - uint64_t mstart, mend; - uint32_t mtype; - mtype = mem->map[i].type; - mstart = unpack_lb64(mem->map[i].start); - mend = mstart + unpack_lb64(mem->map[i].size); - if ((mtype == LB_MEM_RAM) && (start >= mstart) && (end < mend)) { - break; - } - if ((mtype == LB_MEM_TABLE) && (start >= mstart) && (end < mend)) { - printk(BIOS_ERR, "Payload is overwriting coreboot tables.\n"); - break; - } - } - if (i == mem_entries) { - if (start < (1024*1024) && end <=(1024*1024)) { - printk(BIOS_DEBUG, "Payload (probably SeaBIOS) loaded" - " into a reserved area in the lower 1MB\n"); - return 1; - } - printk(BIOS_ERR, "No matching ram area found for range:\n"); - printk(BIOS_ERR, " [0x%016lx, 0x%016lx)\n", start, end); - printk(BIOS_ERR, "Ram areas\n"); - for(i = 0; i < mem_entries; i++) { - uint64_t mstart, mend; - uint32_t mtype; - mtype = mem->map[i].type; - mstart = unpack_lb64(mem->map[i].start); - mend = mstart + unpack_lb64(mem->map[i].size); - printk(BIOS_ERR, " [0x%016lx, 0x%016lx) %s\n", - (unsigned long)mstart, - (unsigned long)mend, - (mtype == LB_MEM_RAM)?"RAM":"Reserved"); + printk(BIOS_SPEW, "Bounce Buffer at %p, %lu bytes\n", buffer, lb_size); - } - return 0; - } - return 1; + bounce_buffer = (uintptr_t)buffer; + bounce_size = req_size; } - static int overlaps_coreboot(struct segment *seg) { unsigned long start, end; @@ -299,7 +214,6 @@ static int relocate_segment(unsigned long buffer, struct segment *seg) static int build_self_segment_list( struct segment *head, - struct lb_memory *mem, struct payload *payload, uintptr_t *entry) { struct segment *new; @@ -393,24 +307,48 @@ static int build_self_segment_list( static int load_self_segments( struct segment *head, - struct lb_memory *mem, struct payload *payload) { struct segment *ptr; - + const unsigned long one_meg = (1UL << 20); unsigned long bounce_high = lb_end; + for(ptr = head->next; ptr != head; ptr = ptr->next) { - if (!overlaps_coreboot(ptr)) + if (bootmem_region_targets_usable_ram(ptr->s_dstaddr, + ptr->s_memsz)) + continue + + if (ptr->s_dstaddr < one_meg && + (ptr->s_dstaddr + ptr->s_memsz) <= one_meg) { + printk(BIOS_DEBUG, + "Payload being loaded below 1MiB " + "without region being marked as RAM usable.\n"); continue; -#if CONFIG_RELOCATABLE_RAMSTAGE - /* payloads are required to not overlap ramstage. */ + } + + /* Payload segment not targeting RAM. */ + printk(BIOS_ERR, "SELF Payload doesn't target RAM:\n"); + printk(BIOS_ERR, "Failed Segment: 0x%lx, %lu bytes\n", + ptr->s_dstaddr, ptr->s_memsz); + bootmem_dump_ranges(); return 0; -#else + } + + for(ptr = head->next; ptr != head; ptr = ptr->next) { + /* + * Add segments to bootmem memory map before a bounce buffer is + * allocated so that there aren't conflicts with the actual + * payload. + */ + bootmem_add_range(ptr->s_dstaddr, ptr->s_memsz, + LB_MEM_UNUSABLE); + + if (!overlaps_coreboot(ptr)) + continue; if (ptr->s_dstaddr + ptr->s_memsz > bounce_high) bounce_high = ptr->s_dstaddr + ptr->s_memsz; -#endif } - get_bounce_buffer(mem, bounce_high - lb_start); + get_bounce_buffer(bounce_high - lb_start); if (!bounce_buffer) { printk(BIOS_ERR, "Could not find a bounce buffer...\n"); return 0; @@ -421,11 +359,6 @@ static int load_self_segments( payload->bounce.size = bounce_size; for(ptr = head->next; ptr != head; ptr = ptr->next) { - /* Verify the memory addresses in the segment are valid */ - if (!valid_area(mem, bounce_buffer, ptr->s_dstaddr, ptr->s_memsz)) - return 0; - } - for(ptr = head->next; ptr != head; ptr = ptr->next) { unsigned char *dest, *src; printk(BIOS_DEBUG, "Loading Segment: addr: 0x%016lx memsz: 0x%016lx filesz: 0x%016lx\n", ptr->s_dstaddr, ptr->s_memsz, ptr->s_filesz); @@ -505,17 +438,17 @@ static int load_self_segments( return 1; } -void *selfload(struct lb_memory *mem, struct payload *payload) +void *selfload(struct payload *payload) { uintptr_t entry = 0; struct segment head; /* Preprocess the self segments */ - if (!build_self_segment_list(&head, mem, payload, &entry)) + if (!build_self_segment_list(&head, payload, &entry)) goto out; /* Load the segments */ - if (!load_self_segments(&head, mem, payload)) + if (!load_self_segments(&head, payload)) goto out; printk(BIOS_SPEW, "Loaded segments\n");

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Patch set updated for coreboot: dc11a0d coreboot: unify infrastructure for loading payloads
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5296 -gerrit commit dc11a0df45e9d0ab5ea32dc121a45e664e7f00d0 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Mon Feb 24 14:56:34 2014 -0600 coreboot: unify infrastructure for loading payloads A payload can be loaded either from a vboot region or from cbfs. Provide a common place for choosing where the payload is loaded from. Additionally, place the logic in the 'loaders' directory similarly to the ramstage loader infrastructure. Change-Id: I6b0034ea5ebd04a3d058151819ac77a126a6bfe2 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/include/cbfs.h | 6 --- src/include/payload_loader.h | 61 +++++++++++++++++++++++ src/lib/cbfs.c | 19 -------- src/lib/hardwaremain.c | 22 ++++----- src/lib/loaders/Makefile.inc | 2 + src/lib/loaders/cbfs_payload_loader.c | 44 +++++++++++++++++ src/lib/loaders/load_and_run_payload.c | 81 +++++++++++++++++++++++++++++++ src/lib/selfboot.c | 1 + src/vendorcode/google/chromeos/chromeos.c | 25 +++++++++- src/vendorcode/google/chromeos/chromeos.h | 1 - 10 files changed, 222 insertions(+), 40 deletions(-) diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 9ce862b..ebdbf43 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -54,7 +54,6 @@ void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, uint16_t device, void * dest); -void *cbfs_load_payload(struct cbfs_media *media, const char *name); void *cbfs_load_stage(struct cbfs_media *media, const char *name); /* Simple buffer for streaming media. */ @@ -75,11 +74,6 @@ void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, // Utility functions int run_address(void *f); -/* Defined in src/lib/selfboot.c */ -struct lb_memory; -void *selfload(struct lb_memory *mem, struct cbfs_payload *payload); -void selfboot(void *entry); - /* Defined in individual arch / board implementation. */ int init_default_cbfs_media(struct cbfs_media *media); diff --git a/src/include/payload_loader.h b/src/include/payload_loader.h new file mode 100644 index 0000000..b8bfc0d --- /dev/null +++ b/src/include/payload_loader.h @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ +#ifndef PAYLOAD_LOADER_H +#define PAYLOAD_LOADER_H + +#include <stdint.h> +#include <stddef.h> + +struct payload_backing_store { + void *data; + size_t size; +}; + +struct payload { + const char *name; + struct payload_backing_store backing_store; + void *entry; +}; + +/* + * Load payload into memory and return pointer to payload structure. Returns + * NULL on error. + */ +struct payload *payload_load(void); + +/* Run the loaded payload. */ +void payload_run(const struct payload *payload); + +/* Payload loading operations. */ +struct payload_loader_ops { + const char *name; + /* + * Fill in payload_backing_store structure. Return 0 on success, < 0 + * on failure. + */ + int (*locate)(struct payload *payload); +}; + +/* Defined in src/lib/selfboot.c */ +struct lb_memory; +struct cbfs_payload; +void *selfload(struct lb_memory *mem, struct cbfs_payload *payload); +void selfboot(void *entry); + +#endif /* PAYLOAD_LOADER_H */ diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 99eeac8..dc08937 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -65,12 +65,6 @@ #include "cbfs_core.c" -#if CONFIG_VBOOT_VERIFY_FIRMWARE -#include <vendorcode/google/chromeos/chromeos.h> -#else -static inline void *vboot_get_payload(int *len) { return NULL; } -#endif - #ifndef __SMM__ static inline int tohex4(unsigned int c) { @@ -160,19 +154,6 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name) return (void *) entry; } -void *cbfs_load_payload(struct cbfs_media *media, const char *name) -{ - struct cbfs_payload *payload; - - payload = vboot_get_payload(NULL); - if (payload != NULL) - return payload; - - payload = (struct cbfs_payload *)cbfs_get_file_content( - media, name, CBFS_TYPE_PAYLOAD, NULL); - return payload; -} - /* Simple buffer */ void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index fed153b..d90e0f6 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -32,7 +32,7 @@ #include <stdlib.h> #include <reset.h> #include <boot/tables.h> -#include <cbfs.h> +#include <payload_loader.h> #include <lib.h> #if CONFIG_HAVE_ACPI_RESUME #include <arch/acpi.h> @@ -226,30 +226,26 @@ static boot_state_t bs_write_tables(void *arg) static boot_state_t bs_payload_load(void *arg) { - void *payload; - void *entry; + struct payload *payload; timestamp_add_now(TS_LOAD_PAYLOAD); - payload = cbfs_load_payload(CBFS_DEFAULT_MEDIA, - CONFIG_CBFS_PREFIX "/payload"); - if (! payload) - die("Could not find a payload\n"); - - entry = selfload(get_lb_mem(), payload); + payload = payload_load(); - if (! entry) + if (! payload) die("Could not load payload\n"); /* Pass the payload to the next state. */ - boot_states[BS_PAYLOAD_BOOT].arg = entry; + boot_states[BS_PAYLOAD_BOOT].arg = payload; return BS_PAYLOAD_BOOT; } -static boot_state_t bs_payload_boot(void *entry) +static boot_state_t bs_payload_boot(void *arg) { - selfboot(entry); + struct payload *payload = arg; + + payload_run(payload); printk(BIOS_EMERG, "Boot failed"); /* Returning from this state will fail because the following signals diff --git a/src/lib/loaders/Makefile.inc b/src/lib/loaders/Makefile.inc index eceaa00..356e47e 100644 --- a/src/lib/loaders/Makefile.inc +++ b/src/lib/loaders/Makefile.inc @@ -19,3 +19,5 @@ romstage-y += cbfs_ramstage_loader.c romstage-y += load_and_run_ramstage.c +ramstage-y += cbfs_payload_loader.c +ramstage-y += load_and_run_payload.c diff --git a/src/lib/loaders/cbfs_payload_loader.c b/src/lib/loaders/cbfs_payload_loader.c new file mode 100644 index 0000000..2c1d179 --- /dev/null +++ b/src/lib/loaders/cbfs_payload_loader.c @@ -0,0 +1,44 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <cbfs.h> +#include <payload_loader.h> + +static int cbfs_locate_payload(struct payload *payload) +{ + void *buffer; + size_t size; + const int type = CBFS_TYPE_PAYLOAD; + + buffer = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, payload->name, + type, &size); + + if (buffer == NULL) + return -1; + + payload->backing_store.data = buffer; + payload->backing_store.size = size; + + return 0; +} + +const struct payload_loader_ops cbfs_payload_loader = { + .name = "CBFS", + .locate = cbfs_locate_payload, +}; diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c new file mode 100644 index 0000000..46db93c --- /dev/null +++ b/src/lib/loaders/load_and_run_payload.c @@ -0,0 +1,81 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <stdlib.h> +#include <console/console.h> +#include <boot/coreboot_tables.h> +#include <payload_loader.h> + +extern const struct payload_loader_ops vboot_payload_loader; +extern const struct payload_loader_ops cbfs_payload_loader; + +static const struct payload_loader_ops *payload_ops[] = { +#if CONFIG_VBOOT_VERIFY_FIRMWARE + &vboot_payload_loader, +#endif + &cbfs_payload_loader, +}; + +static struct payload global_payload = { + .name = CONFIG_CBFS_PREFIX "/payload", +}; + +struct payload *payload_load(void) +{ + int i; + void *entry; + struct lb_memory *mem; + const struct payload_loader_ops *ops; + struct payload *payload = &global_payload; + + for (i = 0; i < ARRAY_SIZE(payload_ops); i++) { + ops = payload_ops[i]; + if (ops->locate(payload) < 0) { + printk(BIOS_DEBUG, "%s: could not locate payload.\n", + ops->name); + continue; + } + printk(BIOS_DEBUG, "%s: located payload @ %p, %zu bytes.\n", + ops->name, payload->backing_store.data, + payload->backing_store.size); + break; + } + + if (i == ARRAY_SIZE(payload_ops)) + return NULL; + + mem = get_lb_mem(); + entry = selfload(mem, payload->backing_store.data); + + if (entry == NULL) + return NULL; + + payload->entry = entry; + + return payload; +} + +void payload_run(const struct payload *payload) +{ + if (payload == NULL) + return; + + selfboot(payload->entry); +} diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index 222eae2..c0986d1 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -32,6 +32,7 @@ #if CONFIG_COLLECT_TIMESTAMPS #include <timestamp.h> #endif +#include <payload_loader.h> /* Maximum physical address we can use for the coreboot bounce buffer. */ #ifndef MAX_ADDR diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c index 54fe8db..e917ba1 100644 --- a/src/vendorcode/google/chromeos/chromeos.c +++ b/src/vendorcode/google/chromeos/chromeos.c @@ -82,7 +82,9 @@ int recovery_mode_enabled(void) } #if CONFIG_VBOOT_VERIFY_FIRMWARE -void *vboot_get_payload(size_t *len) +#include <payload_loader.h> + +static void *vboot_get_payload(size_t *len) { struct vboot_handoff *vboot_handoff; struct firmware_component *fwc; @@ -109,6 +111,27 @@ void *vboot_get_payload(size_t *len) return (void *)fwc->address; } +static int vboot_locate_payload(struct payload *payload) +{ + void *buffer; + size_t size; + + buffer = vboot_get_payload(&size); + + if (buffer == NULL) + return -1; + + payload->backing_store.data = buffer; + payload->backing_store.size = size; + + return 0; +} + +const struct payload_loader_ops vboot_payload_loader = { + .name = "VBOOT", + .locate = vboot_locate_payload, +}; + int vboot_get_handoff_info(void **addr, uint32_t *size) { struct vboot_handoff *vboot_handoff; diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index 0359c91..7fe8f06 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -47,7 +47,6 @@ int recovery_mode_enabled(void); void init_chromeos(int bootmode); #if CONFIG_VBOOT_VERIFY_FIRMWARE -void *vboot_get_payload(size_t *len); /* Returns 0 on success < 0 on error. */ int vboot_get_handoff_info(void **addr, uint32_t *size); #endif

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Patch set updated for coreboot: 42ece05 coreboot: move common code to payload_run() from selfboot()
by Aaron Durbin 26 Feb '14

26 Feb '14

Aaron Durbin (adurbin(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5297 -gerrit commit 42ece05cc7936ce6fcd8858ef498b57cc917e602 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Mon Feb 24 21:24:28 2014 -0600 coreboot: move common code to payload_run() from selfboot() The selfboot() routine was perfoming most of the common teardown and stack checking infrastructure. Move that code into payload_run() to prepare removal of the selfboot() function. Change-Id: I29f2a5cfcc692f7a0fe2656cb1cda18158c49c6e Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/lib/loaders/load_and_run_payload.c | 16 ++++++++++++++++ src/lib/selfboot.c | 19 ------------------- 2 files changed, 16 insertions(+), 19 deletions(-) diff --git a/src/lib/loaders/load_and_run_payload.c b/src/lib/loaders/load_and_run_payload.c index 46db93c..96f5e27 100644 --- a/src/lib/loaders/load_and_run_payload.c +++ b/src/lib/loaders/load_and_run_payload.c @@ -21,7 +21,10 @@ #include <stdlib.h> #include <console/console.h> #include <boot/coreboot_tables.h> +#include <fallback.h> +#include <lib.h> #include <payload_loader.h> +#include <timestamp.h> extern const struct payload_loader_ops vboot_payload_loader; extern const struct payload_loader_ops cbfs_payload_loader; @@ -77,5 +80,18 @@ void payload_run(const struct payload *payload) if (payload == NULL) return; + /* Reset to booting from this image as late as possible */ + boot_successful(); + + printk(BIOS_DEBUG, "Jumping to boot code at %p\n", payload->entry); + post_code(POST_ENTER_ELF_BOOT); + + timestamp_add_now(TS_SELFBOOT_JUMP); + + /* Before we go off to run the payload, see if + * we stayed within our bounds. + */ + checkstack(_estack, 0); + selfboot(payload->entry); } diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index c0986d1..6f200fa 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -22,16 +22,12 @@ #include <arch/stages.h> #include <console/console.h> #include <cpu/cpu.h> -#include <fallback.h> #include <boot/coreboot_tables.h> #include <stdint.h> #include <stdlib.h> #include <string.h> #include <cbfs.h> #include <lib.h> -#if CONFIG_COLLECT_TIMESTAMPS -#include <timestamp.h> -#endif #include <payload_loader.h> /* Maximum physical address we can use for the coreboot bounce buffer. */ @@ -527,21 +523,6 @@ out: void selfboot(void *entry) { - /* Reset to booting from this image as late as possible */ - boot_successful(); - - printk(BIOS_DEBUG, "Jumping to boot code at %p\n", entry); - post_code(POST_ENTER_ELF_BOOT); - -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_add_now(TS_SELFBOOT_JUMP); -#endif - - /* Before we go off to run the payload, see if - * we stayed within our bounds. - */ - checkstack(_estack, 0); - /* Jump to kernel */ jmp_to_elf_entry(entry, bounce_buffer, bounce_size); }

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coreboot-gerrit February 2014