coreboot-gerrit February 2014

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Patch set updated for coreboot: 2d2fbe7 console uart: Fill coreboot table entries
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5310 -gerrit commit 2d2fbe7b9b54fc57fc19b1a125e959f3bb34cb87 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 18 11:54:57 2014 +0200 console uart: Fill coreboot table entries Also fixes the reported baudrate to take get_option() into account. Change-Id: Ieadad70b00df02a530b0ccb6fa4e1b51526089f3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/console.c | 1 + src/cpu/allwinner/a10/uart_console.c | 18 ++++++--- src/cpu/samsung/exynos5250/uart.c | 21 ++++++---- src/cpu/samsung/exynos5420/uart.c | 21 ++++++---- src/cpu/ti/am335x/uart.c | 21 ++++++---- src/drivers/oxford/oxpcie/oxpcie_early.c | 12 +++++- src/drivers/uart/pl011.c | 21 ++++++---- src/drivers/uart/uart8250io.c | 19 +++++++++ src/include/boot/coreboot_tables.h | 4 ++ src/include/console/uart.h | 1 - src/lib/coreboot_table.c | 66 +++++++++----------------------- 11 files changed, 120 insertions(+), 85 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index 9e9e4e2..6bdcb55 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <boot/coreboot_tables.h> #include <console/console.h> #include <console/cbmem_console.h> #include <console/uart.h> diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index 5cc1a66..0b80938 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -10,6 +10,7 @@ #include <types.h> #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <cpu/allwinner/a10/uart.h> @@ -70,14 +71,19 @@ void uart_tx_byte(unsigned char data) a10_uart_tx_blocking(uart_base, data); } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) +void uart_tx_flush(void) { - return uart_platform_base(0); } -#endif -void uart_tx_flush(void) +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) { -} + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 82e221d..5458e7b 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -19,6 +19,7 @@ #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include "uart.h" #include "clk.h" #include "cpu.h" @@ -159,13 +160,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return uart_platform_base(0); -} -#endif - void uart_init(void) { struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); @@ -189,3 +183,16 @@ void uart_tx_flush(void) struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); exynos5_uart_tx_flush(uart); } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index e3ae88d..0928111 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -19,6 +19,7 @@ #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include "uart.h" #include "clk.h" #include "cpu.h" @@ -151,13 +152,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return uart_platform_base(0); -} -#endif - void uart_init(void) { struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); @@ -180,3 +174,16 @@ void uart_tx_flush(void) { /* Exynos5250 implements this too. */ } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index faea640..be41653 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -20,6 +20,7 @@ #include <types.h> #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <cpu/ti/am335x/uart.h> #define EFR_ENHANCED_EN (1 << 4) @@ -156,13 +157,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return uart_platform_base(0); -} -#endif - void uart_init(void) { struct am335x_uart *uart = (struct am335x_uart *) uart_platform_base(0); @@ -186,3 +180,16 @@ void uart_tx_byte(unsigned char data) void uart_tx_flush(void) { } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index d7f473e..7de9da6 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -24,7 +24,9 @@ #include <arch/io.h> #include <arch/early_variables.h> #include <delay.h> +#include <boot/coreboot_tables.h> #include <console/uart.h> +#include <device/pci.h> #include <device/pci_def.h> static unsigned int oxpcie_present CAR_GLOBAL; @@ -139,9 +141,15 @@ void oxford_remap(u32 new_base) uart1_base = new_base + 0x2000; } -uint32_t uartmem_getbaseaddr(void) +void uart_fill_lb(void *data) { - return uart_platform_base(0); + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index c8b7415..e6c4eb4 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <boot/coreboot_tables.h> #include <console/uart.h> static void pl011_uart_tx_byte(unsigned int *uart_base, unsigned char data) @@ -25,13 +26,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; -} -#endif - void uart_init(void) { } @@ -45,3 +39,16 @@ void uart_tx_byte(unsigned char data) void uart_tx_flush(void) { } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index e4e8b6c..919f05e 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -19,6 +19,7 @@ */ #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <console/uart.h> #include <trace.h> #include "uart8250reg.h" @@ -102,6 +103,11 @@ static void uart8250_init(unsigned base_port, unsigned divisor) */ static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; +unsigned int uart_platform_base(int idx) +{ + return bases[idx]; +} + void uart_init(void) { unsigned int div; @@ -129,3 +135,16 @@ void uart_tx_flush(void) { uart8250_tx_flush(bases[0]); } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_IO_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data); +} +#endif diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 6243d45..8f429fd 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -348,4 +348,8 @@ struct lb_memory *get_lb_mem(void); void fill_lb_gpios(struct lb_gpios *gpios); +void uart_fill_lb(void *data); +void lb_add_serial(struct lb_serial *serial, void *data); +void lb_add_console(u16 consoletype, void *data); + #endif /* COREBOOT_TABLES_H */ diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 17811ca..a70c758 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -44,7 +44,6 @@ unsigned char uart_rx_byte(void); int uart_can_rx_byte(void); unsigned int uart_platform_base(int idx); -uint32_t uartmem_getbaseaddr(void); void oxford_init(void); void oxford_remap(unsigned int new_base); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 2d84579..b29d7d6 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -102,43 +102,22 @@ static struct lb_memory *lb_memory(struct lb_header *header) return mem; } -static struct lb_serial *lb_serial(struct lb_header *header) +void lb_add_serial(struct lb_serial *new_serial, void *data) { -#if CONFIG_CONSOLE_SERIAL8250 - struct lb_record *rec; + struct lb_header *header = (struct lb_header *)data; struct lb_serial *serial; - rec = lb_new_record(header); - serial = (struct lb_serial *)rec; + + serial = (struct lb_serial *)lb_new_record(header); serial->tag = LB_TAG_SERIAL; serial->size = sizeof(*serial); - serial->type = LB_SERIAL_TYPE_IO_MAPPED; - serial->baseaddr = CONFIG_TTYS0_BASE; - serial->baud = CONFIG_TTYS0_BAUD; - return serial; -#elif CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART - if (uartmem_getbaseaddr()) { - struct lb_record *rec; - struct lb_serial *serial; - rec = lb_new_record(header); - serial = (struct lb_serial *)rec; - serial->tag = LB_TAG_SERIAL; - serial->size = sizeof(*serial); - serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED; - serial->baseaddr = uartmem_getbaseaddr(); - serial->baud = CONFIG_TTYS0_BAUD; - return serial; - } else { - return NULL; - } -#else - return NULL; -#endif + serial->type = new_serial->type; + serial->baseaddr = new_serial->baseaddr; + serial->baud = new_serial->baud; } -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || \ - CONFIG_CONSOLE_SERIAL_UART || CONFIG_CONSOLE_USB -static void add_console(struct lb_header *header, u16 consoletype) +void lb_add_console(u16 consoletype, void *data) { + struct lb_header *header = (struct lb_header *)data; struct lb_console *console; console = (struct lb_console *)lb_new_record(header); @@ -146,20 +125,6 @@ static void add_console(struct lb_header *header, u16 consoletype) console->size = sizeof(*console); console->type = consoletype; } -#endif - -static void lb_console(struct lb_header *header) -{ -#if CONFIG_CONSOLE_SERIAL8250 - add_console(header, LB_TAG_CONSOLE_SERIAL8250); -#endif -#if CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART - add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM); -#endif -#if CONFIG_CONSOLE_USB - add_console(header, LB_TAG_CONSOLE_EHCI); -#endif -} static void lb_framebuffer(struct lb_header *header) { @@ -522,10 +487,15 @@ unsigned long write_coreboot_table( /* Record our motherboard */ lb_mainboard(head); - /* Record the serial port, if present */ - lb_serial(head); - /* Record our console setup */ - lb_console(head); + + /* Record the serial ports and consoles */ +#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART + uart_fill_lb(head); +#endif +#if CONFIG_CONSOLE_USB + lb_add_console(LB_TAG_CONSOLE_EHCI, head); +#endif + /* Record our various random string information */ lb_strings(head); /* Record our framebuffer */

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Patch set updated for coreboot: aad562b uart: Redefine Kconfig options
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5311 -gerrit commit aad562b947b63c04d2adb14d13601bfc9c87ac2d Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 13 17:16:22 2014 +0200 uart: Redefine Kconfig options Option DRIVERS_UART builds with support for UART hardware. Option CONSOLE_SERIAL enables the console output for UART. Those x86 boards that do not have serial port on SuperIO should select NO_UART_ON_SUPERIO to disable 8250 UART for the default configuration. Removes: CONSOLE_SERIAL_UART HAVE_UART_IO_MAPPED HAVE_UART_MEMORY_MAPPED Renames: CONSOLE_SERIAL8250 -> DRIVERS_UART_8250IO CONSOLE_SERIAL8250MEM -> DRIVERS_UART_8250MEM Change-Id: Id3afa05f85c0d6849746886db8b6c2ed6c846b61 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/armv7/early_console.c | 4 +-- src/arch/x86/lib/romcc_console.c | 6 ++--- src/arch/x86/lib/romstage_console.c | 10 ++----- src/console/Kconfig | 43 +++++++++++++----------------- src/console/uart_console.c | 2 +- src/cpu/allwinner/a10/Kconfig | 2 +- src/cpu/allwinner/a10/Makefile.inc | 12 ++++----- src/cpu/samsung/exynos5250/Kconfig | 4 +-- src/cpu/samsung/exynos5250/Makefile.inc | 6 ++--- src/cpu/samsung/exynos5420/Kconfig | 4 +-- src/cpu/samsung/exynos5420/Makefile.inc | 6 ++--- src/cpu/ti/am335x/Makefile.inc | 7 +++-- src/cpu/x86/smm/smiutil.c | 10 ++----- src/drivers/Makefile.inc | 2 +- src/drivers/oxford/oxpcie/Kconfig | 2 +- src/drivers/oxford/oxpcie/Makefile.inc | 2 +- src/drivers/uart/Kconfig | 15 ++++++++--- src/drivers/uart/Makefile.inc | 13 ++++----- src/lib/coreboot_table.c | 2 +- src/mainboard/emulation/qemu-armv7/Kconfig | 2 +- src/mainboard/samsung/lumpy/romstage.c | 4 +-- src/mainboard/samsung/stumpy/romstage.c | 4 +-- src/mainboard/ti/beaglebone/Kconfig | 4 +-- src/superio/via/vt1211/vt1211.c | 2 +- 24 files changed, 79 insertions(+), 89 deletions(-) diff --git a/src/arch/armv7/early_console.c b/src/arch/armv7/early_console.c index 93ea38d..7614531 100644 --- a/src/arch/armv7/early_console.c +++ b/src/arch/armv7/early_console.c @@ -28,7 +28,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_CONSOLE_SERIAL_UART +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_CBMEM && !defined(__BOOT_BLOCK__) @@ -38,7 +38,7 @@ void console_tx_byte(unsigned char byte) static void _console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL_UART +#if CONFIG_CONSOLE_SERIAL uart_tx_flush(); #endif } diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 66c81db..4bd3ad4 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -30,7 +30,7 @@ */ #define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO #include "drivers/uart/util.c" #include "drivers/uart/uart8250io.c" #endif @@ -40,7 +40,7 @@ static void __console_tx_byte(unsigned char byte) { -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K @@ -61,7 +61,7 @@ static void __console_tx_nibble(unsigned nibble) static void __console_tx_char(int loglevel, unsigned char byte) { if (console_loglevel >= loglevel) { -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 5e7923e..0337245 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -31,10 +31,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_CONSOLE_SERIAL8250MEM - uart_tx_byte(byte); -#endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) @@ -53,10 +50,7 @@ void console_tx_byte(unsigned char byte) void console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL8250MEM - uart_tx_flush(); -#endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_flush(); #endif #if CONFIG_CONSOLE_NE2K diff --git a/src/console/Kconfig b/src/console/Kconfig index bb64f29..9377a78 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -29,37 +29,29 @@ config SQUELCH_EARLY_SMP config CONSOLE_SERIAL bool "Serial port console output" default y + depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL help - Send coreboot debug output to a serial port (should be one or more of - CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART) + Send coreboot debug output to a serial port. -config CONSOLE_SERIAL8250 - bool "Serial port console output (I/O mapped, 8250-compatible)" - depends on CONSOLE_SERIAL - depends on HAVE_UART_IO_MAPPED - default y - help - Send coreboot debug output to an I/O mapped serial port console. + The type of serial port driver selected based on your configuration is + shown on the following menu line. Supporting multiple different types + of UARTs in one build is not supported. -config CONSOLE_SERIAL8250MEM - bool "Serial port console output (memory mapped, 8250-compatible)" - depends on CONSOLE_SERIAL - depends on HAVE_UART_MEMORY_MAPPED - help - Send coreboot debug output to a memory mapped serial port console. +if CONSOLE_SERIAL + + comment "I/O mapped, 8250-compatible" + depends on DRIVERS_UART_8250IO -config CONSOLE_SERIAL_UART - bool "Serial port console output (device-specific UART)" - depends on CONSOLE_SERIAL + comment "memory mapped, 8250-compatible" + depends on DRIVERS_UART_8250MEM + + comment "device-specific UART" depends on HAVE_UART_SPECIAL - default y - help - Send coreboot debug output to a device-specific serial port console. choice prompt "Serial port for 8250" default CONSOLE_SERIAL_COM1 - depends on CONSOLE_SERIAL8250 + depends on DRIVERS_UART_8250IO config CONSOLE_SERIAL_COM1 bool "COM1/ttyS0, I/O port 0x3f8" @@ -82,7 +74,7 @@ endchoice config TTYS0_BASE hex - depends on CONSOLE_SERIAL8250 + depends on DRIVERS_UART_8250IO default 0x3f8 if CONSOLE_SERIAL_COM1 default 0x2f8 if CONSOLE_SERIAL_COM2 default 0x3e8 if CONSOLE_SERIAL_COM3 @@ -93,7 +85,6 @@ config TTYS0_BASE choice prompt "Baud rate" default CONSOLE_SERIAL_115200 - depends on CONSOLE_SERIAL config CONSOLE_SERIAL_115200 bool "115200" @@ -133,7 +124,9 @@ config TTYS0_BAUD config TTYS0_LCS int default 3 - depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM + depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM + +endif # CONSOLE_SERIAL config SPKMODEM bool "spkmodem (console on speaker) console output" diff --git a/src/console/uart_console.c b/src/console/uart_console.c index e2cd6a8..f5535d7 100644 --- a/src/console/uart_console.c +++ b/src/console/uart_console.c @@ -43,7 +43,7 @@ static unsigned char uartmem_rx_byte(void) /* This only relevant with x86 with GDB_STUB enabled.*/ static int uartmem_tst_byte(void) { -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_DRIVERS_UART_8250IO || CONFIG_DRIVERS_UART_8250MEM return uart_can_rx_byte(); #else return 0; diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index 72e3630..8512c38 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -76,7 +76,7 @@ config SYS_SDRAM_BASE choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART0 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" diff --git a/src/cpu/allwinner/a10/Makefile.inc b/src/cpu/allwinner/a10/Makefile.inc index a86d719..716e463 100644 --- a/src/cpu/allwinner/a10/Makefile.inc +++ b/src/cpu/allwinner/a10/Makefile.inc @@ -4,8 +4,6 @@ bootblock-y += gpio.c bootblock-y += pinmux.c bootblock-y += raminit.c bootblock-y += timer.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart_console.c romstage-y += bootblock_media.c romstage-y += cbmem.c @@ -13,8 +11,6 @@ romstage-y += clock.c romstage-y += pinmux.c romstage-y += timer.c romstage-y += twi.c -romstage-y += uart.c -romstage-y += uart_console.c ramstage-y += bootblock_media.c ramstage-y += cbmem.c @@ -23,8 +19,12 @@ ramstage-y += cpu.c ramstage-y += monotonic_timer.c ramstage-y += timer.c ramstage-y += twi.c -ramstage-y += uart.c -ramstage-y += uart_console.c + +ifeq ($(CONFIG_DRIVERS_UART),y) +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c uart_console.c +romstage-y += uart.c uart_console.c +ramstage-y += uart.c uart_console.c +endif real-target: $(obj)/BOOT0 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 63038c3..9320184 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -91,7 +91,7 @@ config SYS_SDRAM_BASE choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART3 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" @@ -117,7 +117,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x12c00000 if CONSOLE_SERIAL_UART0 default 0x12c10000 if CONSOLE_SERIAL_UART1 default 0x12c20000 if CONSOLE_SERIAL_UART2 diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 6d7ae16..3d5b5b4 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,7 +9,7 @@ bootblock-y += pinmux.c mct.c power.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif bootblock-y += wakeup.c @@ -25,7 +25,7 @@ romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) romstage-$(CONFIG_EARLY_CONSOLE) += uart.c endif romstage-y += wakeup.c @@ -40,7 +40,7 @@ ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += pinmux.c ramstage-y += power.c -ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c +ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += cpu.c ramstage-y += tmu.c ramstage-y += mct.c diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index dd35c35..5f78cc5 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -93,7 +93,7 @@ config SYS_SDRAM_BASE choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART3 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" @@ -119,7 +119,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x12c00000 if CONSOLE_SERIAL_UART0 default 0x12c10000 if CONSOLE_SERIAL_UART1 default 0x12c20000 if CONSOLE_SERIAL_UART2 diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc index 4169a2e..844b835 100644 --- a/src/cpu/samsung/exynos5420/Makefile.inc +++ b/src/cpu/samsung/exynos5420/Makefile.inc @@ -9,7 +9,7 @@ bootblock-y += pinmux.c mct.c power.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif bootblock-y += wakeup.c @@ -25,7 +25,7 @@ romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) romstage-$(CONFIG_EARLY_CONSOLE) += uart.c endif romstage-y += wakeup.c @@ -40,7 +40,7 @@ ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += pinmux.c ramstage-y += power.c -ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c +ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += cpu.c ramstage-y += tmu.c ramstage-y += mct.c diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index ff00733..5b10bd8 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -1,16 +1,19 @@ bootblock-y += dmtimer.c bootblock-y += bootblock_media.c bootblock-y += pinmux.c -bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c romstage-y += nand.c -romstage-y += uart.c ramstage-y += dmtimer.c ramstage-y += monotonic_timer.c ramstage-y += nand.c ramstage-y += timer.c + +ifeq ($(CONFIG_DRIVERS_UART),y) +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c +romstage-y += uart.c ramstage-y += uart.c +endif $(call add-class,omap-header) diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 3325c32..6e9822e 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -32,10 +32,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_CONSOLE_SERIAL8250MEM - uart_tx_byte(byte); -#endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif } @@ -45,10 +42,7 @@ void console_init(void) { #if CONFIG_DEBUG_SMI console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL; -#if CONFIG_CONSOLE_SERIAL8250 - uart_init(); -#endif -#if CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL uart_init(); #endif #endif diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index 197a900..148e257 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -30,7 +30,7 @@ subdirs-y += parade subdirs-y += realtek subdirs-y += sil subdirs-y += trident -subdirs-y += uart +subdirs-$(CONFIG_DRIVERS_UART) += uart subdirs-y += usb subdirs-y += ics subdirs-y += spi diff --git a/src/drivers/oxford/oxpcie/Kconfig b/src/drivers/oxford/oxpcie/Kconfig index 899a153..5ad42aa 100644 --- a/src/drivers/oxford/oxpcie/Kconfig +++ b/src/drivers/oxford/oxpcie/Kconfig @@ -1,7 +1,7 @@ config DRIVERS_OXFORD_OXPCIE bool "Oxford OXPCIe952" default n - select HAVE_UART_MEMORY_MAPPED + select DRIVERS_UART_8250MEM help Support for Oxford OXPCIe952 serial port PCIe cards. Currently only devices with the vendor ID 0x1415 and device ID diff --git a/src/drivers/oxford/oxpcie/Makefile.inc b/src/drivers/oxford/oxpcie/Makefile.inc index 1922425..5e3e6e5 100644 --- a/src/drivers/oxford/oxpcie/Makefile.inc +++ b/src/drivers/oxford/oxpcie/Makefile.inc @@ -1,4 +1,4 @@ -ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) +ifeq ($(CONFIG_CONSOLE_SERIAL),y) ramstage-y += oxpcie_early.c oxpcie.c romstage-y += oxpcie_early.c endif diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index 5c9a9d1..889c69a 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -1,10 +1,19 @@ -# This should default to N and be set by SuperI/O drivers that have an UART -config HAVE_UART_IO_MAPPED +config DRIVERS_UART bool + default y if CONSOLE_SERIAL + default n + +config DRIVERS_UART_8250IO + bool "Serial port on SuperIO" depends on !ARCH_ARMV7 + default n if NO_UART_ON_SUPERIO default y if ARCH_X86 -config HAVE_UART_MEMORY_MAPPED +# Select this for mainboard without SuperIO serial port. +config NO_UART_ON_SUPERIO + def_bool n + +config DRIVERS_UART_8250MEM bool default n diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc index 415c5bb..286bff2 100644 --- a/src/drivers/uart/Makefile.inc +++ b/src/drivers/uart/Makefile.inc @@ -1,28 +1,25 @@ -ifeq ($(CONFIG_CONSOLE_SERIAL),y) romstage-y += util.c ramstage-y += util.c bootblock-y += util.c smm-$(CONFIG_DEBUG_SMI) += util.c -endif -ifeq ($(CONFIG_CONSOLE_SERIAL8250),y) +# Add the driver, only one can be enabled. The driver files may +# be located in the soc/ or cpu/ directories instead of here. + +ifeq ($(CONFIG_DRIVERS_UART_8250IO),y) romstage-y += uart8250io.c ramstage-y += uart8250io.c smm-$(CONFIG_DEBUG_SMI) += uart8250io.c endif -ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) +ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y) romstage-y += uart8250mem.c ramstage-y += uart8250mem.c smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c endif -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) - ifeq ($(CONFIG_DRIVERS_UART_PL011),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c romstage-$(CONFIG_EARLY_CONSOLE) += pl011.c ramstage-y += pl011.c endif - -endif diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index b29d7d6..406b2d9 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -489,7 +489,7 @@ unsigned long write_coreboot_table( lb_mainboard(head); /* Record the serial ports and consoles */ -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART +#if CONFIG_CONSOLE_SERIAL uart_fill_lb(head); #endif #if CONFIG_CONSOLE_USB diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index edba627..040ed9c 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -50,7 +50,7 @@ config DRAM_SIZE_MB config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x10009000 # Memory map for qemu vexpress-a9: diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 9933459..55c1f0a 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -40,7 +40,7 @@ #include <cpu/x86/msr.h> #include "option_table.h" #include "gpio.h" -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif @@ -53,7 +53,7 @@ static void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO /* Enable SuperIO + EC + KBC + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index e5b55b5..3e27a6a 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -40,7 +40,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif @@ -62,7 +62,7 @@ static void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO /* Enable SuperIO + PS/2 Keyboard/Mouse + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN |\ CNF2_LPC_EN | COMA_LPC_EN); diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig index df7ebeb..c842a5d 100644 --- a/src/mainboard/ti/beaglebone/Kconfig +++ b/src/mainboard/ti/beaglebone/Kconfig @@ -64,7 +64,7 @@ config CBFS_HEADER_ROM_OFFSET choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART0 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" @@ -100,7 +100,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x44e09000 if CONSOLE_SERIAL_UART0 default 0x48022000 if CONSOLE_SERIAL_UART1 default 0x48024000 if CONSOLE_SERIAL_UART2 diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c index 551f6f0..f7a5cd9 100644 --- a/src/superio/via/vt1211/vt1211.c +++ b/src/superio/via/vt1211/vt1211.c @@ -117,7 +117,7 @@ static void vt1211_pnp_set_resources(struct device *dev) { struct resource *res; -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO /* TODO: Do the same for SP2? */ if (dev->path.pnp.device == VT1211_SP1) { for (res = dev->resource_list; res; res = res->next) {

1 0

New patch to review for coreboot: c96058e uart: Redefine Kconfig options
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5311 -gerrit commit c96058eb7674cc20f97d06012d37e0bfa4747ec7 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Feb 13 17:16:22 2014 +0200 uart: Redefine Kconfig options Option DRIVERS_UART builds with support for UART hardware. Option CONSOLE_SERIAL enables the console output for UART. Those x86 boards that do not have serial port on SuperIO should select NO_UART_ON_SUPERIO to disable 8250 UART for the default configuration. Removes: CONSOLE_SERIAL_UART HAVE_UART_IO_MAPPED HAVE_UART_MEMORY_MAPPED Renames: CONSOLE_SERIAL8250 -> DRIVERS_UART_8250IO CONSOLE_SERIAL8250MEM -> DRIVERS_UART_8250MEM Change-Id: Id3afa05f85c0d6849746886db8b6c2ed6c846b61 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/armv7/early_console.c | 4 +-- src/arch/x86/lib/romcc_console.c | 6 ++--- src/arch/x86/lib/romstage_console.c | 10 ++----- src/console/Kconfig | 43 +++++++++++++----------------- src/cpu/allwinner/a10/Kconfig | 2 +- src/cpu/allwinner/a10/Makefile.inc | 12 ++++----- src/cpu/samsung/exynos5250/Kconfig | 4 +-- src/cpu/samsung/exynos5250/Makefile.inc | 6 ++--- src/cpu/samsung/exynos5420/Kconfig | 4 +-- src/cpu/samsung/exynos5420/Makefile.inc | 6 ++--- src/cpu/ti/am335x/Makefile.inc | 7 +++-- src/cpu/x86/smm/smiutil.c | 10 ++----- src/drivers/Makefile.inc | 2 +- src/drivers/oxford/oxpcie/Kconfig | 2 +- src/drivers/oxford/oxpcie/Makefile.inc | 2 +- src/drivers/uart/Kconfig | 15 ++++++++--- src/drivers/uart/Makefile.inc | 13 ++++----- src/lib/coreboot_table.c | 2 +- src/mainboard/emulation/qemu-armv7/Kconfig | 2 +- src/mainboard/samsung/lumpy/romstage.c | 4 +-- src/mainboard/samsung/stumpy/romstage.c | 4 +-- src/mainboard/ti/beaglebone/Kconfig | 4 +-- src/superio/via/vt1211/vt1211.c | 2 +- 23 files changed, 78 insertions(+), 88 deletions(-) diff --git a/src/arch/armv7/early_console.c b/src/arch/armv7/early_console.c index 93ea38d..7614531 100644 --- a/src/arch/armv7/early_console.c +++ b/src/arch/armv7/early_console.c @@ -28,7 +28,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_CONSOLE_SERIAL_UART +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_CBMEM && !defined(__BOOT_BLOCK__) @@ -38,7 +38,7 @@ void console_tx_byte(unsigned char byte) static void _console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL_UART +#if CONFIG_CONSOLE_SERIAL uart_tx_flush(); #endif } diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 66c81db..4bd3ad4 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -30,7 +30,7 @@ */ #define console_loglevel CONFIG_DEFAULT_CONSOLE_LOGLEVEL -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO #include "drivers/uart/util.c" #include "drivers/uart/uart8250io.c" #endif @@ -40,7 +40,7 @@ static void __console_tx_byte(unsigned char byte) { -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K @@ -61,7 +61,7 @@ static void __console_tx_nibble(unsigned nibble) static void __console_tx_char(int loglevel, unsigned char byte) { if (console_loglevel >= loglevel) { -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_NE2K diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 5e7923e..0337245 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -31,10 +31,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_CONSOLE_SERIAL8250MEM - uart_tx_byte(byte); -#endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) @@ -53,10 +50,7 @@ void console_tx_byte(unsigned char byte) void console_tx_flush(void) { -#if CONFIG_CONSOLE_SERIAL8250MEM - uart_tx_flush(); -#endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_flush(); #endif #if CONFIG_CONSOLE_NE2K diff --git a/src/console/Kconfig b/src/console/Kconfig index bb64f29..9377a78 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -29,37 +29,29 @@ config SQUELCH_EARLY_SMP config CONSOLE_SERIAL bool "Serial port console output" default y + depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM || HAVE_UART_SPECIAL help - Send coreboot debug output to a serial port (should be one or more of - CONSOLE_SERIAL8250, CONSOLE_SERIAL8250MEM, CONSOLE_SERIAL_UART) + Send coreboot debug output to a serial port. -config CONSOLE_SERIAL8250 - bool "Serial port console output (I/O mapped, 8250-compatible)" - depends on CONSOLE_SERIAL - depends on HAVE_UART_IO_MAPPED - default y - help - Send coreboot debug output to an I/O mapped serial port console. + The type of serial port driver selected based on your configuration is + shown on the following menu line. Supporting multiple different types + of UARTs in one build is not supported. -config CONSOLE_SERIAL8250MEM - bool "Serial port console output (memory mapped, 8250-compatible)" - depends on CONSOLE_SERIAL - depends on HAVE_UART_MEMORY_MAPPED - help - Send coreboot debug output to a memory mapped serial port console. +if CONSOLE_SERIAL + + comment "I/O mapped, 8250-compatible" + depends on DRIVERS_UART_8250IO -config CONSOLE_SERIAL_UART - bool "Serial port console output (device-specific UART)" - depends on CONSOLE_SERIAL + comment "memory mapped, 8250-compatible" + depends on DRIVERS_UART_8250MEM + + comment "device-specific UART" depends on HAVE_UART_SPECIAL - default y - help - Send coreboot debug output to a device-specific serial port console. choice prompt "Serial port for 8250" default CONSOLE_SERIAL_COM1 - depends on CONSOLE_SERIAL8250 + depends on DRIVERS_UART_8250IO config CONSOLE_SERIAL_COM1 bool "COM1/ttyS0, I/O port 0x3f8" @@ -82,7 +74,7 @@ endchoice config TTYS0_BASE hex - depends on CONSOLE_SERIAL8250 + depends on DRIVERS_UART_8250IO default 0x3f8 if CONSOLE_SERIAL_COM1 default 0x2f8 if CONSOLE_SERIAL_COM2 default 0x3e8 if CONSOLE_SERIAL_COM3 @@ -93,7 +85,6 @@ config TTYS0_BASE choice prompt "Baud rate" default CONSOLE_SERIAL_115200 - depends on CONSOLE_SERIAL config CONSOLE_SERIAL_115200 bool "115200" @@ -133,7 +124,9 @@ config TTYS0_BAUD config TTYS0_LCS int default 3 - depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM + depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM + +endif # CONSOLE_SERIAL config SPKMODEM bool "spkmodem (console on speaker) console output" diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig index 72e3630..8512c38 100644 --- a/src/cpu/allwinner/a10/Kconfig +++ b/src/cpu/allwinner/a10/Kconfig @@ -76,7 +76,7 @@ config SYS_SDRAM_BASE choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART0 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" diff --git a/src/cpu/allwinner/a10/Makefile.inc b/src/cpu/allwinner/a10/Makefile.inc index a86d719..716e463 100644 --- a/src/cpu/allwinner/a10/Makefile.inc +++ b/src/cpu/allwinner/a10/Makefile.inc @@ -4,8 +4,6 @@ bootblock-y += gpio.c bootblock-y += pinmux.c bootblock-y += raminit.c bootblock-y += timer.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c -bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart_console.c romstage-y += bootblock_media.c romstage-y += cbmem.c @@ -13,8 +11,6 @@ romstage-y += clock.c romstage-y += pinmux.c romstage-y += timer.c romstage-y += twi.c -romstage-y += uart.c -romstage-y += uart_console.c ramstage-y += bootblock_media.c ramstage-y += cbmem.c @@ -23,8 +19,12 @@ ramstage-y += cpu.c ramstage-y += monotonic_timer.c ramstage-y += timer.c ramstage-y += twi.c -ramstage-y += uart.c -ramstage-y += uart_console.c + +ifeq ($(CONFIG_DRIVERS_UART),y) +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c uart_console.c +romstage-y += uart.c uart_console.c +ramstage-y += uart.c uart_console.c +endif real-target: $(obj)/BOOT0 diff --git a/src/cpu/samsung/exynos5250/Kconfig b/src/cpu/samsung/exynos5250/Kconfig index 63038c3..9320184 100644 --- a/src/cpu/samsung/exynos5250/Kconfig +++ b/src/cpu/samsung/exynos5250/Kconfig @@ -91,7 +91,7 @@ config SYS_SDRAM_BASE choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART3 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" @@ -117,7 +117,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x12c00000 if CONSOLE_SERIAL_UART0 default 0x12c10000 if CONSOLE_SERIAL_UART1 default 0x12c20000 if CONSOLE_SERIAL_UART2 diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 6d7ae16..3d5b5b4 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -9,7 +9,7 @@ bootblock-y += pinmux.c mct.c power.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif bootblock-y += wakeup.c @@ -25,7 +25,7 @@ romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) romstage-$(CONFIG_EARLY_CONSOLE) += uart.c endif romstage-y += wakeup.c @@ -40,7 +40,7 @@ ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += pinmux.c ramstage-y += power.c -ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c +ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += cpu.c ramstage-y += tmu.c ramstage-y += mct.c diff --git a/src/cpu/samsung/exynos5420/Kconfig b/src/cpu/samsung/exynos5420/Kconfig index dd35c35..5f78cc5 100644 --- a/src/cpu/samsung/exynos5420/Kconfig +++ b/src/cpu/samsung/exynos5420/Kconfig @@ -93,7 +93,7 @@ config SYS_SDRAM_BASE choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART3 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" @@ -119,7 +119,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x12c00000 if CONSOLE_SERIAL_UART0 default 0x12c10000 if CONSOLE_SERIAL_UART1 default 0x12c20000 if CONSOLE_SERIAL_UART2 diff --git a/src/cpu/samsung/exynos5420/Makefile.inc b/src/cpu/samsung/exynos5420/Makefile.inc index 4169a2e..844b835 100644 --- a/src/cpu/samsung/exynos5420/Makefile.inc +++ b/src/cpu/samsung/exynos5420/Makefile.inc @@ -9,7 +9,7 @@ bootblock-y += pinmux.c mct.c power.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c endif bootblock-y += wakeup.c @@ -25,7 +25,7 @@ romstage-y += dmc_init_ddr3.c romstage-y += power.c romstage-y += mct.c romstage-y += monotonic_timer.c -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) +ifeq ($(CONFIG_DRIVERS_UART),y) romstage-$(CONFIG_EARLY_CONSOLE) += uart.c endif romstage-y += wakeup.c @@ -40,7 +40,7 @@ ramstage-y += clock.c ramstage-y += clock_init.c ramstage-y += pinmux.c ramstage-y += power.c -ramstage-$(CONFIG_CONSOLE_SERIAL_UART) += uart.c +ramstage-$(CONFIG_DRIVERS_UART) += uart.c ramstage-y += cpu.c ramstage-y += tmu.c ramstage-y += mct.c diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc index ff00733..5b10bd8 100644 --- a/src/cpu/ti/am335x/Makefile.inc +++ b/src/cpu/ti/am335x/Makefile.inc @@ -1,16 +1,19 @@ bootblock-y += dmtimer.c bootblock-y += bootblock_media.c bootblock-y += pinmux.c -bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c romstage-y += nand.c -romstage-y += uart.c ramstage-y += dmtimer.c ramstage-y += monotonic_timer.c ramstage-y += nand.c ramstage-y += timer.c + +ifeq ($(CONFIG_DRIVERS_UART),y) +bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c +romstage-y += uart.c ramstage-y += uart.c +endif $(call add-class,omap-header) diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 3325c32..6e9822e 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -32,10 +32,7 @@ void console_tx_byte(unsigned char byte) if (byte == '\n') console_tx_byte('\r'); -#if CONFIG_CONSOLE_SERIAL8250MEM - uart_tx_byte(byte); -#endif -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL uart_tx_byte(byte); #endif } @@ -45,10 +42,7 @@ void console_init(void) { #if CONFIG_DEBUG_SMI console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL; -#if CONFIG_CONSOLE_SERIAL8250 - uart_init(); -#endif -#if CONFIG_CONSOLE_SERIAL8250MEM +#if CONFIG_CONSOLE_SERIAL uart_init(); #endif #endif diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index 197a900..148e257 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -30,7 +30,7 @@ subdirs-y += parade subdirs-y += realtek subdirs-y += sil subdirs-y += trident -subdirs-y += uart +subdirs-$(CONFIG_DRIVERS_UART) += uart subdirs-y += usb subdirs-y += ics subdirs-y += spi diff --git a/src/drivers/oxford/oxpcie/Kconfig b/src/drivers/oxford/oxpcie/Kconfig index 899a153..5ad42aa 100644 --- a/src/drivers/oxford/oxpcie/Kconfig +++ b/src/drivers/oxford/oxpcie/Kconfig @@ -1,7 +1,7 @@ config DRIVERS_OXFORD_OXPCIE bool "Oxford OXPCIe952" default n - select HAVE_UART_MEMORY_MAPPED + select DRIVERS_UART_8250MEM help Support for Oxford OXPCIe952 serial port PCIe cards. Currently only devices with the vendor ID 0x1415 and device ID diff --git a/src/drivers/oxford/oxpcie/Makefile.inc b/src/drivers/oxford/oxpcie/Makefile.inc index 1922425..5e3e6e5 100644 --- a/src/drivers/oxford/oxpcie/Makefile.inc +++ b/src/drivers/oxford/oxpcie/Makefile.inc @@ -1,4 +1,4 @@ -ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) +ifeq ($(CONFIG_CONSOLE_SERIAL),y) ramstage-y += oxpcie_early.c oxpcie.c romstage-y += oxpcie_early.c endif diff --git a/src/drivers/uart/Kconfig b/src/drivers/uart/Kconfig index 5c9a9d1..889c69a 100644 --- a/src/drivers/uart/Kconfig +++ b/src/drivers/uart/Kconfig @@ -1,10 +1,19 @@ -# This should default to N and be set by SuperI/O drivers that have an UART -config HAVE_UART_IO_MAPPED +config DRIVERS_UART bool + default y if CONSOLE_SERIAL + default n + +config DRIVERS_UART_8250IO + bool "Serial port on SuperIO" depends on !ARCH_ARMV7 + default n if NO_UART_ON_SUPERIO default y if ARCH_X86 -config HAVE_UART_MEMORY_MAPPED +# Select this for mainboard without SuperIO serial port. +config NO_UART_ON_SUPERIO + def_bool n + +config DRIVERS_UART_8250MEM bool default n diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc index 415c5bb..286bff2 100644 --- a/src/drivers/uart/Makefile.inc +++ b/src/drivers/uart/Makefile.inc @@ -1,28 +1,25 @@ -ifeq ($(CONFIG_CONSOLE_SERIAL),y) romstage-y += util.c ramstage-y += util.c bootblock-y += util.c smm-$(CONFIG_DEBUG_SMI) += util.c -endif -ifeq ($(CONFIG_CONSOLE_SERIAL8250),y) +# Add the driver, only one can be enabled. The driver files may +# be located in the soc/ or cpu/ directories instead of here. + +ifeq ($(CONFIG_DRIVERS_UART_8250IO),y) romstage-y += uart8250io.c ramstage-y += uart8250io.c smm-$(CONFIG_DEBUG_SMI) += uart8250io.c endif -ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) +ifeq ($(CONFIG_DRIVERS_UART_8250MEM),y) romstage-y += uart8250mem.c ramstage-y += uart8250mem.c smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c endif -ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) - ifeq ($(CONFIG_DRIVERS_UART_PL011),y) bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += pl011.c romstage-$(CONFIG_EARLY_CONSOLE) += pl011.c ramstage-y += pl011.c endif - -endif diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index b29d7d6..406b2d9 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -489,7 +489,7 @@ unsigned long write_coreboot_table( lb_mainboard(head); /* Record the serial ports and consoles */ -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART +#if CONFIG_CONSOLE_SERIAL uart_fill_lb(head); #endif #if CONFIG_CONSOLE_USB diff --git a/src/mainboard/emulation/qemu-armv7/Kconfig b/src/mainboard/emulation/qemu-armv7/Kconfig index edba627..040ed9c 100644 --- a/src/mainboard/emulation/qemu-armv7/Kconfig +++ b/src/mainboard/emulation/qemu-armv7/Kconfig @@ -50,7 +50,7 @@ config DRAM_SIZE_MB config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x10009000 # Memory map for qemu vexpress-a9: diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 9933459..55c1f0a 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -40,7 +40,7 @@ #include <cpu/x86/msr.h> #include "option_table.h" #include "gpio.h" -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif @@ -53,7 +53,7 @@ static void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO /* Enable SuperIO + EC + KBC + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN | CNF2_LPC_EN | COMA_LPC_EN); diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index e5b55b5..3e27a6a 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -40,7 +40,7 @@ #include <cpu/x86/bist.h> #include <cpu/x86/msr.h> #include "gpio.h" -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO #include "superio/smsc/lpc47n207/lpc47n207.h" #include "superio/smsc/lpc47n207/early_serial.c" #endif @@ -62,7 +62,7 @@ static void pch_enable_lpc(void) /* Set COM1/COM2 decode range */ pci_write_config16(PCH_LPC_DEV, LPC_IO_DEC, 0x0010); -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_DRIVERS_UART_8250IO /* Enable SuperIO + PS/2 Keyboard/Mouse + COM1 + lpc47n207 config*/ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | KBC_LPC_EN |\ CNF2_LPC_EN | COMA_LPC_EN); diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig index df7ebeb..c842a5d 100644 --- a/src/mainboard/ti/beaglebone/Kconfig +++ b/src/mainboard/ti/beaglebone/Kconfig @@ -64,7 +64,7 @@ config CBFS_HEADER_ROM_OFFSET choice CONSOLE_SERIAL_UART_CHOICES prompt "Serial Console UART" default CONSOLE_SERIAL_UART0 - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL config CONSOLE_SERIAL_UART0 bool "UART0" @@ -100,7 +100,7 @@ endchoice config CONSOLE_SERIAL_UART_ADDRESS hex - depends on CONSOLE_SERIAL_UART + depends on CONSOLE_SERIAL default 0x44e09000 if CONSOLE_SERIAL_UART0 default 0x48022000 if CONSOLE_SERIAL_UART1 default 0x48024000 if CONSOLE_SERIAL_UART2 diff --git a/src/superio/via/vt1211/vt1211.c b/src/superio/via/vt1211/vt1211.c index 551f6f0..f7a5cd9 100644 --- a/src/superio/via/vt1211/vt1211.c +++ b/src/superio/via/vt1211/vt1211.c @@ -117,7 +117,7 @@ static void vt1211_pnp_set_resources(struct device *dev) { struct resource *res; -#if CONFIG_CONSOLE_SERIAL8250 +#if CONFIG_CONSOLE_SERIAL && CONFIG_DRIVERS_UART_8250IO /* TODO: Do the same for SP2? */ if (dev->path.pnp.device == VT1211_SP1) { for (res = dev->resource_list; res; res = res->next) {

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New patch to review for coreboot: cdccfba console uart: Fill coreboot table entries
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5310 -gerrit commit cdccfba4ad43a50234116dbe56e56d1ec1e478c3 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 18 11:54:57 2014 +0200 console uart: Fill coreboot table entries Also fixes the reported baudrate to take get_option() into account. Change-Id: Ieadad70b00df02a530b0ccb6fa4e1b51526089f3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/console.c | 1 + src/cpu/allwinner/a10/uart_console.c | 18 ++++++--- src/cpu/samsung/exynos5250/uart.c | 21 ++++++---- src/cpu/samsung/exynos5420/uart.c | 21 ++++++---- src/cpu/ti/am335x/uart.c | 21 ++++++---- src/drivers/oxford/oxpcie/oxpcie_early.c | 12 +++++- src/drivers/uart/pl011.c | 21 ++++++---- src/drivers/uart/uart8250io.c | 19 +++++++++ src/include/boot/coreboot_tables.h | 4 ++ src/include/console/uart.h | 1 - src/lib/coreboot_table.c | 66 +++++++++----------------------- 11 files changed, 120 insertions(+), 85 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index 9e9e4e2..6bdcb55 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -17,6 +17,7 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <boot/coreboot_tables.h> #include <console/console.h> #include <console/cbmem_console.h> #include <console/uart.h> diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index 5cc1a66..0b80938 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -10,6 +10,7 @@ #include <types.h> #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <cpu/allwinner/a10/uart.h> @@ -70,14 +71,19 @@ void uart_tx_byte(unsigned char data) a10_uart_tx_blocking(uart_base, data); } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) +void uart_tx_flush(void) { - return uart_platform_base(0); } -#endif -void uart_tx_flush(void) +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) { -} + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 82e221d..5458e7b 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -19,6 +19,7 @@ #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include "uart.h" #include "clk.h" #include "cpu.h" @@ -159,13 +160,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return uart_platform_base(0); -} -#endif - void uart_init(void) { struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); @@ -189,3 +183,16 @@ void uart_tx_flush(void) struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); exynos5_uart_tx_flush(uart); } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index e3ae88d..0928111 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -19,6 +19,7 @@ #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include "uart.h" #include "clk.h" #include "cpu.h" @@ -151,13 +152,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return uart_platform_base(0); -} -#endif - void uart_init(void) { struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); @@ -180,3 +174,16 @@ void uart_tx_flush(void) { /* Exynos5250 implements this too. */ } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index faea640..be41653 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -20,6 +20,7 @@ #include <types.h> #include <console/uart.h> #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <cpu/ti/am335x/uart.h> #define EFR_ENHANCED_EN (1 << 4) @@ -156,13 +157,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return uart_platform_base(0); -} -#endif - void uart_init(void) { struct am335x_uart *uart = (struct am335x_uart *) uart_platform_base(0); @@ -186,3 +180,16 @@ void uart_tx_byte(unsigned char data) void uart_tx_flush(void) { } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index d7f473e..7de9da6 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -24,7 +24,9 @@ #include <arch/io.h> #include <arch/early_variables.h> #include <delay.h> +#include <boot/coreboot_tables.h> #include <console/uart.h> +#include <device/pci.h> #include <device/pci_def.h> static unsigned int oxpcie_present CAR_GLOBAL; @@ -139,9 +141,15 @@ void oxford_remap(u32 new_base) uart1_base = new_base + 0x2000; } -uint32_t uartmem_getbaseaddr(void) +void uart_fill_lb(void *data) { - return uart_platform_base(0); + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index c8b7415..e6c4eb4 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <boot/coreboot_tables.h> #include <console/uart.h> static void pl011_uart_tx_byte(unsigned int *uart_base, unsigned char data) @@ -25,13 +26,6 @@ unsigned int uart_platform_base(int idx) return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#if !defined(__PRE_RAM__) -uint32_t uartmem_getbaseaddr(void) -{ - return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; -} -#endif - void uart_init(void) { } @@ -45,3 +39,16 @@ void uart_tx_byte(unsigned char data) void uart_tx_flush(void) { } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); +} +#endif diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index e4e8b6c..919f05e 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -19,6 +19,7 @@ */ #include <arch/io.h> +#include <boot/coreboot_tables.h> #include <console/uart.h> #include <trace.h> #include "uart8250reg.h" @@ -102,6 +103,11 @@ static void uart8250_init(unsigned base_port, unsigned divisor) */ static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; +unsigned int uart_platform_base(int idx) +{ + return bases[idx]; +} + void uart_init(void) { unsigned int div; @@ -129,3 +135,16 @@ void uart_tx_flush(void) { uart8250_tx_flush(bases[0]); } + +#ifndef __PRE_RAM__ +void uart_fill_lb(void *data) +{ + struct lb_serial serial; + serial.type = LB_SERIAL_TYPE_IO_MAPPED; + serial.baseaddr = uart_platform_base(0); + serial.baud = default_baudrate(); + lb_add_serial(&serial, data); + + lb_add_console(LB_TAG_CONSOLE_SERIAL8250, data); +} +#endif diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 6243d45..8f429fd 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -348,4 +348,8 @@ struct lb_memory *get_lb_mem(void); void fill_lb_gpios(struct lb_gpios *gpios); +void uart_fill_lb(void *data); +void lb_add_serial(struct lb_serial *serial, void *data); +void lb_add_console(u16 consoletype, void *data); + #endif /* COREBOOT_TABLES_H */ diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 17811ca..a70c758 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -44,7 +44,6 @@ unsigned char uart_rx_byte(void); int uart_can_rx_byte(void); unsigned int uart_platform_base(int idx); -uint32_t uartmem_getbaseaddr(void); void oxford_init(void); void oxford_remap(unsigned int new_base); diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 2d84579..b29d7d6 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -102,43 +102,22 @@ static struct lb_memory *lb_memory(struct lb_header *header) return mem; } -static struct lb_serial *lb_serial(struct lb_header *header) +void lb_add_serial(struct lb_serial *new_serial, void *data) { -#if CONFIG_CONSOLE_SERIAL8250 - struct lb_record *rec; + struct lb_header *header = (struct lb_header *)data; struct lb_serial *serial; - rec = lb_new_record(header); - serial = (struct lb_serial *)rec; + + serial = (struct lb_serial *)lb_new_record(header); serial->tag = LB_TAG_SERIAL; serial->size = sizeof(*serial); - serial->type = LB_SERIAL_TYPE_IO_MAPPED; - serial->baseaddr = CONFIG_TTYS0_BASE; - serial->baud = CONFIG_TTYS0_BAUD; - return serial; -#elif CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART - if (uartmem_getbaseaddr()) { - struct lb_record *rec; - struct lb_serial *serial; - rec = lb_new_record(header); - serial = (struct lb_serial *)rec; - serial->tag = LB_TAG_SERIAL; - serial->size = sizeof(*serial); - serial->type = LB_SERIAL_TYPE_MEMORY_MAPPED; - serial->baseaddr = uartmem_getbaseaddr(); - serial->baud = CONFIG_TTYS0_BAUD; - return serial; - } else { - return NULL; - } -#else - return NULL; -#endif + serial->type = new_serial->type; + serial->baseaddr = new_serial->baseaddr; + serial->baud = new_serial->baud; } -#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || \ - CONFIG_CONSOLE_SERIAL_UART || CONFIG_CONSOLE_USB -static void add_console(struct lb_header *header, u16 consoletype) +void lb_add_console(u16 consoletype, void *data) { + struct lb_header *header = (struct lb_header *)data; struct lb_console *console; console = (struct lb_console *)lb_new_record(header); @@ -146,20 +125,6 @@ static void add_console(struct lb_header *header, u16 consoletype) console->size = sizeof(*console); console->type = consoletype; } -#endif - -static void lb_console(struct lb_header *header) -{ -#if CONFIG_CONSOLE_SERIAL8250 - add_console(header, LB_TAG_CONSOLE_SERIAL8250); -#endif -#if CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART - add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM); -#endif -#if CONFIG_CONSOLE_USB - add_console(header, LB_TAG_CONSOLE_EHCI); -#endif -} static void lb_framebuffer(struct lb_header *header) { @@ -522,10 +487,15 @@ unsigned long write_coreboot_table( /* Record our motherboard */ lb_mainboard(head); - /* Record the serial port, if present */ - lb_serial(head); - /* Record our console setup */ - lb_console(head); + + /* Record the serial ports and consoles */ +#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART + uart_fill_lb(head); +#endif +#if CONFIG_CONSOLE_USB + lb_add_console(LB_TAG_CONSOLE_EHCI, head); +#endif + /* Record our various random string information */ lb_strings(head); /* Record our framebuffer */

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New patch to review for coreboot: ff49585 uart: Prepare to support multiple base addresses
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5309 -gerrit commit ff49585c89f6f2e4aed6633d2277389afd0857f1 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Feb 24 20:51:30 2014 +0200 uart: Prepare to support multiple base addresses Prepare low-level register access to take UART base address as a parameter. This is done to support a list of base addresses defined in the platform. Change-Id: Ie630e55f2562f099b0ba9eb94b08c92d26dfdf2e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/allwinner/a10/uart_console.c | 15 ++++++++--- src/cpu/samsung/exynos5250/uart.c | 50 +++++++++++++++++------------------- src/cpu/samsung/exynos5420/uart.c | 44 +++++++++++++++---------------- src/cpu/ti/am335x/uart.c | 30 +++++++++++----------- src/drivers/uart/pl011.c | 13 ++++++---- 5 files changed, 78 insertions(+), 74 deletions(-) diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index aea1189..5cc1a66 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -43,9 +43,14 @@ unsigned int uart_platform_refclk(void) return 24000000; } +unsigned int uart_platform_base(int idx) +{ + return (unsigned int)get_console_uart_base_addr(); +} + void uart_init(void) { - void *uart_base = get_console_uart_base_addr(); + void *uart_base = (void *) uart_platform_base(0); /* Use default 8N1 encoding */ a10_uart_configure(uart_base, default_baudrate(), @@ -55,18 +60,20 @@ void uart_init(void) unsigned char uart_rx_byte(void) { - return a10_uart_rx_blocking(get_console_uart_base_addr()); + void *uart_base = (void *) uart_platform_base(0); + return a10_uart_rx_blocking(uart_base); } void uart_tx_byte(unsigned char data) { - a10_uart_tx_blocking(get_console_uart_base_addr(), data); + void *uart_base = (void *) uart_platform_base(0); + a10_uart_tx_blocking(uart_base, data); } #if !defined(__PRE_RAM__) uint32_t uartmem_getbaseaddr(void) { - return (uint32_t) get_console_uart_base_addr(); + return uart_platform_base(0); } #endif diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index 14d140c..82e221d 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -28,9 +28,6 @@ #define RX_FIFO_FULL_MASK (1 << 8) #define TX_FIFO_FULL_MASK (1 << 24) -/* FIXME(dhendrix): exynos5 has 4 UARTs and its functions in u-boot take a - base_port argument. However console_driver functions do not. */ -static uint32_t base_port = CONFIG_CONSOLE_SERIAL_UART_ADDRESS; /* * The coefficient, used to calculate the baudrate on S5P UARTs is @@ -58,9 +55,8 @@ static const int udivslot[] = { 0xffdf, }; -static void serial_setbrg_dev(void) +static void serial_setbrg_dev(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; u32 uclk; u32 val; @@ -87,10 +83,8 @@ static void serial_setbrg_dev(void) * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static void exynos5_init_dev(void) +static void exynos5_init_dev(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - // TODO initialize with correct peripheral id by base_port. exynos_pinmux_uart3(); @@ -102,12 +96,11 @@ static void exynos5_init_dev(void) /* No interrupts, no DMA, pure polling */ writel(0x245, &uart->ucon); - serial_setbrg_dev(); + serial_setbrg_dev(uart); } -static int exynos5_uart_err_check(int op) +static int exynos5_uart_err_check(struct s5p_uart *uart, int op) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; unsigned int mask; /* @@ -130,14 +123,12 @@ static int exynos5_uart_err_check(int op) * otherwise. When the function is successful, the character read is * written into its argument c. */ -static unsigned char exynos5_uart_rx_byte(void) +static unsigned char exynos5_uart_rx_byte(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - /* wait for character to arrive */ while (!(readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK | RX_FIFO_FULL_MASK))) { - if (exynos5_uart_err_check(0)) + if (exynos5_uart_err_check(uart, 0)) return 0; } @@ -147,49 +138,54 @@ static unsigned char exynos5_uart_rx_byte(void) /* * Output a single byte to the serial port. */ -static void exynos5_uart_tx_byte(unsigned char data) +static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - /* wait for room in the tx FIFO */ while ((readl(&uart->ufstat) & TX_FIFO_FULL_MASK)) { - if (exynos5_uart_err_check(1)) + if (exynos5_uart_err_check(uart, 1)) return; } writeb(data, &uart->utxh); } -static void exynos5_uart_tx_flush(void) +static void exynos5_uart_tx_flush(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - while (readl(&uart->ufstat) & 0x1ff0000); } +unsigned int uart_platform_base(int idx) +{ + return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; +} + #if !defined(__PRE_RAM__) uint32_t uartmem_getbaseaddr(void) { - return base_port; + return uart_platform_base(0); } #endif void uart_init(void) { - exynos5_init_dev(); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + exynos5_init_dev(uart); } unsigned char uart_rx_byte(void) { - return exynos5_uart_rx_byte(); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + return exynos5_uart_rx_byte(uart); } void uart_tx_byte(unsigned char data) { - exynos5_uart_tx_byte(data); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + exynos5_uart_tx_byte(uart, data); } void uart_tx_flush(void) { - exynos5_uart_tx_flush(); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + exynos5_uart_tx_flush(uart); } diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index d05adcd..e3ae88d 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -28,9 +28,6 @@ #define RX_FIFO_FULL_MASK (1 << 8) #define TX_FIFO_FULL_MASK (1 << 24) -/* FIXME(dhendrix): exynos5 has 4 UARTs and its functions in u-boot take a - base_port argument. However console_driver functions do not. */ -static uint32_t base_port = CONFIG_CONSOLE_SERIAL_UART_ADDRESS; /* * The coefficient, used to calculate the baudrate on S5P UARTs is @@ -58,9 +55,8 @@ static const int udivslot[] = { 0xffdf, }; -static void serial_setbrg_dev(void) +static void serial_setbrg_dev(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; u32 uclk; u32 val; @@ -87,10 +83,8 @@ static void serial_setbrg_dev(void) * Initialise the serial port with the given baudrate. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static void exynos5_init_dev(void) +static void exynos5_init_dev(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - /* enable FIFOs */ writel(0x1, &uart->ufcon); writel(0, &uart->umcon); @@ -99,12 +93,11 @@ static void exynos5_init_dev(void) /* No interrupts, no DMA, pure polling */ writel(0x245, &uart->ucon); - serial_setbrg_dev(); + serial_setbrg_dev(uart); } -static int exynos5_uart_err_check(int op) +static int exynos5_uart_err_check(struct s5p_uart *uart, int op) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; unsigned int mask; /* @@ -127,14 +120,12 @@ static int exynos5_uart_err_check(int op) * otherwise. When the function is succesfull, the character read is * written into its argument c. */ -static unsigned char exynos5_uart_rx_byte(void) +static unsigned char exynos5_uart_rx_byte(struct s5p_uart *uart) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - /* wait for character to arrive */ while (!(readl(&uart->ufstat) & (RX_FIFO_COUNT_MASK | RX_FIFO_FULL_MASK))) { - if (exynos5_uart_err_check(0)) + if (exynos5_uart_err_check(uart, 0)) return 0; } @@ -144,41 +135,48 @@ static unsigned char exynos5_uart_rx_byte(void) /* * Output a single byte to the serial port. */ -static void exynos5_uart_tx_byte(unsigned char data) +static void exynos5_uart_tx_byte(struct s5p_uart *uart, unsigned char data) { - struct s5p_uart *uart = (struct s5p_uart *)base_port; - /* wait for room in the tx FIFO */ while ((readl(&uart->ufstat) & TX_FIFO_FULL_MASK)) { - if (exynos5_uart_err_check(1)) + if (exynos5_uart_err_check(uart, 1)) return; } writeb(data, &uart->utxh); } +unsigned int uart_platform_base(int idx) +{ + return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; +} + #if !defined(__PRE_RAM__) uint32_t uartmem_getbaseaddr(void) { - return base_port; + return uart_platform_base(0); } #endif void uart_init(void) { - exynos5_init_dev(); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + exynos5_init_dev(uart); } unsigned char uart_rx_byte(void) { - return exynos5_uart_rx_byte(); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + return exynos5_uart_rx_byte(uart); } void uart_tx_byte(unsigned char data) { - exynos5_uart_tx_byte(data); + struct s5p_uart *uart = (struct s5p_uart *) uart_platform_base(0); + exynos5_uart_tx_byte(uart, data); } void uart_tx_flush(void) { + /* Exynos5250 implements this too. */ } diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index 27051ea..faea640 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -35,10 +35,8 @@ * Initialise the serial port with the given baudrate divisor. The settings * are always 8 data bits, no parity, 1 stop bit, no start bits. */ -static void am335x_uart_init(uint16_t div) +static void am335x_uart_init(struct am335x_uart *uart, uint16_t div) { - struct am335x_uart *uart = (struct am335x_uart *) - CONFIG_CONSOLE_SERIAL_UART_ADDRESS; uint16_t lcr_orig, efr_orig, mcr_orig; /* reset the UART */ @@ -131,11 +129,8 @@ static void am335x_uart_init(uint16_t div) * otherwise. When the function is successful, the character read is * written into its argument c. */ -static unsigned char am335x_uart_rx_byte(void) +static unsigned char am335x_uart_rx_byte(struct am335x_uart *uart) { - struct am335x_uart *uart = - (struct am335x_uart *)CONFIG_CONSOLE_SERIAL_UART_ADDRESS; - while (!(read16(&uart->lsr) & LSR_RXFIFOE)); return read8(&uart->rhr); @@ -144,11 +139,8 @@ static unsigned char am335x_uart_rx_byte(void) /* * Output a single byte to the serial port. */ -static void am335x_uart_tx_byte(unsigned char data) +static void am335x_uart_tx_byte(struct am335x_uart *uart, unsigned char data) { - struct am335x_uart *uart = - (struct am335x_uart *)CONFIG_CONSOLE_SERIAL_UART_ADDRESS; - while (!(read16(&uart->lsr) & LSR_TXFIFOE)); return write8(data, &uart->thr); @@ -159,28 +151,36 @@ unsigned int uart_platform_refclk(void) return 48000000; } +unsigned int uart_platform_base(int idx) +{ + return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; +} + #if !defined(__PRE_RAM__) uint32_t uartmem_getbaseaddr(void) { - return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; + return uart_platform_base(0); } #endif void uart_init(void) { + struct am335x_uart *uart = (struct am335x_uart *) uart_platform_base(0); uint16_t div = (uint16_t) uart_baudrate_divisor( default_baudrate(), uart_platform_refclk(), 16); - am335x_uart_init(div); + am335x_uart_init(uart, div); } unsigned char uart_rx_byte(void) { - return am335x_uart_rx_byte(); + struct am335x_uart *uart = (struct am335x_uart *) uart_platform_base(0); + return am335x_uart_rx_byte(uart); } void uart_tx_byte(unsigned char data) { - am335x_uart_tx_byte(data); + struct am335x_uart *uart = (struct am335x_uart *) uart_platform_base(0); + am335x_uart_tx_byte(uart, data); } void uart_tx_flush(void) diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index 2bca796..c8b7415 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -15,12 +15,14 @@ #include <console/uart.h> -static void pl011_uart_tx_byte(unsigned char data) +static void pl011_uart_tx_byte(unsigned int *uart_base, unsigned char data) { - static volatile unsigned int *uart0_address = - (unsigned int *) CONFIG_CONSOLE_SERIAL_UART_ADDRESS; + *uart_base = (unsigned int)data; +} - *uart0_address = (unsigned int)data; +unsigned int uart_platform_base(int idx) +{ + return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } #if !defined(__PRE_RAM__) @@ -36,7 +38,8 @@ void uart_init(void) void uart_tx_byte(unsigned char data) { - pl011_uart_tx_byte(data); + unsigned int *uart_base = (unsigned int *) uart_platform_base(0); + pl011_uart_tx_byte(uart_base, data); } void uart_tx_flush(void)

1 0

New patch to review for coreboot: 1ecc8db console: Use single driver entry for UARTs
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5308 -gerrit commit 1ecc8db65955362c6b34528c8a0e921e662c8ba4 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Feb 14 10:31:38 2014 +0200 console: Use single driver entry for UARTs UARTs now have unified prototypes and can use a single entry in the list of drivers for ramstage. Change-Id: I315daaf9a83cfa60f1a270146c729907a1d6d45b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Makefile.inc | 3 +- src/console/uart8250_console.c | 54 --------------------------------- src/console/uart8250mem_console.c | 54 --------------------------------- src/console/uart_console.c | 59 ++++++++++++++++++++++++++++++++++++ src/cpu/allwinner/a10/uart_console.c | 33 +++----------------- src/cpu/samsung/exynos5250/uart.c | 15 +-------- src/cpu/samsung/exynos5420/uart.c | 15 +-------- src/cpu/ti/am335x/uart.c | 25 ++++----------- src/drivers/uart/pl011.c | 10 ++---- 9 files changed, 75 insertions(+), 193 deletions(-) diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index f158670..df08e80 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -17,8 +17,7 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c bootblock-y += console.c bootblock-y += die.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c +ramstage-$(CONFIG_CONSOLE_SERIAL) += uart_console.c ramstage-$(CONFIG_SPKMODEM) += spkmodem_console.c ramstage-$(CONFIG_CONSOLE_USB) += usbdebug_console.c ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k_console.c diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c deleted file mode 100644 index 52f59f6..0000000 --- a/src/console/uart8250_console.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <console/console.h> -#include <console/uart.h> - -static void ttyS0_init(void) -{ - uart_init(); -} - -static void ttyS0_tx_byte(unsigned char data) -{ - uart_tx_byte(data); -} - -static void ttyS0_tx_flush(void) -{ - uart_tx_flush(); -} - -static unsigned char ttyS0_rx_byte(void) -{ - return uart_rx_byte(); -} - -static int ttyS0_tst_byte(void) -{ - return uart_can_rx_byte(); -} - -static const struct console_driver uart8250_console __console = { - .init = ttyS0_init, - .tx_byte = ttyS0_tx_byte, - .tx_flush = ttyS0_tx_flush, - .rx_byte = ttyS0_rx_byte, - .tst_byte = ttyS0_tst_byte, -}; diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c deleted file mode 100644 index 7e52aed..0000000 --- a/src/console/uart8250mem_console.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <console/console.h> -#include <console/uart.h> - -static void uartmem_init(void) -{ - uart_init(); -} - -static void uartmem_tx_byte(unsigned char data) -{ - uart_tx_byte(data); -} - -static void uartmem_tx_flush(void) -{ - uart_tx_flush(); -} - -static unsigned char uartmem_rx_byte(void) -{ - return uart_rx_byte(); -} - -static int uartmem_tst_byte(void) -{ - return uart_can_rx_byte(); -} - -static const struct console_driver uart8250mem_console __console = { - .init = uartmem_init, - .tx_byte = uartmem_tx_byte, - .tx_flush = uartmem_tx_flush, - .rx_byte = uartmem_rx_byte, - .tst_byte = uartmem_tst_byte, -}; diff --git a/src/console/uart_console.c b/src/console/uart_console.c new file mode 100644 index 0000000..f5535d7 --- /dev/null +++ b/src/console/uart_console.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <console/console.h> +#include <console/uart.h> + +static void uartmem_init(void) +{ + uart_init(); +} + +static void uartmem_tx_byte(unsigned char data) +{ + uart_tx_byte(data); +} + +static void uartmem_tx_flush(void) +{ + uart_tx_flush(); +} + +static unsigned char uartmem_rx_byte(void) +{ + return uart_rx_byte(); +} + +/* This only relevant with x86 with GDB_STUB enabled.*/ +static int uartmem_tst_byte(void) +{ +#if CONFIG_DRIVERS_UART_8250IO || CONFIG_DRIVERS_UART_8250MEM + return uart_can_rx_byte(); +#else + return 0; +#endif +} + +static const struct console_driver uart_console __console = { + .init = uartmem_init, + .tx_byte = uartmem_tx_byte, + .tx_flush = uartmem_tx_flush, + .rx_byte = uartmem_rx_byte, + .tst_byte = uartmem_tst_byte, +}; diff --git a/src/cpu/allwinner/a10/uart_console.c b/src/cpu/allwinner/a10/uart_console.c index af66cb7..aea1189 100644 --- a/src/cpu/allwinner/a10/uart_console.c +++ b/src/cpu/allwinner/a10/uart_console.c @@ -11,7 +11,6 @@ #include <console/uart.h> #include <arch/io.h> -#include <console/console.h> #include <cpu/allwinner/a10/uart.h> static void *get_console_uart_base_addr(void) @@ -44,7 +43,7 @@ unsigned int uart_platform_refclk(void) return 24000000; } -static void a10_uart_init_dev(void) +void uart_init(void) { void *uart_base = get_console_uart_base_addr(); @@ -54,46 +53,24 @@ static void a10_uart_init_dev(void) a10_uart_enable_fifos(uart_base); } -static unsigned char a10_uart_rx_byte(void) +unsigned char uart_rx_byte(void) { return a10_uart_rx_blocking(get_console_uart_base_addr()); } -static void a10_uart_tx_byte(unsigned char data) +void uart_tx_byte(unsigned char data) { a10_uart_tx_blocking(get_console_uart_base_addr(), data); } +#if !defined(__PRE_RAM__) uint32_t uartmem_getbaseaddr(void) { return (uint32_t) get_console_uart_base_addr(); } - -#if !defined(__PRE_RAM__) -static const struct console_driver a10_uart_console __console = { - .init = a10_uart_init_dev, - .tx_byte = a10_uart_tx_byte, - .rx_byte = a10_uart_rx_byte, -}; -#else - -void uart_init(void) -{ - a10_uart_init_dev(); -} - -unsigned char uart_rx_byte(void) -{ - return a10_uart_rx_byte(); -} - -void uart_tx_byte(unsigned char data) -{ - a10_uart_tx_byte(data); -} +#endif void uart_tx_flush(void) { } -#endif diff --git a/src/cpu/samsung/exynos5250/uart.c b/src/cpu/samsung/exynos5250/uart.c index c9d8d25..14d140c 100644 --- a/src/cpu/samsung/exynos5250/uart.c +++ b/src/cpu/samsung/exynos5250/uart.c @@ -17,7 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <console/console.h> /* for __console definition */ #include <console/uart.h> #include <arch/io.h> #include "uart.h" @@ -169,21 +168,11 @@ static void exynos5_uart_tx_flush(void) } #if !defined(__PRE_RAM__) - -static const struct console_driver exynos5_uart_console __console = { - .init = exynos5_init_dev, - .tx_byte = exynos5_uart_tx_byte, - .tx_flush = exynos5_uart_tx_flush, - .rx_byte = exynos5_uart_rx_byte, -// .tst_byte = exynos5_uart_tst_byte, -}; - uint32_t uartmem_getbaseaddr(void) { return base_port; } - -#else +#endif void uart_init(void) { @@ -204,5 +193,3 @@ void uart_tx_flush(void) { exynos5_uart_tx_flush(); } - -#endif diff --git a/src/cpu/samsung/exynos5420/uart.c b/src/cpu/samsung/exynos5420/uart.c index f9dd268..d05adcd 100644 --- a/src/cpu/samsung/exynos5420/uart.c +++ b/src/cpu/samsung/exynos5420/uart.c @@ -17,7 +17,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <console/console.h> /* for __console definition */ #include <console/uart.h> #include <arch/io.h> #include "uart.h" @@ -159,21 +158,11 @@ static void exynos5_uart_tx_byte(unsigned char data) } #if !defined(__PRE_RAM__) - -static const struct console_driver exynos5_uart_console __console = { - .init = exynos5_init_dev, - .tx_byte = exynos5_uart_tx_byte, -// .tx_flush = exynos5_uart_tx_flush, - .rx_byte = exynos5_uart_rx_byte, -// .tst_byte = exynos5_uart_tst_byte, -}; - uint32_t uartmem_getbaseaddr(void) { return base_port; } - -#else +#endif void uart_init(void) { @@ -193,5 +182,3 @@ void uart_tx_byte(unsigned char data) void uart_tx_flush(void) { } - -#endif diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index f6f1a8d..27051ea 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -20,9 +20,6 @@ #include <types.h> #include <console/uart.h> #include <arch/io.h> - -#include <console/console.h> /* for __console definition */ - #include <cpu/ti/am335x/uart.h> #define EFR_ENHANCED_EN (1 << 4) @@ -162,28 +159,18 @@ unsigned int uart_platform_refclk(void) return 48000000; } -static void am335x_uart_init_dev(void) -{ - uint16_t div = (uint16_t) uart_baudrate_divisor( - default_baudrate(), uart_platform_refclk(), 16); - am335x_uart_init(div); -} - #if !defined(__PRE_RAM__) uint32_t uartmem_getbaseaddr(void) { return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } +#endif -static const struct console_driver exynos5_uart_console __console = { - .init = am335x_uart_init_dev, - .tx_byte = am335x_uart_tx_byte, - .rx_byte = am335x_uart_rx_byte, -}; -#else void uart_init(void) { - am335x_uart_init_dev(); + uint16_t div = (uint16_t) uart_baudrate_divisor( + default_baudrate(), uart_platform_refclk(), 16); + am335x_uart_init(div); } unsigned char uart_rx_byte(void) @@ -196,6 +183,6 @@ void uart_tx_byte(unsigned char data) am335x_uart_tx_byte(data); } -void uart_tx_flush(void) { +void uart_tx_flush(void) +{ } -#endif diff --git a/src/drivers/uart/pl011.c b/src/drivers/uart/pl011.c index 376e95c..2bca796 100644 --- a/src/drivers/uart/pl011.c +++ b/src/drivers/uart/pl011.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <console/console.h> #include <console/uart.h> static void pl011_uart_tx_byte(unsigned char data) @@ -25,16 +24,12 @@ static void pl011_uart_tx_byte(unsigned char data) } #if !defined(__PRE_RAM__) - -static const struct console_driver pl011_uart_console __console = { - .tx_byte = pl011_uart_tx_byte, -}; - uint32_t uartmem_getbaseaddr(void) { return CONFIG_CONSOLE_SERIAL_UART_ADDRESS; } -#else +#endif + void uart_init(void) { } @@ -47,4 +42,3 @@ void uart_tx_byte(unsigned char data) void uart_tx_flush(void) { } -#endif

1 0

New patch to review for coreboot: 867584d usbdebug: Move Kconfig under drivers/usb
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5307 -gerrit commit 867584dcfb09fdf41f77a92db2acfdb65e4f96d9 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 25 12:06:14 2014 +0200 usbdebug: Move Kconfig under drivers/usb This menu may become a bit more complicated with addition of new USB hardware so move it out of console/. Change-Id: Ieb330675b9227a3e53d093f7c2b5a65e3842dc82 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romstage_console.c | 4 +- src/console/Kconfig | 96 ++----------------------------------- src/console/Makefile.inc | 2 +- src/console/console.c | 2 +- src/drivers/Kconfig | 1 + src/drivers/usb/Kconfig | 94 ++++++++++++++++++++++++++++++++++++ src/lib/coreboot_table.c | 4 +- 7 files changed, 106 insertions(+), 97 deletions(-) diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 6566b2f..5e7923e 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -37,7 +37,7 @@ void console_tx_byte(unsigned char byte) #if CONFIG_CONSOLE_SERIAL8250 uart_tx_byte(byte); #endif -#if CONFIG_USBDEBUG && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) +#if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) usb_tx_byte(0, byte); #endif #if CONFIG_CONSOLE_NE2K @@ -62,7 +62,7 @@ void console_tx_flush(void) #if CONFIG_CONSOLE_NE2K ne2k_transmit(CONFIG_CONSOLE_NE2K_IO_PORT); #endif -#if CONFIG_USBDEBUG && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) +#if CONFIG_CONSOLE_USB && (CONFIG_USBDEBUG_IN_ROMSTAGE || !defined(__PRE_RAM__)) usb_tx_flush(0); #endif } diff --git a/src/console/Kconfig b/src/console/Kconfig index 40903c1..bb64f29 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -141,100 +141,14 @@ config SPKMODEM help Send coreboot debug output through speaker -# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code. -config HAVE_USBDEBUG - bool - default y if HAVE_USBDEBUG_OPTIONS +config CONSOLE_USB + bool "USB dongle console output" + depends on USBDEBUG default n - -# Use "select HAVE_USBDEBUG_OPTIONS" on southbridges with multiple -# EHCI controllers or multiple ports with Debug Port capability -config HAVE_USBDEBUG_OPTIONS - def_bool n - -config USBDEBUG - bool "USB 2.0 EHCI debug dongle support" - default n - depends on HAVE_USBDEBUG help - This option allows you to use a so-called USB EHCI Debug device - (such as the Ajays NET20DC, AMIDebug RX, or a system using the - Linux "EHCI Debug Device gadget" driver found in recent kernel) - to retrieve the coreboot debug messages (instead, or in addition - to, a serial port). - - This feature is NOT supported on all chipsets in coreboot! - - It also requires a USB2 controller which supports the EHCI - Debug Port capability. - - See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list - of supported controllers. - - If unsure, say N. - -if USBDEBUG - -config USBDEBUG_IN_ROMSTAGE - bool "Enable early (pre-RAM) usbdebug console output." - default y - depends on EARLY_CBMEM_INIT && EARLY_CONSOLE - help - Configuring USB controllers in system-agent binary may cause - problems to usbdebug. Disabling this option delays usbdebug to - be setup on entry to ramstage. - - If unsure, say Y. - -config USBDEBUG_HCD_INDEX - int - default 0 - prompt "Index for EHCI controller to use with usbdebug" if HAVE_USBDEBUG_OPTIONS - help - Some boards have multiple EHCI controllers with possibly only - one having the Debug Port capability on an external USB port. - - Mapping of this index to PCI device functions is southbridge - specific and mainboard level Kconfig should already provide - a working default value here. - -config USBDEBUG_DEFAULT_PORT - int - default 0 - prompt "Default USB port to use as Debug Port" if HAVE_USBDEBUG_OPTIONS - help - Selects which physical USB port usbdebug dongle is connected to. - Setting of 0 means to scan possible ports starting from 1. - - Intel platforms have hardwired the debug port location and this - setting makes no difference there. - - Hence, if you select the correct port here, you can speed up - your boot time. Which USB port number refers to which actual - port on your mainboard (potentially also USB pin headers on - your mainboard) is highly board-specific, and you'll likely - have to find out by trial-and-error. - -choice - prompt "Type of dongle" - default USBDEBUG_DONGLE_STD - -config USBDEBUG_DONGLE_STD - bool "Net20DC or compatible" - -config USBDEBUG_DONGLE_BEAGLEBONE - bool "BeagleBone" - help - Use this to configure the USB hub on BeagleBone board. - -endchoice - -config USBDEBUG_OPTIONAL_HUB_PORT - int - default 2 if USBDEBUG_DONGLE_BEAGLEBONE - default 0 + Send coreboot debug output to USB. -endif # USBDEBUG + Configuration for USB hardware is under menu Generic Drivers. # TODO: Deps? # TODO: Improve description. diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 54d59cd..f158670 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -20,7 +20,7 @@ bootblock-y += die.c ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c ramstage-$(CONFIG_SPKMODEM) += spkmodem_console.c -ramstage-$(CONFIG_USBDEBUG) += usbdebug_console.c +ramstage-$(CONFIG_CONSOLE_USB) += usbdebug_console.c ramstage-$(CONFIG_CONSOLE_NE2K) += ne2k_console.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c ramstage-$(CONFIG_CONSOLE_QEMU_DEBUGCON) += qemu_debugcon_console.c diff --git a/src/console/console.c b/src/console/console.c index e09625f..9e9e4e2 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -116,7 +116,7 @@ void console_init(void) #if CONFIG_SPKMODEM spkmodem_init(); #endif -#if CONFIG_USBDEBUG_IN_ROMSTAGE && !defined(__BOOT_BLOCK__) +#if CONFIG_CONSOLE_USB && CONFIG_USBDEBUG_IN_ROMSTAGE && !defined(__BOOT_BLOCK__) usbdebug_init(); #endif diff --git a/src/drivers/Kconfig b/src/drivers/Kconfig index 01bed21..5267ff8 100644 --- a/src/drivers/Kconfig +++ b/src/drivers/Kconfig @@ -38,4 +38,5 @@ source src/drivers/spi/Kconfig source src/drivers/ti/Kconfig source src/drivers/trident/Kconfig source src/drivers/uart/Kconfig +source src/drivers/usb/Kconfig source src/drivers/xpowers/Kconfig diff --git a/src/drivers/usb/Kconfig b/src/drivers/usb/Kconfig new file mode 100644 index 0000000..28b95c6 --- /dev/null +++ b/src/drivers/usb/Kconfig @@ -0,0 +1,94 @@ + # Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code. +config HAVE_USBDEBUG + bool + default y if HAVE_USBDEBUG_OPTIONS + default n + +# Use "select HAVE_USBDEBUG_OPTIONS" on southbridges with multiple +# EHCI controllers or multiple ports with Debug Port capability +config HAVE_USBDEBUG_OPTIONS + def_bool n + +config USBDEBUG + bool "USB 2.0 EHCI debug dongle support" + default n + depends on HAVE_USBDEBUG + help + This option allows you to use a so-called USB EHCI Debug device + (such as the Ajays NET20DC, AMIDebug RX, or a system using the + Linux "EHCI Debug Device gadget" driver found in recent kernel) + to retrieve the coreboot debug messages (instead, or in addition + to, a serial port). + + This feature is NOT supported on all chipsets in coreboot! + + It also requires a USB2 controller which supports the EHCI + Debug Port capability. + + See http://www.coreboot.org/EHCI_Debug_Port for an up-to-date list + of supported controllers. + + If unsure, say N. + +if USBDEBUG + +config USBDEBUG_IN_ROMSTAGE + bool "Enable early (pre-RAM) usbdebug" + default y + depends on EARLY_CBMEM_INIT && EARLY_CONSOLE + help + Configuring USB controllers in system-agent binary may cause + problems to usbdebug. Disabling this option delays usbdebug to + be setup on entry to ramstage. + + If unsure, say Y. + +config USBDEBUG_HCD_INDEX + int + default 0 + prompt "Index for EHCI controller to use with usbdebug" if HAVE_USBDEBUG_OPTIONS + help + Some boards have multiple EHCI controllers with possibly only + one having the Debug Port capability on an external USB port. + + Mapping of this index to PCI device functions is southbridge + specific and mainboard level Kconfig should already provide + a working default value here. + +config USBDEBUG_DEFAULT_PORT + int + default 0 + prompt "Default USB port to use as Debug Port" if HAVE_USBDEBUG_OPTIONS + help + Selects which physical USB port usbdebug dongle is connected to. + Setting of 0 means to scan possible ports starting from 1. + + Intel platforms have hardwired the debug port location and this + setting makes no difference there. + + Hence, if you select the correct port here, you can speed up + your boot time. Which USB port number refers to which actual + port on your mainboard (potentially also USB pin headers on + your mainboard) is highly board-specific, and you'll likely + have to find out by trial-and-error. + +choice + prompt "Type of dongle" + default USBDEBUG_DONGLE_STD + +config USBDEBUG_DONGLE_STD + bool "Net20DC or compatible" + +config USBDEBUG_DONGLE_BEAGLEBONE + bool "BeagleBone" + help + Use this to configure the USB hub on BeagleBone board. + +endchoice + +config USBDEBUG_OPTIONAL_HUB_PORT + int + default 2 if USBDEBUG_DONGLE_BEAGLEBONE + default 0 + +endif # USBDEBUG diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 167eda0..2d84579 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -136,7 +136,7 @@ static struct lb_serial *lb_serial(struct lb_header *header) } #if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM || \ - CONFIG_CONSOLE_SERIAL_UART || CONFIG_USBDEBUG + CONFIG_CONSOLE_SERIAL_UART || CONFIG_CONSOLE_USB static void add_console(struct lb_header *header, u16 consoletype) { struct lb_console *console; @@ -156,7 +156,7 @@ static void lb_console(struct lb_header *header) #if CONFIG_CONSOLE_SERIAL8250MEM || CONFIG_CONSOLE_SERIAL_UART add_console(header, LB_TAG_CONSOLE_SERIAL8250MEM); #endif -#if CONFIG_USBDEBUG +#if CONFIG_CONSOLE_USB add_console(header, LB_TAG_CONSOLE_EHCI); #endif }

1 0

Patch set updated for coreboot: e8ab254 SMM: Only have console with DEBUG_SMI
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5142 -gerrit commit e8ab25454c4cbf94b0ce729e83ebf1db2e6adf76 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jan 26 11:32:51 2014 +0200 SMM: Only have console with DEBUG_SMI Existing code compiled serial communication and printk() for SMM even when DEBUG_SMI was not selected. Change-Id: Ic5e25cd7453cb2243f7ac592b093fba752a299f7 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Makefile.inc | 3 +-- src/cpu/x86/smm/smiutil.c | 8 ++------ src/drivers/uart/Makefile.inc | 6 +++--- src/include/console/console.h | 1 + 4 files changed, 7 insertions(+), 11 deletions(-) diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc index 62be1d2..54d59cd 100644 --- a/src/console/Makefile.inc +++ b/src/console/Makefile.inc @@ -5,8 +5,7 @@ ramstage-y += vsprintf.c ramstage-y += post.c ramstage-y += die.c -smm-y += printk.c -smm-y += vtxprintf.c +smm-$(CONFIG_DEBUG_SMI) += vtxprintf.c printk.c smm-$(CONFIG_SMM_TSEG) += die.c romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 43731bc..3325c32 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -19,13 +19,10 @@ * MA 02110-1301 USA */ -#include <arch/io.h> -#include <cpu/x86/cache.h> -#include <cpu/x86/smm.h> #include <console/console.h> #include <console/uart.h> -#include <console/vtxprintf.h> +#if CONFIG_DEBUG_SMI void console_tx_flush(void) { } @@ -42,6 +39,7 @@ void console_tx_byte(unsigned char byte) uart_tx_byte(byte); #endif } +#endif void console_init(void) { @@ -53,8 +51,6 @@ void console_init(void) #if CONFIG_CONSOLE_SERIAL8250MEM uart_init(); #endif -#else - console_loglevel = 1; #endif } diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc index 3a9ca3d..415c5bb 100644 --- a/src/drivers/uart/Makefile.inc +++ b/src/drivers/uart/Makefile.inc @@ -2,19 +2,19 @@ ifeq ($(CONFIG_CONSOLE_SERIAL),y) romstage-y += util.c ramstage-y += util.c bootblock-y += util.c -smm-y += util.c +smm-$(CONFIG_DEBUG_SMI) += util.c endif ifeq ($(CONFIG_CONSOLE_SERIAL8250),y) romstage-y += uart8250io.c ramstage-y += uart8250io.c -smm-y += uart8250io.c +smm-$(CONFIG_DEBUG_SMI) += uart8250io.c endif ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) romstage-y += uart8250mem.c ramstage-y += uart8250mem.c -smm-y += uart8250mem.c +smm-$(CONFIG_DEBUG_SMI) += uart8250mem.c endif ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) diff --git a/src/include/console/console.h b/src/include/console/console.h index dfeedda..a089729 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -72,6 +72,7 @@ void __attribute__ ((noreturn)) die(const char *msg); int do_printk(int msg_level, const char *fmt, ...) __attribute__((format(printf, 2, 3))); #if defined(__BOOT_BLOCK__) && !CONFIG_BOOTBLOCK_CONSOLE || \ + defined(__SMM__) && !CONFIG_DEBUG_SMI || \ (defined(__PRE_RAM__) && !defined(__BOOT_BLOCK__)) && !CONFIG_EARLY_CONSOLE static inline void printk(int LEVEL, const char *fmt, ...);

1 0

Patch set updated for coreboot: 548b7fc uart8250mem: Unify calls with generic UART
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5235 -gerrit commit 548b7fcda3c3ba1b47a30081ed7b8e8d0601a9b2 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Feb 15 10:19:23 2014 +0200 uart8250mem: Unify calls with generic UART NOTE: UART base for SMM continues to be broken, as it does not use the address resource allocator has assigned. Change-Id: I79f2ca8427a33a3c719adfe277c24dab79a33ef3 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romstage_console.c | 11 +--- src/console/console.c | 6 +-- src/console/uart8250mem_console.c | 29 +++-------- src/cpu/x86/smm/smiutil.c | 10 +--- src/drivers/oxford/oxpcie/Makefile.inc | 5 +- src/drivers/oxford/oxpcie/oxpcie.c | 7 ++- src/drivers/oxford/oxpcie/oxpcie_early.c | 50 +++++++++++++----- src/include/console/uart.h | 2 + src/include/uart8250.h | 17 ------ src/lib/uart8250mem.c | 89 ++++++++++++++++---------------- 10 files changed, 102 insertions(+), 124 deletions(-) diff --git a/src/arch/x86/lib/romstage_console.c b/src/arch/x86/lib/romstage_console.c index 89d7f82..6566b2f 100644 --- a/src/arch/x86/lib/romstage_console.c +++ b/src/arch/x86/lib/romstage_console.c @@ -26,20 +26,13 @@ #include <console/spkmodem.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250MEM -#include <uart8250.h> -#endif - void console_tx_byte(unsigned char byte) { if (byte == '\n') console_tx_byte('\r'); #if CONFIG_CONSOLE_SERIAL8250MEM - if (oxford_oxpcie_present) { - uart8250_mem_tx_byte( - CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000, byte); - } + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_SERIAL8250 uart_tx_byte(byte); @@ -61,7 +54,7 @@ void console_tx_byte(unsigned char byte) void console_tx_flush(void) { #if CONFIG_CONSOLE_SERIAL8250MEM - uart8250_mem_tx_flush(CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000); + uart_tx_flush(); #endif #if CONFIG_CONSOLE_SERIAL8250 uart_tx_flush(); diff --git a/src/console/console.c b/src/console/console.c index 334e140..e09625f 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -101,12 +101,12 @@ void console_init(void) #if defined(__BOOT_BLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \ !defined(__BOOT_BLOCK__) && CONFIG_EARLY_CONSOLE +#if CONFIG_DRIVERS_OXFORD_OXPCIE + oxford_init(); +#endif #if CONFIG_CONSOLE_SERIAL uart_init(); #endif -#if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM - oxford_init(); -#endif #if CONFIG_CONSOLE_NE2K ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT); #endif diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c index eb4e0e0..7e52aed 100644 --- a/src/console/uart8250mem_console.c +++ b/src/console/uart8250mem_console.c @@ -19,47 +19,30 @@ #include <console/console.h> #include <console/uart.h> -#include <uart8250.h> -static u32 uart_bar = 0; - -void uartmem_init(void) -{ - uart_bar = uart_mem_init(); -} - -u32 uartmem_getbaseaddr(void) +static void uartmem_init(void) { - return uart_bar; + uart_init(); } static void uartmem_tx_byte(unsigned char data) { - if (!uart_bar) - return; - - uart8250_mem_tx_byte(uart_bar, data); + uart_tx_byte(data); } static void uartmem_tx_flush(void) { - uart8250_mem_tx_flush(uart_bar); + uart_tx_flush(); } static unsigned char uartmem_rx_byte(void) { - if (!uart_bar) - return 0; - - return uart8250_mem_rx_byte(uart_bar); + return uart_rx_byte(); } static int uartmem_tst_byte(void) { - if (!uart_bar) - return 0; - - return uart8250_mem_can_rx_byte(uart_bar); + return uart_can_rx_byte(); } static const struct console_driver uart8250mem_console __console = { diff --git a/src/cpu/x86/smm/smiutil.c b/src/cpu/x86/smm/smiutil.c index 3702e5c..43731bc 100644 --- a/src/cpu/x86/smm/smiutil.c +++ b/src/cpu/x86/smm/smiutil.c @@ -24,13 +24,8 @@ #include <cpu/x86/smm.h> #include <console/console.h> #include <console/uart.h> -#include <uart8250.h> #include <console/vtxprintf.h> -#if CONFIG_CONSOLE_SERIAL8250MEM -static u32 serial8250mem_base_address = 0; -#endif - void console_tx_flush(void) { } @@ -41,8 +36,7 @@ void console_tx_byte(unsigned char byte) console_tx_byte('\r'); #if CONFIG_CONSOLE_SERIAL8250MEM - if (serial8250mem_base_address) - uart8250_mem_tx_byte(serial8250mem_base_address, byte); + uart_tx_byte(byte); #endif #if CONFIG_CONSOLE_SERIAL8250 uart_tx_byte(byte); @@ -57,7 +51,7 @@ void console_init(void) uart_init(); #endif #if CONFIG_CONSOLE_SERIAL8250MEM - serial8250mem_base_address = uart_mem_init(); + uart_init(); #endif #else console_loglevel = 1; diff --git a/src/drivers/oxford/oxpcie/Makefile.inc b/src/drivers/oxford/oxpcie/Makefile.inc index 6cc29c4..1922425 100644 --- a/src/drivers/oxford/oxpcie/Makefile.inc +++ b/src/drivers/oxford/oxpcie/Makefile.inc @@ -1,5 +1,4 @@ -ramstage-$(CONFIG_DRIVERS_OXFORD_OXPCIE) += oxpcie.c - ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) -romstage-$(CONFIG_DRIVERS_OXFORD_OXPCIE) += oxpcie_early.c +ramstage-y += oxpcie_early.c oxpcie.c +romstage-y += oxpcie_early.c endif diff --git a/src/drivers/oxford/oxpcie/oxpcie.c b/src/drivers/oxford/oxpcie/oxpcie.c index 26d29f8..76119d2 100644 --- a/src/drivers/oxford/oxpcie/oxpcie.c +++ b/src/drivers/oxford/oxpcie/oxpcie.c @@ -22,7 +22,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> -#include <uart8250.h> +#include <console/uart.h> #include <arch/io.h> static void oxford_oxpcie_enable(device_t dev) @@ -47,10 +47,9 @@ static void oxford_oxpcie_set_resources(struct device *dev) { pci_dev_set_resources(dev); -#if CONFIG_CONSOLE_SERIAL8250MEM /* Re-initialize OXPCIe base address after set_resources */ - uartmem_init(); -#endif + u32 mmio_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0); + oxford_remap(mmio_base & ~0xf); } static struct device_operations oxford_oxpcie_ops = { diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c index edb0523..d7f473e 100644 --- a/src/drivers/oxford/oxpcie/oxpcie_early.c +++ b/src/drivers/oxford/oxpcie/oxpcie_early.c @@ -17,14 +17,20 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#define __SIMPLE_DEVICE__ + #include <stdint.h> +#include <stddef.h> #include <arch/io.h> #include <arch/early_variables.h> #include <delay.h> #include <console/uart.h> -#include <uart8250.h> #include <device/pci_def.h> +static unsigned int oxpcie_present CAR_GLOBAL; +static ROMSTAGE_CONST u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; +static ROMSTAGE_CONST u32 uart1_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; + #define PCIE_BRIDGE \ PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_BUS, \ CONFIG_OXFORD_OXPCIE_BRIDGE_DEVICE, \ @@ -36,13 +42,9 @@ #define OXPCIE_DEVICE_3 \ PCI_DEV(CONFIG_OXFORD_OXPCIE_BRIDGE_SUBORDINATE, 0, 3) -#if defined(__PRE_RAM__) -int oxford_oxpcie_present CAR_GLOBAL; - -void oxford_init(void) +static void oxpcie_init_bridge(void) { u16 reg16; - oxford_oxpcie_present = 1; /* First we reset the secondary bus */ reg16 = pci_read_config16(PCIE_BRIDGE, PCI_BRIDGE_CONTROL); @@ -101,7 +103,6 @@ void oxford_init(void) break; default: /* No UART here. */ - oxford_oxpcie_present = 0; return; } @@ -114,17 +115,42 @@ void oxford_init(void) reg16 |= PCI_COMMAND_MEMORY; pci_write_config16(device, PCI_COMMAND, reg16); - /* Now the UART initialization */ - u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; + car_set_var(oxpcie_present, 1); +} + +static int oxpcie_uart_active(void) +{ + return (car_get_var(oxpcie_present)); +} + +unsigned int uart_platform_base(int idx) +{ + if (idx == 0 && oxpcie_uart_active()) + return uart0_base; + if (idx == 1 && oxpcie_uart_active()) + return uart1_base; + return 0; +} - unsigned int div = uart_baudrate_divisor(default_baudrate(), - uart_platform_refclk(), 16); - uart8250_mem_init(uart0_base, div); +#ifndef __PRE_RAM__ +void oxford_remap(u32 new_base) +{ + uart0_base = new_base + 0x1000; + uart1_base = new_base + 0x2000; } +uint32_t uartmem_getbaseaddr(void) +{ + return uart_platform_base(0); +} #endif unsigned int uart_platform_refclk(void) { return 62500000; } + +void oxford_init(void) +{ + oxpcie_init_bridge(); +} diff --git a/src/include/console/uart.h b/src/include/console/uart.h index 8aa8ea2..17811ca 100644 --- a/src/include/console/uart.h +++ b/src/include/console/uart.h @@ -43,8 +43,10 @@ void uart_tx_flush(void); unsigned char uart_rx_byte(void); int uart_can_rx_byte(void); +unsigned int uart_platform_base(int idx); uint32_t uartmem_getbaseaddr(void); void oxford_init(void); +void oxford_remap(unsigned int new_base); #endif /* CONSOLE_UART_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h index 100a216..c63153c 100644 --- a/src/include/uart8250.h +++ b/src/include/uart8250.h @@ -105,21 +105,4 @@ #define UART_SCR 0x07 #define UART_SPR 0x07 -#if CONFIG_CONSOLE_SERIAL8250MEM -void uartmem_init(void); - -/* and the same for memory mapped uarts */ -unsigned char uart8250_mem_rx_byte(unsigned base_port); -int uart8250_mem_can_rx_byte(unsigned base_port); -void uart8250_mem_tx_byte(unsigned base_port, unsigned char data); -void uart8250_mem_tx_flush(unsigned base_port); -void uart8250_mem_init(unsigned base_port, unsigned divisor); -u32 uart_mem_init(void); - -#if defined(__PRE_RAM__) && CONFIG_DRIVERS_OXFORD_OXPCIE -/* and special init for OXPCIe based cards */ -extern int oxford_oxpcie_present; -#endif -#endif - #endif /* UART8250_H */ diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index f35da05..ce45de9 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -33,42 +33,32 @@ #define SINGLE_CHAR_TIMEOUT (50 * 1000) #define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) -static inline int uart8250_mem_can_tx_byte(unsigned base_port) +static int uart8250_mem_can_tx_byte(unsigned base_port) { return read8(base_port + UART_LSR) & UART_LSR_THRE; } -static inline void uart8250_mem_wait_to_tx_byte(unsigned base_port) +static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while(i-- && !uart8250_mem_can_tx_byte(base_port)) udelay(1); + write8(base_port + UART_TBR, data); } -static inline void uart8250_mem_wait_until_sent(unsigned base_port) +static void uart8250_mem_tx_flush(unsigned base_port) { unsigned long int i = FIFO_TIMEOUT; while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) udelay(1); } -void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) -{ - uart8250_mem_wait_to_tx_byte(base_port); - write8(base_port + UART_TBR, data); -} - -void uart8250_mem_tx_flush(unsigned base_port) -{ - uart8250_mem_wait_until_sent(base_port); -} - -int uart8250_mem_can_rx_byte(unsigned base_port) +static int uart8250_mem_can_rx_byte(unsigned base_port) { return read8(base_port + UART_LSR) & UART_LSR_DR; } -unsigned char uart8250_mem_rx_byte(unsigned base_port) +static unsigned char uart8250_mem_rx_byte(unsigned base_port) { unsigned long int i = SINGLE_CHAR_TIMEOUT; while(i-- && !uart8250_mem_can_rx_byte(base_port)) @@ -79,7 +69,7 @@ unsigned char uart8250_mem_rx_byte(unsigned base_port) return 0x0; } -void uart8250_mem_init(unsigned base_port, unsigned divisor) +static void uart8250_mem_init(unsigned base_port, unsigned divisor) { /* Disable interrupts */ write8(base_port + UART_IER, 0x0); @@ -99,36 +89,45 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor) write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); } -u32 uart_mem_init(void) +void uart_init(void) { - u32 uart_bar = 0; - unsigned div; - - /* Now find the UART base address and calculate the divisor */ -#if CONFIG_DRIVERS_OXFORD_OXPCIE -#if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__) - device_t dev = dev_find_device(0x1415, 0xc158, NULL); - if (!dev) - dev = dev_find_device(0x1415, 0xc11b, NULL); - - if (dev) { - struct resource *res = find_resource(dev, 0x10); - - if (res) { - uart_bar = res->base + 0x1000; // for 1st UART - // uart_bar = res->base + 0x2000; // for 2nd UART - } - } - - if (!uart_bar) -#endif - uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART - // uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART -#endif + u32 base = uart_platform_base(0); + if (!base) + return; + unsigned int div; div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); - if (uart_bar) - uart8250_mem_init(uart_bar, div); + uart8250_mem_init(base, div); +} - return uart_bar; +void uart_tx_byte(unsigned char data) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_byte(base, data); +} + +unsigned char uart_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0xff; + return uart8250_mem_rx_byte(base); +} + +int uart_can_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0; + return uart8250_mem_can_rx_byte(base); +} + +void uart_tx_flush(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_flush(base); }

1 0

Patch set updated for coreboot: ffda7d3 uart8250: Move under drivers/uart
by Kyösti Mälkki 27 Feb '14

27 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5236 -gerrit commit ffda7d39b7ed16ed59fd6cb52a1ac51b27dbdf59 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Thu Jan 30 15:45:16 2014 +0200 uart8250: Move under drivers/uart Change-Id: Ic65ffaaa092330ed68d891e4a09a8b86cdc04a3a Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 2 +- src/cpu/allwinner/a10/uart.c | 2 +- src/drivers/uart/Makefile.inc | 12 ++++ src/drivers/uart/uart8250io.c | 131 ++++++++++++++++++++++++++++++++++++++ src/drivers/uart/uart8250mem.c | 133 +++++++++++++++++++++++++++++++++++++++ src/drivers/uart/uart8250reg.h | 108 +++++++++++++++++++++++++++++++ src/include/uart8250.h | 108 ------------------------------- src/lib/Makefile.inc | 6 -- src/lib/uart8250.c | 131 -------------------------------------- src/lib/uart8250mem.c | 133 --------------------------------------- 10 files changed, 386 insertions(+), 380 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 1ed498a..66c81db 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -32,7 +32,7 @@ #if CONFIG_CONSOLE_SERIAL8250 #include "drivers/uart/util.c" -#include "lib/uart8250.c" +#include "drivers/uart/uart8250io.c" #endif #if CONFIG_CONSOLE_NE2K #include "drivers/net/ne2k.c" diff --git a/src/cpu/allwinner/a10/uart.c b/src/cpu/allwinner/a10/uart.c index 10ea09a..1885ace 100644 --- a/src/cpu/allwinner/a10/uart.c +++ b/src/cpu/allwinner/a10/uart.c @@ -8,7 +8,7 @@ #include "uart.h" #include <arch/io.h> #include <console/uart.h> -#include <uart8250.h> +#include <drivers/uart/uart8250reg.h> /** * \brief Configure line control settings for UART diff --git a/src/drivers/uart/Makefile.inc b/src/drivers/uart/Makefile.inc index 52a7024..3a9ca3d 100644 --- a/src/drivers/uart/Makefile.inc +++ b/src/drivers/uart/Makefile.inc @@ -5,6 +5,18 @@ bootblock-y += util.c smm-y += util.c endif +ifeq ($(CONFIG_CONSOLE_SERIAL8250),y) +romstage-y += uart8250io.c +ramstage-y += uart8250io.c +smm-y += uart8250io.c +endif + +ifeq ($(CONFIG_CONSOLE_SERIAL8250MEM),y) +romstage-y += uart8250mem.c +ramstage-y += uart8250mem.c +smm-y += uart8250mem.c +endif + ifeq ($(CONFIG_CONSOLE_SERIAL_UART),y) ifeq ($(CONFIG_DRIVERS_UART_PL011),y) diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c new file mode 100644 index 0000000..e4e8b6c --- /dev/null +++ b/src/drivers/uart/uart8250io.c @@ -0,0 +1,131 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * Copyright (C) 2006-2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/uart.h> +#include <trace.h> +#include "uart8250reg.h" + +/* Should support 8250, 16450, 16550, 16550A type UARTs */ + +/* Nominal values only, good for the range of choices Kconfig offers for + * set of standard baudrates. + */ +#define BAUDRATE_REFCLK (115200) +#define BAUDRATE_OVERSAMPLE (1) + +/* Expected character delay at 1200bps is 9ms for a working UART + * and no flow-control. Assume UART as stuck if shift register + * or FIFO takes more than 50ms per character to appear empty. + * + * Estimated that inb() from UART takes 1 microsecond. + */ +#define SINGLE_CHAR_TIMEOUT (50 * 1000) +#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) + +static int uart8250_can_tx_byte(unsigned base_port) +{ + return inb(base_port + UART_LSR) & UART_LSR_THRE; +} + +static void uart8250_tx_byte(unsigned base_port, unsigned char data) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while (i-- && !uart8250_can_tx_byte(base_port)); + outb(data, base_port + UART_TBR); +} + +static void uart8250_tx_flush(unsigned base_port) +{ + unsigned long int i = FIFO_TIMEOUT; + while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); +} + +static int uart8250_can_rx_byte(unsigned base_port) +{ + return inb(base_port + UART_LSR) & UART_LSR_DR; +} + +static unsigned char uart8250_rx_byte(unsigned base_port) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while (i-- && !uart8250_can_rx_byte(base_port)); + + if (i) + return inb(base_port + UART_RBR); + else + return 0x0; +} + +static void uart8250_init(unsigned base_port, unsigned divisor) +{ + DISABLE_TRACE; + /* Disable interrupts */ + outb(0x0, base_port + UART_IER); + /* Enable FIFOs */ + outb(UART_FCR_FIFO_EN, base_port + UART_FCR); + + /* assert DTR and RTS so the other end is happy */ + outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR); + + /* DLAB on */ + outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR); + + /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ + outb(divisor & 0xFF, base_port + UART_DLL); + outb((divisor >> 8) & 0xFF, base_port + UART_DLM); + + /* Set to 3 for 8N1 */ + outb(CONFIG_TTYS0_LCS, base_port + UART_LCR); + ENABLE_TRACE; +} + +/* FIXME: Needs uart index from Kconfig. + * Already use array as a work-around for ROMCC. + */ +static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; + +void uart_init(void) +{ + unsigned int div; + div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, + BAUDRATE_OVERSAMPLE); + uart8250_init(bases[0], div); +} + +void uart_tx_byte(unsigned char data) +{ + uart8250_tx_byte(bases[0], data); +} + +unsigned char uart_rx_byte(void) +{ + return uart8250_rx_byte(bases[0]); +} + +int uart_can_rx_byte(void) +{ + return uart8250_can_rx_byte(bases[0]); +} + +void uart_tx_flush(void) +{ + uart8250_tx_flush(bases[0]); +} diff --git a/src/drivers/uart/uart8250mem.c b/src/drivers/uart/uart8250mem.c new file mode 100644 index 0000000..74929f5 --- /dev/null +++ b/src/drivers/uart/uart8250mem.c @@ -0,0 +1,133 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * Copyright (C) 2006-2010 coresystems GmbH + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <console/uart.h> +#include <device/device.h> +#include <delay.h> +#include "uart8250reg.h" + +/* Should support 8250, 16450, 16550, 16550A type UARTs */ + +/* Expected character delay at 1200bps is 9ms for a working UART + * and no flow-control. Assume UART as stuck if shift register + * or FIFO takes more than 50ms per character to appear empty. + */ +#define SINGLE_CHAR_TIMEOUT (50 * 1000) +#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) + +static int uart8250_mem_can_tx_byte(unsigned base_port) +{ + return read8(base_port + UART_LSR) & UART_LSR_THRE; +} + +static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while(i-- && !uart8250_mem_can_tx_byte(base_port)) + udelay(1); + write8(base_port + UART_TBR, data); +} + +static void uart8250_mem_tx_flush(unsigned base_port) +{ + unsigned long int i = FIFO_TIMEOUT; + while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) + udelay(1); +} + +static int uart8250_mem_can_rx_byte(unsigned base_port) +{ + return read8(base_port + UART_LSR) & UART_LSR_DR; +} + +static unsigned char uart8250_mem_rx_byte(unsigned base_port) +{ + unsigned long int i = SINGLE_CHAR_TIMEOUT; + while(i-- && !uart8250_mem_can_rx_byte(base_port)) + udelay(1); + if (i) + return read8(base_port + UART_RBR); + else + return 0x0; +} + +static void uart8250_mem_init(unsigned base_port, unsigned divisor) +{ + /* Disable interrupts */ + write8(base_port + UART_IER, 0x0); + /* Enable FIFOs */ + write8(base_port + UART_FCR, UART_FCR_FIFO_EN); + + /* Assert DTR and RTS so the other end is happy */ + write8(base_port + UART_MCR, UART_MCR_DTR | UART_MCR_RTS); + + /* DLAB on */ + write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS); + + write8(base_port + UART_DLL, divisor & 0xFF); + write8(base_port + UART_DLM, (divisor >> 8) & 0xFF); + + /* Set to 3 for 8N1 */ + write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); +} + +void uart_init(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + + unsigned int div; + div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); + uart8250_mem_init(base, div); +} + +void uart_tx_byte(unsigned char data) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_byte(base, data); +} + +unsigned char uart_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0xff; + return uart8250_mem_rx_byte(base); +} + +int uart_can_rx_byte(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return 0; + return uart8250_mem_can_rx_byte(base); +} + +void uart_tx_flush(void) +{ + u32 base = uart_platform_base(0); + if (!base) + return; + uart8250_mem_tx_flush(base); +} diff --git a/src/drivers/uart/uart8250reg.h b/src/drivers/uart/uart8250reg.h new file mode 100644 index 0000000..cdfbb1b --- /dev/null +++ b/src/drivers/uart/uart8250reg.h @@ -0,0 +1,108 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2003 Eric Biederman + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef UART8250REG_H +#define UART8250REG_H + +/* Data */ +#define UART_RBR 0x00 +#define UART_TBR 0x00 + +/* Control */ +#define UART_IER 0x01 +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ + +#define UART_IIR 0x02 +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +#define UART_FCR 0x02 +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ + +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ + +#define UART_LCR 0x03 +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity enable */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ + +#define UART_MCR 0x04 +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ +#define UART_MCR_OUT1 0x04 /* Out 1 */ +#define UART_MCR_OUT2 0x08 /* Out 2 */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ + +#define UART_MCR_DMA_EN 0x04 +#define UART_MCR_TX_DFR 0x08 + +#define UART_DLL 0x00 +#define UART_DLM 0x01 + +/* Status */ +#define UART_LSR 0x05 +#define UART_LSR_DR 0x01 /* Data ready */ +#define UART_LSR_OE 0x02 /* Overrun */ +#define UART_LSR_PE 0x04 /* Parity error */ +#define UART_LSR_FE 0x08 /* Framing error */ +#define UART_LSR_BI 0x10 /* Break */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ +#define UART_LSR_ERR 0x80 /* Error */ + +#define UART_MSR 0x06 +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ + +#define UART_SCR 0x07 +#define UART_SPR 0x07 + +#endif /* UART8250REG_H */ diff --git a/src/include/uart8250.h b/src/include/uart8250.h deleted file mode 100644 index c63153c..0000000 --- a/src/include/uart8250.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef UART8250_H -#define UART8250_H - -/* Data */ -#define UART_RBR 0x00 -#define UART_TBR 0x00 - -/* Control */ -#define UART_IER 0x01 -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -#define UART_IIR 0x02 -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -#define UART_FCR 0x02 -#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ - -#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ -#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ - -#define UART_LCR 0x03 -#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ -#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ -#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ -#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ -#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ -#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define UART_LCR_PEN 0x08 /* Parity enable */ -#define UART_LCR_EPS 0x10 /* Even Parity Select */ -#define UART_LCR_STKP 0x20 /* Stick Parity */ -#define UART_LCR_SBRK 0x40 /* Set Break */ -#define UART_LCR_BKSE 0x80 /* Bank select enable */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ - -#define UART_MCR 0x04 -#define UART_MCR_DTR 0x01 /* DTR */ -#define UART_MCR_RTS 0x02 /* RTS */ -#define UART_MCR_OUT1 0x04 /* Out 1 */ -#define UART_MCR_OUT2 0x08 /* Out 2 */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ - -#define UART_MCR_DMA_EN 0x04 -#define UART_MCR_TX_DFR 0x08 - -#define UART_DLL 0x00 -#define UART_DLM 0x01 - -/* Status */ -#define UART_LSR 0x05 -#define UART_LSR_DR 0x01 /* Data ready */ -#define UART_LSR_OE 0x02 /* Overrun */ -#define UART_LSR_PE 0x04 /* Parity error */ -#define UART_LSR_FE 0x08 /* Framing error */ -#define UART_LSR_BI 0x10 /* Break */ -#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ -#define UART_LSR_TEMT 0x40 /* Xmitter empty */ -#define UART_LSR_ERR 0x80 /* Error */ - -#define UART_MSR 0x06 -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ - -#define UART_SCR 0x07 -#define UART_SPR 0x07 - -#endif /* UART8250_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 5c37329..6641318 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -46,8 +46,6 @@ romstage-y += cbfs.c romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c #romstage-y += lzmadecode.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c -romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ifeq ($(CONFIG_EARLY_CBMEM_INIT),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c @@ -87,8 +85,6 @@ ramstage-y += stack.c ramstage-$(CONFIG_ARCH_X86) += gcc.c ramstage-y += clog2.c romstage-y += clog2.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -ramstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c ramstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c ramstage-$(CONFIG_BOOTSPLASH) += jpeg.c ramstage-$(CONFIG_TRACE) += trace.c @@ -125,8 +121,6 @@ ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) smm-y += memmove.c endif smm-y += cbfs.c memcmp.c -smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c -smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c smm-y += gcc.c $(obj)/lib/version.ramstage.o : $(obj)/build.h diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c deleted file mode 100644 index 8e1714d..0000000 --- a/src/lib/uart8250.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * Copyright (C) 2006-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/uart.h> -#include <uart8250.h> -#include <trace.h> - -/* Should support 8250, 16450, 16550, 16550A type UARTs */ - -/* Nominal values only, good for the range of choices Kconfig offers for - * set of standard baudrates. - */ -#define BAUDRATE_REFCLK (115200) -#define BAUDRATE_OVERSAMPLE (1) - -/* Expected character delay at 1200bps is 9ms for a working UART - * and no flow-control. Assume UART as stuck if shift register - * or FIFO takes more than 50ms per character to appear empty. - * - * Estimated that inb() from UART takes 1 microsecond. - */ -#define SINGLE_CHAR_TIMEOUT (50 * 1000) -#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) - -static int uart8250_can_tx_byte(unsigned base_port) -{ - return inb(base_port + UART_LSR) & UART_LSR_THRE; -} - -static void uart8250_tx_byte(unsigned base_port, unsigned char data) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while (i-- && !uart8250_can_tx_byte(base_port)); - outb(data, base_port + UART_TBR); -} - -static void uart8250_tx_flush(unsigned base_port) -{ - unsigned long int i = FIFO_TIMEOUT; - while (i-- && !(inb(base_port + UART_LSR) & UART_LSR_TEMT)); -} - -static int uart8250_can_rx_byte(unsigned base_port) -{ - return inb(base_port + UART_LSR) & UART_LSR_DR; -} - -static unsigned char uart8250_rx_byte(unsigned base_port) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while (i-- && !uart8250_can_rx_byte(base_port)); - - if (i) - return inb(base_port + UART_RBR); - else - return 0x0; -} - -static void uart8250_init(unsigned base_port, unsigned divisor) -{ - DISABLE_TRACE; - /* Disable interrupts */ - outb(0x0, base_port + UART_IER); - /* Enable FIFOs */ - outb(UART_FCR_FIFO_EN, base_port + UART_FCR); - - /* assert DTR and RTS so the other end is happy */ - outb(UART_MCR_DTR | UART_MCR_RTS, base_port + UART_MCR); - - /* DLAB on */ - outb(UART_LCR_DLAB | CONFIG_TTYS0_LCS, base_port + UART_LCR); - - /* Set Baud Rate Divisor. 12 ==> 9600 Baud */ - outb(divisor & 0xFF, base_port + UART_DLL); - outb((divisor >> 8) & 0xFF, base_port + UART_DLM); - - /* Set to 3 for 8N1 */ - outb(CONFIG_TTYS0_LCS, base_port + UART_LCR); - ENABLE_TRACE; -} - -/* FIXME: Needs uart index from Kconfig. - * Already use array as a work-around for ROMCC. - */ -static const unsigned bases[1] = { CONFIG_TTYS0_BASE }; - -void uart_init(void) -{ - unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), BAUDRATE_REFCLK, - BAUDRATE_OVERSAMPLE); - uart8250_init(bases[0], div); -} - -void uart_tx_byte(unsigned char data) -{ - uart8250_tx_byte(bases[0], data); -} - -unsigned char uart_rx_byte(void) -{ - return uart8250_rx_byte(bases[0]); -} - -int uart_can_rx_byte(void) -{ - return uart8250_can_rx_byte(bases[0]); -} - -void uart_tx_flush(void) -{ - uart8250_tx_flush(bases[0]); -} diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c deleted file mode 100644 index ce45de9..0000000 --- a/src/lib/uart8250mem.c +++ /dev/null @@ -1,133 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2003 Eric Biederman - * Copyright (C) 2006-2010 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/io.h> -#include <console/uart.h> -#include <uart8250.h> -#include <device/device.h> -#include <delay.h> - -/* Should support 8250, 16450, 16550, 16550A type UARTs */ - -/* Expected character delay at 1200bps is 9ms for a working UART - * and no flow-control. Assume UART as stuck if shift register - * or FIFO takes more than 50ms per character to appear empty. - */ -#define SINGLE_CHAR_TIMEOUT (50 * 1000) -#define FIFO_TIMEOUT (16 * SINGLE_CHAR_TIMEOUT) - -static int uart8250_mem_can_tx_byte(unsigned base_port) -{ - return read8(base_port + UART_LSR) & UART_LSR_THRE; -} - -static void uart8250_mem_tx_byte(unsigned base_port, unsigned char data) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while(i-- && !uart8250_mem_can_tx_byte(base_port)) - udelay(1); - write8(base_port + UART_TBR, data); -} - -static void uart8250_mem_tx_flush(unsigned base_port) -{ - unsigned long int i = FIFO_TIMEOUT; - while(i-- && !(read8(base_port + UART_LSR) & UART_LSR_TEMT)) - udelay(1); -} - -static int uart8250_mem_can_rx_byte(unsigned base_port) -{ - return read8(base_port + UART_LSR) & UART_LSR_DR; -} - -static unsigned char uart8250_mem_rx_byte(unsigned base_port) -{ - unsigned long int i = SINGLE_CHAR_TIMEOUT; - while(i-- && !uart8250_mem_can_rx_byte(base_port)) - udelay(1); - if (i) - return read8(base_port + UART_RBR); - else - return 0x0; -} - -static void uart8250_mem_init(unsigned base_port, unsigned divisor) -{ - /* Disable interrupts */ - write8(base_port + UART_IER, 0x0); - /* Enable FIFOs */ - write8(base_port + UART_FCR, UART_FCR_FIFO_EN); - - /* Assert DTR and RTS so the other end is happy */ - write8(base_port + UART_MCR, UART_MCR_DTR | UART_MCR_RTS); - - /* DLAB on */ - write8(base_port + UART_LCR, UART_LCR_DLAB | CONFIG_TTYS0_LCS); - - write8(base_port + UART_DLL, divisor & 0xFF); - write8(base_port + UART_DLM, (divisor >> 8) & 0xFF); - - /* Set to 3 for 8N1 */ - write8(base_port + UART_LCR, CONFIG_TTYS0_LCS); -} - -void uart_init(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - - unsigned int div; - div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); - uart8250_mem_init(base, div); -} - -void uart_tx_byte(unsigned char data) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - uart8250_mem_tx_byte(base, data); -} - -unsigned char uart_rx_byte(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return 0xff; - return uart8250_mem_rx_byte(base); -} - -int uart_can_rx_byte(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return 0; - return uart8250_mem_can_rx_byte(base); -} - -void uart_tx_flush(void) -{ - u32 base = uart_platform_base(0); - if (!base) - return; - uart8250_mem_tx_flush(base); -}

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coreboot-gerrit February 2014