coreboot-gerrit February 2014

coreboot-gerrit@coreboot.org

1 participants
1135 discussions

Patch set updated for coreboot: 3c6e861 intel/nehalem: Fix soft reset detection.
by Vladimir Serbinenko 22 Feb '14

22 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5267 -gerrit commit 3c6e861ddec3e1d3a9b596a3677e5c2a3ee55969 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Feb 19 22:09:33 2014 +0100 intel/nehalem: Fix soft reset detection. Change-Id: I4575cddc35dc8309372beafec441d194bc145242 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/northbridge/intel/nehalem/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 46a15a9..978ffbf 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -4970,7 +4970,7 @@ void raminit(const int s3resume, const u8 *spd_addrmap) pcie_write_config8(SOUTHBRIDGE, GEN_PMCON_2, pcie_read_config8(SOUTHBRIDGE, GEN_PMCON_2) & ~0x80); udelay(10000); - write_mchbar16(0x2ca8, 0x0); + write_mchbar16(0x2ca8, 0x8); #if REAL udelay(1000);

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Patch set updated for coreboot: 12d5784 nehalem/raminit: Don't touch clock generator in raminit.
by Vladimir Serbinenko 22 Feb '14

22 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5265 -gerrit commit 12d578405cb21d9dad57571af664f764dd8cd9c1 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Wed Feb 19 22:07:12 2014 +0100 nehalem/raminit: Don't touch clock generator in raminit. Clock generator is mobo-specific. Don't touch it in raminit. Change-Id: Ie114696b7fb13b8daee8dd1393d43bc609e149b3 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/x201/romstage.c | 16 ++++++++++++++ src/northbridge/intel/nehalem/raminit.c | 37 ++++++++++++--------------------- src/northbridge/intel/nehalem/raminit.h | 1 + 3 files changed, 30 insertions(+), 24 deletions(-) diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c index 07687b8..0e70f80 100644 --- a/src/mainboard/lenovo/x201/romstage.c +++ b/src/mainboard/lenovo/x201/romstage.c @@ -203,6 +203,18 @@ static inline u16 read_acpi16(u32 addr) return inw(DEFAULT_PMBASE | addr); } +static void +set_fsb_frequency(void) +{ + u8 block[5]; + u16 fsbfreq = 62879; + smbus_block_read(0x69, 0, 5, block); + block[0] = fsbfreq; + block[1] = fsbfreq >> 8; + + smbus_block_write(0x69, 0, 5, block); +} + void main(unsigned long bist) { u32 reg32; @@ -287,6 +299,10 @@ void main(unsigned long bist) timestamp_add_now(TS_BEFORE_INITRAM); + chipset_init(s3resume); + + set_fsb_frequency(); + raminit(s3resume, spd_addrmap); timestamp_add_now(TS_AFTER_INITRAM); diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index c5fe8ba..c967e39 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -3796,28 +3796,11 @@ static void dmi_setup(void) } #endif -#if REAL -static void -set_fsb_frequency (void) -{ - u8 block[5]; - u16 fsbfreq = 62879; - smbus_block_read(0x69, 0, 5, block); - block[0] = fsbfreq; - block[1] = fsbfreq >> 8; - - smbus_block_write(0x69, 0, 5, block); -} -#endif - -void raminit(const int s3resume, const u8 *spd_addrmap) +void chipset_init(const int s3resume) { - unsigned channel, slot, lane, rank; - int i; - struct raminfo info; u8 x2ca8; - gav(x2ca8 = read_mchbar8(0x2ca8)); + x2ca8 = read_mchbar8(0x2ca8); if ((x2ca8 & 1) || (x2ca8 == 8 && !s3resume)) { printk(BIOS_DEBUG, "soft reset detected, rebooting properly\n"); write_mchbar8(0x2ca8, 0); @@ -3879,12 +3862,18 @@ void raminit(const int s3resume, const u8 *spd_addrmap) pcie_write_config16(NORTHBRIDGE, D0F0_GGC, 0xb50); gav(read32(DEFAULT_RCBA | 0x3428)); write32(DEFAULT_RCBA | 0x3428, 0x1d); +} -#if !REAL - pre_raminit_5(s3resume); -#else - set_fsb_frequency(); -#endif +void raminit(const int s3resume, const u8 *spd_addrmap) +{ + unsigned channel, slot, lane, rank; + int i; + struct raminfo info; + u8 x2ca8; + u16 deven; + + x2ca8 = read_mchbar8(0x2ca8); + deven = pcie_read_config16(NORTHBRIDGE, D0F0_DEVEN); memset(&info, 0x5a, sizeof(info)); diff --git a/src/northbridge/intel/nehalem/raminit.h b/src/northbridge/intel/nehalem/raminit.h index 91f0dea..0485694 100644 --- a/src/northbridge/intel/nehalem/raminit.h +++ b/src/northbridge/intel/nehalem/raminit.h @@ -22,6 +22,7 @@ #include "nehalem.h" +void chipset_init(const int s3resume); /* spd_addrmap is array of 4 elements: Channel 0 Slot 0 Channel 0 Slot 1

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Patch merged into coreboot/master: 71679e5 device: Do not show "framebuffer graphics resolution" with native init.
by gerrit＠coreboot.org 22 Feb '14

22 Feb '14

the following patch was just integrated into master: commit 71679e5e6bdcd4a4a460787a6c298cd6e6916308 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Feb 21 08:38:27 2014 +0100 device: Do not show "framebuffer graphics resolution" with native init. No native init uses this. Real hardware ones use mode specified in EDID. Qemu one uses CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_[XY]RES. Change-Id: I0845fec10b9811e2be44b5be30b9dc4f1c9719a6 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> See http://review.coreboot.org/5281 for details. -gerrit

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Patch set updated for coreboot: 94f0d58 vendorcode/amd/agesa/f*: Improve gcccar.inc assembler compatibility.
by Edward O'Callaghan 22 Feb '14

22 Feb '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5277 -gerrit commit 94f0d5800f121b44ca1bcf6a19dbdf2f620505b5 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Feb 21 12:43:07 2014 +1100 vendorcode/amd/agesa/f*: Improve gcccar.inc assembler compatibility. A comparison with a two's complement in gcccar.inc has dubious GAS/AT&T notation. Clang miss-parses 0x-1 as an invalid hexadecimal number. Change-Id: I88baa5c2513f062ff309df05916a3832b9bd9bb1 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/vendorcode/amd/agesa/f10/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f12/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f14/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f15/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f15tn/gcccar.inc | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/vendorcode/amd/agesa/f10/gcccar.inc b/src/vendorcode/amd/agesa/f10/gcccar.inc index 61a8d3e..11f50db 100644 --- a/src/vendorcode/amd/agesa/f10/gcccar.inc +++ b/src/vendorcode/amd/agesa/f10/gcccar.inc @@ -827,7 +827,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f12/gcccar.inc b/src/vendorcode/amd/agesa/f12/gcccar.inc index d7da81d..22564cb 100644 --- a/src/vendorcode/amd/agesa/f12/gcccar.inc +++ b/src/vendorcode/amd/agesa/f12/gcccar.inc @@ -821,7 +821,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f14/gcccar.inc b/src/vendorcode/amd/agesa/f14/gcccar.inc index 7037344..40e0e31 100644 --- a/src/vendorcode/amd/agesa/f14/gcccar.inc +++ b/src/vendorcode/amd/agesa/f14/gcccar.inc @@ -835,7 +835,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f15/gcccar.inc b/src/vendorcode/amd/agesa/f15/gcccar.inc index b20c77e..c88709c 100644 --- a/src/vendorcode/amd/agesa/f15/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15/gcccar.inc @@ -842,7 +842,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f15tn/gcccar.inc b/src/vendorcode/amd/agesa/f15tn/gcccar.inc index c76ad16..d6dd49a 100644 --- a/src/vendorcode/amd/agesa/f15tn/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15tn/gcccar.inc @@ -875,7 +875,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL

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Patch set updated for coreboot: d96c849 libpayload: hexdump: Use `p` as conversion specifier for pointers
by Nico Huber 21 Feb '14

21 Feb '14

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4767 -gerrit commit d96c84981c969bba7182229632e07b20222985d1 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Tue Jan 21 12:08:18 2014 +0100 libpayload: hexdump: Use `p` as conversion specifier for pointers Change-Id: Ie5c279ef90bd9ed5e2624bf852dcff1f06531a13 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- payloads/libpayload/libc/hexdump.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/libpayload/libc/hexdump.c b/payloads/libpayload/libc/hexdump.c index e4aa8b9..814adf2 100644 --- a/payloads/libpayload/libc/hexdump.c +++ b/payloads/libpayload/libc/hexdump.c @@ -49,7 +49,7 @@ void hexdump(void *memory, int length) } if (all_zero < 2) { - printf("%08lx:", memory + i); + printf("%8p:", memory + i); for (j = 0; j < 16; j++) printf(" %02x", m[i + j]); printf(" ");

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Patch set updated for coreboot: 71679e5 device: Do not show "framebuffer graphics resolution" with native init.
by Vladimir Serbinenko 21 Feb '14

21 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5281 -gerrit commit 71679e5e6bdcd4a4a460787a6c298cd6e6916308 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Feb 21 08:38:27 2014 +0100 device: Do not show "framebuffer graphics resolution" with native init. No native init uses this. Real hardware ones use mode specified in EDID. Qemu one uses CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_[XY]RES. Change-Id: I0845fec10b9811e2be44b5be30b9dc4f1c9719a6 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/device/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/device/Kconfig b/src/device/Kconfig index 2d6e226..4b2d4b8 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -299,7 +299,7 @@ config FRAMEBUFFER_SET_VESA_MODE choice prompt "framebuffer graphics resolution" default FRAMEBUFFER_VESA_MODE_117 - depends on FRAMEBUFFER_SET_VESA_MODE || MAINBOARD_DO_NATIVE_VGA_INIT + depends on FRAMEBUFFER_SET_VESA_MODE help This option sets the resolution used for the coreboot framebuffer (and bootsplash screen).

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Patch set updated for coreboot: a850646 NOTFORMERGE: Attempt at X60 better gfx init
by Vladimir Serbinenko 21 Feb '14

21 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5280 -gerrit commit a8506465057b4eab587ad4bafe1b7dafe6b0527c Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Feb 21 07:54:40 2014 +0100 NOTFORMERGE: Attempt at X60 better gfx init Change-Id: I15cc1d62f1d4c5cab503d4ed2426c63c8ef5bc5e Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/x60/Kconfig | 1 + src/mainboard/lenovo/x60/i915.c | 50 +- src/mainboard/lenovo/x60/i915io.c | 1930 ------------------------------------- 3 files changed, 39 insertions(+), 1942 deletions(-) diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 7ed2665..977d9e5 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -26,6 +26,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_NATIVE_VGA_INIT select EARLY_CBMEM_INIT select H8_DOCK_EARLY_INIT + select INTEL_EDID config MAINBOARD_DIR string diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c index 4870fd8..0ff6307 100644 --- a/src/mainboard/lenovo/x60/i915.c +++ b/src/mainboard/lenovo/x60/i915.c @@ -43,6 +43,7 @@ #include <cpu/x86/msr.h> #include <edid.h> #include "i915io.h" +#include <drivers/intel/gma/edid.h> enum { vmsg = 1, vio = 2, vspin = 4, @@ -64,16 +65,6 @@ static unsigned int physbase; static u32 htotal, hblank, hsync, vtotal, vblank, vsync; -const u8 x60_edid_data[] = { - 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0x30, 0xae, 0x00, 0x40, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x0f, 0x01, 0x03, 0x80, 0x19, 0x12, 0x78, 0xea, 0xed, 0x75, 0x91, 0x57, 0x4f, 0x8b, 0x26, - 0x21, 0x50, 0x54, 0x21, 0x08, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, - 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x28, 0x15, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, 0x18, 0x88, - 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0xed, 0x10, 0x00, 0x40, 0x41, 0x00, 0x26, 0x30, - 0x18, 0x88, 0x36, 0x00, 0xf6, 0xb9, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x61, - 0x43, 0x32, 0x61, 0x43, 0x28, 0x0f, 0x01, 0x00, 0x4c, 0xa3, 0x58, 0x4a, 0x00, 0x00, 0x00, 0xfe, - 0x00, 0x4c, 0x54, 0x4e, 0x31, 0x32, 0x31, 0x58, 0x4a, 0x2d, 0x4c, 0x30, 0x37, 0x0a, 0x00, 0x00, -}; #define READ32(addr) io_i915_READ32(addr) #define WRITE32(val, addr) io_i915_WRITE32(val, addr) @@ -279,9 +270,11 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, unsigned int pmmio, unsigned int pgfx) { static struct edid edid; - + u8 x60_edid_data[256]; int index; unsigned long temp; + int i; + mmio = (void *)pmmio; addrport = piobase; dataport = addrport + 4; @@ -292,8 +285,19 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, (void *)graphics, mmio, addrport, physbase); globalstart = rdtscll(); + WRITE32(0, 0x5100); + WRITE32(0, PP_ON_DELAYS); + WRITE32(0, PP_OFF_DELAYS); + WRITE32(MI_ARB_C3_LP_WRITE_ENABLE | 0x08000800, INSTPM+0x24); + + for (i = 0; i < 8; i++) + WRITE32(0, RENDER_RING_BASE + i * 4); + for (i = 0; i < 8; i++) + WRITE32(0, FENCE_REG_965_0 + i * 4); + WRITE32(VGA_DISP_DISABLE | 0x80000000, VGACNTRL); - decode_edid((unsigned char *)&x60_edid_data, + intel_gmbus_read_edid(pmmio, 3, 0x50, x60_edid_data); + decode_edid(x60_edid_data, sizeof(x60_edid_data), &edid); htotal = (edid.ha - 1) | ((edid.ha + edid.hbl - 1) << 16); @@ -321,6 +325,28 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, index = run(0); printk(BIOS_SPEW, "Run returns %d\n", index); + for (i = 0; i < 0x100; i++) + WRITE32(i * 0x10101, _PALETTE_B + i * 4); + WRITE32(2, BLC_PWM_CTL); + + WRITE32(PANEL_UNLOCK_REGS | PANEL_POWER_OFF, PCH_PP_CONTROL); + WRITE32(PANEL_UNLOCK_REGS | PANEL_POWER_RESET, PCH_PP_CONTROL); + mdelay(1); + WRITE32(PANEL_UNLOCK_REGS + | PANEL_POWER_ON | PANEL_POWER_RESET, PCH_PP_CONTROL); + + printk (BIOS_DEBUG, "waiting for panel powerup\n"); + while (1) + { + u32 reg32; + reg32 = READ32(PCH_PP_STATUS); + if (((reg32 >> 28) & 3) == 0) + break; + } + printk (BIOS_DEBUG, "panel powered up\n"); + + WRITE32(PANEL_POWER_ON | PANEL_POWER_RESET, PCH_PP_CONTROL); + verbose = 0; /* GTT is the Global Translation Table for the graphics pipeline. * It is used to translate graphics addresses to physical diff --git a/src/mainboard/lenovo/x60/i915io.c b/src/mainboard/lenovo/x60/i915io.c index 3552867..5a9cad0 100644 --- a/src/mainboard/lenovo/x60/i915io.c +++ b/src/mainboard/lenovo/x60/i915io.c @@ -22,135 +22,11 @@ struct iodef iodefs[] = { {V, 0,}, -{M, 1, "Linux agpgart interface v0.103", 0x0, 0x0, 0}, -{M, 1, "agpgart-intel 0000:00:00.0:Intel 945GM Chipset", 0x0, 0x0, 0}, -{M, 1, "agpgart-intel 0000:00:00.0:detected gtt size:262144K total, 262144K mappable", 0x0, 0x0, 0}, -{M, 1, "agpgart-intel 0000:00:00.0:detected 8192K stolen memory", 0x0, 0x0, 0}, -{M, 1, "agpgart-intel 0000:00:00.0:AGP aperture is 256M @ 0xd0000000", 0x0, 0x0, 0}, -{M, 1, "[drm] Initialized drm 1.1.0 20060810", 0x0, 0x0, 0}, -{M, 1, "[drm] radeon defaulting to kernel modesetting.", 0x0, 0x0, 0}, -{M, 1, "[drm] radeon kernel modesetting enabled.", 0x0, 0x0, 0}, -{M, 1, "i915 0000:00:02.0:setting latency timer to 64", 0x0, 0x0, 0}, -{W, 1, "", 0x5100, 0x00000000, 0}, -{R, 1, "", PP_ON_DELAYS, 0x00000000, 0}, -{R, 1, "", PP_OFF_DELAYS, 0x00000000, 0}, -{W, 1, "", PP_ON_DELAYS, 0x00000000, 0}, -{W, 1, "", PP_OFF_DELAYS, 0x00000000, 0}, -{W, 1, "", INSTPM+0x24, MI_ARB_C3_LP_WRITE_ENABLE | 0x08000800, 0}, -{W, 1, "", RENDER_RING_BASE, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0x4, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0x8, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0xc, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0x10, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0x14, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0x18, 0x00000000, 0}, -{W, 1, "", RENDER_RING_BASE+0x1c, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0x4, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0x8, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0xc, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0x10, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0x14, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0x18, 0x00000000, 0}, -{W, 1, "", FENCE_REG_965_0+0x1c, 0x00000000, 0}, -{R, 1, "", DCC, DCC_ADDRESSING_MODE_DUAL_CHANNEL_INTERLEAVED | DCC_CHANNEL_XOR_BIT_17 | 0x000f0202, 0}, -{M, 1, "[drm] Supports vblank timestamp caching Rev 1 (10.10.2010).", 0x0, 0x0, 0}, -{M, 1, "[drm] Driver supports precise vblank timestamp query.", 0x0, 0x0, 0}, -{M, 1, "i915 0000:00:02.0:Invalid ROM contents", 0x0, 0x0, 0}, -{M, 1, "[drm] failed to find VBIOS tables", 0x0, 0x0, 0}, -{M, 1, "vgaarb:device changed decodes:PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem", 0x0, 0x0, 0}, -{W, 1, "", VGACNTRL, VGA_DISP_DISABLE | 0x80000000, 0}, -{R, 1, "", PFIT_CONTROL, 0x00000000, 0}, -{W, 1, "", 0x5100, 0x00000003, 0}, -{W, 1, "", 0x5104, 0x460100a1, 0}, -{R, 1, "", 0x5108, 0x00004a00, 0}, -{R, 1, "", 0x510c, 0x00000000, 0}, -{R, 1, "", 0x5108, 0x0000c200, 0}, -{W, 1, "", 0x5104, 0x48000000, 0}, -{R, 1, "", 0x5108, 0x00008800, 0}, -{W, 1, "", 0x5100, 0x00000000, 0}, -{W, 1, "", 0x5100, 0x00000003, 0}, -{W, 1, "", 0x5104, 0x468000a1, 0}, -{R, 1, "", 0x5108, 0x00008a08, 0}, -{R, 1, "", 0x510c, 0xffffff00, 0}, -{R, 1, "", 0x5108, 0x00008a0c, 0}, -{R, 1, "", 0x510c, 0x00ffffff, 0}, -{R, 1, "", 0x5108, 0x00008a10, 0}, -{R, 1, "", 0x510c, 0x4000ae30, 0}, -{R, 1, "", 0x5108, 0x00008a14, 0}, -{R, 1, "", 0x510c, 0x00000000, 0}, -{R, 1, "", 0x5108, 0x00008a18, 0}, -{R, 1, "", 0x510c, 0x03010f00, 0}, -{R, 1, "", 0x5108, 0x00008a1c, 0}, -{R, 1, "", 0x510c, 0x78121980, 0}, -{R, 1, "", 0x5108, 0x00008a20, 0}, -{R, 1, "", 0x510c, 0x9175edea, 0}, -{R, 1, "", 0x5108, 0x00008a24, 0}, -{R, 1, "", 0x510c, 0x268b4f57, 0}, -{R, 1, "", 0x5108, 0x00008a28, 0}, -{R, 1, "", 0x510c, 0x21545021, 0}, -{R, 1, "", 0x5108, 0x00008a2c, 0}, -{R, 1, "", 0x510c, 0x01010008, 0}, -{R, 1, "", 0x5108, 0x00008a30, 0}, -{R, 1, "", 0x510c, 0x01010101, 0}, -{R, 1, "", 0x5108, 0x00008a34, 0}, -{R, 1, "", 0x510c, 0x01010101, 0}, -{R, 1, "", 0x5108, 0x00008a38, 0}, -{R, 1, "", 0x510c, 0x01010101, 0}, -{R, 1, "", 0x5108, 0x00008a3c, 0}, -{R, 1, "", 0x510c, 0x15280101, 0}, -{R, 1, "", 0x5108, 0x00008a40, 0}, -{R, 1, "", 0x510c, 0x00414000, 0}, -{R, 1, "", 0x5108, 0x00008a44, 0}, -{R, 1, "", 0x510c, 0x88183026, 0}, -{R, 1, "", 0x5108, 0x00008a48, 0}, -{R, 1, "", 0x510c, 0xb9f60036, 0}, -{R, 1, "", 0x5108, 0x00008a4c, 0}, -{R, 1, "", 0x510c, 0x18000000, 0}, -{R, 1, "", 0x5108, 0x00008a50, 0}, -{R, 1, "", 0x510c, 0x400010ed, 0}, -{R, 1, "", 0x5108, 0x00008a54, 0}, -{R, 1, "", 0x510c, 0x30260041, 0}, -{R, 1, "", 0x5108, 0x00008a58, 0}, -{R, 1, "", 0x510c, 0x00368818, 0}, -{R, 1, "", 0x5108, 0x00008a5c, 0}, -{R, 1, "", 0x510c, 0x0000b9f6, 0}, -{R, 1, "", 0x5108, 0x00008a60, 0}, -{R, 1, "", 0x510c, 0x00001800, 0}, -{R, 1, "", 0x5108, 0x00008a64, 0}, -{R, 1, "", 0x510c, 0x61000f00, 0}, -{R, 1, "", 0x5108, 0x00008a68, 0}, -{R, 1, "", 0x510c, 0x43613243, 0}, -{R, 1, "", 0x5108, 0x00008a6c, 0}, -{R, 1, "", 0x510c, 0x00010f28, 0}, -{R, 1, "", 0x5108, 0x00008a70, 0}, -{R, 1, "", 0x510c, 0x4a58a34c, 0}, -{R, 1, "", 0x5108, 0x00008a74, 0}, -{R, 1, "", 0x510c, 0xfe000000, 0}, -{R, 1, "", 0x5108, 0x00008a78, 0}, -{R, 1, "", 0x510c, 0x4e544c00, 0}, -{R, 1, "", 0x5108, 0x00008a7c, 0}, -{R, 1, "", 0x510c, 0x58313231, 0}, -{R, 1, "", 0x5108, 0x0000ca00, 0}, -{R, 1, "", 0x510c, 0x304c2d4a, 0}, -{R, 1, "", 0x5108, 0x0000ca00, 0}, -{R, 1, "", 0x510c, 0x00000a37, 0}, -{R, 1, "", 0x5108, 0x0000c200, 0}, -{W, 1, "", 0x5104, 0x48000000, 0}, -{R, 1, "", 0x5108, 0x00008800, 0}, -{W, 1, "", 0x5100, 0x00000000, 0}, {R, 1, "", PP_CONTROL, 0x00000000, 0}, {W, 1, "", PP_CONTROL, 0xabcd0000, 0}, {R, 2, "", BLC_PWM_CTL, 0x00000000, 0}, {R, 2, "", DVOB, 0x00300000, 0}, {R, 1, "", DVOC, 0x00300000, 0}, -{R, 1, "", TV_CTL, 0x00000000, 0}, -{R, 1, "", TV_DAC, 0x00000000, 0}, -{W, 1, "", TV_DAC, 0x08000000, 0}, -{R, 1, "", TV_DAC, 0x08000000, 0}, -{W, 1, "", TV_DAC, 0x00000000, 0}, -{R, 1, "", TV_DAC, 0x00000000, 0}, -{W, 1, "", TV_DAC, 0x00000000, 0}, {M, 1, "tsc:Refined TSC clocksource calibration:1662.499 MHz", 0x0, 0x0, 0}, {W, 1, "", HWS_PGA, 0x352d2000, 0}, {W, 1, "", PRB0_CTL, 0x00000000, 0}, @@ -172,10 +48,8 @@ struct iodef iodefs[] = { {R, 1, "", _PIPEBCONF, 0x00000000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x00000000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x00000000, 0}, {R, 1, "", _PIPEACONF, 0x00000000, 0}, {W, 1, "", _PIPEACONF, 0x00000000, 0}, {R, 1, "", _DSPACNTR, 0x00000000, 0}, @@ -184,10 +58,8 @@ struct iodef iodefs[] = { {R, 1, "", _DSPBCNTR, 0x00000000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x00000000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x00000000, 0}, {R, 1, "", _PIPEACONF, 0x00000000, 0}, {R, 1, "", _PIPEBCONF, 0x00000000, 0}, {W, 1, "", PORT_HOTPLUG_EN, 0x00000000, 0}, @@ -251,28 +123,6 @@ struct iodef iodefs[] = { {W, 1, "", INSTPM+0x20, FW_BLC_SELF_EN_MASK | 0x80000000, 0}, {W, 1, "", FW_BLC, 0x011d011a, 0}, {W, 1, "", FW_BLC2, 0x00000102, 0}, -{R, 1, "", TV_CTL, 0x00000000, 0}, -{W, 1, "", TV_H_CTL_1, 0x00400359, 0}, -{W, 1, "", TV_H_CTL_2, 0x80480022, 0}, -{W, 1, "", TV_H_CTL_3, 0x007c0344, 0}, -{W, 1, "", TV_V_CTL_1, 0x00f01415, 0}, -{W, 1, "", TV_V_CTL_2, 0x00060607, 0}, -{W, 1, "", TV_V_CTL_3, 0x80120001, 0}, -{W, 1, "", TV_V_CTL_4, 0x000900f0, 0}, -{W, 1, "", TV_V_CTL_5, 0x000a00f0, 0}, -{W, 1, "", TV_V_CTL_6, 0x000900f0, 0}, -{W, 1, "", TV_V_CTL_7, 0x000a00f0, 0}, -{W, 1, "", TV_SC_CTL_1, 0xc1710087, 0}, -{W, 1, "", TV_SC_CTL_2, 0x6b405140, 0}, -{W, 1, "", TV_SC_CTL_3, 0x00000000, 0}, -{W, 1, "", TV_CSC_Y, 0x0332012d, 0}, -{W, 1, "", TV_CSC_Y2, 0x07d30104, 0}, -{W, 1, "", TV_CSC_U, 0x0733052d, 0}, -{W, 1, "", TV_CSC_U2, 0x05c70200, 0}, -{W, 1, "", TV_CSC_V, 0x0340030c, 0}, -{W, 1, "", TV_CSC_V2, 0x06d00200, 0}, -{W, 1, "", TV_CLR_KNOBS, 0x00606000, 0}, -{W, 1, "", TV_CLR_LEVEL, 0x010b00e1, 0}, {R, 1, "", _PIPEACONF, PIPECONF_ENABLE | 0x80000000, 0}, {R, 1, "", _DSPBCNTR, 0x58000000, 0}, {W, 1, "", _DSPBCNTR, 0x58000000, 0}, @@ -288,215 +138,6 @@ struct iodef iodefs[] = { {W, 1, "", _DSPBCNTR, 0x58000000, 0}, {R, 1, "", _DSPBADDR, 0x00020000, 0}, {W, 1, "", _DSPBADDR, 0x00020000, 0}, -{W, 1, "", TV_H_LUMA_0, 0xb1403000, 0}, -{W, 1, "", TV_H_LUMA_0+0x4, 0x2e203500, 0}, -{W, 1, "", TV_H_LUMA_0+0x8, 0x35002e20, 0}, -{W, 1, "", TV_H_LUMA_0+0xc, 0x3000b140, 0}, -{W, 1, "", TV_H_LUMA_0+0x10, 0x35a0b160, 0}, -{W, 1, "", TV_H_LUMA_0+0x14, 0x2dc02e80, 0}, -{W, 1, "", TV_H_LUMA_0+0x18, 0xb1403480, 0}, -{W, 1, "", TV_H_LUMA_0+0x1c, 0xb1603000, 0}, -{W, 1, "", TV_H_LUMA_0+0x20, 0x2ea03640, 0}, -{W, 1, "", TV_H_LUMA_0+0x24, 0x34002d80, 0}, -{W, 1, "", TV_H_LUMA_0+0x28, 0x3000b120, 0}, -{W, 1, "", TV_H_LUMA_0+0x2c, 0x36e0b160, 0}, -{W, 1, "", TV_H_LUMA_0+0x30, 0x2d202ef0, 0}, -{W, 1, "", TV_H_LUMA_0+0x34, 0xb1203380, 0}, -{W, 1, "", TV_H_LUMA_0+0x38, 0xb1603000, 0}, -{W, 1, "", TV_H_LUMA_0+0x3c, 0x2f303780, 0}, -{W, 1, "", TV_H_LUMA_0+0x40, 0x33002cc0, 0}, -{W, 1, "", TV_H_LUMA_0+0x44, 0x3000b100, 0}, -{W, 1, "", TV_H_LUMA_0+0x48, 0x3820b160, 0}, -{W, 1, "", TV_H_LUMA_0+0x4c, 0x2c802f50, 0}, -{W, 1, "", TV_H_LUMA_0+0x50, 0xb10032a0, 0}, -{W, 1, "", TV_H_LUMA_0+0x54, 0xb1603000, 0}, -{W, 1, "", TV_H_LUMA_0+0x58, 0x2f9038c0, 0}, -{W, 1, "", TV_H_LUMA_0+0x5c, 0x32202c20, 0}, -{W, 1, "", TV_H_LUMA_0+0x60, 0x3000b0e0, 0}, -{W, 1, "", TV_H_LUMA_0+0x64, 0x3980b160, 0}, -{W, 1, "", TV_H_LUMA_0+0x68, 0x2bc02fc0, 0}, -{W, 1, "", TV_H_LUMA_0+0x6c, 0xb0e031c0, 0}, -{W, 1, "", TV_H_LUMA_0+0x70, 0xb1603000, 0}, -{W, 1, "", TV_H_LUMA_0+0x74, 0x2ff03a20, 0}, -{W, 1, "", TV_H_LUMA_0+0x78, 0x31602b60, 0}, -{W, 1, "", TV_H_LUMA_0+0x7c, 0xb020b0c0, 0}, -{W, 1, "", 0x68180, 0x3ae0b160, 0}, -{W, 1, "", 0x68184, 0x2b001810, 0}, -{W, 1, "", 0x68188, 0xb0c03120, 0}, -{W, 1, "", 0x6818c, 0xb140b020, 0}, -{W, 1, "", 0x68190, 0x18283ba0, 0}, -{W, 1, "", 0x68194, 0x30c02a80, 0}, -{W, 1, "", 0x68198, 0xb020b0a0, 0}, -{W, 1, "", 0x6819c, 0x3c60b140, 0}, -{W, 1, "", 0x681a0, 0x2a201838, 0}, -{W, 1, "", 0x681a4, 0xb0a03080, 0}, -{W, 1, "", 0x681a8, 0xb120b020, 0}, -{W, 1, "", 0x681ac, 0x18383d20, 0}, -{W, 1, "", 0x681b0, 0x304029c0, 0}, -{W, 1, "", 0x681b4, 0xb040b080, 0}, -{W, 1, "", 0x681b8, 0x3de0b100, 0}, -{W, 1, "", 0x681bc, 0x29601848, 0}, -{W, 1, "", 0x681c0, 0xb0803000, 0}, -{W, 1, "", 0x681c4, 0xb100b040, 0}, -{W, 1, "", 0x681c8, 0x18483ec0, 0}, -{W, 1, "", 0x681cc, 0xb0402900, 0}, -{W, 1, "", 0x681d0, 0xb040b060, 0}, -{W, 1, "", 0x681d4, 0x3f80b0c0, 0}, -{W, 1, "", 0x681d8, 0x28801858, 0}, -{W, 1, "", 0x681dc, 0xb060b080, 0}, -{W, 1, "", 0x681e0, 0xb0a0b060, 0}, -{W, 1, "", 0x681e4, 0x18602820, 0}, -{W, 1, "", 0x681e8, 0xb0a02820, 0}, -{W, 1, "", TV_H_LUMA_59, 0x0000b060, 0}, -{W, 1, "", TV_H_CHROMA_0, 0xb1403000, 0}, -{W, 1, "", TV_H_CHROMA_0+0x4, 0x2e203500, 0}, -{W, 1, "", TV_H_CHROMA_0+0x8, 0x35002e20, 0}, -{W, 1, "", TV_H_CHROMA_0+0xc, 0x3000b140, 0}, -{W, 1, "", TV_H_CHROMA_0+0x10, 0x35a0b160, 0}, -{W, 1, "", TV_H_CHROMA_0+0x14, 0x2dc02e80, 0}, -{W, 1, "", TV_H_CHROMA_0+0x18, 0xb1403480, 0}, -{W, 1, "", TV_H_CHROMA_0+0x1c, 0xb1603000, 0}, -{W, 1, "", TV_H_CHROMA_0+0x20, 0x2ea03640, 0}, -{W, 1, "", TV_H_CHROMA_0+0x24, 0x34002d80, 0}, -{W, 1, "", TV_H_CHROMA_0+0x28, 0x3000b120, 0}, -{W, 1, "", TV_H_CHROMA_0+0x2c, 0x36e0b160, 0}, -{W, 1, "", TV_H_CHROMA_0+0x30, 0x2d202ef0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x34, 0xb1203380, 0}, -{W, 1, "", TV_H_CHROMA_0+0x38, 0xb1603000, 0}, -{W, 1, "", TV_H_CHROMA_0+0x3c, 0x2f303780, 0}, -{W, 1, "", TV_H_CHROMA_0+0x40, 0x33002cc0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x44, 0x3000b100, 0}, -{W, 1, "", TV_H_CHROMA_0+0x48, 0x3820b160, 0}, -{W, 1, "", TV_H_CHROMA_0+0x4c, 0x2c802f50, 0}, -{W, 1, "", TV_H_CHROMA_0+0x50, 0xb10032a0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x54, 0xb1603000, 0}, -{W, 1, "", TV_H_CHROMA_0+0x58, 0x2f9038c0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x5c, 0x32202c20, 0}, -{W, 1, "", TV_H_CHROMA_0+0x60, 0x3000b0e0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x64, 0x3980b160, 0}, -{W, 1, "", TV_H_CHROMA_0+0x68, 0x2bc02fc0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x6c, 0xb0e031c0, 0}, -{W, 1, "", TV_H_CHROMA_0+0x70, 0xb1603000, 0}, -{W, 1, "", TV_H_CHROMA_0+0x74, 0x2ff03a20, 0}, -{W, 1, "", TV_H_CHROMA_0+0x78, 0x31602b60, 0}, -{W, 1, "", TV_H_CHROMA_0+0x7c, 0xb020b0c0, 0}, -{W, 1, "", 0x68280, 0x3ae0b160, 0}, -{W, 1, "", 0x68284, 0x2b001810, 0}, -{W, 1, "", 0x68288, 0xb0c03120, 0}, -{W, 1, "", 0x6828c, 0xb140b020, 0}, -{W, 1, "", 0x68290, 0x18283ba0, 0}, -{W, 1, "", 0x68294, 0x30c02a80, 0}, -{W, 1, "", 0x68298, 0xb020b0a0, 0}, -{W, 1, "", 0x6829c, 0x3c60b140, 0}, -{W, 1, "", 0x682a0, 0x2a201838, 0}, -{W, 1, "", 0x682a4, 0xb0a03080, 0}, -{W, 1, "", 0x682a8, 0xb120b020, 0}, -{W, 1, "", 0x682ac, 0x18383d20, 0}, -{W, 1, "", 0x682b0, 0x304029c0, 0}, -{W, 1, "", 0x682b4, 0xb040b080, 0}, -{W, 1, "", 0x682b8, 0x3de0b100, 0}, -{W, 1, "", 0x682bc, 0x29601848, 0}, -{W, 1, "", 0x682c0, 0xb0803000, 0}, -{W, 1, "", 0x682c4, 0xb100b040, 0}, -{W, 1, "", 0x682c8, 0x18483ec0, 0}, -{W, 1, "", 0x682cc, 0xb0402900, 0}, -{W, 1, "", 0x682d0, 0xb040b060, 0}, -{W, 1, "", 0x682d4, 0x3f80b0c0, 0}, -{W, 1, "", 0x682d8, 0x28801858, 0}, -{W, 1, "", 0x682dc, 0xb060b080, 0}, -{W, 1, "", 0x682e0, 0xb0a0b060, 0}, -{W, 1, "", 0x682e4, 0x18602820, 0}, -{W, 1, "", 0x682e8, 0xb0a02820, 0}, -{W, 1, "", TV_H_CHROMA_59, 0x0000b060, 0}, -{W, 1, "", TV_V_LUMA_0, 0x36403000, 0}, -{W, 1, "", TV_V_LUMA_0+0x4, 0x2d002cc0, 0}, -{W, 1, "", TV_V_LUMA_0+0x8, 0x30003640, 0}, -{W, 1, "", TV_V_LUMA_0+0xc, 0x2d0036c0, 0}, -{W, 1, "", TV_V_LUMA_0+0x10, 0x35c02cc0, 0}, -{W, 1, "", TV_V_LUMA_0+0x14, 0x37403000, 0}, -{W, 1, "", TV_V_LUMA_0+0x18, 0x2c802d40, 0}, -{W, 1, "", TV_V_LUMA_0+0x1c, 0x30003540, 0}, -{W, 1, "", TV_V_LUMA_0+0x20, 0x2d8037c0, 0}, -{W, 1, "", TV_V_LUMA_0+0x24, 0x34c02c40, 0}, -{W, 1, "", TV_V_LUMA_0+0x28, 0x38403000, 0}, -{W, 1, "", TV_V_LUMA_0+0x2c, 0x2bc02e00, 0}, -{W, 1, "", TV_V_LUMA_0+0x30, 0x30003440, 0}, -{W, 1, "", TV_V_LUMA_0+0x34, 0x2e2038c0, 0}, -{W, 1, "", TV_V_LUMA_0+0x38, 0x34002b80, 0}, -{W, 1, "", TV_V_LUMA_0+0x3c, 0x39803000, 0}, -{W, 1, "", TV_V_LUMA_0+0x40, 0x2b402e40, 0}, -{W, 1, "", TV_V_LUMA_0+0x44, 0x30003380, 0}, -{W, 1, "", TV_V_LUMA_0+0x48, 0x2e603a00, 0}, -{W, 1, "", TV_V_LUMA_0+0x4c, 0x33402b00, 0}, -{W, 1, "", TV_V_LUMA_0+0x50, 0x3a803040, 0}, -{W, 1, "", TV_V_LUMA_0+0x54, 0x2a802ea0, 0}, -{W, 1, "", TV_V_LUMA_0+0x58, 0x30403300, 0}, -{W, 1, "", TV_V_LUMA_0+0x5c, 0x2ec03b40, 0}, -{W, 1, "", TV_V_LUMA_0+0x60, 0x32802a40, 0}, -{W, 1, "", TV_V_LUMA_0+0x64, 0x3c003040, 0}, -{W, 1, "", TV_V_LUMA_0+0x68, 0x2a002ec0, 0}, -{W, 1, "", TV_V_LUMA_0+0x6c, 0x30803240, 0}, -{W, 1, "", TV_V_LUMA_0+0x70, 0x2ec03c80, 0}, -{W, 1, "", TV_V_LUMA_0+0x74, 0x320029c0, 0}, -{W, 1, "", TV_V_LUMA_0+0x78, 0x3d403080, 0}, -{W, 1, "", TV_V_LUMA_0+0x7c, 0x29402f00, 0}, -{W, 1, "", 0x68380, 0x308031c0, 0}, -{W, 1, "", 0x68384, 0x2f203dc0, 0}, -{W, 1, "", 0x68388, 0x31802900, 0}, -{W, 1, "", 0x6838c, 0x3e8030c0, 0}, -{W, 1, "", 0x68390, 0x28802f40, 0}, -{W, 1, "", 0x68394, 0x30c03140, 0}, -{W, 1, "", 0x68398, 0x2f203f40, 0}, -{W, 1, "", 0x6839c, 0x31402840, 0}, -{W, 1, "", 0x683a0, 0x28003100, 0}, -{W, 1, "", 0x683a4, 0x28002f00, 0}, -{W, 1, "", TV_V_LUMA_42, 0x00003100, 0}, -{W, 1, "", TV_V_CHROMA_0, 0x36403000, 0}, -{W, 1, "", TV_V_CHROMA_0+0x4, 0x2d002cc0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x8, 0x30003640, 0}, -{W, 1, "", TV_V_CHROMA_0+0xc, 0x2d0036c0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x10, 0x35c02cc0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x14, 0x37403000, 0}, -{W, 1, "", TV_V_CHROMA_0+0x18, 0x2c802d40, 0}, -{W, 1, "", TV_V_CHROMA_0+0x1c, 0x30003540, 0}, -{W, 1, "", TV_V_CHROMA_0+0x20, 0x2d8037c0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x24, 0x34c02c40, 0}, -{W, 1, "", TV_V_CHROMA_0+0x28, 0x38403000, 0}, -{W, 1, "", TV_V_CHROMA_0+0x2c, 0x2bc02e00, 0}, -{W, 1, "", TV_V_CHROMA_0+0x30, 0x30003440, 0}, -{W, 1, "", TV_V_CHROMA_0+0x34, 0x2e2038c0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x38, 0x34002b80, 0}, -{W, 1, "", TV_V_CHROMA_0+0x3c, 0x39803000, 0}, -{W, 1, "", TV_V_CHROMA_0+0x40, 0x2b402e40, 0}, -{W, 1, "", TV_V_CHROMA_0+0x44, 0x30003380, 0}, -{W, 1, "", TV_V_CHROMA_0+0x48, 0x2e603a00, 0}, -{W, 1, "", TV_V_CHROMA_0+0x4c, 0x33402b00, 0}, -{W, 1, "", TV_V_CHROMA_0+0x50, 0x3a803040, 0}, -{W, 1, "", TV_V_CHROMA_0+0x54, 0x2a802ea0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x58, 0x30403300, 0}, -{W, 1, "", TV_V_CHROMA_0+0x5c, 0x2ec03b40, 0}, -{W, 1, "", TV_V_CHROMA_0+0x60, 0x32802a40, 0}, -{W, 1, "", TV_V_CHROMA_0+0x64, 0x3c003040, 0}, -{W, 1, "", TV_V_CHROMA_0+0x68, 0x2a002ec0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x6c, 0x30803240, 0}, -{W, 1, "", TV_V_CHROMA_0+0x70, 0x2ec03c80, 0}, -{W, 1, "", TV_V_CHROMA_0+0x74, 0x320029c0, 0}, -{W, 1, "", TV_V_CHROMA_0+0x78, 0x3d403080, 0}, -{W, 1, "", TV_V_CHROMA_0+0x7c, 0x29402f00, 0}, -{W, 1, "", 0x68480, 0x308031c0, 0}, -{W, 1, "", 0x68484, 0x2f203dc0, 0}, -{W, 1, "", 0x68488, 0x31802900, 0}, -{W, 1, "", 0x6848c, 0x3e8030c0, 0}, -{W, 1, "", 0x68490, 0x28802f40, 0}, -{W, 1, "", 0x68494, 0x30c03140, 0}, -{W, 1, "", 0x68498, 0x2f203f40, 0}, -{W, 1, "", 0x6849c, 0x31402840, 0}, -{W, 1, "", 0x684a0, 0x28003100, 0}, -{W, 1, "", 0x684a4, 0x28002f00, 0}, -{W, 1, "", TV_V_CHROMA_42, 0x00003100, 0}, -{R, 1, "", TV_DAC, 0x70000000, 0}, -{W, 1, "", TV_DAC, 0x00000000, 0}, -{W, 1, "", TV_CTL, 0x000c0000, 0}, {R, 2, "", DSPARB, (DSPARB_CSTART_SHIFT & 0x4) | 0x00001d9c, 0}, {W, 1, "", INSTPM+0x20, FW_BLC_SELF_EN_MASK | 0x80000000, 0}, {W, 1, "", INSTPM+0x20, 0x0001002f, 0}, @@ -517,293 +158,24 @@ struct iodef iodefs[] = { {W, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {R, 2, "", _PIPEASTAT, 0x00000000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, -{W, 1, "", _PALETTE_A, 0x00000000, 0}, -{W, 1, "", _PALETTE_A+0x4, 0x00010101, 0}, -{W, 1, "", _PALETTE_A+0x8, 0x00020202, 0}, -{W, 1, "", _PALETTE_A+0xc, 0x00030303, 0}, -{W, 1, "", _PALETTE_A+0x10, 0x00040404, 0}, -{W, 1, "", _PALETTE_A+0x14, 0x00050505, 0}, -{W, 1, "", _PALETTE_A+0x18, 0x00060606, 0}, -{W, 1, "", _PALETTE_A+0x1c, 0x00070707, 0}, -{W, 1, "", _PALETTE_A+0x20, 0x00080808, 0}, -{W, 1, "", _PALETTE_A+0x24, 0x00090909, 0}, -{W, 1, "", _PALETTE_A+0x28, 0x000a0a0a, 0}, -{W, 1, "", _PALETTE_A+0x2c, 0x000b0b0b, 0}, -{W, 1, "", _PALETTE_A+0x30, 0x000c0c0c, 0}, -{W, 1, "", _PALETTE_A+0x34, 0x000d0d0d, 0}, -{W, 1, "", _PALETTE_A+0x38, 0x000e0e0e, 0}, -{W, 1, "", _PALETTE_A+0x3c, 0x000f0f0f, 0}, -{W, 1, "", _PALETTE_A+0x40, 0x00101010, 0}, -{W, 1, "", _PALETTE_A+0x44, 0x00111111, 0}, -{W, 1, "", _PALETTE_A+0x48, 0x00121212, 0}, -{W, 1, "", _PALETTE_A+0x4c, 0x00131313, 0}, -{W, 1, "", _PALETTE_A+0x50, 0x00141414, 0}, -{W, 1, "", _PALETTE_A+0x54, 0x00151515, 0}, -{W, 1, "", _PALETTE_A+0x58, 0x00161616, 0}, -{W, 1, "", _PALETTE_A+0x5c, 0x00171717, 0}, -{W, 1, "", _PALETTE_A+0x60, 0x00181818, 0}, -{W, 1, "", _PALETTE_A+0x64, 0x00191919, 0}, -{W, 1, "", _PALETTE_A+0x68, 0x001a1a1a, 0}, -{W, 1, "", _PALETTE_A+0x6c, 0x001b1b1b, 0}, -{W, 1, "", _PALETTE_A+0x70, 0x001c1c1c, 0}, -{W, 1, "", _PALETTE_A+0x74, 0x001d1d1d, 0}, -{W, 1, "", _PALETTE_A+0x78, 0x001e1e1e, 0}, -{W, 1, "", _PALETTE_A+0x7c, 0x001f1f1f, 0}, -{W, 1, "", 0xa080, 0x00202020, 0}, -{W, 1, "", 0xa084, 0x00212121, 0}, -{W, 1, "", 0xa088, 0x00222222, 0}, -{W, 1, "", 0xa08c, 0x00232323, 0}, -{W, 1, "", 0xa090, 0x00242424, 0}, -{W, 1, "", 0xa094, 0x00252525, 0}, -{W, 1, "", 0xa098, 0x00262626, 0}, -{W, 1, "", 0xa09c, 0x00272727, 0}, -{W, 1, "", 0xa0a0, 0x00282828, 0}, -{W, 1, "", 0xa0a4, 0x00292929, 0}, -{W, 1, "", 0xa0a8, 0x002a2a2a, 0}, -{W, 1, "", 0xa0ac, 0x002b2b2b, 0}, -{W, 1, "", 0xa0b0, 0x002c2c2c, 0}, -{W, 1, "", 0xa0b4, 0x002d2d2d, 0}, -{W, 1, "", 0xa0b8, 0x002e2e2e, 0}, -{W, 1, "", 0xa0bc, 0x002f2f2f, 0}, -{W, 1, "", 0xa0c0, 0x00303030, 0}, -{W, 1, "", 0xa0c4, 0x00313131, 0}, -{W, 1, "", 0xa0c8, 0x00323232, 0}, -{W, 1, "", 0xa0cc, 0x00333333, 0}, -{W, 1, "", 0xa0d0, 0x00343434, 0}, -{W, 1, "", 0xa0d4, 0x00353535, 0}, -{W, 1, "", 0xa0d8, 0x00363636, 0}, -{W, 1, "", 0xa0dc, 0x00373737, 0}, -{W, 1, "", 0xa0e0, 0x00383838, 0}, -{W, 1, "", 0xa0e4, 0x00393939, 0}, -{W, 1, "", 0xa0e8, 0x003a3a3a, 0}, -{W, 1, "", 0xa0ec, 0x003b3b3b, 0}, -{W, 1, "", 0xa0f0, 0x003c3c3c, 0}, -{W, 1, "", 0xa0f4, 0x003d3d3d, 0}, -{W, 1, "", 0xa0f8, 0x003e3e3e, 0}, -{W, 1, "", 0xa0fc, 0x003f3f3f, 0}, -{W, 1, "", 0xa100, 0x00404040, 0}, -{W, 1, "", 0xa104, 0x00414141, 0}, -{W, 1, "", 0xa108, 0x00424242, 0}, -{W, 1, "", 0xa10c, 0x00434343, 0}, -{W, 1, "", 0xa110, 0x00444444, 0}, -{W, 1, "", 0xa114, 0x00454545, 0}, -{W, 1, "", 0xa118, 0x00464646, 0}, -{W, 1, "", 0xa11c, 0x00474747, 0}, -{W, 1, "", 0xa120, 0x00484848, 0}, -{W, 1, "", 0xa124, 0x00494949, 0}, -{W, 1, "", 0xa128, 0x004a4a4a, 0}, -{W, 1, "", 0xa12c, 0x004b4b4b, 0}, -{W, 1, "", 0xa130, 0x004c4c4c, 0}, -{W, 1, "", 0xa134, 0x004d4d4d, 0}, -{W, 1, "", 0xa138, 0x004e4e4e, 0}, -{W, 1, "", 0xa13c, 0x004f4f4f, 0}, -{W, 1, "", 0xa140, 0x00505050, 0}, -{W, 1, "", 0xa144, 0x00515151, 0}, -{W, 1, "", 0xa148, 0x00525252, 0}, -{W, 1, "", 0xa14c, 0x00535353, 0}, -{W, 1, "", 0xa150, 0x00545454, 0}, -{W, 1, "", 0xa154, 0x00555555, 0}, -{W, 1, "", 0xa158, 0x00565656, 0}, -{W, 1, "", 0xa15c, 0x00575757, 0}, -{W, 1, "", 0xa160, 0x00585858, 0}, -{W, 1, "", 0xa164, 0x00595959, 0}, -{W, 1, "", 0xa168, 0x005a5a5a, 0}, -{W, 1, "", 0xa16c, 0x005b5b5b, 0}, -{W, 1, "", 0xa170, 0x005c5c5c, 0}, -{W, 1, "", 0xa174, 0x005d5d5d, 0}, -{W, 1, "", 0xa178, 0x005e5e5e, 0}, -{W, 1, "", 0xa17c, 0x005f5f5f, 0}, -{W, 1, "", 0xa180, 0x00606060, 0}, -{W, 1, "", 0xa184, 0x00616161, 0}, -{W, 1, "", FORCEWAKE_MT, 0x00626262, 0}, -{W, 1, "", FORCEWAKE, 0x00636363, 0}, -{W, 1, "", 0xa190, 0x00646464, 0}, -{W, 1, "", 0xa194, 0x00656565, 0}, -{W, 1, "", 0xa198, 0x00666666, 0}, -{W, 1, "", 0xa19c, 0x00676767, 0}, -{W, 1, "", 0xa1a0, 0x00686868, 0}, -{W, 1, "", 0xa1a4, 0x00696969, 0}, -{W, 1, "", 0xa1a8, 0x006a6a6a, 0}, -{W, 1, "", 0xa1ac, 0x006b6b6b, 0}, -{W, 1, "", 0xa1b0, 0x006c6c6c, 0}, -{W, 1, "", 0xa1b4, 0x006d6d6d, 0}, -{W, 1, "", 0xa1b8, 0x006e6e6e, 0}, -{W, 1, "", 0xa1bc, 0x006f6f6f, 0}, -{W, 1, "", 0xa1c0, 0x00707070, 0}, -{W, 1, "", 0xa1c4, 0x00717171, 0}, -{W, 1, "", 0xa1c8, 0x00727272, 0}, -{W, 1, "", 0xa1cc, 0x00737373, 0}, -{W, 1, "", 0xa1d0, 0x00747474, 0}, -{W, 1, "", 0xa1d4, 0x00757575, 0}, -{W, 1, "", 0xa1d8, 0x00767676, 0}, -{W, 1, "", 0xa1dc, 0x00777777, 0}, -{W, 1, "", 0xa1e0, 0x00787878, 0}, -{W, 1, "", 0xa1e4, 0x00797979, 0}, -{W, 1, "", 0xa1e8, 0x007a7a7a, 0}, -{W, 1, "", 0xa1ec, 0x007b7b7b, 0}, -{W, 1, "", 0xa1f0, 0x007c7c7c, 0}, -{W, 1, "", 0xa1f4, 0x007d7d7d, 0}, -{W, 1, "", 0xa1f8, 0x007e7e7e, 0}, -{W, 1, "", 0xa1fc, 0x007f7f7f, 0}, -{W, 1, "", 0xa200, 0x00808080, 0}, -{W, 1, "", 0xa204, 0x00818181, 0}, -{W, 1, "", 0xa208, 0x00828282, 0}, -{W, 1, "", 0xa20c, 0x00838383, 0}, -{W, 1, "", 0xa210, 0x00848484, 0}, -{W, 1, "", 0xa214, 0x00858585, 0}, -{W, 1, "", 0xa218, 0x00868686, 0}, -{W, 1, "", 0xa21c, 0x00878787, 0}, -{W, 1, "", 0xa220, 0x00888888, 0}, -{W, 1, "", 0xa224, 0x00898989, 0}, -{W, 1, "", 0xa228, 0x008a8a8a, 0}, -{W, 1, "", 0xa22c, 0x008b8b8b, 0}, -{W, 1, "", 0xa230, 0x008c8c8c, 0}, -{W, 1, "", 0xa234, 0x008d8d8d, 0}, -{W, 1, "", 0xa238, 0x008e8e8e, 0}, -{W, 1, "", 0xa23c, 0x008f8f8f, 0}, -{W, 1, "", 0xa240, 0x00909090, 0}, -{W, 1, "", 0xa244, 0x00919191, 0}, -{W, 1, "", 0xa248, 0x00929292, 0}, -{W, 1, "", 0xa24c, 0x00939393, 0}, -{W, 1, "", 0xa250, 0x00949494, 0}, -{W, 1, "", 0xa254, 0x00959595, 0}, -{W, 1, "", 0xa258, 0x00969696, 0}, -{W, 1, "", 0xa25c, 0x00979797, 0}, -{W, 1, "", 0xa260, 0x00989898, 0}, -{W, 1, "", 0xa264, 0x00999999, 0}, -{W, 1, "", 0xa268, 0x009a9a9a, 0}, -{W, 1, "", 0xa26c, 0x009b9b9b, 0}, -{W, 1, "", 0xa270, 0x009c9c9c, 0}, -{W, 1, "", 0xa274, 0x009d9d9d, 0}, -{W, 1, "", 0xa278, 0x009e9e9e, 0}, -{W, 1, "", 0xa27c, 0x009f9f9f, 0}, -{W, 1, "", 0xa280, 0x00a0a0a0, 0}, -{W, 1, "", 0xa284, 0x00a1a1a1, 0}, -{W, 1, "", 0xa288, 0x00a2a2a2, 0}, -{W, 1, "", 0xa28c, 0x00a3a3a3, 0}, -{W, 1, "", 0xa290, 0x00a4a4a4, 0}, -{W, 1, "", 0xa294, 0x00a5a5a5, 0}, -{W, 1, "", 0xa298, 0x00a6a6a6, 0}, -{W, 1, "", 0xa29c, 0x00a7a7a7, 0}, -{W, 1, "", 0xa2a0, 0x00a8a8a8, 0}, -{W, 1, "", 0xa2a4, 0x00a9a9a9, 0}, -{W, 1, "", 0xa2a8, 0x00aaaaaa, 0}, -{W, 1, "", 0xa2ac, 0x00ababab, 0}, -{W, 1, "", 0xa2b0, 0x00acacac, 0}, -{W, 1, "", 0xa2b4, 0x00adadad, 0}, -{W, 1, "", 0xa2b8, 0x00aeaeae, 0}, -{W, 1, "", 0xa2bc, 0x00afafaf, 0}, -{W, 1, "", 0xa2c0, 0x00b0b0b0, 0}, -{W, 1, "", 0xa2c4, 0x00b1b1b1, 0}, -{W, 1, "", 0xa2c8, 0x00b2b2b2, 0}, -{W, 1, "", 0xa2cc, 0x00b3b3b3, 0}, -{W, 1, "", 0xa2d0, 0x00b4b4b4, 0}, -{W, 1, "", 0xa2d4, 0x00b5b5b5, 0}, -{W, 1, "", 0xa2d8, 0x00b6b6b6, 0}, -{W, 1, "", 0xa2dc, 0x00b7b7b7, 0}, -{W, 1, "", 0xa2e0, 0x00b8b8b8, 0}, -{W, 1, "", 0xa2e4, 0x00b9b9b9, 0}, -{W, 1, "", 0xa2e8, 0x00bababa, 0}, -{W, 1, "", 0xa2ec, 0x00bbbbbb, 0}, -{W, 1, "", 0xa2f0, 0x00bcbcbc, 0}, -{W, 1, "", 0xa2f4, 0x00bdbdbd, 0}, -{W, 1, "", 0xa2f8, 0x00bebebe, 0}, -{W, 1, "", 0xa2fc, 0x00bfbfbf, 0}, -{W, 1, "", 0xa300, 0x00c0c0c0, 0}, -{W, 1, "", 0xa304, 0x00c1c1c1, 0}, -{W, 1, "", 0xa308, 0x00c2c2c2, 0}, -{W, 1, "", 0xa30c, 0x00c3c3c3, 0}, -{W, 1, "", 0xa310, 0x00c4c4c4, 0}, -{W, 1, "", 0xa314, 0x00c5c5c5, 0}, -{W, 1, "", 0xa318, 0x00c6c6c6, 0}, -{W, 1, "", 0xa31c, 0x00c7c7c7, 0}, -{W, 1, "", 0xa320, 0x00c8c8c8, 0}, -{W, 1, "", 0xa324, 0x00c9c9c9, 0}, -{W, 1, "", 0xa328, 0x00cacaca, 0}, -{W, 1, "", 0xa32c, 0x00cbcbcb, 0}, -{W, 1, "", 0xa330, 0x00cccccc, 0}, -{W, 1, "", 0xa334, 0x00cdcdcd, 0}, -{W, 1, "", 0xa338, 0x00cecece, 0}, -{W, 1, "", 0xa33c, 0x00cfcfcf, 0}, -{W, 1, "", 0xa340, 0x00d0d0d0, 0}, -{W, 1, "", 0xa344, 0x00d1d1d1, 0}, -{W, 1, "", 0xa348, 0x00d2d2d2, 0}, -{W, 1, "", 0xa34c, 0x00d3d3d3, 0}, -{W, 1, "", 0xa350, 0x00d4d4d4, 0}, -{W, 1, "", 0xa354, 0x00d5d5d5, 0}, -{W, 1, "", 0xa358, 0x00d6d6d6, 0}, -{W, 1, "", 0xa35c, 0x00d7d7d7, 0}, -{W, 1, "", 0xa360, 0x00d8d8d8, 0}, -{W, 1, "", 0xa364, 0x00d9d9d9, 0}, -{W, 1, "", 0xa368, 0x00dadada, 0}, -{W, 1, "", 0xa36c, 0x00dbdbdb, 0}, -{W, 1, "", 0xa370, 0x00dcdcdc, 0}, -{W, 1, "", 0xa374, 0x00dddddd, 0}, -{W, 1, "", 0xa378, 0x00dedede, 0}, -{W, 1, "", 0xa37c, 0x00dfdfdf, 0}, -{W, 1, "", 0xa380, 0x00e0e0e0, 0}, -{W, 1, "", 0xa384, 0x00e1e1e1, 0}, -{W, 1, "", 0xa388, 0x00e2e2e2, 0}, -{W, 1, "", 0xa38c, 0x00e3e3e3, 0}, -{W, 1, "", 0xa390, 0x00e4e4e4, 0}, -{W, 1, "", 0xa394, 0x00e5e5e5, 0}, -{W, 1, "", 0xa398, 0x00e6e6e6, 0}, -{W, 1, "", 0xa39c, 0x00e7e7e7, 0}, -{W, 1, "", 0xa3a0, 0x00e8e8e8, 0}, -{W, 1, "", 0xa3a4, 0x00e9e9e9, 0}, -{W, 1, "", 0xa3a8, 0x00eaeaea, 0}, -{W, 1, "", 0xa3ac, 0x00ebebeb, 0}, -{W, 1, "", 0xa3b0, 0x00ececec, 0}, -{W, 1, "", 0xa3b4, 0x00ededed, 0}, -{W, 1, "", 0xa3b8, 0x00eeeeee, 0}, -{W, 1, "", 0xa3bc, 0x00efefef, 0}, -{W, 1, "", 0xa3c0, 0x00f0f0f0, 0}, -{W, 1, "", 0xa3c4, 0x00f1f1f1, 0}, -{W, 1, "", 0xa3c8, 0x00f2f2f2, 0}, -{W, 1, "", 0xa3cc, 0x00f3f3f3, 0}, -{W, 1, "", 0xa3d0, 0x00f4f4f4, 0}, -{W, 1, "", 0xa3d4, 0x00f5f5f5, 0}, -{W, 1, "", 0xa3d8, 0x00f6f6f6, 0}, -{W, 1, "", 0xa3dc, 0x00f7f7f7, 0}, -{W, 1, "", 0xa3e0, 0x00f8f8f8, 0}, -{W, 1, "", 0xa3e4, 0x00f9f9f9, 0}, -{W, 1, "", 0xa3e8, 0x00fafafa, 0}, -{W, 1, "", 0xa3ec, 0x00fbfbfb, 0}, -{W, 1, "", 0xa3f0, 0x00fcfcfc, 0}, -{W, 1, "", 0xa3f4, 0x00fdfdfd, 0}, -{W, 1, "", 0xa3f8, 0x00fefefe, 0}, -{W, 1, "", 0xa3fc, 0x00ffffff, 0}, -{R, 1, "", TV_CTL, 0x000c0000, 0}, -{W, 1, "", TV_CTL, 0x800c0000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 2, "", TV_CTL, 0x800c0000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x800c0000, 0}, {R, 1, "", _PIPEACONF, PIPECONF_ENABLE | 0x80000000, 0}, {R, 1, "", _PIPEBCONF, 0x00000000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {W, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {R, 2, "", _PIPEASTAT, 0x00000000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, -{R, 1, "", TV_DAC, 0x70000000, 0}, -{R, 1, "", TV_CTL, 0x800c0000, 0}, -{W, 1, "", TV_CTL, 0x000c0007, 0}, -{W, 1, "", TV_DAC, 0x0f0000aa, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {W, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {R, 2, "", _PIPEASTAT, 0x00000000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, -{R, 1, "", TV_DAC, 0x7f0000aa, 0}, -{W, 1, "", TV_DAC, 0x70000000, 0}, -{W, 1, "", TV_CTL, 0x800c0000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {W, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, {R, 4, "", _PIPEASTAT, 0x00000000, 0}, {R, 1, "", _PIPEASTAT, PIPE_VSYNC_INTERRUPT_STATUS | PIPE_VBLANK_INTERRUPT_STATUS | PIPE_OVERLAY_UPDATED_STATUS | 0x00000203, 0}, -{R, 1, "", TV_CTL, 0x800c0000, 0}, -{W, 1, "", TV_CTL, 0x000c0000, 0}, {W, 1, "", INSTPM, 0x08000800, 0}, {R, 1, "", _PIPEACONF, PIPECONF_ENABLE | 0x80000000, 0}, {R, 1, "", _PIPEA_FRMCOUNT_GM45, 0x00000000, 0}, @@ -898,10 +270,8 @@ struct iodef iodefs[] = { {R, 1, "", _PIPEACONF, 0x00000000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x000c0000, 0}, {R, 1, "", LVDS, 0x40000000, 0}, {R, 1, "", _FDI_TXB_CTL, 0x00000000, 0}, -{R, 1, "", TV_CTL, 0x000c0000, 0}, {R, 1, "", _PIPEACONF, 0x00000000, 0}, {R, 1, "", _PIPEBCONF, 0x00000000, 0}, {M, 1, "fbcon:inteldrmfb (fb0) is primary device", 0x0, 0x0, 0}, @@ -963,1310 +333,10 @@ struct iodef iodefs[] = { {W, 1, "", _PIPEBSTAT, 0x00000202, 0}, {R, 3, "", _PIPEBSTAT, 0x00000000, 0}, {R, 1, "", _PIPEBSTAT, 0x00000202, 0}, -{W, 1, "", _PALETTE_B, 0x00000000, 0}, -{W, 1, "", _PALETTE_B+0x4, 0x00010101, 0}, -{W, 1, "", _PALETTE_B+0x8, 0x00020202, 0}, -{W, 1, "", _PALETTE_B+0xc, 0x00030303, 0}, -{W, 1, "", _PALETTE_B+0x10, 0x00040404, 0}, -{W, 1, "", _PALETTE_B+0x14, 0x00050505, 0}, -{W, 1, "", _PALETTE_B+0x18, 0x00060606, 0}, -{W, 1, "", _PALETTE_B+0x1c, 0x00070707, 0}, -{W, 1, "", _PALETTE_B+0x20, 0x00080808, 0}, -{W, 1, "", _PALETTE_B+0x24, 0x00090909, 0}, -{W, 1, "", _PALETTE_B+0x28, 0x000a0a0a, 0}, -{W, 1, "", _PALETTE_B+0x2c, 0x000b0b0b, 0}, -{W, 1, "", _PALETTE_B+0x30, 0x000c0c0c, 0}, -{W, 1, "", _PALETTE_B+0x34, 0x000d0d0d, 0}, -{W, 1, "", _PALETTE_B+0x38, 0x000e0e0e, 0}, -{W, 1, "", _PALETTE_B+0x3c, 0x000f0f0f, 0}, -{W, 1, "", _PALETTE_B+0x40, 0x00101010, 0}, -{W, 1, "", _PALETTE_B+0x44, 0x00111111, 0}, -{W, 1, "", _PALETTE_B+0x48, 0x00121212, 0}, -{W, 1, "", _PALETTE_B+0x4c, 0x00131313, 0}, -{W, 1, "", _PALETTE_B+0x50, 0x00141414, 0}, -{W, 1, "", _PALETTE_B+0x54, 0x00151515, 0}, -{W, 1, "", _PALETTE_B+0x58, 0x00161616, 0}, -{W, 1, "", _PALETTE_B+0x5c, 0x00171717, 0}, -{W, 1, "", _PALETTE_B+0x60, 0x00181818, 0}, -{W, 1, "", _PALETTE_B+0x64, 0x00191919, 0}, -{W, 1, "", _PALETTE_B+0x68, 0x001a1a1a, 0}, -{W, 1, "", _PALETTE_B+0x6c, 0x001b1b1b, 0}, -{W, 1, "", _PALETTE_B+0x70, 0x001c1c1c, 0}, -{W, 1, "", _PALETTE_B+0x74, 0x001d1d1d, 0}, -{W, 1, "", _PALETTE_B+0x78, 0x001e1e1e, 0}, -{W, 1, "", _PALETTE_B+0x7c, 0x001f1f1f, 0}, -{W, 1, "", 0xa880, 0x00202020, 0}, -{W, 1, "", 0xa884, 0x00212121, 0}, -{W, 1, "", 0xa888, 0x00222222, 0}, -{W, 1, "", 0xa88c, 0x00232323, 0}, -{W, 1, "", 0xa890, 0x00242424, 0}, -{W, 1, "", 0xa894, 0x00252525, 0}, -{W, 1, "", 0xa898, 0x00262626, 0}, -{W, 1, "", 0xa89c, 0x00272727, 0}, -{W, 1, "", 0xa8a0, 0x00282828, 0}, -{W, 1, "", 0xa8a4, 0x00292929, 0}, -{W, 1, "", 0xa8a8, 0x002a2a2a, 0}, -{W, 1, "", 0xa8ac, 0x002b2b2b, 0}, -{W, 1, "", 0xa8b0, 0x002c2c2c, 0}, -{W, 1, "", 0xa8b4, 0x002d2d2d, 0}, -{W, 1, "", 0xa8b8, 0x002e2e2e, 0}, -{W, 1, "", 0xa8bc, 0x002f2f2f, 0}, -{W, 1, "", 0xa8c0, 0x00303030, 0}, -{W, 1, "", 0xa8c4, 0x00313131, 0}, -{W, 1, "", 0xa8c8, 0x00323232, 0}, -{W, 1, "", 0xa8cc, 0x00333333, 0}, -{W, 1, "", 0xa8d0, 0x00343434, 0}, -{W, 1, "", 0xa8d4, 0x00353535, 0}, -{W, 1, "", 0xa8d8, 0x00363636, 0}, -{W, 1, "", 0xa8dc, 0x00373737, 0}, -{W, 1, "", 0xa8e0, 0x00383838, 0}, -{W, 1, "", 0xa8e4, 0x00393939, 0}, -{W, 1, "", 0xa8e8, 0x003a3a3a, 0}, -{W, 1, "", 0xa8ec, 0x003b3b3b, 0}, -{W, 1, "", 0xa8f0, 0x003c3c3c, 0}, -{W, 1, "", 0xa8f4, 0x003d3d3d, 0}, -{W, 1, "", 0xa8f8, 0x003e3e3e, 0}, -{W, 1, "", 0xa8fc, 0x003f3f3f, 0}, -{W, 1, "", 0xa900, 0x00404040, 0}, -{W, 1, "", 0xa904, 0x00414141, 0}, -{W, 1, "", 0xa908, 0x00424242, 0}, -{W, 1, "", 0xa90c, 0x00434343, 0}, -{W, 1, "", 0xa910, 0x00444444, 0}, -{W, 1, "", 0xa914, 0x00454545, 0}, -{W, 1, "", 0xa918, 0x00464646, 0}, -{W, 1, "", 0xa91c, 0x00474747, 0}, -{W, 1, "", 0xa920, 0x00484848, 0}, -{W, 1, "", 0xa924, 0x00494949, 0}, -{W, 1, "", 0xa928, 0x004a4a4a, 0}, -{W, 1, "", 0xa92c, 0x004b4b4b, 0}, -{W, 1, "", 0xa930, 0x004c4c4c, 0}, -{W, 1, "", 0xa934, 0x004d4d4d, 0}, -{W, 1, "", 0xa938, 0x004e4e4e, 0}, -{W, 1, "", 0xa93c, 0x004f4f4f, 0}, -{W, 1, "", 0xa940, 0x00505050, 0}, -{W, 1, "", 0xa944, 0x00515151, 0}, -{W, 1, "", 0xa948, 0x00525252, 0}, -{W, 1, "", 0xa94c, 0x00535353, 0}, -{W, 1, "", 0xa950, 0x00545454, 0}, -{W, 1, "", 0xa954, 0x00555555, 0}, -{W, 1, "", 0xa958, 0x00565656, 0}, -{W, 1, "", 0xa95c, 0x00575757, 0}, -{W, 1, "", 0xa960, 0x00585858, 0}, -{W, 1, "", 0xa964, 0x00595959, 0}, -{W, 1, "", 0xa968, 0x005a5a5a, 0}, -{W, 1, "", 0xa96c, 0x005b5b5b, 0}, -{W, 1, "", 0xa970, 0x005c5c5c, 0}, -{W, 1, "", 0xa974, 0x005d5d5d, 0}, -{W, 1, "", 0xa978, 0x005e5e5e, 0}, -{W, 1, "", 0xa97c, 0x005f5f5f, 0}, -{W, 1, "", 0xa980, 0x00606060, 0}, -{W, 1, "", 0xa984, 0x00616161, 0}, -{W, 1, "", 0xa988, 0x00626262, 0}, -{W, 1, "", 0xa98c, 0x00636363, 0}, -{W, 1, "", 0xa990, 0x00646464, 0}, -{W, 1, "", 0xa994, 0x00656565, 0}, -{W, 1, "", 0xa998, 0x00666666, 0}, -{W, 1, "", 0xa99c, 0x00676767, 0}, -{W, 1, "", 0xa9a0, 0x00686868, 0}, -{W, 1, "", 0xa9a4, 0x00696969, 0}, -{W, 1, "", 0xa9a8, 0x006a6a6a, 0}, -{W, 1, "", 0xa9ac, 0x006b6b6b, 0}, -{W, 1, "", 0xa9b0, 0x006c6c6c, 0}, -{W, 1, "", 0xa9b4, 0x006d6d6d, 0}, -{W, 1, "", 0xa9b8, 0x006e6e6e, 0}, -{W, 1, "", 0xa9bc, 0x006f6f6f, 0}, -{W, 1, "", 0xa9c0, 0x00707070, 0}, -{W, 1, "", 0xa9c4, 0x00717171, 0}, -{W, 1, "", 0xa9c8, 0x00727272, 0}, -{W, 1, "", 0xa9cc, 0x00737373, 0}, -{W, 1, "", 0xa9d0, 0x00747474, 0}, -{W, 1, "", 0xa9d4, 0x00757575, 0}, -{W, 1, "", 0xa9d8, 0x00767676, 0}, -{W, 1, "", 0xa9dc, 0x00777777, 0}, -{W, 1, "", 0xa9e0, 0x00787878, 0}, -{W, 1, "", 0xa9e4, 0x00797979, 0}, -{W, 1, "", 0xa9e8, 0x007a7a7a, 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1 0

Patch set updated for coreboot: 8511ff9 CAR_GLOBAL: don't use static, but hide variables instead
by Edward O'Callaghan 21 Feb '14

21 Feb '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4718 -gerrit commit 8511ff98d72c547fcf0b543758e422d754e8c8d4 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Thu Feb 20 20:29:26 2014 +1100 CAR_GLOBAL: don't use static, but hide variables instead attribute(section) isn't to be used on local variables and clang enforces that. Change-Id: Ie0d40946cd087e40f60f9d04e2eda56df75f26da Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/arch/x86/include/arch/early_variables.h | 4 ++-- src/cpu/x86/car.c | 2 +- src/cpu/x86/lapic/apic_timer.c | 2 +- src/drivers/emulation/qemu/qemu_debugcon.c | 2 +- src/drivers/pc80/tpm.c | 2 +- src/drivers/usb/ehci_debug.c | 2 +- src/lib/cbmem_console.c | 4 ++-- src/lib/timestamp.c | 6 +++--- src/vendorcode/google/chromeos/vbnv.c | 4 ++-- 9 files changed, 14 insertions(+), 14 deletions(-) diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h index ea1a133..0b3e263 100644 --- a/src/arch/x86/include/arch/early_variables.h +++ b/src/arch/x86/include/arch/early_variables.h @@ -25,8 +25,8 @@ asm(".section .car.global_data,\"w\",@nobits"); asm(".previous"); asm(".section .car.cbmem_console,\"w\",@nobits"); asm(".previous"); -#define CAR_GLOBAL __attribute__((section(".car.global_data"))) -#define CAR_CBMEM __attribute__((section(".car.cbmem_console"))) +#define CAR_GLOBAL __attribute__((section(".car.global_data"), visibility ("hidden"))) +#define CAR_CBMEM __attribute__((section(".car.cbmem_console"), visibility ("hidden"))) #else #define CAR_GLOBAL #define CAR_CBMEM diff --git a/src/cpu/x86/car.c b/src/cpu/x86/car.c index a7e3842..35e4704 100644 --- a/src/cpu/x86/car.c +++ b/src/cpu/x86/car.c @@ -39,7 +39,7 @@ extern char _car_data_end[]; * Based on these 2 attributes there is the ability to tell when the * cache-as-ram region has been migrated. */ -static int car_migrated CAR_GLOBAL; +int car_migrated CAR_GLOBAL; void *car_get_var_ptr(void *var) diff --git a/src/cpu/x86/lapic/apic_timer.c b/src/cpu/x86/lapic/apic_timer.c index 868fb92..5308567 100644 --- a/src/cpu/x86/lapic/apic_timer.c +++ b/src/cpu/x86/lapic/apic_timer.c @@ -41,7 +41,7 @@ static int set_timer_fsb(void) return 0; } #else -static u32 timer_fsb CAR_GLOBAL = 0; +u32 timer_fsb CAR_GLOBAL = 0; static int set_timer_fsb(void) { diff --git a/src/drivers/emulation/qemu/qemu_debugcon.c b/src/drivers/emulation/qemu/qemu_debugcon.c index 9c00585..a7def46 100644 --- a/src/drivers/emulation/qemu/qemu_debugcon.c +++ b/src/drivers/emulation/qemu/qemu_debugcon.c @@ -23,7 +23,7 @@ #include <arch/io.h> #include <arch/early_variables.h> -static int qemu_debugcon_detected CAR_GLOBAL; +int qemu_debugcon_detected CAR_GLOBAL; void qemu_debugcon_init(void) { diff --git a/src/drivers/pc80/tpm.c b/src/drivers/pc80/tpm.c index f581ab4..1955c2c 100644 --- a/src/drivers/pc80/tpm.c +++ b/src/drivers/pc80/tpm.c @@ -156,7 +156,7 @@ static const struct vendor_name vendor_names[] = { * Cached vendor/device ID pair to indicate that the device has been already * discovered */ -static u32 vendor_dev_id CAR_GLOBAL; +u32 vendor_dev_id CAR_GLOBAL; static inline u8 tpm_read_status(int locality) { diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index c60fbaa..e2f8b83 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -95,7 +95,7 @@ static int dbgp_enabled(void); #define DBGP_MICROFRAME_RETRIES 10 #define DBGP_MAX_PACKET 8 -static struct ehci_debug_info glob_dbg_info CAR_GLOBAL; +struct ehci_debug_info glob_dbg_info CAR_GLOBAL; static inline struct ehci_debug_info *dbgp_ehci_info(void) { diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 83d44e3..e517fd7 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -34,7 +34,7 @@ struct cbmem_console { u8 buffer_body[0]; } __attribute__ ((__packed__)); -static struct cbmem_console *cbmem_console_p CAR_GLOBAL; +struct cbmem_console *cbmem_console_p CAR_GLOBAL; #ifdef __PRE_RAM__ /* @@ -43,7 +43,7 @@ static struct cbmem_console *cbmem_console_p CAR_GLOBAL; * the area are defined in the config. */ -static struct cbmem_console car_cbmem_console CAR_CBMEM; +struct cbmem_console car_cbmem_console CAR_CBMEM; #else diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index f0ee48d..477d5fe 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -27,8 +27,8 @@ #define MAX_TIMESTAMPS 30 -static struct timestamp_table* ts_table_p CAR_GLOBAL = NULL; -static tsc_t ts_basetime CAR_GLOBAL = { .lo = 0, .hi =0 }; +struct timestamp_table* ts_table_p CAR_GLOBAL = NULL; +tsc_t ts_basetime CAR_GLOBAL = { .lo = 0, .hi =0 }; static void timestamp_stash(enum timestamp_id id, tsc_t ts_time); @@ -89,7 +89,7 @@ struct timestamp_cache { tsc_t time; } timestamp_cache[MAX_TIMESTAMP_CACHE] CAR_GLOBAL; -static int timestamp_entries CAR_GLOBAL = 0; +int timestamp_entries CAR_GLOBAL = 0; /** * timestamp_stash() allows to temporarily cache timestamps. diff --git a/src/vendorcode/google/chromeos/vbnv.c b/src/vendorcode/google/chromeos/vbnv.c index a13726d..8f04f1e 100644 --- a/src/vendorcode/google/chromeos/vbnv.c +++ b/src/vendorcode/google/chromeos/vbnv.c @@ -52,8 +52,8 @@ #define KERNEL_FIELD_OFFSET 11 #define CRC_OFFSET 15 -static int vbnv_initialized CAR_GLOBAL; -static uint8_t vbnv[CONFIG_VBNV_SIZE] CAR_GLOBAL; +int vbnv_initialized CAR_GLOBAL; +uint8_t vbnv[CONFIG_VBNV_SIZE] CAR_GLOBAL; /* Wrappers for accessing the variables marked as CAR_GLOBAL. */ static inline int is_vbnv_initialized(void)

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Patch set updated for coreboot: b50e003 vendorcode/amd/agesa/f*: Improve gcccar.inc assembler compatibility.
by Edward O'Callaghan 21 Feb '14

21 Feb '14

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5277 -gerrit commit b50e00300e0573b9c4e3bc709756809e3e57d677 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Fri Feb 21 12:43:07 2014 +1100 vendorcode/amd/agesa/f*: Improve gcccar.inc assembler compatibility. A comparison with a two's complement in gcccar.inc has dubious GAS/AT&T notation. Clang miss-parses 0x-1 as a invalid hexadecimal number. Change-Id: I88baa5c2513f062ff309df05916a3832b9bd9bb1 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/vendorcode/amd/agesa/f10/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f12/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f14/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f15/gcccar.inc | 2 +- src/vendorcode/amd/agesa/f15tn/gcccar.inc | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/src/vendorcode/amd/agesa/f10/gcccar.inc b/src/vendorcode/amd/agesa/f10/gcccar.inc index 61a8d3e..aa3c01f 100644 --- a/src/vendorcode/amd/agesa/f10/gcccar.inc +++ b/src/vendorcode/amd/agesa/f10/gcccar.inc @@ -827,7 +827,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-0x1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f12/gcccar.inc b/src/vendorcode/amd/agesa/f12/gcccar.inc index d7da81d..212b6b0 100644 --- a/src/vendorcode/amd/agesa/f12/gcccar.inc +++ b/src/vendorcode/amd/agesa/f12/gcccar.inc @@ -821,7 +821,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-0x1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f14/gcccar.inc b/src/vendorcode/amd/agesa/f14/gcccar.inc index 7037344..1fc9f22 100644 --- a/src/vendorcode/amd/agesa/f14/gcccar.inc +++ b/src/vendorcode/amd/agesa/f14/gcccar.inc @@ -835,7 +835,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-0x1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f15/gcccar.inc b/src/vendorcode/amd/agesa/f15/gcccar.inc index b20c77e..6891ddc 100644 --- a/src/vendorcode/amd/agesa/f15/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15/gcccar.inc @@ -842,7 +842,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-0x1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL diff --git a/src/vendorcode/amd/agesa/f15tn/gcccar.inc b/src/vendorcode/amd/agesa/f15tn/gcccar.inc index c76ad16..dd76561 100644 --- a/src/vendorcode/amd/agesa/f15tn/gcccar.inc +++ b/src/vendorcode/amd/agesa/f15tn/gcccar.inc @@ -875,7 +875,7 @@ fam14_disable_stack_hook_exit: LOCAL node_core_f14_exit - cmp $0x-1, %si # Has node/core already been discovered? + cmp $-0x1, %si # Has node/core already been discovered? jnz node_core_f14_exit # Br if yes AMD_CPUID $CPUID_MODEL

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Patch set updated for coreboot: 5dc47fa device: Do not show "framebuffer graphics resolution" with native init.
by Vladimir Serbinenko 21 Feb '14

21 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5281 -gerrit commit 5dc47fa122903c29101b898ac5b957eb71f25e0a Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Feb 21 08:38:27 2014 +0100 device: Do not show "framebuffer graphics resolution" with native init. No native init uses this. Real hardware ones use mode specified in EDID. Qemu one uses CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_[XY]RES. Change-Id: I0845fec10b9811e2be44b5be30b9dc4f1c9719a6 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/device/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/device/Kconfig b/src/device/Kconfig index 2d6e226..4b2d4b8 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -299,7 +299,7 @@ config FRAMEBUFFER_SET_VESA_MODE choice prompt "framebuffer graphics resolution" default FRAMEBUFFER_VESA_MODE_117 - depends on FRAMEBUFFER_SET_VESA_MODE || MAINBOARD_DO_NATIVE_VGA_INIT + depends on FRAMEBUFFER_SET_VESA_MODE help This option sets the resolution used for the coreboot framebuffer (and bootsplash screen).

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coreboot-gerrit February 2014