coreboot-gerrit September 2013

coreboot-gerrit@coreboot.org

1 participants
191 discussions

Patch set updated for coreboot: d4a0043 Fix compile errors in AMD Fam16 AGESA code with gcc 4.5.
by Wei Hu 20 Sep '13

20 Sep '13

Wei Hu (wei(a)aristanetworks.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3899 -gerrit commit d4a004371c5a13a5eef248ffd80982c4421c40f0 Author: Wei Hu <wei(a)aristanetworks.com> Date: Wed Sep 4 03:01:45 2013 -0700 Fix compile errors in AMD Fam16 AGESA code with gcc 4.5. Change-Id: I27f5b8d5d0e5559e06bf8bddbeefe24bfe71c384 Signed-off-by: Wei Hu <wei(a)aristanetworks.com> --- src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h | 4 ++-- src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h index 913802f..38d7d16 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h @@ -114,12 +114,12 @@ typedef F_HTC_INIT *PF_HTC_INIT; * Each supported Family must provide an implementation for all methods in this interface, even if the * implementation is a CommonReturn(). */ -typedef struct _HTC_FAMILY_SERVICES { +struct _HTC_FAMILY_SERVICES { UINT16 Revision; ///< Interface version // Public Methods. PF_HTC_IS_SUPPORTED IsHtcSupported; ///< Method: Family specific call to check if HTC is supported. PF_HTC_INIT EnableHtcOnSocket; ///< Method: Family specific call to enable HTC. -} HTC_FAMILY_SERVICES; +}; /*---------------------------------------------------------------------------------------- diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h index ad2a5e5..44f3837 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h @@ -114,12 +114,12 @@ typedef F_PSI_INIT *PF_PSI_INIT; * Each supported Family must provide an implementation for all methods in this interface, even if the * implementation is a CommonReturn(). */ -typedef struct _PSI_FAMILY_SERVICES { +struct _PSI_FAMILY_SERVICES { UINT16 Revision; ///< Interface version // Public Methods. PF_PSI_IS_SUPPORTED IsPsiSupported; ///< Method: Family specific call to check if PSI is supported. PF_PSI_INIT EnablePsiOnSocket; ///< Method: Family specific call to enable PSI. -} PSI_FAMILY_SERVICES; +}; /*----------------------------------------------------------------------------------------

1 0

Patch set updated for coreboot: f413397 Fix redefinition of typedef error in gcc 4.5.
by Wei Hu 20 Sep '13

20 Sep '13

Wei Hu (wei(a)aristanetworks.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3931 -gerrit commit f413397bd25dc971892ae6021839663f292d149c Author: Wei Hu <wei(a)aristanetworks.com> Date: Fri Sep 20 03:47:02 2013 -0700 Fix redefinition of typedef error in gcc 4.5. This was not legal in C99 but is now allowed in C11. http://stackoverflow.com/a/8595191/111391 Include two header files to bring in typedef pci_devfn_t. Tested with and without CONFIG_USBDEBUG. Change-Id: I72ac1d2227897a806739be4808bc999956da2d41 Signed-off-by: Wei Hu <wei(a)aristanetworks.com> --- src/include/usbdebug.h | 4 +++- src/southbridge/amd/cimx/sb800/SBPLATFORM.h | 3 ++- src/southbridge/amd/cimx/sb900/SbPlatform.h | 3 ++- 3 files changed, 7 insertions(+), 3 deletions(-) diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h index 926d658..0d5d8de 100644 --- a/src/include/usbdebug.h +++ b/src/include/usbdebug.h @@ -24,7 +24,9 @@ #define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ -typedef u32 pci_devfn_t; +#include <arch/io.h> +#include <device/device.h> + pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx); unsigned long pci_ehci_base_regs(pci_devfn_t dev); void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port); diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h index fa7d196..68f761f 100644 --- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h @@ -24,6 +24,8 @@ #ifndef _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_ +#include <console/console.h> + //#include "cbtypes.h" #ifdef NULL #undef NULL @@ -61,7 +63,6 @@ typedef union _PCI_ADDR { #define IMC_ENABLE_OVER_WRITE 0x01 #endif -#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include "SB800.h" diff --git a/src/southbridge/amd/cimx/sb900/SbPlatform.h b/src/southbridge/amd/cimx/sb900/SbPlatform.h index 36c186a..2357e5b 100644 --- a/src/southbridge/amd/cimx/sb900/SbPlatform.h +++ b/src/southbridge/amd/cimx/sb900/SbPlatform.h @@ -24,6 +24,8 @@ #ifndef _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_ +#include <console/console.h> + //#include "cbtypes.h" #ifdef NULL #undef NULL @@ -57,7 +59,6 @@ typedef union _PCI_ADDR { #endif #define FIXUP_PTR(ptr) ptr -#include <console/console.h> #include "AmdSbLib.h" #include "Amd.h" #include "Hudson-2.h"

1 0

Patch merged into coreboot/master: d2dac0a usbdebug: Allow an USB hub on the debug dongle
by gerrit＠coreboot.org 20 Sep '13

20 Sep '13

the following patch was just integrated into master: commit d2dac0a7d62c89b24eae9de17bcfdde1aea7a5b3 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Aug 23 23:33:16 2013 +0300 usbdebug: Allow an USB hub on the debug dongle Some development kits with USB 2.0 HS OTG have an USB hub instead of being directly connected to the USB host/device controller. Send the necessary initialisation sequence, using HUB CLASS requests of PORT_POWER and PORT_RESET to enable a pre-selected port number where a device supporting debug descriptor is located. This also adds the Kconfig option for BeagleBone. Change-Id: I7a5d0ba0962a9ca06bf3196232ed4a03bdfb2b06 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3925 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/3925 for details. -gerrit

1 0

New patch to review for coreboot: 5c82ca5 Fix redefinition of typedef error in gcc 4.5.
by Wei Hu 20 Sep '13

20 Sep '13

Wei Hu (wei(a)aristanetworks.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3931 -gerrit commit 5c82ca5be8de8c3729d71f9fbfd8de882b4176e0 Author: Wei Hu <wei(a)aristanetworks.com> Date: Fri Sep 20 03:47:02 2013 -0700 Fix redefinition of typedef error in gcc 4.5. This was not legal in C99 but is now allowed in C11. http://stackoverflow.com/a/8595191/111391 Include two header files to bring in typedef pci_devfn_t. Tested with and without CONFIG_USBDEBUG. Change-Id: I72ac1d2227897a806739be4808bc999956da2d41 Signed-off-by: Wei Hu <wei(a)aristanetworks.com> --- src/include/usbdebug.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/include/usbdebug.h b/src/include/usbdebug.h index 926d658..0d5d8de 100644 --- a/src/include/usbdebug.h +++ b/src/include/usbdebug.h @@ -24,7 +24,9 @@ #define EHCI_BAR_INDEX 0x10 #define PCI_EHCI_CLASSCODE 0x0c0320 /* USB2.0 with EHCI controller */ -typedef u32 pci_devfn_t; +#include <arch/io.h> +#include <device/device.h> + pci_devfn_t pci_ehci_dbg_dev(unsigned hcd_idx); unsigned long pci_ehci_base_regs(pci_devfn_t dev); void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port);

1 0

Patch set updated for coreboot: 569475d Fix compile errors in AMD Fam16 AGESA code with gcc 4.5.
by Wei Hu 20 Sep '13

20 Sep '13

Wei Hu (wei(a)aristanetworks.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3899 -gerrit commit 569475d2050fe628466c4b2d1153fae6d1835f98 Author: Wei Hu <wei(a)aristanetworks.com> Date: Wed Sep 4 03:01:45 2013 -0700 Fix compile errors in AMD Fam16 AGESA code with gcc 4.5. Change-Id: I27f5b8d5d0e5559e06bf8bddbeefe24bfe71c384 Signed-off-by: Wei Hu <wei(a)aristanetworks.com> --- src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h | 4 ++-- src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h index 913802f..38d7d16 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuHtc.h @@ -114,12 +114,12 @@ typedef F_HTC_INIT *PF_HTC_INIT; * Each supported Family must provide an implementation for all methods in this interface, even if the * implementation is a CommonReturn(). */ -typedef struct _HTC_FAMILY_SERVICES { +struct _HTC_FAMILY_SERVICES { UINT16 Revision; ///< Interface version // Public Methods. PF_HTC_IS_SUPPORTED IsHtcSupported; ///< Method: Family specific call to check if HTC is supported. PF_HTC_INIT EnableHtcOnSocket; ///< Method: Family specific call to enable HTC. -} HTC_FAMILY_SERVICES; +}; /*---------------------------------------------------------------------------------------- diff --git a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h index ad2a5e5..44f3837 100644 --- a/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h +++ b/src/vendorcode/amd/agesa/f16kb/Proc/CPU/Feature/cpuPsi.h @@ -114,12 +114,12 @@ typedef F_PSI_INIT *PF_PSI_INIT; * Each supported Family must provide an implementation for all methods in this interface, even if the * implementation is a CommonReturn(). */ -typedef struct _PSI_FAMILY_SERVICES { +struct _PSI_FAMILY_SERVICES { UINT16 Revision; ///< Interface version // Public Methods. PF_PSI_IS_SUPPORTED IsPsiSupported; ///< Method: Family specific call to check if PSI is supported. PF_PSI_INIT EnablePsiOnSocket; ///< Method: Family specific call to enable PSI. -} PSI_FAMILY_SERVICES; +}; /*----------------------------------------------------------------------------------------

1 0

Patch merged into coreboot/master: 8f485de ASUS F2A85-M: Correct and clean up PCIe config
by gerrit＠coreboot.org 19 Sep '13

19 Sep '13

the following patch was just integrated into master: commit 8f485dee0d38c1c5f1a29fa8840602774ef5f63d Author: Rudolf Marek <r.marek(a)assembler.cz> Date: Sat May 4 00:08:34 2013 +0200 ASUS F2A85-M: Correct and clean up PCIe config Assign the lanes correctly to the physical slots on the motherboard in `PlatformGnbPcie.c`. • UMI is connected to SB via 4x PCIe bridge 8. • The blue x16 slot is not shared with DDI and is routed through PCIe bridge 2. • The black x8 slot is in fact a x4 slot and uses all 4 GPPs from the CPU. • Assume that DDI is on out-of-PCIe-band lanes. Change-Id: I44c4c83e6a8e31d6150a602a0993972ac63105bd Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3194 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martin.roth(a)se-eng.com> Reviewed-by: David Hubbard <david.c.hubbard+coreboot(a)gmail.com> See http://review.coreboot.org/3194 for details. -gerrit

1 0

Patch set updated for coreboot: c0fda52 buildgcc: Downgrade to gcc 4.7.3, handle armv7-a
by Patrick Georgi 19 Sep '13

19 Sep '13

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3930 -gerrit commit c0fda52a633857cc4affc308dbeec502016e8096 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Thu Sep 19 10:57:58 2013 +0200 buildgcc: Downgrade to gcc 4.7.3, handle armv7-a gcc 4.8.x has issues with using ebp, which broke some builds, so downgrade. The problem also manifested elsewhere, so it's not necessarily our fault. While at it, gcc complained about "armv7a" where it seems to expect "armv7-a". Change-Id: I6f0c35f49709cb41022475bb47116c12ab1c7ee3 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- util/abuild/abuild | 2 +- util/crossgcc/buildgcc | 5 ++--- util/xcompile/xcompile | 2 +- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/util/abuild/abuild b/util/abuild/abuild index d419e87..6148757 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -366,7 +366,7 @@ function build_target done fi if [ "$found_crosscompiler" == "false" -a "$TARCH" == ARMV7 ];then - for prefix in armv7a-eabi- armv7a-cros-linux-gnueabi-; do + for prefix in armv7a-eabi- armv7-a-eabi- armv7a-cros-linux-gnueabi-; do if ${prefix}gcc --version > /dev/null 2> /dev/null ; then found_crosscompiler=true CROSS_COMPILE=$prefix diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index b8b90e7..ab3116a 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -33,7 +33,7 @@ GMP_VERSION=5.1.2 MPFR_VERSION=3.1.2 MPC_VERSION=1.0.1 LIBELF_VERSION=0.8.13 -GCC_VERSION=4.8.1 +GCC_VERSION=4.7.3 GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.23.2 GDB_VERSION=7.6 @@ -224,11 +224,10 @@ while true ; do done case "$TARGETARCH" in - armv7a-eabi) ;; i386-elf) ;; i386-mingw32) ;; i386*) TARGETARCH=i386-elf;; - arm*) TARGETARCH=armv7a-eabi;; + arm*) TARGETARCH=armv7-a-eabi;; aarch64*) TARGETARCH=aarch64-elf;; *) printf "${red}WARNING: Unsupported architecture $TARGETARCH.${NC}\n\n"; ;; esac diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index ff12217..de6084d 100644 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -140,7 +140,7 @@ SUPPORTED_ARCHITECTURE="x86 armv7" # ARM Architecture TARCH_armv7="armv7" TBFDARCH_armv7="littlearm" -TCLIST_armv7="armv7a" +TCLIST_armv7="armv7a armv7-a" TWIDTH_armv7="32" # X86 Architecture

1 0

New patch to review for coreboot: bf591f8 buildgcc: Downgrade to gcc 4.7.3, handle armv7-a
by Patrick Georgi 19 Sep '13

19 Sep '13

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3930 -gerrit commit bf591f83943b9b348eabbfed72a21a3a33418efe Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Thu Sep 19 10:57:58 2013 +0200 buildgcc: Downgrade to gcc 4.7.3, handle armv7-a gcc 4.8.x has issues with using ebp, which broke some builds, so downgrade. The problem also manifested elsewhere, so it's not necessarily our fault. While at it, gcc complained about "armv7a" where it seems to expect "armv7-a". Change-Id: I6f0c35f49709cb41022475bb47116c12ab1c7ee3 Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> --- util/crossgcc/buildgcc | 5 ++--- util/xcompile/xcompile | 2 +- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index b8b90e7..ab3116a 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -33,7 +33,7 @@ GMP_VERSION=5.1.2 MPFR_VERSION=3.1.2 MPC_VERSION=1.0.1 LIBELF_VERSION=0.8.13 -GCC_VERSION=4.8.1 +GCC_VERSION=4.7.3 GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.23.2 GDB_VERSION=7.6 @@ -224,11 +224,10 @@ while true ; do done case "$TARGETARCH" in - armv7a-eabi) ;; i386-elf) ;; i386-mingw32) ;; i386*) TARGETARCH=i386-elf;; - arm*) TARGETARCH=armv7a-eabi;; + arm*) TARGETARCH=armv7-a-eabi;; aarch64*) TARGETARCH=aarch64-elf;; *) printf "${red}WARNING: Unsupported architecture $TARGETARCH.${NC}\n\n"; ;; esac diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index ff12217..de6084d 100644 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -140,7 +140,7 @@ SUPPORTED_ARCHITECTURE="x86 armv7" # ARM Architecture TARCH_armv7="armv7" TBFDARCH_armv7="littlearm" -TCLIST_armv7="armv7a" +TCLIST_armv7="armv7a armv7-a" TWIDTH_armv7="32" # X86 Architecture

1 0

Patch merged into coreboot/master: ad690f2 qemu: q35: fix pci bar placement
by gerrit＠coreboot.org 18 Sep '13

18 Sep '13

the following patch was just integrated into master: commit ad690f2e8182b182b4c343d2238bb079e6bb8db2 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Tue Sep 17 10:35:43 2013 +0200 qemu: q35: fix pci bar placement Without this coreboot may (depends on the amount of memory) place the pci bars below 0xb0000000, then the linux kernel goes move them around so they are inside the window declared in the acpi tables. This breaks vesafb as the vga framebuffer gets moved after vgabios initialization. It's also not exactly nice to expect the OS fix our mess ;) Change-Id: If6b50ea863958eea71b567ccb7a06c6a28076111 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> Reviewed-on: http://review.coreboot.org/3927 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/3927 for details. -gerrit

1 0

Patch merged into coreboot/master: 3af0aa2 buildgcc: Use per-arch build directories
by gerrit＠coreboot.org 18 Sep '13

18 Sep '13

the following patch was just integrated into master: commit 3af0aa2533dc4dc7a0a11711c18587cee0104267 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Sep 17 20:59:52 2013 +0200 buildgcc: Use per-arch build directories This simplifies debugging and also fixes an issue when build directories are kept between buildgcc runs for different architectures. Change-Id: I5badccd3368e3014680da3eedb607119fff8fa7f Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reviewed-on: http://review.coreboot.org/3929 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See http://review.coreboot.org/3929 for details. -gerrit

1 0

← Newer
1
2
3
4
5
6
7
8
9
...
20
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2013