coreboot-gerrit September 2013

coreboot-gerrit@coreboot.org

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191 discussions

Patch set updated for coreboot: 4e26c18 timestamps: Only collect from BSP CPU
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3912 -gerrit commit 4e26c18869dae009209483da8d2f0601fedf96dd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Sep 8 13:10:28 2013 +0300 timestamps: Only collect from BSP CPU We only have one table to collect timestamps into. Change-Id: I80180fe9a05226f0351c3e66eacaf2d0cb82c924 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/lib/timestamp.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index eac33a2..63f17f7 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -23,6 +23,7 @@ #include <cbmem.h> #include <timestamp.h> #include <cpu/x86/car.h> +#include <cpu/x86/lapic.h> #define MAX_TIMESTAMPS 30 @@ -60,6 +61,9 @@ void timestamp_add(enum timestamp_id id, tsc_t ts_time) { struct timestamp_entry *tse; + if (!boot_cpu()) + return; + if (!ts_table) { timestamp_stash(id, ts_time); return; @@ -114,6 +118,9 @@ static void timestamp_do_sync(void) void timestamp_init(tsc_t base) { + if (!boot_cpu()) + return; + #ifdef __PRE_RAM__ /* Copy of basetime, it is too early for CBMEM. */ ts_basetime = base; @@ -135,6 +142,9 @@ void timestamp_init(tsc_t base) void timestamp_sync(void) { + if (!boot_cpu()) + return; + #ifdef __PRE_RAM__ timestamp_real_init(ts_basetime); #else

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Patch set updated for coreboot: 1c47d6e CBMEM console: Support late init
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3915 -gerrit commit 1c47d6e03d1f1ba4a72a773feff82af38e09a913 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Sep 9 01:31:22 2013 +0300 CBMEM console: Support late init It is not compulsory to have CBMEM console initialised in romstage, so try add the CBMEM table entry again in ramstage, if not found. Change-Id: I96ab502df7f05d6bf1d6e6fa84d395ef6306b525 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/lib/cbmem_console.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 1b58402..819c27f 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -195,27 +195,27 @@ static void copy_console_buffer(struct cbmem_console *new_cons_p) static void cbmemc_reinit_(void) { - struct cbmem_console *cbm_cons_p; + struct cbmem_console *cbm_cons_p = NULL; + +#ifndef __PRE_RAM__ + cbm_cons_p = cbmem_find(CBMEM_ID_CONSOLE); +#endif -#ifdef __PRE_RAM__ - cbm_cons_p = cbmem_add(CBMEM_ID_CONSOLE, - CONFIG_CONSOLE_CBMEM_BUFFER_SIZE); if (!cbm_cons_p) { - current_console_set(NULL); - return; - } + cbm_cons_p = cbmem_add(CBMEM_ID_CONSOLE, + CONFIG_CONSOLE_CBMEM_BUFFER_SIZE); - cbm_cons_p->buffer_size = CONFIG_CONSOLE_CBMEM_BUFFER_SIZE - - sizeof(struct cbmem_console); + if (!cbm_cons_p) { + current_console_set(NULL); + return; + } - cbm_cons_p->buffer_cursor = 0; -#else - cbm_cons_p = cbmem_find(CBMEM_ID_CONSOLE); + cbm_cons_p->buffer_size = CONFIG_CONSOLE_CBMEM_BUFFER_SIZE - + sizeof(struct cbmem_console); - if (!cbm_cons_p) - return; + cbm_cons_p->buffer_cursor = 0; + } -#endif copy_console_buffer(cbm_cons_p); current_console_set(cbm_cons_p);

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New patch to review for coreboot: e4ed06c lint whitespace: Fix rule to recurse into subdirectories
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3921 -gerrit commit e4ed06ca70b93ff5713a172956414993c1e83c87 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Sep 13 08:03:52 2013 +0300 lint whitespace: Fix rule to recurse into subdirectories The rule "-perm +111 -prune" matched any searchable directory and did not recursively find files in them. The use of "+mode" for -perm is deprecated. Change-Id: I1b43f89ee9ab37928e56104b0f07241ff84b84c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- util/lint/lint-stable-003-whitespace | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/lint/lint-stable-003-whitespace b/util/lint/lint-stable-003-whitespace index 6869a44..fceacf7 100755 --- a/util/lint/lint-stable-003-whitespace +++ b/util/lint/lint-stable-003-whitespace @@ -20,7 +20,7 @@ LC_ALL=C export LC_ALL find src util -name .svn -type d -prune -o \ - -perm +111 -prune -o \ + -type f -perm /111 -prune -o \ -name .git -type d -prune -o \ -name README -prune -o \ -name LICENSE -prune -o \

1 0

New patch to review for coreboot: 37d3707 Fix whitespace leaked into tree
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3920 -gerrit commit 37d370780bfe402d301b2ff3900f9b4333e2f503 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Sep 13 07:57:49 2013 +0300 Fix whitespace leaked into tree Clean whitespace errors that have gotten past lint-stable-003-whitespace and gerrit review. Change-Id: Id76fc68e9d32d1b2b672d519b75cdc80cc4f1ad9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 2 +- src/drivers/Makefile.inc | 2 +- src/lib/libgcov.c | 2 +- src/mainboard/amd/inagua/dsdt.asl | 4 +-- src/mainboard/amd/olivehill/dsdt.asl | 2 +- src/mainboard/amd/persimmon/dsdt.asl | 2 +- src/mainboard/amd/south_station/dsdt.asl | 4 +-- src/mainboard/amd/union_station/dsdt.asl | 4 +-- src/mainboard/asrock/e350m1/dsdt.asl | 4 +-- src/mainboard/google/snow/memory.c | 2 +- src/mainboard/lenovo/x60/i915.c | 2 +- src/mainboard/supermicro/h8qgi/devicetree.cb | 2 +- src/southbridge/amd/cs5536/smbus.c | 2 +- util/cbfstool/lzma/C/LzFind.c | 4 +-- util/cbfstool/lzma/C/LzmaDec.c | 14 +++++----- util/cbfstool/lzma/C/LzmaDec.h | 4 +-- util/cbfstool/lzma/C/LzmaEnc.c | 40 ++++++++++++++-------------- util/i915tool/spatches/fixcalls.cocci | 12 ++++----- util/i915tool/spatches/fx.cocci | 2 +- util/i915tool/spatches/intel_display.c.cocci | 2 +- 20 files changed, 56 insertions(+), 56 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index be2cb24..127887c 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -334,7 +334,7 @@ config TIMER_QUEUE def_bool n depends on HAVE_MONOTONIC_TIMER help - Provide a timer queue for performing time-based callbacks. + Provide a timer queue for performing time-based callbacks. config COOP_MULTITASKING def_bool n diff --git a/src/drivers/Makefile.inc b/src/drivers/Makefile.inc index 9a1be72..da397d0 100644 --- a/src/drivers/Makefile.inc +++ b/src/drivers/Makefile.inc @@ -30,7 +30,7 @@ subdirs-y += sil subdirs-y += trident subdirs-y += ics subdirs-y += spi -subdirs-y += ti +subdirs-y += ti subdirs-y += ipmi subdirs-y += elog subdirs-$(CONFIG_ARCH_X86) += pc80 diff --git a/src/lib/libgcov.c b/src/lib/libgcov.c index f37d0d2..dbbd709 100644 --- a/src/lib/libgcov.c +++ b/src/lib/libgcov.c @@ -334,7 +334,7 @@ gcov_exit (void) { crc32 = crc32_unsigned (crc32, gi_ptr->stamp); crc32 = crc32_unsigned (crc32, gi_ptr->n_functions); - + for (f_ix = 0; (unsigned)f_ix != gi_ptr->n_functions; f_ix++) { gfi_ptr = gi_ptr->functions[f_ix]; diff --git a/src/mainboard/amd/inagua/dsdt.asl b/src/mainboard/amd/inagua/dsdt.asl index f0cfc27..f7c7bb2 100644 --- a/src/mainboard/amd/inagua/dsdt.asl +++ b/src/mainboard/amd/inagua/dsdt.asl @@ -28,13 +28,13 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ - + #include "acpi/mainboard.asl" #include <cpu/amd/agesa/family14/acpi/cpu.asl> #include "acpi/routing.asl" - + Scope(\_SB) { /* global utility methods expected within the \_SB scope */ #include <arch/x86/acpi/globutil.asl> diff --git a/src/mainboard/amd/olivehill/dsdt.asl b/src/mainboard/amd/olivehill/dsdt.asl index cba800c..78d9bca 100644 --- a/src/mainboard/amd/olivehill/dsdt.asl +++ b/src/mainboard/amd/olivehill/dsdt.asl @@ -29,7 +29,7 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ - + /* Globals for the platform */ #include "acpi/mainboard.asl" diff --git a/src/mainboard/amd/persimmon/dsdt.asl b/src/mainboard/amd/persimmon/dsdt.asl index 1288929..f7c7bb2 100644 --- a/src/mainboard/amd/persimmon/dsdt.asl +++ b/src/mainboard/amd/persimmon/dsdt.asl @@ -28,7 +28,7 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ - + #include "acpi/mainboard.asl" #include <cpu/amd/agesa/family14/acpi/cpu.asl> diff --git a/src/mainboard/amd/south_station/dsdt.asl b/src/mainboard/amd/south_station/dsdt.asl index f0cfc27..f7c7bb2 100644 --- a/src/mainboard/amd/south_station/dsdt.asl +++ b/src/mainboard/amd/south_station/dsdt.asl @@ -28,13 +28,13 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ - + #include "acpi/mainboard.asl" #include <cpu/amd/agesa/family14/acpi/cpu.asl> #include "acpi/routing.asl" - + Scope(\_SB) { /* global utility methods expected within the \_SB scope */ #include <arch/x86/acpi/globutil.asl> diff --git a/src/mainboard/amd/union_station/dsdt.asl b/src/mainboard/amd/union_station/dsdt.asl index f0cfc27..f7c7bb2 100644 --- a/src/mainboard/amd/union_station/dsdt.asl +++ b/src/mainboard/amd/union_station/dsdt.asl @@ -28,13 +28,13 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ - + #include "acpi/mainboard.asl" #include <cpu/amd/agesa/family14/acpi/cpu.asl> #include "acpi/routing.asl" - + Scope(\_SB) { /* global utility methods expected within the \_SB scope */ #include <arch/x86/acpi/globutil.asl> diff --git a/src/mainboard/asrock/e350m1/dsdt.asl b/src/mainboard/asrock/e350m1/dsdt.asl index 0620360..6269435 100644 --- a/src/mainboard/asrock/e350m1/dsdt.asl +++ b/src/mainboard/asrock/e350m1/dsdt.asl @@ -28,13 +28,13 @@ DefinitionBlock ( ) { /* Start of ASL file */ /* #include <arch/x86/acpi/debug.asl> */ /* Include global debug methods if needed */ - + #include "acpi/mainboard.asl" #include <cpu/amd/agesa/family14/acpi/cpu.asl> #include "acpi/routing.asl" - + Scope(\_SB) { /* global utility methods expected within the \_SB scope */ #include <arch/x86/acpi/globutil.asl> diff --git a/src/mainboard/google/snow/memory.c b/src/mainboard/google/snow/memory.c index af04cbd..977dbbc 100644 --- a/src/mainboard/google/snow/memory.c +++ b/src/mainboard/google/snow/memory.c @@ -509,7 +509,7 @@ struct mem_timings *get_mem_timings(void) unsigned int frequency_mhz; enum mem_manuf mem_manuf; const struct mem_timings *mem; - + config = board_get_config(); switch (config) { case SNOW_CONFIG_ELPIDA_EVT: diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c index ef26645..837c8b4 100644 --- a/src/mainboard/lenovo/x60/i915.c +++ b/src/mainboard/lenovo/x60/i915.c @@ -375,7 +375,7 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase, setgtt(0, 800 , physbase, 4096); - temp = READ32(PGETLB_CTL); + temp = READ32(PGETLB_CTL); printk(BIOS_INFO, "GTT PGETLB_CTL register: 0x%lx\n", temp); if (temp & 1) diff --git a/src/mainboard/supermicro/h8qgi/devicetree.cb b/src/mainboard/supermicro/h8qgi/devicetree.cb index be9e564..d99a6ba 100644 --- a/src/mainboard/supermicro/h8qgi/devicetree.cb +++ b/src/mainboard/supermicro/h8qgi/devicetree.cb @@ -111,7 +111,7 @@ chip northbridge/amd/agesa/family15/root_complex end end #drivers/i2c/w83795 end # LPC - device pci 14.4 on + device pci 14.4 on device pci 4.0 on end # onboard VGA end # PCI 0x4384 device pci 14.5 on end # USB 3 diff --git a/src/southbridge/amd/cs5536/smbus.c b/src/southbridge/amd/cs5536/smbus.c index 5373824..bdc089d 100644 --- a/src/southbridge/amd/cs5536/smbus.c +++ b/src/southbridge/amd/cs5536/smbus.c @@ -193,4 +193,4 @@ err: outb(0x0, smbus_io_base + SMB_STS); return 0xFF; } - + diff --git a/util/cbfstool/lzma/C/LzFind.c b/util/cbfstool/lzma/C/LzFind.c index 9103890..8f204af 100644 --- a/util/cbfstool/lzma/C/LzFind.c +++ b/util/cbfstool/lzma/C/LzFind.c @@ -512,7 +512,7 @@ static UInt32 Bt3_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) delta2 = p->pos - p->hash[hash2Value]; curMatch = p->hash[kFix3HashSize + hashValue]; - + p->hash[hash2Value] = p->hash[kFix3HashSize + hashValue] = p->pos; @@ -546,7 +546,7 @@ static UInt32 Bt4_MatchFinder_GetMatches(CMatchFinder *p, UInt32 *distances) delta2 = p->pos - p->hash[ hash2Value]; delta3 = p->pos - p->hash[kFix3HashSize + hash3Value]; curMatch = p->hash[kFix4HashSize + hashValue]; - + p->hash[ hash2Value] = p->hash[kFix3HashSize + hash3Value] = p->hash[kFix4HashSize + hashValue] = p->pos; diff --git a/util/cbfstool/lzma/C/LzmaDec.c b/util/cbfstool/lzma/C/LzmaDec.c index 7efb60a..fd88cec 100644 --- a/util/cbfstool/lzma/C/LzmaDec.c +++ b/util/cbfstool/lzma/C/LzmaDec.c @@ -141,7 +141,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit_parm, const Byte *dic = p->dic; SizeT dicBufSize = p->dicBufSize; SizeT dicPos = p->dicPos; - + UInt32 processedPos = p->processedPos; UInt32 checkDicSize = p->checkDicSize; unsigned len = 0; @@ -324,7 +324,7 @@ static int MY_FAST_CALL LzmaDec_DecodeReal(CLzmaDec *p, SizeT limit_parm, const { NORMALIZE range >>= 1; - + { UInt32 t; code -= range; @@ -722,7 +722,7 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *sr SizeT inSize = *srcLen; (*srcLen) = 0; LzmaDec_WriteRem(p, dicLimit); - + *status = LZMA_STATUS_NOT_SPECIFIED; while (p->remainLen != kMatchSpecLenStart) @@ -768,7 +768,7 @@ SRes LzmaDec_DecodeToDic(CLzmaDec *p, SizeT dicLimit, const Byte *src, SizeT *sr if (p->needInitState) LzmaDec_InitStateReal(p); - + if (p->tempBufSize == 0) { SizeT processed; @@ -899,12 +899,12 @@ SRes LzmaProps_Decode(CLzmaProps *p, const Byte *data, unsigned size) { UInt32 dicSize; Byte d; - + if (size < LZMA_PROPS_SIZE) return SZ_ERROR_UNSUPPORTED; else dicSize = data[1] | ((UInt32)data[2] << 8) | ((UInt32)data[3] << 16) | ((UInt32)data[4] << 24); - + if (dicSize < LZMA_DIC_MIN) dicSize = LZMA_DIC_MIN; p->dicSize = dicSize; @@ -986,7 +986,7 @@ SRes LzmaDecode(Byte *dest, SizeT *destLen, const Byte *src, SizeT *srcLen, p.dicBufSize = outSize; LzmaDec_Init(&p); - + *srcLen = inSize; res = LzmaDec_DecodeToDic(&p, outSize, src, srcLen, finishMode, status); diff --git a/util/cbfstool/lzma/C/LzmaDec.h b/util/cbfstool/lzma/C/LzmaDec.h index bf7f084..7927acd 100644 --- a/util/cbfstool/lzma/C/LzmaDec.h +++ b/util/cbfstool/lzma/C/LzmaDec.h @@ -130,7 +130,7 @@ LzmaDec_Allocate* can return: SZ_ERROR_MEM - Memory allocation error SZ_ERROR_UNSUPPORTED - Unsupported properties */ - + SRes LzmaDec_AllocateProbs(CLzmaDec *p, const Byte *props, unsigned propsSize, ISzAlloc *alloc); void LzmaDec_FreeProbs(CLzmaDec *p, ISzAlloc *alloc); @@ -159,7 +159,7 @@ void LzmaDec_Free(CLzmaDec *state, ISzAlloc *alloc); */ /* LzmaDec_DecodeToDic - + The decoding to internal dictionary buffer (CLzmaDec::dic). You must manually update CLzmaDec::dicPos, if it reaches CLzmaDec::dicBufSize !!! diff --git a/util/cbfstool/lzma/C/LzmaEnc.c b/util/cbfstool/lzma/C/LzmaEnc.c index aca097d..a9a6813 100644 --- a/util/cbfstool/lzma/C/LzmaEnc.c +++ b/util/cbfstool/lzma/C/LzmaEnc.c @@ -109,7 +109,7 @@ static void LzmaEnc_FastPosInit(Byte *g_FastPos) int c = 2, slotFast; g_FastPos[0] = 0; g_FastPos[1] = 1; - + for (slotFast = 2; slotFast < kNumLogBits * 2; slotFast++) { UInt32 k = (1 << ((slotFast >> 1) - 1)); @@ -246,7 +246,7 @@ typedef struct CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; CLzmaProb posAlignEncoder[1 << kNumAlignBits]; - + CLenPriceEnc lenEnc; CLenPriceEnc repLenEnc; @@ -269,7 +269,7 @@ typedef struct #ifndef _7ZIP_ST Byte pad[128]; #endif - + UInt32 optimumEndIndex; UInt32 optimumCurrentIndex; @@ -277,7 +277,7 @@ typedef struct UInt32 numPairs; UInt32 numAvail; COptimal opt[kNumOpts]; - + #ifndef LZMA_LOG_BSR Byte g_FastPos[1 << kNumLogBits]; #endif @@ -311,14 +311,14 @@ typedef struct CLzmaProb posSlotEncoder[kNumLenToPosStates][1 << kNumPosSlotBits]; CLzmaProb posEncoders[kNumFullDistances - kEndPosModelIndex]; CLzmaProb posAlignEncoder[1 << kNumAlignBits]; - + CLenPriceEnc lenEnc; CLenPriceEnc repLenEnc; unsigned lclp; Bool fastMode; - + CRangeEnc rc; Bool writeEndMark; @@ -909,10 +909,10 @@ static UInt32 Backward(CLzmaEnc *p, UInt32 *backRes, UInt32 cur) { UInt32 posPrev = posMem; UInt32 backCur = backMem; - + backMem = p->opt[posPrev].backPrev; posMem = p->opt[posPrev].posPrev; - + p->opt[posPrev].backPrev = backCur; p->opt[posPrev].posPrev = cur; cur = posPrev; @@ -943,7 +943,7 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) return lenRes; } p->optimumCurrentIndex = p->optimumEndIndex = 0; - + if (p->additionalOffset == 0) mainLen = ReadMatchDistances(p, &numPairs); else @@ -1241,7 +1241,7 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) matchPrice = curPrice + GET_PRICE_1(p->isMatch[state][posState]); repMatchPrice = matchPrice + GET_PRICE_1(p->isRep[state]); - + if (matchByte == curByte && !(nextOpt->posPrev < cur && nextOpt->backPrev == 0)) { UInt32 shortRepPrice = repMatchPrice + GetRepLen1Price(p, state, posState); @@ -1303,7 +1303,7 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) } } } - + startLen = 2; /* speed optimization */ { UInt32 repIndex; @@ -1334,10 +1334,10 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) } while (--lenTest >= 2); lenTest = lenTestTemp; - + if (repIndex == 0) startLen = lenTest + 1; - + /* if (_maxMode) */ { UInt32 lenTest2 = lenTest + 1; @@ -1361,7 +1361,7 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) nextRepMatchPrice = curAndLenCharPrice + GET_PRICE_1(p->isMatch[state2][posStateNext]) + GET_PRICE_1(p->isRep[state2]); - + /* for (; lenTest2 >= 2; lenTest2--) */ { UInt32 curAndLenPrice; @@ -1416,7 +1416,7 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) curAndLenPrice += p->distancesPrices[lenToPosState][curBack]; else curAndLenPrice += p->posSlotPrices[lenToPosState][posSlot] + p->alignPrices[curBack & kAlignMask]; - + opt = &p->opt[cur + lenTest]; if (curAndLenPrice < opt->price) { @@ -1450,7 +1450,7 @@ static UInt32 GetOptimum(CLzmaEnc *p, UInt32 position, UInt32 *backRes) nextRepMatchPrice = curAndLenCharPrice + GET_PRICE_1(p->isMatch[state2][posStateNext]) + GET_PRICE_1(p->isRep[state2]); - + /* for (; lenTest2 >= 2; lenTest2--) */ { UInt32 offset = cur + lenTest + 1 + lenTest2; @@ -1562,7 +1562,7 @@ static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes) MovePos(p, repLen - 1); return repLen; } - + if (mainLen < 2 || numAvail <= 2) return 1; @@ -1576,7 +1576,7 @@ static UInt32 GetOptimumFast(CLzmaEnc *p, UInt32 *backRes) (p->longestMatchLength + 1 >= mainLen && mainLen >= 3 && ChangePair(newDistance, mainDist))) return 1; } - + data = p->matchFinder.GetPointerToCurrentPos(p->matchFinderObj) - 1; for (i = 0; i < LZMA_NUM_REPS; i++) { @@ -1837,7 +1837,7 @@ static SRes LzmaEnc_CodeOneBlock(CLzmaEnc *p, Bool useLimits, UInt32 maxPackSize pos -= LZMA_NUM_REPS; GetPosSlot(pos, posSlot); RcTree_Encode(&p->rc, p->posSlotEncoder[GetLenToPosState(len)], kNumPosSlotBits, posSlot); - + if (posSlot >= kStartPosModelIndex) { UInt32 footerBits = ((posSlot >> 1) - 1); @@ -2144,7 +2144,7 @@ static size_t MyWrite(void *pp, const void *data, size_t size) p->rc.outStream = &outStream.funcTable; res = LzmaEnc_CodeOneBlock(p, True, desiredPackSize, *unpackSize); - + *unpackSize = (UInt32)(p->nowPos64 - nowPos64); *destLen -= outStream.rem; if (outStream.overflow) diff --git a/util/i915tool/spatches/fixcalls.cocci b/util/i915tool/spatches/fixcalls.cocci index 50e6458..11cbe4a 100644 --- a/util/i915tool/spatches/fixcalls.cocci +++ b/util/i915tool/spatches/fixcalls.cocci @@ -46,7 +46,7 @@ type T; @@ T f(...){<... -DRM_DEBUG_KMS( -+fprintf(stderr, ++fprintf(stderr, ...); ...>} @@ @@ -55,7 +55,7 @@ type T; @@ T f(...){<... -DRM_ERROR( -+fprintf(stderr, ++fprintf(stderr, ...); ...>} @@ @@ -64,7 +64,7 @@ type T; @@ T f(...){<... -DRM_DEBUG( -+fprintf(stderr, ++fprintf(stderr, ...); ...>} @@ @@ -73,7 +73,7 @@ type T; @@ T f(...){<... -DRM_DEBUG_DRIVER( -+fprintf(stderr, ++fprintf(stderr, ...); ...>} @@ @@ -104,7 +104,7 @@ expression E1, E2; @@ identifier d; @@ --static +-static const struct pci_device_id d[] = {...}; @@ expression E1; @@ -113,7 +113,7 @@ expression E1; +if ( E1 -, -+) fprintf(stderr, ++) fprintf(stderr, ...); @@ expression E1; diff --git a/util/i915tool/spatches/fx.cocci b/util/i915tool/spatches/fx.cocci index e47ddca..576cfcc 100644 --- a/util/i915tool/spatches/fx.cocci +++ b/util/i915tool/spatches/fx.cocci @@ -4,7 +4,7 @@ type T; @@ T f(...){... -$DRM_DEBUG_KMS|DRM_ERRRO$( -+fprintf(stderr, ++fprintf(stderr, ...); ...} diff --git a/util/i915tool/spatches/intel_display.c.cocci b/util/i915tool/spatches/intel_display.c.cocci index d7d87d3..6e16bbd 100644 --- a/util/i915tool/spatches/intel_display.c.cocci +++ b/util/i915tool/spatches/intel_display.c.cocci @@ -6,7 +6,7 @@ identifier d; @@ - intel_limit_t d = {...}; @@ -@@ +@@ - intel_connector_attach_encoder(...){...} @@ @@

1 0

Patch set updated for coreboot: 95ad404 CBMEM: Always have early initialisation
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3917 -gerrit commit 95ad4047166dc9fc93da48f1b95ed65280230fb4 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Sep 8 10:08:28 2013 +0300 CBMEM: Always have early initialisation Assume EARLY_CBMEM_INIT=y everywhere and remove option from Kconfig. If romstage does not make the cbmem_initialize() call, features like COLLECT_TIMESTAMPS and early CBMEM_CONSOLE will execute during romstage, but that data will get lost as no CAR migration is executed. Change-Id: I5615645ed0f5fd78fbc372cf5c3da71a3134dd85 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 11 +---------- src/console/Kconfig | 1 - src/lib/Makefile.inc | 6 +----- src/lib/cbmem.c | 4 ---- src/mainboard/emulation/qemu-i440fx/Kconfig | 1 - src/mainboard/emulation/qemu-q35/Kconfig | 1 - src/mainboard/google/butterfly/Kconfig | 1 - src/mainboard/google/link/Kconfig | 1 - src/mainboard/google/parrot/Kconfig | 1 - src/mainboard/google/stout/romstage.c | 4 ---- src/mainboard/intel/emeraldlake2/Kconfig | 1 - src/mainboard/kontron/ktqm77/Kconfig | 1 - src/mainboard/lenovo/t60/Kconfig | 1 - src/mainboard/lenovo/x60/Kconfig | 1 - src/mainboard/samsung/lumpy/Kconfig | 1 - src/mainboard/samsung/stumpy/Kconfig | 1 - src/mainboard/via/epia-m850/romstage.c | 2 -- src/northbridge/intel/sandybridge/raminit.c | 2 -- 18 files changed, 2 insertions(+), 39 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index be2cb24..ae385dd 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -170,15 +170,6 @@ config INCLUDE_CONFIG_FILE config 0x8d740 raw 3324 (empty) 0x8e480 null 3610440 -config EARLY_CBMEM_INIT - bool - default n - help - Make coreboot initialize the CBMEM structures while running in ROM - stage. This is useful when the ROM stage wants to communicate - some, for instance, execution timestamps. It needs support in - romstage.c and should be enabled by the board's Kconfig. - config DYNAMIC_CBMEM bool "The CBMEM space is dynamically grown." default n @@ -189,7 +180,7 @@ config DYNAMIC_CBMEM config COLLECT_TIMESTAMPS bool "Create a table of timestamps collected during boot" - depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM) + default n help Make coreboot create a table of timer-ID/timer-value pairs to allow measuring time spent at different phases of the boot process. diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..e9fca11 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -253,7 +253,6 @@ config CONSOLE_NE2K_IO_PORT boundary, qemu needs broader align) config CONSOLE_CBMEM - depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM) bool "Send console output to a CBMEM buffer" default n help diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 44b5ebd..1455e4c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,10 +56,6 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c romstage-$(CONFIG_USBDEBUG) += usbdebug.c endif -ifneq ($(CONFIG_DYNAMIC_CBMEM),y) -romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c -endif - romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c @@ -112,7 +108,7 @@ ramstage-y += dynamic_cbmem.c romstage-y += dynamic_cbmem.c else ramstage-y += cbmem.c -romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c +romstage-$(CONFIG_CACHE_AS_RAM) += cbmem.c endif # CONFIG_DYNAMIC_CBMEM ramstage-y += cbmem_info.c diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 495ee5a..8d69435 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -95,7 +95,6 @@ void cbmem_late_set_table(uint64_t base, uint64_t size) * - suspend/resume backup memory */ -#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) static void cbmem_init(void) { uint64_t baseaddr, size; @@ -120,7 +119,6 @@ static void cbmem_init(void) .size = size - CBMEM_TOC_RESERVED }; } -#endif int cbmem_reinit(void) { @@ -220,7 +218,6 @@ void *cbmem_find(u32 id) return (void *)NULL; } -#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) /* Returns True if it was not initialized before. */ int cbmem_initialize(void) { @@ -244,7 +241,6 @@ int cbmem_initialize(void) return rv; } -#endif #ifndef __PRE_RAM__ static void init_cbmem_post_device(void *unused) diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index b462b8c..2eed55b 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_256 - select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT config MAINBOARD_DIR diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 9d78bb8..43bba46 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES # select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_256 - select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT config MAINBOARD_DIR diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig index e9ad6ef..d35be8d 100644 --- a/src/mainboard/google/butterfly/Kconfig +++ b/src/mainboard/google/butterfly/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_SMI_HANDLER select GFXUMA select CHROMEOS - select EARLY_CBMEM_INIT # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index b74c604..d040599 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHROMEOS select SERIRQ_CONTINUOUS_MODE select MAINBOARD_HAS_NATIVE_VGA_INIT - select EARLY_CBMEM_INIT select MARK_GRAPHICS_MEM_WRCOMB config MAINBOARD_DIR diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig index 191e856..1108b13 100644 --- a/src/mainboard/google/parrot/Kconfig +++ b/src/mainboard/google/parrot/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_SMI_HANDLER select GFXUMA select CHROMEOS - select EARLY_CBMEM_INIT # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 5ace4f6..464ddea 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -296,11 +296,7 @@ void main(unsigned long bist) post_code(0x3e); MCHBAR16(SSKPD) = 0xCAFE; -#if CONFIG_EARLY_CBMEM_INIT cbmem_was_initted = !cbmem_initialize(); -#else - cbmem_was_initted = cbmem_reinit(); -#endif #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index fd98485..1ad50d9 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select GFXUMA #select CHROMEOS - select EARLY_CBMEM_INIT config MAINBOARD_DIR string diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index e9d1ce7..d379f6f 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select HAVE_SMI_HANDLER select GFXUMA - select EARLY_CBMEM_INIT select ENABLE_VMX select HAVE_MRC diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index 0f0670e..ec03534 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHANNEL_XOR_RANDOMIZATION select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME - select EARLY_CBMEM_INIT config MAINBOARD_DIR string default lenovo/t60 diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 72aeef8..8eb159b 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select USE_OPTION_TABLE select MAINBOARD_HAS_NATIVE_VGA_INIT - select EARLY_CBMEM_INIT config MAINBOARD_DIR string diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig index 91dc3b6..13c8748 100644 --- a/src/mainboard/samsung/lumpy/Kconfig +++ b/src/mainboard/samsung/lumpy/Kconfig @@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_SMSC_MEC1308 select DRIVERS_GENERIC_IOAPIC - select EARLY_CBMEM_INIT select HAVE_MRC config MAINBOARD_DIR diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig index f4f8e4d..17f854f 100644 --- a/src/mainboard/samsung/stumpy/Kconfig +++ b/src/mainboard/samsung/stumpy/Kconfig @@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_INTEL_SANDYBRIDGE select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_ITE_IT8772F - select EARLY_CBMEM_INIT select HAVE_MRC config MAINBOARD_DIR diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 23b5aea..8bbb1f5 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -94,9 +94,7 @@ void main(unsigned long bist) print_debug("We passed RAM verify\n"); /* We got RAM working, now we can write the timestamps to RAM */ -#if CONFIG_EARLY_CBMEM_INIT cbmem_initialize(); -#endif timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); /* FIXME: See if this is needed or take this out please */ diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 3b321d7..db96202 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -58,7 +58,6 @@ static void save_mrc_data(struct pei_data *pei_data) { u16 c1, c2, checksum; -#if CONFIG_EARLY_CBMEM_INIT struct mrc_data_container *mrcdata; int output_len = ALIGN(pei_data->mrc_output_len, 16); @@ -84,7 +83,6 @@ static void save_mrc_data(struct pei_data *pei_data) mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data, mrcdata->mrc_data_size); -#endif /* Save the MRC seed values to CMOS */ cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);

1 0

Patch set updated for coreboot: ed9c851 CBMEM: Always select CAR_MIGRATION
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3916 -gerrit commit ed9c8515db796f020a726dadd54f171f2bf97a42 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 10 00:07:21 2013 +0300 CBMEM: Always select CAR_MIGRATION If romstage does not make cbmem_initialize() call, linker should optimize the code for CAR migration away. This simplifies design of CBMEM console by a considerable amount. As console buffer is now migrated within cbmem_initialize() call there is no longer need for cbmemc_reinit() call made at end of romstage. Change-Id: I8675ecaafb641fa02675e9ba3f374caa8e240f1d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/boot/cbmem.c | 2 +- src/cpu/intel/haswell/Kconfig | 1 - src/cpu/intel/haswell/romstage.c | 1 - src/cpu/x86/Kconfig | 9 ------ src/cpu/x86/Makefile.inc | 2 +- src/include/cpu/x86/car.h | 2 +- src/include/timestamp.h | 4 +-- src/lib/cbmem_console.c | 42 ++------------------------ src/lib/hardwaremain.c | 2 +- src/lib/timestamp.c | 5 ++- src/lib/usbdebug.c | 4 +-- src/mainboard/emulation/qemu-i440fx/romstage.c | 5 --- src/mainboard/emulation/qemu-q35/romstage.c | 5 --- src/mainboard/google/butterfly/romstage.c | 5 --- src/mainboard/google/link/romstage.c | 5 --- src/mainboard/google/parrot/romstage.c | 5 --- src/mainboard/google/stout/romstage.c | 5 --- src/mainboard/intel/emeraldlake2/romstage.c | 5 --- src/mainboard/kontron/ktqm77/romstage.c | 5 --- src/mainboard/lenovo/t60/romstage.c | 5 --- src/mainboard/lenovo/x60/romstage.c | 5 --- src/mainboard/samsung/lumpy/romstage.c | 5 --- src/mainboard/samsung/stumpy/romstage.c | 5 --- src/mainboard/via/epia-m850/romstage.c | 1 - 24 files changed, 14 insertions(+), 121 deletions(-) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 991a3e6..58ccbca 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -47,7 +47,7 @@ void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop) /* This is for compatibility with old boards only. Any new chipset and board * must implement get_top_of_ram() for both romstage and ramstage to support - * features like CAR_MIGRATION and CBMEM_CONSOLE. + * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE. */ void set_top_of_ram(uint64_t ramtop) { diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index c352e36..7b6fc43 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -18,7 +18,6 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select CAR_MIGRATION config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index e62b894..757cc34 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -278,7 +278,6 @@ void romstage_common(const struct romstage_params *params) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index c10dd15..c64a8e4 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -115,12 +115,3 @@ config X86_AMD_FIXED_MTRRS help This option informs the MTRR code to use the RdMem and WrMem fields in the fixed MTRR MSRs. - -config CAR_MIGRATION - def_bool n - depends on DYNAMIC_CBMEM || EARLY_CBMEM_INIT - help - Migrate the cache-as-ram variables to CBMEM once CBMEM is set up - in romstage. This option is only needed if one will be doing more - work in romstage after the cache-as-ram is torn down aside from - loading ramstage. diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index fe8648c..311dcc1 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1 +1 @@ -romstage-$(CONFIG_CAR_MIGRATION) += car.c +romstage-$(CONFIG_CACHE_AS_RAM) += car.c diff --git a/src/include/cpu/x86/car.h b/src/include/cpu/x86/car.h index 7b5cedf..5fc11f9 100644 --- a/src/include/cpu/x86/car.h +++ b/src/include/cpu/x86/car.h @@ -28,7 +28,7 @@ #define CAR_CBMEM #endif -#if CONFIG_CAR_MIGRATION && defined(__PRE_RAM__) +#if defined(__PRE_RAM__) #define CAR_MIGRATE_ATTR __attribute__ ((used,section (".car.migrate"))) /* Call migrate_fn_() when CAR globals are migrated. */ diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 0f56200..edc0076 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -59,13 +59,13 @@ enum timestamp_id { void timestamp_init(tsc_t base); void timestamp_add(enum timestamp_id id, tsc_t ts_time); void timestamp_add_now(enum timestamp_id id); -void timestamp_sync(void); +void timestamp_reinit(void); tsc_t get_initial_timestamp(void); #else #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) -#define timestamp_sync() +#define timestamp_reinit() #endif #endif diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 4c84d98..3fe99ff 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -45,17 +45,6 @@ static struct cbmem_console *cbmem_console_p CAR_GLOBAL; static struct cbmem_console car_cbmem_console CAR_CBMEM; -/* - * Once DRAM is initialized and the cache as ram mode is disabled, while still - * running from ROM, the console buffer in the cache as RAM area becomes - * unavailable. - * - * By this time the console log buffer is already available in - * CBMEM. The location at 0x600 is used as the redirect pointer allowing to - * find out where the actual console log buffer is. - */ -#define CBMEM_CONSOLE_REDIRECT (*((struct cbmem_console **)0x600)) - #else /* @@ -69,30 +58,12 @@ static u8 static_console[40000]; static inline struct cbmem_console *current_console(void) { -#if CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) - return car_get_var(cbmem_console_p); -#else - /* - * This check allows to tell if the cache as RAM mode has been exited - * or not. If it has been exited, the real memory is being used - * (resulting in the variable on the stack located below - * DCACHE_RAM_BASE), use the redirect pointer to find out where the - * actual console buffer is. - */ - if ((uintptr_t)__builtin_frame_address(0) < - (uintptr_t)CONFIG_DCACHE_RAM_BASE) - return CBMEM_CONSOLE_REDIRECT; return car_get_var(cbmem_console_p); -#endif /* CONFIG_CAR_MIGRATION */ } static inline void current_console_set(struct cbmem_console *new_console_p) { -#if CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) car_set_var(cbmem_console_p, new_console_p); -#else - CBMEM_CONSOLE_REDIRECT = new_console_p; -#endif } static inline void init_console_ptr(void *storage, u32 total_space) @@ -193,7 +164,7 @@ static void copy_console_buffer(struct cbmem_console *new_cons_p) new_cons_p->buffer_cursor = cursor; } -static void cbmemc_reinit_(void) +void cbmemc_reinit(void) { struct cbmem_console *cbm_cons_p = NULL; @@ -221,12 +192,5 @@ static void cbmemc_reinit_(void) current_console_set(cbm_cons_p); } -void cbmemc_reinit(void) -{ -#if !CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) - cbmemc_reinit_(); -#endif -} - -/* Call cbmemc_reinit_() at CAR migration time. */ -CAR_MIGRATE(cbmemc_reinit_) +/* Call cbmemc_reinit() at CAR migration time. */ +CAR_MIGRATE(cbmemc_reinit) diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index dd97196..a5993c4 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -177,7 +177,7 @@ static boot_state_t bs_post_device(void *arg) { timestamp_add_now(TS_DEVICE_DONE); - timestamp_sync(); + timestamp_reinit(); return BS_OS_RESUME_CHECK; } diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index bb9a9d3..5fe4f76 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -140,7 +140,7 @@ void timestamp_init(tsc_t base) #endif } -void timestamp_sync(void) +void timestamp_reinit(void) { if (!boot_cpu()) return; @@ -154,3 +154,6 @@ void timestamp_sync(void) if (ts_table) timestamp_do_sync(); } + +/* Call timestamp_reinit at CAR migration time. */ +CAR_MIGRATE(timestamp_reinit) diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..f44a7d4 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -869,7 +869,6 @@ void pci_ehci_read_resources(struct device *dev) } #endif -#if CONFIG_CAR_MIGRATION #if !defined(__PRE_RAM__) && !defined(__SMM__) static int get_usbdebug_from_cbmem(struct ehci_debug_info *info) { @@ -899,7 +898,6 @@ static void migrate_ehci_debug(void) } CAR_MIGRATE(migrate_ehci_debug); #endif -#endif /* CONFIG_CAR_MIGRATION */ unsigned long pci_ehci_base_regs(pci_devfn_t sdev) { @@ -931,7 +929,7 @@ int usbdebug_init(void) { struct ehci_debug_info *dbg_info = dbgp_ehci_info(); -#if CONFIG_CAR_MIGRATION && !defined(__PRE_RAM__) && !defined(__SMM__) +#if !defined(__PRE_RAM__) && !defined(__SMM__) if (!get_usbdebug_from_cbmem(dbg_info)) return 0; #endif diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 70c7202..db8891e 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -51,11 +51,6 @@ void main(unsigned long bist) cbmem_was_initted = !cbmem_initialize(); timestamp_init(rdtsc()); - timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index abc9474..fae5095 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -53,11 +53,6 @@ void main(unsigned long bist) cbmem_was_initted = !cbmem_initialize(); timestamp_init(rdtsc()); - timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 670fc00..f56884d 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -273,10 +273,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index aaecfc6..27a22f7 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -316,10 +316,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 444386f..2fe61d6 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -274,10 +274,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 464ddea..a0700af 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -326,10 +326,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 09dc60b..7691116 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -328,10 +328,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 22fff42..773079d 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -322,10 +322,5 @@ void main(unsigned long bist) } #endif post_code(0x3f); - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 42514e3..1b7e693 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -343,11 +343,6 @@ void main(unsigned long bist) } #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 97317f8..26a7b9b 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -347,11 +347,6 @@ void main(unsigned long bist) } #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index d7b165b..6c87f88 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -347,10 +347,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index b0ac5a8..ee715e7 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -354,10 +354,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 8bbb1f5..473e60e 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -95,7 +95,6 @@ void main(unsigned long bist) /* We got RAM working, now we can write the timestamps to RAM */ cbmem_initialize(); - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); /* FIXME: See if this is needed or take this out please */ /* Disable Memcard and SDIO */

1 0

Patch set updated for coreboot: 7b531c5 ROMCC boards: Fix builds with CBMEM console, timestamps or usbdebug
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3919 -gerrit commit 7b531c51da5d25fb918f603ac4ec246bc513d27b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 10 13:50:32 2013 +0300 ROMCC boards: Fix builds with CBMEM console, timestamps or usbdebug These features depend on CAR_GLOBAL region, which is not available when romstage is built with ROMCC. Exclude these from romstage, keep them available for ramstage. A follow-up patch will fix the dependencies and allows enabling these features in menuconfig. Change-Id: I9de5ad41ea733655a3fbdc734646f818e39cc471 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 3 --- src/console/console.c | 2 +- src/include/console/cbmem_console.h | 6 ++++++ src/lib/Makefile.inc | 6 ++++-- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 0e1f4e6..13ee1f0 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -46,9 +46,6 @@ static void __console_tx_byte(unsigned char byte) #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); #endif -#if CONFIG_CONSOLE_CBMEM - cbmemc_tx_byte(byte); -#endif } static void __console_tx_nibble(unsigned nibble) diff --git a/src/console/console.c b/src/console/console.c index b2b06b3..06a4604 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -119,7 +119,7 @@ void console_init(void) #if CONFIG_SPKMODEM spkmodem_init(); #endif -#if CONFIG_USBDEBUG +#if CONFIG_USBDEBUG && !defined(__BOOT_BLOCK__) usbdebug_init(); #endif diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h index 37ea4d8..9e2f14e 100644 --- a/src/include/console/cbmem_console.h +++ b/src/include/console/cbmem_console.h @@ -19,8 +19,14 @@ #ifndef _CONSOLE_CBMEM_CONSOLE_H_ #define _CONSOLE_CBMEM_CONSOLE_H_ +#if CONFIG_CACHE_AS_RAM || !defined(__PRE_RAM__) void cbmemc_init(void); void cbmemc_reinit(void); void cbmemc_tx_byte(unsigned char data); +#else +#define cbmemc_init() +#define cbmemc_reinit() +#define cbmemc_tx_byte() +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f3e7dc5..44b5ebd 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -47,12 +47,14 @@ romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c -romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c -romstage-$(CONFIG_USBDEBUG) += usbdebug.c romstage-$(CONFIG_SPKMODEM) += spkmodem.c +ifeq ($(CONFIG_CACHE_AS_RAM),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c +romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c +romstage-$(CONFIG_USBDEBUG) += usbdebug.c +endif ifneq ($(CONFIG_DYNAMIC_CBMEM),y) romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c

1 0

New patch to review for coreboot: 053d748 ROMCC boards: Fix builds with CBMEM console, timestamps or usbdebug
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3919 -gerrit commit 053d748051f17a77d455d309b02ef724245f08b6 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 10 13:50:32 2013 +0300 ROMCC boards: Fix builds with CBMEM console, timestamps or usbdebug Change-Id: I9de5ad41ea733655a3fbdc734646f818e39cc471 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 3 --- src/console/console.c | 2 +- src/include/console/cbmem_console.h | 6 ++++++ src/lib/Makefile.inc | 6 ++++-- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 0e1f4e6..13ee1f0 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -46,9 +46,6 @@ static void __console_tx_byte(unsigned char byte) #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); #endif -#if CONFIG_CONSOLE_CBMEM - cbmemc_tx_byte(byte); -#endif } static void __console_tx_nibble(unsigned nibble) diff --git a/src/console/console.c b/src/console/console.c index b2b06b3..06a4604 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -119,7 +119,7 @@ void console_init(void) #if CONFIG_SPKMODEM spkmodem_init(); #endif -#if CONFIG_USBDEBUG +#if CONFIG_USBDEBUG && !defined(__BOOT_BLOCK__) usbdebug_init(); #endif diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h index 37ea4d8..9e2f14e 100644 --- a/src/include/console/cbmem_console.h +++ b/src/include/console/cbmem_console.h @@ -19,8 +19,14 @@ #ifndef _CONSOLE_CBMEM_CONSOLE_H_ #define _CONSOLE_CBMEM_CONSOLE_H_ +#if CONFIG_CACHE_AS_RAM || !defined(__PRE_RAM__) void cbmemc_init(void); void cbmemc_reinit(void); void cbmemc_tx_byte(unsigned char data); +#else +#define cbmemc_init() +#define cbmemc_reinit() +#define cbmemc_tx_byte() +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f3e7dc5..44b5ebd 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -47,12 +47,14 @@ romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c -romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c -romstage-$(CONFIG_USBDEBUG) += usbdebug.c romstage-$(CONFIG_SPKMODEM) += spkmodem.c +ifeq ($(CONFIG_CACHE_AS_RAM),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c +romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c +romstage-$(CONFIG_USBDEBUG) += usbdebug.c +endif ifneq ($(CONFIG_DYNAMIC_CBMEM),y) romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c

1 0

Patch set updated for coreboot: 7cafc11 timestamps: Use stash before CBMEM is usable
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3909 -gerrit commit 7cafc1140176bde21607b254aafd9c102b4667d2 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Sep 7 17:26:08 2013 +0300 timestamps: Use stash before CBMEM is usable Change-Id: I9e927abdb1d7d9c233de5620a9a65b419e803ebf Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/include/timestamp.h | 2 -- src/lib/hardwaremain.c | 15 +++++++----- src/lib/timestamp.c | 62 ++++++++++++++++++++++++++++++++++--------------- 3 files changed, 52 insertions(+), 27 deletions(-) diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 2a39b97..0f56200 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -59,14 +59,12 @@ enum timestamp_id { void timestamp_init(tsc_t base); void timestamp_add(enum timestamp_id id, tsc_t ts_time); void timestamp_add_now(enum timestamp_id id); -void timestamp_stash(enum timestamp_id id); void timestamp_sync(void); tsc_t get_initial_timestamp(void); #else #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) -#define timestamp_stash(id) #define timestamp_sync() #endif diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 898e910..dd97196 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -126,7 +126,7 @@ static boot_state_t bs_pre_device(void *arg) static boot_state_t bs_dev_init_chips(void *arg) { - timestamp_stash(TS_DEVICE_ENUMERATE); + timestamp_add_now(TS_DEVICE_ENUMERATE); /* Initialize chips early, they might disable unused devices. */ dev_initialize_chips(); @@ -145,7 +145,7 @@ static boot_state_t bs_dev_enumerate(void *arg) static boot_state_t bs_dev_resources(void *arg) { - timestamp_stash(TS_DEVICE_CONFIGURE); + timestamp_add_now(TS_DEVICE_CONFIGURE); /* Now compute and assign the bus resources. */ dev_configure(); post_code(POST_DEVICE_CONFIGURATION_COMPLETE); @@ -155,7 +155,7 @@ static boot_state_t bs_dev_resources(void *arg) static boot_state_t bs_dev_enable(void *arg) { - timestamp_stash(TS_DEVICE_ENABLE); + timestamp_add_now(TS_DEVICE_ENABLE); /* Now actually enable devices on the bus */ dev_enable(); post_code(POST_DEVICES_ENABLED); @@ -165,7 +165,7 @@ static boot_state_t bs_dev_enable(void *arg) static boot_state_t bs_dev_init(void *arg) { - timestamp_stash(TS_DEVICE_INITIALIZE); + timestamp_add_now(TS_DEVICE_INITIALIZE); /* And of course initialize devices on the bus */ dev_initialize(); post_code(POST_DEVICES_INITIALIZED); @@ -175,7 +175,7 @@ static boot_state_t bs_dev_init(void *arg) static boot_state_t bs_post_device(void *arg) { - timestamp_stash(TS_DEVICE_DONE); + timestamp_add_now(TS_DEVICE_DONE); timestamp_sync(); @@ -446,7 +446,10 @@ static void boot_state_schedule_static_entries(void) void main(void) { - timestamp_stash(TS_START_RAMSTAGE); + /* Record current time, try to locate timestamps in CBMEM. */ + timestamp_init(rdtsc()); + + timestamp_add_now(TS_START_RAMSTAGE); post_code(POST_ENTRY_RAMSTAGE); /* console_init() MUST PRECEDE ALL printk()! */ diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 3f8a7bd..7e2f701 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -17,27 +17,26 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA */ +#include <stddef.h> #include <stdint.h> #include <console/console.h> #include <cbmem.h> #include <timestamp.h> -#ifndef __PRE_RAM__ -/* For CAR_GLOBAL... This should move out of x86 specific code */ #include <cpu/x86/car.h> -#endif #define MAX_TIMESTAMPS 30 -#ifndef __PRE_RAM__ -static struct timestamp_table* ts_table; -#endif +static struct timestamp_table* ts_table CAR_GLOBAL = NULL; +static tsc_t ts_basetime CAR_GLOBAL = { .lo = 0, .hi =0 }; + +static void timestamp_stash(enum timestamp_id id, tsc_t ts_time); static uint64_t tsc_to_uint64(tsc_t tstamp) { return (((uint64_t)tstamp.hi) << 32) + tstamp.lo; } -void timestamp_init(tsc_t base) +static void timestamp_real_init(tsc_t base) { struct timestamp_table* tst; @@ -53,18 +52,19 @@ void timestamp_init(tsc_t base) tst->base_time = tsc_to_uint64(base); tst->max_entries = MAX_TIMESTAMPS; tst->num_entries = 0; + + ts_table = tst; } void timestamp_add(enum timestamp_id id, tsc_t ts_time) { struct timestamp_entry *tse; -#ifdef __PRE_RAM__ - struct timestamp_table *ts_table = cbmem_find(CBMEM_ID_TIMESTAMP); -#else - if (!ts_table) - ts_table = cbmem_find(CBMEM_ID_TIMESTAMP); -#endif - if (!ts_table || (ts_table->num_entries == ts_table->max_entries)) + + if (!ts_table) { + timestamp_stash(id, ts_time); + return; + } + if (ts_table->num_entries == ts_table->max_entries) return; tse = &ts_table->entries[ts_table->num_entries++]; @@ -77,8 +77,6 @@ void timestamp_add_now(enum timestamp_id id) timestamp_add(id, rdtsc()); } -#ifndef __PRE_RAM__ - #define MAX_TIMESTAMP_CACHE 8 struct timestamp_cache { enum timestamp_id id; @@ -95,18 +93,18 @@ static int timestamp_entries CAR_GLOBAL = 0; * ram stage main() */ -void timestamp_stash(enum timestamp_id id) +static void timestamp_stash(enum timestamp_id id, tsc_t ts_time) { if (timestamp_entries >= MAX_TIMESTAMP_CACHE) { printk(BIOS_ERR, "ERROR: failed to add timestamp to cache\n"); return; } timestamp_cache[timestamp_entries].id = id; - timestamp_cache[timestamp_entries].time = rdtsc(); + timestamp_cache[timestamp_entries].time = ts_time; timestamp_entries++; } -void timestamp_sync(void) +static void timestamp_do_sync(void) { int i; for (i = 0; i < timestamp_entries; i++) @@ -114,4 +112,30 @@ void timestamp_sync(void) timestamp_entries = 0; } +void timestamp_init(tsc_t base) +{ +#ifndef __PRE_RAM__ + struct timestamp_table* tst; + + /* Locate and use an already existing table. */ + tst = cbmem_find(CBMEM_ID_TIMESTAMP); + if (tst) { + ts_table = tst; + return; + } +#endif + + timestamp_real_init(base); + if (ts_table) + timestamp_do_sync(); + else + ts_basetime = base; +} + +#ifndef __PRE_RAM__ +void timestamp_sync(void) +{ + if (!ts_table) + timestamp_init(ts_basetime); +} #endif

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Patch set updated for coreboot: 25bada6 timestamps intel: Move timestamp scratchpad to chipset
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3908 -gerrit commit 25bada6161df58369c7f0339fd9a75324e56db64 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Sep 7 11:38:56 2013 +0300 timestamps intel: Move timestamp scratchpad to chipset This retrieves back the value stored with store_initial_timestamp() in the bootblock for southbridge. Change-Id: I377c823706c33ed65af023d20d2e4323edd31199 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/intel/haswell/romstage.c | 5 +---- src/include/timestamp.h | 1 + src/mainboard/google/butterfly/romstage.c | 5 +---- src/mainboard/google/link/romstage.c | 5 +---- src/mainboard/google/parrot/romstage.c | 5 +---- src/mainboard/google/stout/romstage.c | 5 +---- src/mainboard/intel/emeraldlake2/romstage.c | 5 +---- src/mainboard/kontron/ktqm77/romstage.c | 5 +---- src/mainboard/lenovo/t60/romstage.c | 5 +---- src/mainboard/lenovo/x60/romstage.c | 5 +---- src/mainboard/samsung/lumpy/romstage.c | 5 +---- src/mainboard/samsung/stumpy/romstage.c | 5 +---- src/southbridge/intel/bd82x6x/Makefile.inc | 2 +- src/southbridge/intel/bd82x6x/early_pch.c | 33 +++++++++++++++++++++++++++++ src/southbridge/intel/i82801gx/Makefile.inc | 3 +-- src/southbridge/intel/i82801gx/early_lpc.c | 33 +++++++++++++++++++++++++++++ src/southbridge/intel/lynxpoint/early_pch.c | 12 +++++++++++ 17 files changed, 92 insertions(+), 47 deletions(-) diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 0cef888..06e3a85 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -204,10 +204,7 @@ void romstage_common(const struct romstage_params *params) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif #if CONFIG_COLLECT_TIMESTAMPS diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 9dd0d0f..2a39b97 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -61,6 +61,7 @@ void timestamp_add(enum timestamp_id id, tsc_t ts_time); void timestamp_add_now(enum timestamp_id id); void timestamp_stash(enum timestamp_id id); void timestamp_sync(void); +tsc_t get_initial_timestamp(void); #else #define timestamp_init(base) #define timestamp_add(id, time) diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 5e2b713..554df83 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -122,10 +122,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index f20a722..ad4da84 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -158,10 +158,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 9968226..79f9c2a 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -123,10 +123,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 83be94e..312483a 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -162,10 +162,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 88bcced..bb47cb8 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -174,10 +174,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 79fafe0..f78e293 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -160,10 +160,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 5bb7ac1..79a2988 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -216,10 +216,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif #if CONFIG_COLLECT_TIMESTAMPS diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 4d0eac7..ec4c00c 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -223,10 +223,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif #if CONFIG_COLLECT_TIMESTAMPS diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 449a81c..1a17949 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -141,10 +141,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index daa8d55..1169732 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -177,10 +177,7 @@ void main(unsigned long bist) tsc_t start_romstage_time; tsc_t before_dram_time; tsc_t after_dram_time; - tsc_t base_time = { - .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), - .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) - }; + tsc_t base_time = get_initial_timestamp(); #endif struct pei_data pei_data = { pei_version: PEI_VERSION, diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index ffd8943..8abc56a 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -47,7 +47,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c pch.c romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c romstage-y += reset.c -romstage-y += early_spi.c +romstage-y += early_spi.c early_pch.c ifeq ($(CONFIG_BUILD_WITH_FAKE_IFD),y) IFD_BIN_PATH := $(objgenerated)/ifdfake.bin diff --git a/src/southbridge/intel/bd82x6x/early_pch.c b/src/southbridge/intel/bd82x6x/early_pch.c new file mode 100644 index 0000000..9f80d41 --- /dev/null +++ b/src/southbridge/intel/bd82x6x/early_pch.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <timestamp.h> + +#if CONFIG_COLLECT_TIMESTAMPS +tsc_t get_initial_timestamp(void) +{ + tsc_t base_time = { + .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), + .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) + }; + return base_time; +} +#endif diff --git a/src/southbridge/intel/i82801gx/Makefile.inc b/src/southbridge/intel/i82801gx/Makefile.inc index ff9fbee..94c84ed 100644 --- a/src/southbridge/intel/i82801gx/Makefile.inc +++ b/src/southbridge/intel/i82801gx/Makefile.inc @@ -36,5 +36,4 @@ ramstage-y += watchdog.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c -romstage-y += early_smbus.c - +romstage-y += early_smbus.c early_lpc.c diff --git a/src/southbridge/intel/i82801gx/early_lpc.c b/src/southbridge/intel/i82801gx/early_lpc.c new file mode 100644 index 0000000..9f80d41 --- /dev/null +++ b/src/southbridge/intel/i82801gx/early_lpc.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/io.h> +#include <timestamp.h> + +#if CONFIG_COLLECT_TIMESTAMPS +tsc_t get_initial_timestamp(void) +{ + tsc_t base_time = { + .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), + .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) + }; + return base_time; +} +#endif diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index a390d73..1a78d57 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <arch/io.h> #include <device/pci_def.h> +#include <timestamp.h> #include <elog.h> #include "pch.h" @@ -62,6 +63,17 @@ static void pch_generic_setup(void) printk(BIOS_DEBUG, " done.\n"); } +#if CONFIG_COLLECT_TIMESTAMPS +tsc_t get_initial_timestamp(void) +{ + tsc_t base_time = { + .lo = pci_read_config32(PCI_DEV(0, 0x00, 0), 0xdc), + .hi = pci_read_config32(PCI_DEV(0, 0x1f, 2), 0xd0) + }; + return base_time; +} +#endif + static int sleep_type_s3(void) { u32 pm1_cnt;

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coreboot-gerrit September 2013