coreboot-gerrit September 2013

coreboot-gerrit@coreboot.org

1 participants
191 discussions

Patch merged into coreboot/master: ecd8424 Fix whitespace leaked into tree
by gerrit＠coreboot.org 17 Sep '13

17 Sep '13

the following patch was just integrated into master: commit ecd842491972a523a704faef3badd74d9a70a490 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Sep 13 07:57:49 2013 +0300 Fix whitespace leaked into tree Clean whitespace errors that have gotten past lint-stable-003-whitespace and gerrit review. Change-Id: Id76fc68e9d32d1b2b672d519b75cdc80cc4f1ad9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3920 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/3920 for details. -gerrit

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Patch merged into coreboot/master: 370ff4a lint whitespace: Fix rule to recurse into subdirectories
by gerrit＠coreboot.org 17 Sep '13

17 Sep '13

the following patch was just integrated into master: commit 370ff4af113e698aace3adfa393c76cfc9016d38 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Sep 13 08:03:52 2013 +0300 lint whitespace: Fix rule to recurse into subdirectories The rule "-perm +111 -prune" matched any searchable directory and did not recursively find files in them. The use of "+mode" for -perm is deprecated. Change-Id: I1b43f89ee9ab37928e56104b0f07241ff84b84c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3921 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/3921 for details. -gerrit

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New patch to review for coreboot: f511b1c buildgcc: Use per-arch build directories
by Patrick Georgi 17 Sep '13

17 Sep '13

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3929 -gerrit commit f511b1c7757604da652a71ba777da0ecb5f05c57 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Sep 17 20:59:52 2013 +0200 buildgcc: Use per-arch build directories This simplifies debugging and also fixes an issue when build directories are kept between buildgcc runs for different architectures. Change-Id: I5badccd3368e3014680da3eedb607119fff8fa7f Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/crossgcc/buildgcc | 118 +++++++++++++++++++++++++------------------------ 1 file changed, 60 insertions(+), 58 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 57f536e..b8b90e7 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -133,7 +133,7 @@ fi cleanup() { printf "Cleaning up temporary files... " - rm -rf build-* combined gcc-* gmp-* mpfr-* mpc-* libelf-* binutils-* + rm -rf ${BUILDDIRPREFIX}-* combined gcc-* gmp-* mpfr-* mpc-* libelf-* binutils-* rm -rf gdb-* acpica-* python-* expat-* printf "${green}ok${NC}\n" } @@ -234,6 +234,8 @@ case "$TARGETARCH" in esac echo "Target arch is now $TARGETARCH" +BUILDDIRPREFIX=build-${TARGETARCH} + GDB_PACKAGE="GDB" PYTHON_PACKAGE="PYTHON" EXPAT_PACKAGE="EXPAT" @@ -331,21 +333,21 @@ if [ "$USECCACHE" = 1 ]; then CC="ccache $CC" fi -mkdir -p build-gmp build-mpfr build-mpc build-libelf build-binutils \ - build-gcc build-python build-expat +mkdir -p ${BUILDDIRPREFIX}-gmp ${BUILDDIRPREFIX}-mpfr ${BUILDDIRPREFIX}-mpc ${BUILDDIRPREFIX}-libelf ${BUILDDIRPREFIX}-binutils \ + ${BUILDDIRPREFIX}-gcc ${BUILDDIRPREFIX}-python ${BUILDDIRPREFIX}-expat mkdir -p $DESTDIR$TARGETDIR/bin export PATH=$DESTDIR$TARGETDIR/bin:$PATH if [ $SKIPGDB -eq 0 ]; then - mkdir -p build-gdb + mkdir -p ${BUILDDIRPREFIX}-gdb fi -if [ -f build-gmp/.success ]; then +if [ -f ${BUILDDIRPREFIX}-gmp/.success ]; then printf "Skipping GMP as it is already built\n" else printf "Building GMP ${GMP_VERSION} ... " ( - cd build-gmp + cd ${BUILDDIRPREFIX}-gmp rm -f .failed CC="$CC" ../${GMP_DIR}/configure --disable-shared --prefix=$TARGETDIR $OPTIONS \ || touch .failed @@ -355,10 +357,10 @@ printf "Building GMP ${GMP_VERSION} ... " normalize_dirs if [ ! -f .failed ]; then touch .success; fi -) > build-gmp/crossgcc-build.log 2>&1 -test -r build-gmp/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-gmp/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-gmp/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-gmp/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-gmp/.failed && exit 1 fi # Now set CFLAGS to match GMP CFLAGS but strip out -pedantic @@ -366,13 +368,13 @@ fi HOSTCFLAGS=`grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2 |\ sed s,-pedantic,,` -if [ -f build-mpfr/.success ]; then +if [ -f ${BUILDDIRPREFIX}-mpfr/.success ]; then printf "Skipping MPFR as it is already built\n" else printf "Building MPFR ${MPFR_VERSION} ... " ( test $UNAME = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL" - cd build-mpfr + cd ${BUILDDIRPREFIX}-mpfr rm -f .failed CC="$CC" ../${MPFR_DIR}/configure --disable-shared --prefix=$TARGETDIR \ --infodir=$TARGETDIR/info \ @@ -389,18 +391,18 @@ printf "Building MPFR ${MPFR_VERSION} ... " fi if [ ! -f .failed ]; then touch .success; fi -) > build-mpfr/crossgcc-build.log 2>&1 -test -r build-mpfr/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-mpfr/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-mpfr/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-mpfr/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-mpfr/.failed && exit 1 fi -if [ -f build-mpc/.success ]; then +if [ -f ${BUILDDIRPREFIX}-mpc/.success ]; then printf "Skipping MPC as it is already built\n" else printf "Building MPC ${MPC_VERSION} ... " ( - cd build-mpc + cd ${BUILDDIRPREFIX}-mpc rm -f .failed CC="$CC" ../${MPC_DIR}/configure --disable-shared --prefix=$TARGETDIR \ --infodir=$TARGETDIR/info --with-mpfr=$DESTDIR$TARGETDIR \ @@ -412,18 +414,18 @@ printf "Building MPC ${MPC_VERSION} ... " normalize_dirs if [ ! -f .failed ]; then touch .success; fi -) > build-mpc/crossgcc-build.log 2>&1 -test -r build-mpc/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-mpc/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-mpc/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-mpc/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-mpc/.failed && exit 1 fi -if [ -f build-libelf/.success ]; then +if [ -f ${BUILDDIRPREFIX}-libelf/.success ]; then printf "Skipping libelf as it is already built\n" else printf "Building libelf ${LIBELF_VERSION} ... " ( - cd build-libelf + cd ${BUILDDIRPREFIX}-libelf rm -f .failed echo "$HOSTCFLAGS" CC="$CC" CFLAGS="$HOSTCFLAGS" libelf_cv_elf_h_works=no \ @@ -435,13 +437,13 @@ printf "Building libelf ${LIBELF_VERSION} ... " normalize_dirs if [ ! -f .failed ]; then touch .success; fi -) > build-libelf/crossgcc-build.log 2>&1 -test -r build-libelf/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-libelf/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-libelf/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-libelf/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-libelf/.failed && exit 1 fi -if [ -f build-binutils/.success ]; then +if [ -f ${BUILDDIRPREFIX}-binutils/.success ]; then printf "Skipping binutils as it is already built\n" else printf "Building binutils ${BINUTILS_VERSION} ... " @@ -452,7 +454,7 @@ printf "Building binutils ${BINUTILS_VERSION} ... " autoconf cd .. # Now build binutils - cd build-binutils + cd ${BUILDDIRPREFIX}-binutils rm -f .failed CC="$CC" ../binutils-${BINUTILS_VERSION}/configure --prefix=$TARGETDIR \ --target=${TARGETARCH} --disable-werror --disable-nls \ @@ -460,13 +462,13 @@ printf "Building binutils ${BINUTILS_VERSION} ... " $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed if [ ! -f .failed ]; then touch .success; fi -) > build-binutils/crossgcc-build.log 2>&1 -test -r build-binutils/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-binutils/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-binutils/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-binutils/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-binutils/.failed && exit 1 fi -if [ -f build-gcc/.success ]; then +if [ -f ${BUILDDIRPREFIX}-gcc/.success ]; then printf "Skipping GCC as it is already built\n" else printf "Building GCC ${GCC_VERSION} ... " @@ -484,7 +486,7 @@ printf "Building GCC ${GCC_VERSION} ... " autoconf cd .. # Now, finally, we can build gcc: - cd build-gcc + cd ${BUILDDIRPREFIX}-gcc rm -f .failed # GCC does not honour HOSTCFLAGS at all. CFLAGS are used for # both target and host object files. This is pretty misdesigned. @@ -511,20 +513,20 @@ printf "Building GCC ${GCC_VERSION} ... " fi if [ ! -f .failed ]; then touch .success; fi -) > build-gcc/crossgcc-build.log 2>&1 -test -r build-gcc/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-gcc/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-gcc/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-gcc/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-gcc/.failed && exit 1 fi -if [ -f build-expat/.success ]; then +if [ -f ${BUILDDIRPREFIX}-expat/.success ]; then printf "Skipping Expat as it is already built\n" elif [ $SKIPPYTHON -eq 1 ]; then printf "Skipping Expat (Python scripting not enabled)\n" else printf "Building Expat ${EXPAT_VERSION} ... " ( - cd build-expat + cd ${BUILDDIRPREFIX}-expat rm -f .failed CC="$CC" CFLAGS="$HOSTCFLAGS" ../${EXPAT_DIR}/configure --disable-shared \ --prefix=$TARGETDIR --target=${TARGETARCH} || touch .failed @@ -534,21 +536,21 @@ printf "Building Expat ${EXPAT_VERSION} ... " normalize_dirs if [ ! -f .failed ]; then touch .success; fi -) > build-expat/crossgcc-build.log 2>&1 -test -r build-expat/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-expat/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-expat/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-expat/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-expat/.failed && exit 1 fi -if [ -f build-python/.success ]; then +if [ -f ${BUILDDIRPREFIX}-python/.success ]; then printf "Skipping Python as it is already built\n" elif [ $SKIPPYTHON -eq 1 ]; then printf "Skipping Python (Python scripting not enabled)\n" else printf "Building Python ${PYTHON_VERSION} ... " ( - cd build-python + cd ${BUILDDIRPREFIX}-python rm -f .failed CC="$CC" CFLAGS="$HOSTCFLAGS" ../${PYTHON_DIR}/configure --prefix=$TARGETDIR \ --target=${TARGETARCH} || touch .failed @@ -558,21 +560,21 @@ printf "Building Python ${PYTHON_VERSION} ... " normalize_dirs if [ ! -f .failed ]; then touch .success; fi -) > build-python/crossgcc-build.log 2>&1 -test -r build-python/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-python/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-python/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-python/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-python/.failed && exit 1 fi -if [ -f build-gdb/.success ]; then +if [ -f ${BUILDDIRPREFIX}-gdb/.success ]; then printf "Skipping GDB as it is already built\n" elif [ $SKIPGDB -eq 1 ]; then printf "Skipping GDB (GDB support not enabled)\n" else printf "Building GDB ${GDB_VERSION} ... " ( - cd build-gdb + cd ${BUILDDIRPREFIX}-gdb export PYTHONHOME=$DESTDIR$TARGETDIR rm -f .failed LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$TARGETDIR/lib \ @@ -583,10 +585,10 @@ printf "Building GDB ${GDB_VERSION} ... " $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed if [ ! -f .failed ]; then touch .success; fi -) > build-gdb/crossgcc-build.log 2>&1 -test -r build-gdb/.failed && printf "${RED}failed${NC}\n" || \ +) > ${BUILDDIRPREFIX}-gdb/crossgcc-build.log 2>&1 +test -r ${BUILDDIRPREFIX}-gdb/.failed && printf "${RED}failed${NC}\n" || \ printf "${green}ok${NC}\n" -test -r build-gdb/.failed && exit 1 +test -r ${BUILDDIRPREFIX}-gdb/.failed && exit 1 fi if [ -f $IASL_DIR/source/compiler/.success ]; then @@ -616,15 +618,15 @@ cp $0 $DESTDIR$TARGETDIR/"$0.commit.`git describe`" if [ $SAVETEMPS -eq 0 ]; then printf "Cleaning up... " - rm -rf ${GMP_DIR} build-gmp - rm -rf ${MPFR_DIR} build-mpfr - rm -rf ${MPC_DIR} build-mpc - rm -rf ${LIBELF_DIR} build-libelf - rm -rf ${BINUTILS_DIR} build-binutils - rm -rf ${GCC_DIR} build-gcc - rm -rf ${GDB_DIR} build-gdb - rm -rf ${EXPAT_DIR} build-expat - rm -rf ${PYTHON_DIR} build-python + rm -rf ${GMP_DIR} ${BUILDDIRPREFIX}-gmp + rm -rf ${MPFR_DIR} ${BUILDDIRPREFIX}-mpfr + rm -rf ${MPC_DIR} ${BUILDDIRPREFIX}-mpc + rm -rf ${LIBELF_DIR} ${BUILDDIRPREFIX}-libelf + rm -rf ${BINUTILS_DIR} ${BUILDDIRPREFIX}-binutils + rm -rf ${GCC_DIR} ${BUILDDIRPREFIX}-gcc + rm -rf ${GDB_DIR} ${BUILDDIRPREFIX}-gdb + rm -rf ${EXPAT_DIR} ${BUILDDIRPREFIX}-expat + rm -rf ${PYTHON_DIR} ${BUILDDIRPREFIX}-python rm -rf ${IASL_DIR} printf "${green}ok${NC}\n" else

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New patch to review for coreboot: ea57a43 usbdebug AMD: Add choice of EHCI controller
by Kyösti Mälkki 17 Sep '13

17 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3928 -gerrit commit ea57a4352ee21a6562770a66a4b61dd3d1d51ece Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 17 00:12:05 2013 +0300 usbdebug AMD: Add choice of EHCI controller Chipsets sb700 and sb800/hudson have more than one USB EHCI controller, implement the selection logic using already existing Kconfig option. Change-Id: I9e0df1669d73863c95c36a3a7fee40d58f6f097e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/southbridge/amd/agesa/hudson/enable_usbdebug.c | 11 ++++++----- src/southbridge/amd/sb700/enable_usbdebug.c | 10 ++++------ src/southbridge/amd/sb800/enable_usbdebug.c | 11 ++++++----- 3 files changed, 16 insertions(+), 16 deletions(-) diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c index 459df6f..cce3925 100644 --- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c +++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c @@ -26,15 +26,16 @@ #include <device/pci_def.h> #include "hudson.h" -#ifndef HUDSON_DEVN_BASE -#define HUDSON_DEVN_BASE 0 -#endif - #define DEBUGPORT_MISC_CONTROL 0x80 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) { - return PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2); + if (hcd_idx==3) + return PCI_DEV(0, 0x16, 2); + else if (hcd_idx==2) + return PCI_DEV(0, 0x13, 2); + else + return PCI_DEV(0, 0x12, 2); } void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port) diff --git a/src/southbridge/amd/sb700/enable_usbdebug.c b/src/southbridge/amd/sb700/enable_usbdebug.c index 3d44a1a..57798c1 100644 --- a/src/southbridge/amd/sb700/enable_usbdebug.c +++ b/src/southbridge/amd/sb700/enable_usbdebug.c @@ -29,14 +29,12 @@ #define DEBUGPORT_MISC_CONTROL 0x80 -/* - * Note: The SB700 has two EHCI devices, D18:F2 and D19:F2. - * This code currently only supports the first one, i.e., USB Debug devices - * attached to physical USB ports belonging to the first EHCI device. - */ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) { - return PCI_DEV(0, 0x12, 2); + if (hcd_idx==2) + return PCI_DEV(0, 0x13, 2); + else + return PCI_DEV(0, 0x12, 2); } void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port) diff --git a/src/southbridge/amd/sb800/enable_usbdebug.c b/src/southbridge/amd/sb800/enable_usbdebug.c index 9277869..34d7608 100644 --- a/src/southbridge/amd/sb800/enable_usbdebug.c +++ b/src/southbridge/amd/sb800/enable_usbdebug.c @@ -26,15 +26,16 @@ #include <device/pci_def.h> #include "sb800.h" -#ifndef SB800_DEVN_BASE -#define SB800_DEVN_BASE 0 -#endif - #define DEBUGPORT_MISC_CONTROL 0x80 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) { - return PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2); + if (hcd_idx==3) + return PCI_DEV(0, 0x16, 2); + else if (hcd_idx==2) + return PCI_DEV(0, 0x13, 2); + else + return PCI_DEV(0, 0x12, 2); } void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)

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Patch set updated for coreboot: 927db64 usbdebug: Allow an USB hub on the debug dongle
by Kyösti Mälkki 17 Sep '13

17 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3925 -gerrit commit 927db64f6e76c4801f8c5b4d40ed549b03931c7e Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Aug 23 23:33:16 2013 +0300 usbdebug: Allow an USB hub on the debug dongle Some development kits with USB 2.0 HS OTG have an USB hub instead of being directly connected to the USB host/device controller. Send the necessary initialisation sequence, using HUB CLASS requests of PORT_POWER and PORT_RESET to enable a pre-selected port number where a device supporting debug descriptor is located. This also adds the Kconfig option for BeagleBone. Change-Id: I7a5d0ba0962a9ca06bf3196232ed4a03bdfb2b06 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Kconfig | 25 ++++++++++++- src/lib/usbdebug.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 128 insertions(+), 2 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..9bfb6e9 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -173,10 +173,11 @@ config USBDEBUG If unsure, say N. +if USBDEBUG + config USBDEBUG_HCD_INDEX int "Index for EHCI controller to use with usbdebug" default 0 - depends on USBDEBUG help Some boards have multiple EHCI controllers with possibly only one having the Debug Port capability on an external USB port. @@ -188,7 +189,6 @@ config USBDEBUG_HCD_INDEX config USBDEBUG_DEFAULT_PORT int "Default USB port to use as Debug Port" default 0 - depends on USBDEBUG help Selects which physical USB port usbdebug dongle is connected to. Setting of 0 means to scan possible ports starting from 1. @@ -202,6 +202,27 @@ config USBDEBUG_DEFAULT_PORT your mainboard) is highly board-specific, and you'll likely have to find out by trial-and-error. +choice + prompt "Type of dongle" + default USBDEBUG_DONGLE_STD + +config USBDEBUG_DONGLE_STD + bool "Net20DC or compatible" + +config USBDEBUG_DONGLE_BEAGLEBONE + bool "BeagleBone" + help + Use this to configure the USB hub on BeagleBone board. + +endchoice + +config USBDEBUG_OPTIONAL_HUB_PORT + int + default 2 if USBDEBUG_DONGLE_BEAGLEBONE + default 0 + +endif # USBDEBUG + # TODO: Deps? # TODO: Improve description. config ONBOARD_VGA_IS_PRIMARY diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..27097c7 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -483,6 +483,102 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) return -1; //-ENOTCONN; } +#define USB_HUB_PORT_CONNECTION 0 +#define USB_HUB_PORT_ENABLED 1 +#define USB_HUB_PORT_RESET 4 +#define USB_HUB_PORT_POWER 8 +#define USB_HUB_C_PORT_CONNECTION 16 +#define USB_HUB_C_PORT_RESET 20 + +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + +static int hub_port_status(const char * buf, int feature) +{ + return !!(buf[feature>>3] & (1<<(feature&0x7))); +} + +static int dbgp_hub_enable(struct ehci_dbg_port *ehci_debug, unsigned int port) +{ + const u8 hub_addr = USB_DEBUG_DEVNUM-1; + char status[8]; + int ret, loop; + + /* Move hub to address 126. */ + ret = dbgp_control_msg(ehci_debug, 0, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_ADDRESS, hub_addr, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Enter configured state on hub. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_CONFIGURATION, 1, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Set PORT_POWER, poll for PORT_CONNECTION. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_POWER, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_PORT_CONNECTION)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_CONNECTION, port, NULL, 0); + if (ret < 0) + goto err; + + + /* Set PORT_RESET, poll for C_PORT_RESET. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_C_PORT_RESET)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + if (hub_port_status(status, USB_HUB_PORT_ENABLED)) + return 0; +err: + return -1; +} +#endif /* CONFIG_USBDEBUG_OPTIONAL_HUB_PORT */ + #if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE static void enable_usbdebug(void) { @@ -640,6 +736,15 @@ try_next_port: dbgp_mdelay(100); +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + ret = dbgp_hub_enable(ehci_debug, CONFIG_USBDEBUG_OPTIONAL_HUB_PORT); + if (ret < 0) { + dprintk(BIOS_INFO, "Could not enable USB hub on debug port.\n"); + ret = -6; + goto err; + } +#endif + /* Find the debug device and make it device number 127 */ devnum = 0; debug_dev_retry:

1 0

Patch set updated for coreboot: 900b4be qemu: q35: fix pci bar placement
by Gerd Hoffmann 17 Sep '13

17 Sep '13

Gerd Hoffmann (kraxel(a)redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3927 -gerrit commit 900b4becb5373cf366cd2172082a5ff56cd0de6d Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Tue Sep 17 10:35:43 2013 +0200 qemu: q35: fix pci bar placement Without this coreboot may (depends on the amount of memory) place the pci bars below 0xb0000000, then the linux kernel goes move them around so they are inside the window declared in the acpi tables. This breaks vesafb as the vga framebuffer gets moved after vgabios initialization. It's also not exactly nice to expect the OS fix our mess ;) Change-Id: If6b50ea863958eea71b567ccb7a06c6a28076111 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/mainboard/emulation/qemu-i440fx/northbridge.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index a2cd37b..c878689 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -54,6 +54,7 @@ static void cpu_pci_domain_read_resources(struct device *dev) { u16 nbid = pci_read_config16(dev_find_slot(0, 0), PCI_DEVICE_ID); int i440fx = (nbid == 0x1237); + int q35 = (nbid == 0x29c0); struct resource *res; unsigned long tomk = 0, high; int idx = 10; @@ -89,6 +90,21 @@ static void cpu_pci_domain_read_resources(struct device *dev) set_top_of_ram(tomk * 1024); #endif + if (q35 && ((tomk * 1024) < 0xb0000000)) { + /* + * Reserve the region between top-of-ram and the + * mmconf xbar (ar 0xb0000000), so coreboot doesn't + * place pci bars there. The region isn't declared as + * pci io window in the acpi tables (\_SB.PCI0._CRS). + */ + res = new_resource(dev, idx++); + res->base = tomk * 1024; + res->size = 0xb0000000 - tomk * 1024; + res->limit = 0xffffffff; + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | + IORESOURCE_STORED | IORESOURCE_ASSIGNED; + } + if (i440fx) { /* Reserve space for the IOAPIC. This should be in * the southbridge, but I couldn't tell which device

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New patch to review for coreboot: fa1773b qemu: q35: fix pci bar placement
by Gerd Hoffmann 17 Sep '13

17 Sep '13

Gerd Hoffmann (kraxel(a)redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3927 -gerrit commit fa1773beb5aecf08d000c6385d20bf1e72ab3557 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Tue Sep 17 10:35:43 2013 +0200 qemu: q35: fix pci bar placement Without this coreboot may (depends on the amount of memory) place the pci bars below 0xb0000000, then the linux kernel goes move them around so they are inside the window declared in the acpi tables. This breaks vesafb as the vga framebuffer gets moved after vgabios initialization. It's also not exactly nice to expect the OS fix our mess ;) Change-Id: If6b50ea863958eea71b567ccb7a06c6a28076111 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/mainboard/emulation/qemu-i440fx/northbridge.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/src/mainboard/emulation/qemu-i440fx/northbridge.c b/src/mainboard/emulation/qemu-i440fx/northbridge.c index a2cd37b..c878689 100644 --- a/src/mainboard/emulation/qemu-i440fx/northbridge.c +++ b/src/mainboard/emulation/qemu-i440fx/northbridge.c @@ -54,6 +54,7 @@ static void cpu_pci_domain_read_resources(struct device *dev) { u16 nbid = pci_read_config16(dev_find_slot(0, 0), PCI_DEVICE_ID); int i440fx = (nbid == 0x1237); + int q35 = (nbid == 0x29c0); struct resource *res; unsigned long tomk = 0, high; int idx = 10; @@ -89,6 +90,21 @@ static void cpu_pci_domain_read_resources(struct device *dev) set_top_of_ram(tomk * 1024); #endif + if (q35 && ((tomk * 1024) < 0xb0000000)) { + /* + * Reserve the region between top-of-ram and the + * mmconf xbar (ar 0xb0000000), so coreboot doesn't + * place pci bars there. The region isn't declared as + * pci io window in the acpi tables (\_SB.PCI0._CRS). + */ + res = new_resource(dev, idx++); + res->base = tomk * 1024; + res->size = 0xb0000000 - tomk * 1024; + res->limit = 0xffffffff; + res->flags = IORESOURCE_MEM | IORESOURCE_FIXED | + IORESOURCE_STORED | IORESOURCE_ASSIGNED; + } + if (i440fx) { /* Reserve space for the IOAPIC. This should be in * the southbridge, but I couldn't tell which device

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New patch to review for coreboot: 26befd6 qemu: q35: avoid address conflict
by Gerd Hoffmann 17 Sep '13

17 Sep '13

Gerd Hoffmann (kraxel(a)redhat.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3926 -gerrit commit 26befd67ccfb3094b04011c302c3b41c867136d0 Author: Gerd Hoffmann <kraxel(a)redhat.com> Date: Tue Sep 17 09:49:02 2013 +0200 qemu: q35: avoid address conflict Change-Id: Ife83f7ad4c1aab487ea3e3f14f51d91e02d23592 Signed-off-by: Gerd Hoffmann <kraxel(a)redhat.com> --- src/southbridge/intel/i82801ix/i82801ix.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h index ca28107..a732b3a 100644 --- a/src/southbridge/intel/i82801ix/i82801ix.h +++ b/src/southbridge/intel/i82801ix/i82801ix.h @@ -29,7 +29,11 @@ #define DEFAULT_TBAR 0xfed1b000 #define DEFAULT_RCBA 0xfed1c000 -#define DEFAULT_PMBASE 0x00000500 /* Speedstep code has this hardcoded, too. */ +#ifdef CONFIG_BOARD_EMULATION_QEMU_X86_Q35 +# define DEFAULT_PMBASE 0x00000700 +#else +# define DEFAULT_PMBASE 0x00000500 /* Speedstep code has this hardcoded, too. */ +#endif #define DEFAULT_TCOBASE (DEFAULT_PMBASE + 0x60) #define DEFAULT_GPIOBASE 0x00000580 @@ -120,7 +124,11 @@ #define D28Fx_SLCAP 0x54 -#define SMBUS_IO_BASE 0x0400 +#ifdef CONFIG_BOARD_EMULATION_QEMU_X86_Q35 +# define SMBUS_IO_BASE 0x0600 +#else +# define SMBUS_IO_BASE 0x0400 +#endif /* PCI Configuration Space (D31:F3): SMBus */ #define SMB_BASE 0x20

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Patch merged into coreboot/master: 73cffd6 beaglebone: Stop reinitializing the console in bootblock.c.
by gerrit＠coreboot.org 17 Sep '13

17 Sep '13

the following patch was just integrated into master: commit 73cffd69993ed4fbad5237f6ad093da790ed85ae Author: Gabe Black <gabeblack(a)chromium.org> Date: Sun Sep 15 20:59:08 2013 -0700 beaglebone: Stop reinitializing the console in bootblock.c. The console has already been initialized in the generic bootblock code, and reinitializing it causes the same banner line to be printed twice and lots of artifacts in the actual output. This same change had been made to the other ARM boards but not for beaglebone. Change-Id: I72e3be1326b1a52b7ec438a44e4fd5f87e4ec717 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3924 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3924 for details. -gerrit

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Patch merged into coreboot/master: 4938a32 ARM: Add some missing dependencies on config.h to ARM's Makefile.inc.
by gerrit＠coreboot.org 17 Sep '13

17 Sep '13

the following patch was just integrated into master: commit 4938a329ee42e0f9b413efc0b7ebd5bd903dd7b8 Author: Gabe Black <gabeblack(a)chromium.org> Date: Sun Sep 15 20:53:57 2013 -0700 ARM: Add some missing dependencies on config.h to ARM's Makefile.inc. These dependencies came indirectly through kconfig.h which was included automatically with a -include option which was either part of INCLUDES or specified directly. With this change, I'm able to build for beaglebone with make -j 48. Change-Id: Ib57d0c6a755b747165b235c2328c3c30bd6dd67d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3922 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3922 for details. -gerrit

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coreboot-gerrit September 2013