coreboot-gerrit September 2013

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Patch set updated for coreboot: 5b68514 timestamps: Stash early timestamps in CAR_GLOBAL
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3910 -gerrit commit 5b68514f3c8757585079fc17d6811d567ccfb9fd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Sep 7 20:26:36 2013 +0300 timestamps: Stash early timestamps in CAR_GLOBAL Change-Id: I87b454c748cf885491d5b38bfe53a2ec0e9f38c5 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/intel/haswell/romstage.c | 29 +++++++------------------- src/lib/timestamp.c | 21 ++++++++++++------- src/mainboard/emulation/qemu-i440fx/romstage.c | 4 ++-- src/mainboard/emulation/qemu-q35/romstage.c | 4 ++-- src/mainboard/google/butterfly/romstage.c | 26 +++++------------------ src/mainboard/google/link/romstage.c | 26 +++++------------------ src/mainboard/google/parrot/romstage.c | 26 +++++------------------ src/mainboard/google/stout/romstage.c | 26 +++++------------------ src/mainboard/intel/emeraldlake2/romstage.c | 26 +++++------------------ src/mainboard/kontron/ktqm77/romstage.c | 26 +++++------------------ src/mainboard/lenovo/t60/romstage.c | 26 +++++------------------ src/mainboard/lenovo/x60/romstage.c | 26 +++++------------------ src/mainboard/samsung/lumpy/romstage.c | 26 +++++------------------ src/mainboard/samsung/stumpy/romstage.c | 26 +++++------------------ 14 files changed, 74 insertions(+), 244 deletions(-) diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index 06e3a85..e62b894 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -200,16 +200,8 @@ void romstage_common(const struct romstage_params *params) int wake_from_s3; struct romstage_handoff *handoff; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif - -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (params->bist == 0) enable_lapic(); @@ -249,17 +241,15 @@ void romstage_common(const struct romstage_params *params) post_code(0x3a); params->pei_data->boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + + timestamp_add_now(TS_BEFORE_INITRAM); report_platform_info(); sdram_initialize(params->pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); + post_code(0x3b); intel_early_me_status(); @@ -288,13 +278,8 @@ void romstage_common(const struct romstage_params *params) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif } static inline void prepare_for_resume(struct romstage_handoff *handoff) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 7e2f701..eac33a2 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -114,7 +114,10 @@ static void timestamp_do_sync(void) void timestamp_init(tsc_t base) { -#ifndef __PRE_RAM__ +#ifdef __PRE_RAM__ + /* Copy of basetime, it is too early for CBMEM. */ + ts_basetime = base; +#else struct timestamp_table* tst; /* Locate and use an already existing table. */ @@ -123,19 +126,21 @@ void timestamp_init(tsc_t base) ts_table = tst; return; } -#endif + /* Copy of basetime, may be too early for CBMEM. */ + ts_basetime = base; timestamp_real_init(base); - if (ts_table) - timestamp_do_sync(); - else - ts_basetime = base; +#endif } -#ifndef __PRE_RAM__ void timestamp_sync(void) { +#ifdef __PRE_RAM__ + timestamp_real_init(ts_basetime); +#else if (!ts_table) timestamp_init(ts_basetime); -} #endif + if (ts_table) + timestamp_do_sync(); +} diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 413f745..70c7202 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -49,10 +49,10 @@ void main(unsigned long bist) //dump_pci_devices(); cbmem_was_initted = !cbmem_initialize(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(rdtsc()); + timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index e9cd801..abc9474 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -51,10 +51,10 @@ void main(unsigned long bist) //dump_pci_devices(); cbmem_was_initted = !cbmem_initialize(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(rdtsc()); + timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 554df83..670fc00 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -118,12 +118,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -170,9 +164,8 @@ void main(unsigned long bist) }, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -237,14 +230,10 @@ void main(unsigned long bist) post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c); rcba_config(); @@ -284,13 +273,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index ad4da84..aaecfc6 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -154,12 +154,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -206,9 +200,8 @@ void main(unsigned long bist) }, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -280,14 +273,10 @@ void main(unsigned long bist) post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c); rcba_config(); @@ -327,13 +316,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 79f9c2a..444386f 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -119,12 +119,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -171,9 +165,8 @@ void main(unsigned long bist) }, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -238,14 +231,10 @@ void main(unsigned long bist) post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c); rcba_config(); @@ -285,13 +274,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 312483a..5ace4f6 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -158,12 +158,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -215,9 +209,8 @@ void main(unsigned long bist) }, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -287,14 +280,10 @@ void main(unsigned long bist) post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3b); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -341,13 +330,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index bb47cb8..09dc60b 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -170,12 +170,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -220,9 +214,8 @@ void main(unsigned long bist) }, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -286,14 +279,10 @@ void main(unsigned long bist) post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3b); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -339,13 +328,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index f78e293..22fff42 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -156,12 +156,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -216,9 +210,8 @@ void main(unsigned long bist) pcie_init: 1, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -289,14 +282,10 @@ void main(unsigned long bist) post_code(0x3a); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3c); rcba_config(); @@ -333,13 +322,8 @@ void main(unsigned long bist) } #endif post_code(0x3f); -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 79a2988..42514e3 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -212,16 +212,9 @@ void main(unsigned long bist) int cbmem_was_initted; const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 }; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -291,13 +284,9 @@ void main(unsigned long bist) dump_spd_registers(); #endif -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(boot_mode, spd_addrmap); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); /* Perform some initialization that must run before stage2 */ early_ich7_init(); @@ -354,13 +343,8 @@ void main(unsigned long bist) } #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index ec4c00c..97317f8 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -219,16 +219,9 @@ void main(unsigned long bist) int cbmem_was_initted; const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 }; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -293,13 +286,9 @@ void main(unsigned long bist) dump_spd_registers(); #endif -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(boot_mode, spd_addrmap); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); /* Perform some initialization that must run before stage2 */ early_ich7_init(); @@ -358,13 +347,8 @@ void main(unsigned long bist) } #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 1a17949..d7b165b 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -137,12 +137,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -192,9 +186,8 @@ void main(unsigned long bist) spd_blob *spd_data; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -307,14 +300,10 @@ void main(unsigned long bist) post_code(0x39); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3a); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -358,13 +347,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit(); diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index 1169732..b0ac5a8 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -173,12 +173,6 @@ void main(unsigned long bist) u32 pm1_cnt; u16 pm1_sts; -#if CONFIG_COLLECT_TIMESTAMPS - tsc_t start_romstage_time; - tsc_t before_dram_time; - tsc_t after_dram_time; - tsc_t base_time = get_initial_timestamp(); -#endif struct pei_data pei_data = { pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, @@ -223,9 +217,8 @@ void main(unsigned long bist) }, }; -#if CONFIG_COLLECT_TIMESTAMPS - start_romstage_time = rdtsc(); -#endif + timestamp_init(get_initial_timestamp()); + timestamp_add_now(TS_START_ROMSTAGE); if (bist == 0) enable_lapic(); @@ -315,14 +308,10 @@ void main(unsigned long bist) post_code(0x39); pei_data.boot_mode = boot_mode; -#if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_BEFORE_INITRAM); sdram_initialize(&pei_data); -#if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = rdtsc(); -#endif + timestamp_add_now(TS_AFTER_INITRAM); post_code(0x3a); /* Perform some initialization that must run before stage2 */ early_pch_init(); @@ -365,13 +354,8 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif -#if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time ); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time ); - timestamp_add(TS_AFTER_INITRAM, after_dram_time ); + timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#endif #if CONFIG_CONSOLE_CBMEM /* Keep this the last thing this function does. */ cbmemc_reinit();

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Patch set updated for coreboot: 0d77819 CBMEM: Always have early initialisation
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3917 -gerrit commit 0d77819ae09133efd757af0c936ad22ac7119355 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Sep 8 10:08:28 2013 +0300 CBMEM: Always have early initialisation Assume EARLY_CBMEM_INIT=y everywhere and remove option from Kconfig. If romstage does not make the cbmem_initialize() call, features like COLLECT_TIMESTAMPS and early CBMEM_CONSOLE will execute during romstage, but that data will get lost as no CAR migration is executed. Change-Id: I5615645ed0f5fd78fbc372cf5c3da71a3134dd85 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 11 +---------- src/console/Kconfig | 1 - src/lib/Makefile.inc | 6 +----- src/lib/cbmem.c | 4 ---- src/mainboard/emulation/qemu-i440fx/Kconfig | 1 - src/mainboard/emulation/qemu-q35/Kconfig | 1 - src/mainboard/google/butterfly/Kconfig | 1 - src/mainboard/google/link/Kconfig | 1 - src/mainboard/google/parrot/Kconfig | 1 - src/mainboard/google/stout/romstage.c | 4 ---- src/mainboard/intel/emeraldlake2/Kconfig | 1 - src/mainboard/kontron/ktqm77/Kconfig | 1 - src/mainboard/lenovo/t60/Kconfig | 1 - src/mainboard/lenovo/x60/Kconfig | 1 - src/mainboard/samsung/lumpy/Kconfig | 1 - src/mainboard/samsung/stumpy/Kconfig | 1 - src/northbridge/intel/sandybridge/raminit.c | 2 -- 17 files changed, 2 insertions(+), 37 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index be2cb24..ae385dd 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -170,15 +170,6 @@ config INCLUDE_CONFIG_FILE config 0x8d740 raw 3324 (empty) 0x8e480 null 3610440 -config EARLY_CBMEM_INIT - bool - default n - help - Make coreboot initialize the CBMEM structures while running in ROM - stage. This is useful when the ROM stage wants to communicate - some, for instance, execution timestamps. It needs support in - romstage.c and should be enabled by the board's Kconfig. - config DYNAMIC_CBMEM bool "The CBMEM space is dynamically grown." default n @@ -189,7 +180,7 @@ config DYNAMIC_CBMEM config COLLECT_TIMESTAMPS bool "Create a table of timestamps collected during boot" - depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM) + default n help Make coreboot create a table of timer-ID/timer-value pairs to allow measuring time spent at different phases of the boot process. diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..e9fca11 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -253,7 +253,6 @@ config CONSOLE_NE2K_IO_PORT boundary, qemu needs broader align) config CONSOLE_CBMEM - depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM) bool "Send console output to a CBMEM buffer" default n help diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 44b5ebd..1455e4c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,10 +56,6 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c romstage-$(CONFIG_USBDEBUG) += usbdebug.c endif -ifneq ($(CONFIG_DYNAMIC_CBMEM),y) -romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c -endif - romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c @@ -112,7 +108,7 @@ ramstage-y += dynamic_cbmem.c romstage-y += dynamic_cbmem.c else ramstage-y += cbmem.c -romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c +romstage-$(CONFIG_CACHE_AS_RAM) += cbmem.c endif # CONFIG_DYNAMIC_CBMEM ramstage-y += cbmem_info.c diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 495ee5a..8d69435 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -95,7 +95,6 @@ void cbmem_late_set_table(uint64_t base, uint64_t size) * - suspend/resume backup memory */ -#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) static void cbmem_init(void) { uint64_t baseaddr, size; @@ -120,7 +119,6 @@ static void cbmem_init(void) .size = size - CBMEM_TOC_RESERVED }; } -#endif int cbmem_reinit(void) { @@ -220,7 +218,6 @@ void *cbmem_find(u32 id) return (void *)NULL; } -#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) /* Returns True if it was not initialized before. */ int cbmem_initialize(void) { @@ -244,7 +241,6 @@ int cbmem_initialize(void) return rv; } -#endif #ifndef __PRE_RAM__ static void init_cbmem_post_device(void *unused) diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index b462b8c..2eed55b 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_256 - select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT config MAINBOARD_DIR diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 9d78bb8..43bba46 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES # select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_256 - select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT config MAINBOARD_DIR diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig index e9ad6ef..d35be8d 100644 --- a/src/mainboard/google/butterfly/Kconfig +++ b/src/mainboard/google/butterfly/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_SMI_HANDLER select GFXUMA select CHROMEOS - select EARLY_CBMEM_INIT # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index b74c604..d040599 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHROMEOS select SERIRQ_CONTINUOUS_MODE select MAINBOARD_HAS_NATIVE_VGA_INIT - select EARLY_CBMEM_INIT select MARK_GRAPHICS_MEM_WRCOMB config MAINBOARD_DIR diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig index 191e856..1108b13 100644 --- a/src/mainboard/google/parrot/Kconfig +++ b/src/mainboard/google/parrot/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_SMI_HANDLER select GFXUMA select CHROMEOS - select EARLY_CBMEM_INIT # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 5ace4f6..464ddea 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -296,11 +296,7 @@ void main(unsigned long bist) post_code(0x3e); MCHBAR16(SSKPD) = 0xCAFE; -#if CONFIG_EARLY_CBMEM_INIT cbmem_was_initted = !cbmem_initialize(); -#else - cbmem_was_initted = cbmem_reinit(); -#endif #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index fd98485..1ad50d9 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select GFXUMA #select CHROMEOS - select EARLY_CBMEM_INIT config MAINBOARD_DIR string diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index e9d1ce7..d379f6f 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select HAVE_SMI_HANDLER select GFXUMA - select EARLY_CBMEM_INIT select ENABLE_VMX select HAVE_MRC diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index 0f0670e..ec03534 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHANNEL_XOR_RANDOMIZATION select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME - select EARLY_CBMEM_INIT config MAINBOARD_DIR string default lenovo/t60 diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 72aeef8..8eb159b 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select USE_OPTION_TABLE select MAINBOARD_HAS_NATIVE_VGA_INIT - select EARLY_CBMEM_INIT config MAINBOARD_DIR string diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig index 91dc3b6..13c8748 100644 --- a/src/mainboard/samsung/lumpy/Kconfig +++ b/src/mainboard/samsung/lumpy/Kconfig @@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_SMSC_MEC1308 select DRIVERS_GENERIC_IOAPIC - select EARLY_CBMEM_INIT select HAVE_MRC config MAINBOARD_DIR diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig index f4f8e4d..17f854f 100644 --- a/src/mainboard/samsung/stumpy/Kconfig +++ b/src/mainboard/samsung/stumpy/Kconfig @@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_INTEL_SANDYBRIDGE select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_ITE_IT8772F - select EARLY_CBMEM_INIT select HAVE_MRC config MAINBOARD_DIR diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 3b321d7..db96202 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -58,7 +58,6 @@ static void save_mrc_data(struct pei_data *pei_data) { u16 c1, c2, checksum; -#if CONFIG_EARLY_CBMEM_INIT struct mrc_data_container *mrcdata; int output_len = ALIGN(pei_data->mrc_output_len, 16); @@ -84,7 +83,6 @@ static void save_mrc_data(struct pei_data *pei_data) mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data, mrcdata->mrc_data_size); -#endif /* Save the MRC seed values to CMOS */ cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);

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Patch set updated for coreboot: d1afa86 CBMEM: Always select CAR_MIGRATION
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3916 -gerrit commit d1afa86eaef8f93f9e5ddd517987c7b7f661624e Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 10 00:07:21 2013 +0300 CBMEM: Always select CAR_MIGRATION If romstage does not make cbmem_initialize() call, linker should optimize the code for CAR migration away. This simplifies design of CBMEM console by a considerable amount. As console buffer is now migrated within cbmem_initialize() call there is no longer need for cbmemc_reinit() call made at end of romstage. Change-Id: I8675ecaafb641fa02675e9ba3f374caa8e240f1d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/boot/cbmem.c | 2 +- src/cpu/intel/haswell/Kconfig | 1 - src/cpu/intel/haswell/romstage.c | 1 - src/cpu/x86/Kconfig | 9 ------ src/cpu/x86/Makefile.inc | 2 +- src/include/cpu/x86/car.h | 2 +- src/include/timestamp.h | 4 +-- src/lib/cbmem_console.c | 42 ++------------------------ src/lib/hardwaremain.c | 2 +- src/lib/timestamp.c | 5 ++- src/lib/usbdebug.c | 4 +-- src/mainboard/emulation/qemu-i440fx/romstage.c | 5 --- src/mainboard/emulation/qemu-q35/romstage.c | 5 --- src/mainboard/google/butterfly/romstage.c | 5 --- src/mainboard/google/link/romstage.c | 5 --- src/mainboard/google/parrot/romstage.c | 5 --- src/mainboard/google/stout/romstage.c | 5 --- src/mainboard/intel/emeraldlake2/romstage.c | 5 --- src/mainboard/kontron/ktqm77/romstage.c | 5 --- src/mainboard/lenovo/t60/romstage.c | 5 --- src/mainboard/lenovo/x60/romstage.c | 5 --- src/mainboard/samsung/lumpy/romstage.c | 5 --- src/mainboard/samsung/stumpy/romstage.c | 5 --- src/mainboard/via/epia-m850/romstage.c | 1 - 24 files changed, 14 insertions(+), 121 deletions(-) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 991a3e6..58ccbca 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -47,7 +47,7 @@ void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop) /* This is for compatibility with old boards only. Any new chipset and board * must implement get_top_of_ram() for both romstage and ramstage to support - * features like CAR_MIGRATION and CBMEM_CONSOLE. + * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE. */ void set_top_of_ram(uint64_t ramtop) { diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index c352e36..7b6fc43 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -18,7 +18,6 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select CAR_MIGRATION config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index e62b894..757cc34 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -278,7 +278,6 @@ void romstage_common(const struct romstage_params *params) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index c10dd15..c64a8e4 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -115,12 +115,3 @@ config X86_AMD_FIXED_MTRRS help This option informs the MTRR code to use the RdMem and WrMem fields in the fixed MTRR MSRs. - -config CAR_MIGRATION - def_bool n - depends on DYNAMIC_CBMEM || EARLY_CBMEM_INIT - help - Migrate the cache-as-ram variables to CBMEM once CBMEM is set up - in romstage. This option is only needed if one will be doing more - work in romstage after the cache-as-ram is torn down aside from - loading ramstage. diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index fe8648c..311dcc1 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1 +1 @@ -romstage-$(CONFIG_CAR_MIGRATION) += car.c +romstage-$(CONFIG_CACHE_AS_RAM) += car.c diff --git a/src/include/cpu/x86/car.h b/src/include/cpu/x86/car.h index 7b5cedf..5fc11f9 100644 --- a/src/include/cpu/x86/car.h +++ b/src/include/cpu/x86/car.h @@ -28,7 +28,7 @@ #define CAR_CBMEM #endif -#if CONFIG_CAR_MIGRATION && defined(__PRE_RAM__) +#if defined(__PRE_RAM__) #define CAR_MIGRATE_ATTR __attribute__ ((used,section (".car.migrate"))) /* Call migrate_fn_() when CAR globals are migrated. */ diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 0f56200..edc0076 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -59,13 +59,13 @@ enum timestamp_id { void timestamp_init(tsc_t base); void timestamp_add(enum timestamp_id id, tsc_t ts_time); void timestamp_add_now(enum timestamp_id id); -void timestamp_sync(void); +void timestamp_reinit(void); tsc_t get_initial_timestamp(void); #else #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) -#define timestamp_sync() +#define timestamp_reinit() #endif #endif diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 4c84d98..3fe99ff 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -45,17 +45,6 @@ static struct cbmem_console *cbmem_console_p CAR_GLOBAL; static struct cbmem_console car_cbmem_console CAR_CBMEM; -/* - * Once DRAM is initialized and the cache as ram mode is disabled, while still - * running from ROM, the console buffer in the cache as RAM area becomes - * unavailable. - * - * By this time the console log buffer is already available in - * CBMEM. The location at 0x600 is used as the redirect pointer allowing to - * find out where the actual console log buffer is. - */ -#define CBMEM_CONSOLE_REDIRECT (*((struct cbmem_console **)0x600)) - #else /* @@ -69,30 +58,12 @@ static u8 static_console[40000]; static inline struct cbmem_console *current_console(void) { -#if CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) - return car_get_var(cbmem_console_p); -#else - /* - * This check allows to tell if the cache as RAM mode has been exited - * or not. If it has been exited, the real memory is being used - * (resulting in the variable on the stack located below - * DCACHE_RAM_BASE), use the redirect pointer to find out where the - * actual console buffer is. - */ - if ((uintptr_t)__builtin_frame_address(0) < - (uintptr_t)CONFIG_DCACHE_RAM_BASE) - return CBMEM_CONSOLE_REDIRECT; return car_get_var(cbmem_console_p); -#endif /* CONFIG_CAR_MIGRATION */ } static inline void current_console_set(struct cbmem_console *new_console_p) { -#if CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) car_set_var(cbmem_console_p, new_console_p); -#else - CBMEM_CONSOLE_REDIRECT = new_console_p; -#endif } static inline void init_console_ptr(void *storage, u32 total_space) @@ -193,7 +164,7 @@ static void copy_console_buffer(struct cbmem_console *new_cons_p) new_cons_p->buffer_cursor = cursor; } -static void cbmemc_reinit_(void) +void cbmemc_reinit(void) { struct cbmem_console *cbm_cons_p = NULL; @@ -221,12 +192,5 @@ static void cbmemc_reinit_(void) current_console_set(cbm_cons_p); } -void cbmemc_reinit(void) -{ -#if !CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) - cbmemc_reinit_(); -#endif -} - -/* Call cbmemc_reinit_() at CAR migration time. */ -CAR_MIGRATE(cbmemc_reinit_) +/* Call cbmemc_reinit() at CAR migration time. */ +CAR_MIGRATE(cbmemc_reinit) diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index dd97196..a5993c4 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -177,7 +177,7 @@ static boot_state_t bs_post_device(void *arg) { timestamp_add_now(TS_DEVICE_DONE); - timestamp_sync(); + timestamp_reinit(); return BS_OS_RESUME_CHECK; } diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index bb9a9d3..5fe4f76 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -140,7 +140,7 @@ void timestamp_init(tsc_t base) #endif } -void timestamp_sync(void) +void timestamp_reinit(void) { if (!boot_cpu()) return; @@ -154,3 +154,6 @@ void timestamp_sync(void) if (ts_table) timestamp_do_sync(); } + +/* Call timestamp_reinit at CAR migration time. */ +CAR_MIGRATE(timestamp_reinit) diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..f44a7d4 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -869,7 +869,6 @@ void pci_ehci_read_resources(struct device *dev) } #endif -#if CONFIG_CAR_MIGRATION #if !defined(__PRE_RAM__) && !defined(__SMM__) static int get_usbdebug_from_cbmem(struct ehci_debug_info *info) { @@ -899,7 +898,6 @@ static void migrate_ehci_debug(void) } CAR_MIGRATE(migrate_ehci_debug); #endif -#endif /* CONFIG_CAR_MIGRATION */ unsigned long pci_ehci_base_regs(pci_devfn_t sdev) { @@ -931,7 +929,7 @@ int usbdebug_init(void) { struct ehci_debug_info *dbg_info = dbgp_ehci_info(); -#if CONFIG_CAR_MIGRATION && !defined(__PRE_RAM__) && !defined(__SMM__) +#if !defined(__PRE_RAM__) && !defined(__SMM__) if (!get_usbdebug_from_cbmem(dbg_info)) return 0; #endif diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 70c7202..db8891e 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -51,11 +51,6 @@ void main(unsigned long bist) cbmem_was_initted = !cbmem_initialize(); timestamp_init(rdtsc()); - timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index abc9474..fae5095 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -53,11 +53,6 @@ void main(unsigned long bist) cbmem_was_initted = !cbmem_initialize(); timestamp_init(rdtsc()); - timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 670fc00..f56884d 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -273,10 +273,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index aaecfc6..27a22f7 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -316,10 +316,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 444386f..2fe61d6 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -274,10 +274,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 464ddea..a0700af 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -326,10 +326,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 09dc60b..7691116 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -328,10 +328,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 22fff42..773079d 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -322,10 +322,5 @@ void main(unsigned long bist) } #endif post_code(0x3f); - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 42514e3..1b7e693 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -343,11 +343,6 @@ void main(unsigned long bist) } #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 97317f8..26a7b9b 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -347,11 +347,6 @@ void main(unsigned long bist) } #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index d7b165b..6c87f88 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -347,10 +347,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index b0ac5a8..ee715e7 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -354,10 +354,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 23b5aea..39f4253 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -97,7 +97,6 @@ void main(unsigned long bist) #if CONFIG_EARLY_CBMEM_INIT cbmem_initialize(); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); /* FIXME: See if this is needed or take this out please */ /* Disable Memcard and SDIO */

1 0

Patch set updated for coreboot: 48820e7 timestamps epia-m850: Cleanup without enabling timestamps
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3913 -gerrit commit 48820e75e2f9398c24ac847c88674e82d3b1aabd Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Sep 8 13:48:36 2013 +0300 timestamps epia-m850: Cleanup without enabling timestamps Remove the existing hack, platform needs a fix for EARLY_CBMEM_INIT. Change-Id: I7ce373c9698878d9fa056983e4fb571a68239c52 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/mainboard/via/epia-m850/romstage.c | 43 +++++++--------------------------- src/northbridge/via/vx900/Makefile.inc | 1 - 2 files changed, 9 insertions(+), 35 deletions(-) diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 364de48..23b5aea 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -20,8 +20,6 @@ /* * Inspired from the EPIA-M700 */ -#undef CONFIG_COLLECT_TIMESTAMPS -#define CONFIG_COLLECT_TIMESTAMPS 1 #include <stdint.h> #include <device/pci_def.h> #include <device/pci_ids.h> @@ -43,25 +41,13 @@ #define SERIAL_DEV PNP_DEV(0x4e, 0x10) -static inline u64 tsc2u64(tsc_t tsc) -{ - return ((u64) tsc.hi << 32) | tsc.lo; -} - -/* FIXME: This board comes in two flavours. This is for the faster CPU, but - * will probably not be correct for the other CPU */ -#define TSC_PER_USEC 1297 -static inline u32 tsc2ms(u64 end, u64 start) -{ - return ((u32) (end - start) / TSC_PER_USEC) / 1000; -} - /* cache_as_ram.inc jumps to here. */ void main(unsigned long bist) { u32 tolm; - u64 start, end; - tsc_t tsc_at_romstage_start = rdtsc(); + + timestamp_init(rdtsc()); + timestamp_add_now(TS_START_ROMSTAGE); /* First thing we need to do on the VX900, before anything else */ vx900_enable_pci_config_space(); @@ -83,13 +69,13 @@ void main(unsigned long bist) /* Oh, almighty, give us the SMBUS */ enable_smbus(); - tsc_t tsc_before_raminit = rdtsc(); + timestamp_add_now(TS_BEFORE_INITRAM); /* Now we can worry about raminit. * This board only has DDR3, so no need to worry about which DRAM type * to use */ dimm_layout dimms = { {0x50, 0x51, SPD_END_LIST} }; vx900_init_dram_ddr3(&dimms); - tsc_t tsc_after_raminit = rdtsc(); + timestamp_add_now(TS_AFTER_INITRAM); /* TODO: All these ram_checks are here to ensure we test most of the RAM * below 4G. They should not be needed once VX900 raminit is stable */ @@ -106,25 +92,14 @@ void main(unsigned long bist) ram_check(2048 << 20, 0x80); print_debug("We passed RAM verify\n"); -#ifdef GONFIG_EARLY_CBMEM_INIT + /* We got RAM working, now we can write the timestamps to RAM */ +#if CONFIG_EARLY_CBMEM_INIT cbmem_initialize(); - timestamp_init(tsc_at_romstage_start); - timestamp_add(TS_START_ROMSTAGE, tsc_at_romstage_start); - timestamp_add(TS_BEFORE_INITRAM, tsc_before_raminit); - timestamp_add(TS_AFTER_INITRAM, tsc_after_raminit); - timestamp_add_now(TS_END_ROMSTAGE); #endif + timestamp_sync(); + timestamp_add_now(TS_END_ROMSTAGE); /* FIXME: See if this is needed or take this out please */ /* Disable Memcard and SDIO */ pci_mod_config8(LPC, 0x51, 0, (1 << 7) | (1 << 4)); - - /* Informative character. Could be removed at a later time. */ - start = tsc2u64(tsc_at_romstage_start); - end = tsc2u64(tsc_before_raminit); - printk(BIOS_INFO, "Before raminit %ums\n", tsc2ms(end, start)); - - start = end; - end = tsc2u64(tsc_after_raminit); - printk(BIOS_INFO, "Actual Raminit %ums\n", tsc2ms(end, start)); } diff --git a/src/northbridge/via/vx900/Makefile.inc b/src/northbridge/via/vx900/Makefile.inc index 13d7de6..15fd859 100644 --- a/src/northbridge/via/vx900/Makefile.inc +++ b/src/northbridge/via/vx900/Makefile.inc @@ -29,7 +29,6 @@ romstage-y += ./../../../southbridge/via/common/early_smbus_print_error.c romstage-y += ./../../../southbridge/via/common/early_smbus_reset.c romstage-y += ./../../../southbridge/via/common/early_smbus_wait_until_ready.c romstage-y += ./../../../drivers/pc80/udelay_io.c -romstage-$(CONFIG_COLLECT_TIMESTAMPS) += ./../../../lib/cbmem.c ramstage-y += pci_util.c ramstage-y += pcie.c

1 0

Patch set updated for coreboot: f2698c0 timestamps: Only collect from BSP CPU
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3912 -gerrit commit f2698c04d565b9ee7903764d5939f880293abaa0 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Sep 8 13:10:28 2013 +0300 timestamps: Only collect from BSP CPU We only have one table to collect timestamps into. Change-Id: I80180fe9a05226f0351c3e66eacaf2d0cb82c924 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/lib/timestamp.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index eac33a2..bb9a9d3 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -23,6 +23,7 @@ #include <cbmem.h> #include <timestamp.h> #include <cpu/x86/car.h> +#include <cpu/x86/lapic.h> #define MAX_TIMESTAMPS 30 @@ -59,6 +60,9 @@ static void timestamp_real_init(tsc_t base) void timestamp_add(enum timestamp_id id, tsc_t ts_time) { struct timestamp_entry *tse; + + if (!boot_cpu()) + return; if (!ts_table) { timestamp_stash(id, ts_time); @@ -114,6 +118,9 @@ static void timestamp_do_sync(void) void timestamp_init(tsc_t base) { + if (!boot_cpu()) + return; + #ifdef __PRE_RAM__ /* Copy of basetime, it is too early for CBMEM. */ ts_basetime = base; @@ -135,6 +142,9 @@ void timestamp_init(tsc_t base) void timestamp_sync(void) { + if (!boot_cpu()) + return; + #ifdef __PRE_RAM__ timestamp_real_init(ts_basetime); #else

1 0

Patch set updated for coreboot: f4a7fd7 CBMEM console: Support late init
by Kyösti Mälkki 11 Sep '13

11 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3915 -gerrit commit f4a7fd71d71be089e25195658aba32b5c305f397 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Mon Sep 9 01:31:22 2013 +0300 CBMEM console: Support late init It is not compulsory to have CBMEM console initialised in romstage, so try add the CBMEM table entry again in ramstage, if not found. Change-Id: I96ab502df7f05d6bf1d6e6fa84d395ef6306b525 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/lib/cbmem_console.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 1b58402..4c84d98 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -195,27 +195,27 @@ static void copy_console_buffer(struct cbmem_console *new_cons_p) static void cbmemc_reinit_(void) { - struct cbmem_console *cbm_cons_p; + struct cbmem_console *cbm_cons_p = NULL; + +#ifndef __PRE_RAM__ + cbm_cons_p = cbmem_find(CBMEM_ID_CONSOLE); +#endif -#ifdef __PRE_RAM__ - cbm_cons_p = cbmem_add(CBMEM_ID_CONSOLE, - CONFIG_CONSOLE_CBMEM_BUFFER_SIZE); if (!cbm_cons_p) { - current_console_set(NULL); - return; - } + cbm_cons_p = cbmem_add(CBMEM_ID_CONSOLE, + CONFIG_CONSOLE_CBMEM_BUFFER_SIZE); - cbm_cons_p->buffer_size = CONFIG_CONSOLE_CBMEM_BUFFER_SIZE - - sizeof(struct cbmem_console); + if (!cbm_cons_p) { + current_console_set(NULL); + return; + } - cbm_cons_p->buffer_cursor = 0; -#else - cbm_cons_p = cbmem_find(CBMEM_ID_CONSOLE); + cbm_cons_p->buffer_size = CONFIG_CONSOLE_CBMEM_BUFFER_SIZE - + sizeof(struct cbmem_console); - if (!cbm_cons_p) - return; + cbm_cons_p->buffer_cursor = 0; + } -#endif copy_console_buffer(cbm_cons_p); current_console_set(cbm_cons_p);

1 0

Patch merged into coreboot/master: 0fbbff4 CBMEM: Rename high_tables variables and make them static
by gerrit＠coreboot.org 11 Sep '13

11 Sep '13

the following patch was just integrated into master: commit 0fbbff48bfc4543ebf2b778d3ed557aae58676da Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jun 23 20:03:50 2013 +0300 CBMEM: Rename high_tables variables and make them static Old name was too much x86. All external references have been removed. Change-Id: I982b9abfcee57a7ea421c245dadb84342949efae Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3906 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> See http://review.coreboot.org/3906 for details. -gerrit

1 0

Patch merged into coreboot/master: 625f103 CBMEM: Drop parameters from cbmem_init()
by gerrit＠coreboot.org 11 Sep '13

11 Sep '13

the following patch was just integrated into master: commit 625f103ae8c794c92e403f8749f0442d66966cab Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Sep 4 14:36:31 2013 +0300 CBMEM: Drop parameters from cbmem_init() The parameters can be dropped as initialisation always happens for the region resolved with cbmem_locate_table(). This is no longer referenced externally, make it static. Change-Id: Ia40350a5232dcbf30aca7b5998e7995114c44551 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3565 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> See http://review.coreboot.org/3565 for details. -gerrit

1 0

Patch merged into coreboot/master: d50cdf1 CBMEM: Drop parameter from cbmem_reinit()
by gerrit＠coreboot.org 11 Sep '13

11 Sep '13

the following patch was just integrated into master: commit d50cdf108f9d4b598aa8f6c3205d9a93c3e67131 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jun 23 17:01:29 2013 +0300 CBMEM: Drop parameter from cbmem_reinit() Function is always called with get_top_of_ram() - HIGH_MEMORY_SIZE which equals cbmem_base, thus no need to pass it as a parameter. Change-Id: If026cb567ff534716cd9200cdffa08b21ac0c162 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3564 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> See http://review.coreboot.org/3564 for details. -gerrit

1 0

Patch merged into coreboot/master: 95c39c2 CBMEM ARM: Prefer get_cbmem_table() over cbmem_late_set_table()
by gerrit＠coreboot.org 11 Sep '13

11 Sep '13

the following patch was just integrated into master: commit 95c39c28a3d4beb10143ad9c749241fcbdbfb2dc Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sat Jun 22 14:05:28 2013 +0300 CBMEM ARM: Prefer get_cbmem_table() over cbmem_late_set_table() Implementing get_cbmem_table() allows initializing CBMEM earlier. Change-Id: I973f3a84dd9aaa2839959df5dda22909fdb9edeb Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: http://review.coreboot.org/3560 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)google.com> See http://review.coreboot.org/3560 for details. -gerrit

1 0

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coreboot-gerrit September 2013