coreboot-gerrit September 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: ccf4fdd am335x: Update the config vars selected by CPU_TI_AM335X.
by gerrit＠coreboot.org 17 Sep '13

17 Sep '13

the following patch was just integrated into master: commit ccf4fdd1cd00c0f9cbfdfd1d78c9b89fa95f291c Author: Gabe Black <gabeblack(a)chromium.org> Date: Sun Sep 15 20:56:49 2013 -0700 am335x: Update the config vars selected by CPU_TI_AM335X. The way those variables work has changed twice since this file was last changed, and console output was no longer working. Now that they're up to date there's serial output from beaglebone again. Change-Id: I5167fd8c0a8c33438d7f056fdf5951bd054010ed Signed-off-by: Gabe Black <gabeblack(a)chromium.org> Reviewed-on: http://review.coreboot.org/3923 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/3923 for details. -gerrit

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Patch set updated for coreboot: 7c0beec usbdebug: Allow an USB hub on the debug dongle
by Kyösti Mälkki 16 Sep '13

16 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3925 -gerrit commit 7c0beec18182d5287b74e5d46a9c30a1fd2bcc45 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Aug 23 23:33:16 2013 +0300 usbdebug: Allow an USB hub on the debug dongle Some development kits with USB 2.0 HS OTG have an USB hub instead of being directly connected to the USB host/device controller. Send the necessary initialisation sequence, using HUB CLASS requests of PORT_POWER and PORT_RESET to enable a pre-selected port number where a device supporting debug descriptor is located. This also adds the Kconfig option for BeagleBone. Change-Id: I7a5d0ba0962a9ca06bf3196232ed4a03bdfb2b06 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Kconfig | 25 ++++++++++++- src/lib/usbdebug.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 128 insertions(+), 2 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..9bfb6e9 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -173,10 +173,11 @@ config USBDEBUG If unsure, say N. +if USBDEBUG + config USBDEBUG_HCD_INDEX int "Index for EHCI controller to use with usbdebug" default 0 - depends on USBDEBUG help Some boards have multiple EHCI controllers with possibly only one having the Debug Port capability on an external USB port. @@ -188,7 +189,6 @@ config USBDEBUG_HCD_INDEX config USBDEBUG_DEFAULT_PORT int "Default USB port to use as Debug Port" default 0 - depends on USBDEBUG help Selects which physical USB port usbdebug dongle is connected to. Setting of 0 means to scan possible ports starting from 1. @@ -202,6 +202,27 @@ config USBDEBUG_DEFAULT_PORT your mainboard) is highly board-specific, and you'll likely have to find out by trial-and-error. +choice + prompt "Type of dongle" + default USBDEBUG_DONGLE_STD + +config USBDEBUG_DONGLE_STD + bool "Net20DC or compatible" + +config USBDEBUG_DONGLE_BEAGLEBONE + bool "BeagleBone" + help + Use this to configure the USB hub on BeagleBone board. + +endchoice + +config USBDEBUG_OPTIONAL_HUB_PORT + int + default 2 if USBDEBUG_DONGLE_BEAGLEBONE + default 0 + +endif # USBDEBUG + # TODO: Deps? # TODO: Improve description. config ONBOARD_VGA_IS_PRIMARY diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..4020089 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -483,6 +483,102 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) return -1; //-ENOTCONN; } +#define USB_HUB_PORT_CONNECTION 0 +#define USB_HUB_PORT_ENABLED 1 +#define USB_HUB_PORT_RESET 4 +#define USB_HUB_PORT_POWER 8 +#define USB_HUB_C_PORT_CONNECTION 16 +#define USB_HUB_C_PORT_RESET 20 + +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + +static int hub_port_status(const char * buf, int feature) +{ + return !!(buf[feature>>3] & (1<<(feature&0x7))); +} + +static int dbgp_hub_enable(struct ehci_dbg_port *ehci_debug, unsigned int port) +{ + const u8 hub_addr = USB_DEBUG_DEVNUM-1; + char status[8]; + int ret, loop; + + /* Move hub to address 126. */ + ret = dbgp_control_msg(ehci_debug, 0, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_ADDRESS, hub_addr, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Enter configured state on hub. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_CONFIGURATION, 1, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Set PORT_POWER, poll for PORT_CONNECTION. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_POWER, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_PORT_CONNECTION)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_CONNECTION, port, NULL, 0); + if (ret < 0) + goto err; + + + /* Set PORT_RESET, poll for C_PORT_RESET. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_C_PORT_RESET)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + if (hub_port_status(status, USB_HUB_PORT_ENABLED)) + return 0; +err: + return -1; +} +#endif /* CONFIG_USBDEBUG_OPTIONAL_HUB_PORT */ + #if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE static void enable_usbdebug(void) { @@ -640,6 +736,15 @@ try_next_port: dbgp_mdelay(100); +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + ret = dbgp_hub_enable(ehci_debug, CONFIG_USBDEBUG_OPTIONAL_HUB_PORT); + if (ret < 0) { + dprintk(BIOS_INFO, "Could not enable USB hub on debug port.\n"); + ret = -6; + goto err; + } +#endif + /* Find the debug device and make it device number 127 */ devnum = 0; debug_dev_retry:

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Patch set updated for coreboot: a9fb593 usbdebug: Add optional HUB on debug port
by Ronald G. Minnich 16 Sep '13

16 Sep '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3925 -gerrit commit a9fb593d47f5eeeb6b81b274949db8eb90ef6cae Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Aug 23 23:33:16 2013 +0300 usbdebug: Add optional HUB on debug port Some development kits with USB 2.0 HS OTG have an USB HUB instead of being directly connected to the USB host/device controller. Send the necessary initialisation sequence, using HUB CLASS requests of PORT_POWER and PORT_RESET to enable a pre-selected port number where a device supporting debug descriptor is located. This also adds the Kconfig option for BeagleBone. Change-Id: I7a5d0ba0962a9ca06bf3196232ed4a03bdfb2b06 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Kconfig | 25 ++++++++++++- src/lib/usbdebug.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 128 insertions(+), 2 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..9bfb6e9 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -173,10 +173,11 @@ config USBDEBUG If unsure, say N. +if USBDEBUG + config USBDEBUG_HCD_INDEX int "Index for EHCI controller to use with usbdebug" default 0 - depends on USBDEBUG help Some boards have multiple EHCI controllers with possibly only one having the Debug Port capability on an external USB port. @@ -188,7 +189,6 @@ config USBDEBUG_HCD_INDEX config USBDEBUG_DEFAULT_PORT int "Default USB port to use as Debug Port" default 0 - depends on USBDEBUG help Selects which physical USB port usbdebug dongle is connected to. Setting of 0 means to scan possible ports starting from 1. @@ -202,6 +202,27 @@ config USBDEBUG_DEFAULT_PORT your mainboard) is highly board-specific, and you'll likely have to find out by trial-and-error. +choice + prompt "Type of dongle" + default USBDEBUG_DONGLE_STD + +config USBDEBUG_DONGLE_STD + bool "Net20DC or compatible" + +config USBDEBUG_DONGLE_BEAGLEBONE + bool "BeagleBone" + help + Use this to configure the USB hub on BeagleBone board. + +endchoice + +config USBDEBUG_OPTIONAL_HUB_PORT + int + default 2 if USBDEBUG_DONGLE_BEAGLEBONE + default 0 + +endif # USBDEBUG + # TODO: Deps? # TODO: Improve description. config ONBOARD_VGA_IS_PRIMARY diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..432a70b 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -483,6 +483,102 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) return -1; //-ENOTCONN; } +#define USB_HUB_PORT_CONNECTION 0 +#define USB_HUB_PORT_ENABLED 1 +#define USB_HUB_PORT_RESET 4 +#define USB_HUB_PORT_POWER 8 +#define USB_HUB_C_PORT_CONNECTION 16 +#define USB_HUB_C_PORT_RESET 20 + +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + +static int hub_port_status(const char * buf, int feature) +{ + return !!(buf[feature>>3] & (1<<(feature&0x7))); +} + +static int dbgp_hub_enable(struct ehci_dbg_port *ehci_debug, unsigned int port) +{ + const u8 hub_addr = USB_DEBUG_DEVNUM-1; + char status[8]; + int ret, loop; + + /* Move hub to address 126. */ + ret = dbgp_control_msg(ehci_debug, 0, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_ADDRESS, hub_addr, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Enter configured state on hub. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_CONFIGURATION, 1, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Set PORT_POWER, poll for PORT_CONNECTION. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_POWER, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_PORT_CONNECTION)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_CONNECTION, port, NULL, 0); + if (ret < 0) + goto err; + + + /* Set PORT_RESET, poll for C_PORT_RESET. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_C_PORT_RESET)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + if (hub_port_status(status, USB_HUB_PORT_ENABLED)) + return 0; +err: + return -1; +} +#endif /* CONFIG_USBDEBUG_OPTIONAL_HUB_PORT */ + #if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE static void enable_usbdebug(void) { @@ -640,6 +736,15 @@ try_next_port: dbgp_mdelay(100); +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + ret = dbgp_hub_enable(ehci_debug, CONFIG_USBDEBUG_OPTIONAL_HUB_PORT); + if (ret < 0) { + dprintk(BIOS_INFO, "Could not enable USB hub on debug port.\n"); + ret = -6; + goto err; + } +#endif + /* Find the debug device and make it device number 127 */ devnum = 0; debug_dev_retry:

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New patch to review for coreboot: a09afd3 usbdebug: Add optional HUB on debug port
by Kyösti Mälkki 16 Sep '13

16 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3925 -gerrit commit a09afd3acf3729188c531102e008705dbf80b7e7 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Fri Aug 23 23:33:16 2013 +0300 usbdebug: Add optional HUB on debug port Some development kits with USB 2.0 HS OTG have an USB HUB instead of being directly connected to the USB host/device controller. Send the necessary initialisation sequence, using HUB CLASS requests of PORT_POWER and PORT_RESET to enable a pre-selected port number where a device supporting debug descriptor is located. This also add the Kconfig option for BeagleBone. Change-Id: I7a5d0ba0962a9ca06bf3196232ed4a03bdfb2b06 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/console/Kconfig | 25 ++++++++++++- src/lib/usbdebug.c | 105 ++++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 128 insertions(+), 2 deletions(-) diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..9bfb6e9 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -173,10 +173,11 @@ config USBDEBUG If unsure, say N. +if USBDEBUG + config USBDEBUG_HCD_INDEX int "Index for EHCI controller to use with usbdebug" default 0 - depends on USBDEBUG help Some boards have multiple EHCI controllers with possibly only one having the Debug Port capability on an external USB port. @@ -188,7 +189,6 @@ config USBDEBUG_HCD_INDEX config USBDEBUG_DEFAULT_PORT int "Default USB port to use as Debug Port" default 0 - depends on USBDEBUG help Selects which physical USB port usbdebug dongle is connected to. Setting of 0 means to scan possible ports starting from 1. @@ -202,6 +202,27 @@ config USBDEBUG_DEFAULT_PORT your mainboard) is highly board-specific, and you'll likely have to find out by trial-and-error. +choice + prompt "Type of dongle" + default USBDEBUG_DONGLE_STD + +config USBDEBUG_DONGLE_STD + bool "Net20DC or compatible" + +config USBDEBUG_DONGLE_BEAGLEBONE + bool "BeagleBone" + help + Use this to configure the USB hub on BeagleBone board. + +endchoice + +config USBDEBUG_OPTIONAL_HUB_PORT + int + default 2 if USBDEBUG_DONGLE_BEAGLEBONE + default 0 + +endif # USBDEBUG + # TODO: Deps? # TODO: Improve description. config ONBOARD_VGA_IS_PRIMARY diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..432a70b 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -483,6 +483,102 @@ static int ehci_wait_for_port(struct ehci_regs *ehci_regs, int port) return -1; //-ENOTCONN; } +#define USB_HUB_PORT_CONNECTION 0 +#define USB_HUB_PORT_ENABLED 1 +#define USB_HUB_PORT_RESET 4 +#define USB_HUB_PORT_POWER 8 +#define USB_HUB_C_PORT_CONNECTION 16 +#define USB_HUB_C_PORT_RESET 20 + +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + +static int hub_port_status(const char * buf, int feature) +{ + return !!(buf[feature>>3] & (1<<(feature&0x7))); +} + +static int dbgp_hub_enable(struct ehci_dbg_port *ehci_debug, unsigned int port) +{ + const u8 hub_addr = USB_DEBUG_DEVNUM-1; + char status[8]; + int ret, loop; + + /* Move hub to address 126. */ + ret = dbgp_control_msg(ehci_debug, 0, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_ADDRESS, hub_addr, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Enter configured state on hub. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE, + USB_REQ_SET_CONFIGURATION, 1, 0, NULL, 0); + if (ret < 0) + goto err; + + /* Set PORT_POWER, poll for PORT_CONNECTION. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_POWER, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_PORT_CONNECTION)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_CONNECTION, port, NULL, 0); + if (ret < 0) + goto err; + + + /* Set PORT_RESET, poll for C_PORT_RESET. */ + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_SET_FEATURE, USB_HUB_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + loop = 100; + do { + dbgp_mdelay(10); + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_IN | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_GET_STATUS, 0, port, status, 4); + if (ret < 0) + goto err; + if (hub_port_status(status, USB_HUB_C_PORT_RESET)) + break; + } while (--loop); + if (! loop) + goto err; + + ret = dbgp_control_msg(ehci_debug, hub_addr, + USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_OTHER, + USB_REQ_CLEAR_FEATURE, USB_HUB_C_PORT_RESET, port, NULL, 0); + if (ret < 0) + goto err; + + if (hub_port_status(status, USB_HUB_PORT_ENABLED)) + return 0; +err: + return -1; +} +#endif /* CONFIG_USBDEBUG_OPTIONAL_HUB_PORT */ + #if defined(__PRE_RAM__) || !CONFIG_EARLY_CONSOLE static void enable_usbdebug(void) { @@ -640,6 +736,15 @@ try_next_port: dbgp_mdelay(100); +#if CONFIG_USBDEBUG_OPTIONAL_HUB_PORT + ret = dbgp_hub_enable(ehci_debug, CONFIG_USBDEBUG_OPTIONAL_HUB_PORT); + if (ret < 0) { + dprintk(BIOS_INFO, "Could not enable USB hub on debug port.\n"); + ret = -6; + goto err; + } +#endif + /* Find the debug device and make it device number 127 */ devnum = 0; debug_dev_retry:

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New patch to review for coreboot: e666139 beaglebone: Stop reinitializing the console in bootblock.c.
by Gabe Black 16 Sep '13

16 Sep '13

Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3924 -gerrit commit e666139c95fa8069561729fd3661cd56a9f6444f Author: Gabe Black <gabeblack(a)chromium.org> Date: Sun Sep 15 20:59:08 2013 -0700 beaglebone: Stop reinitializing the console in bootblock.c. The console has already been initialized in the generic bootblock code, and reinitializing it causes the same banner line to be printed twice and lots of artifacts in the actual output. This same change had been made to the other ARM boards but not for beaglebone. Change-Id: I72e3be1326b1a52b7ec438a44e4fd5f87e4ec717 Signed-off-by: Gabe Black <gabeblack(a)chromium.org> --- src/mainboard/ti/beaglebone/bootblock.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/src/mainboard/ti/beaglebone/bootblock.c b/src/mainboard/ti/beaglebone/bootblock.c index 6c7d132..dd46040 100644 --- a/src/mainboard/ti/beaglebone/bootblock.c +++ b/src/mainboard/ti/beaglebone/bootblock.c @@ -66,6 +66,4 @@ void bootblock_mainboard_init(void) /* Start monotonic timer */ //rtc_start(); - - console_init(); }

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New patch to review for coreboot: e84267c am335x: Update the config vars selected by CPU_TI_AM335X.
by Gabe Black 16 Sep '13

16 Sep '13

Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3923 -gerrit commit e84267c45a761a4bf020edfa9bb19a7e58e6d066 Author: Gabe Black <gabeblack(a)chromium.org> Date: Sun Sep 15 20:56:49 2013 -0700 am335x: Update the config vars selected by CPU_TI_AM335X. The way those variables work has changed twice since this file was last changed, and console output was no longer working. Now that they're up to date there's serial output from beaglebone again. Change-Id: I5167fd8c0a8c33438d7f056fdf5951bd054010ed Signed-off-by: Gabe Black <gabeblack(a)chromium.org> --- src/cpu/ti/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/cpu/ti/Kconfig b/src/cpu/ti/Kconfig index c82c290..0440098 100644 --- a/src/cpu/ti/Kconfig +++ b/src/cpu/ti/Kconfig @@ -2,7 +2,8 @@ config CPU_TI_AM335X depends on ARCH_ARMV7 select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL - select DEFAULT_EARLY_CONSOLE + select BOOTBLOCK_CONSOLE + select EARLY_CONSOLE bool default n

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New patch to review for coreboot: ccaa0a0 ARM: Add some missing dependencies on config.h to ARM's Makefile.inc.
by Gabe Black 16 Sep '13

16 Sep '13

Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3922 -gerrit commit ccaa0a01f34c69e9e184630910edae01867c0533 Author: Gabe Black <gabeblack(a)chromium.org> Date: Sun Sep 15 20:53:57 2013 -0700 ARM: Add some missing dependencies on config.h to ARM's Makefile.inc. These dependencies came indirectly through kconfig.h which was included automatically with a -include option which was either part of INCLUDES or specified directly. With this change, I'm able to build for beaglebone with make -j 48. Change-Id: Ib57d0c6a755b747165b235c2328c3c30bd6dd67d Signed-off-by: Gabe Black <gabeblack(a)chromium.org> --- src/arch/armv7/Makefile.inc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc index dafe98c..4b1c591 100644 --- a/src/arch/armv7/Makefile.inc +++ b/src/arch/armv7/Makefile.inc @@ -111,7 +111,7 @@ $(objcbfs)/%.elf: $(objcbfs)/%.debug stages_c = $(src)/arch/armv7/stages.c stages_o = $(obj)/arch/armv7/stages.o -$(stages_o): $(stages_c) +$(stages_o): $(stages_c) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) -I. $(INCLUDES) -c -o $@ $< -marm @@ -250,14 +250,14 @@ $(objgenerated)/bootblock.s: $(objgenerated)/bootblock_inc.S $(obj)/config.h $(o @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) $(bootblock-S-ccopts) -MMD -x assembler-with-cpp -E -I$(src)/include -I$(src)/arch/armv7/include -I$(obj) -include $(obj)/build.h -include $(obj)/config.h -I. -I$(src) $< -o $@ -$(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) +$(objgenerated)/bootblock.inc: $(src)/arch/armv7/$(subst ",,$(CONFIG_BOOTBLOCK_SOURCE)) $(bootblock_custom) $(OPTION_TABLE_H) $(obj)/config.h @printf " CC $(subst $(obj)/,,$(@))\n" $(CC) $(bootblock-c-ccopts) $(INCLUDES) -MM \ -MT$(objgenerated)/bootblock.inc \ $< > $(objgenerated)/bootblock.inc.d $(CC) $(bootblock-c-ccopts) -c -S $(CFLAGS) -I. $(INCLUDES) $< -o $@ -$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) +$(objcbfs)/bootblock.debug: $(objgenerated)/bootblock.o $(objgenerated)/bootblock.ld $$(bootblock-objs) $(stages) $(obj)/config.h @printf " LINK $(subst $(obj)/,,$(@))\n" ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y) $(LD) -m armelf_linux_eabi -include $(obj)/config.h -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld

1 0

Patch set updated for coreboot: 9090d92 CBMEM: Always have early initialisation
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3917 -gerrit commit 9090d92a3b1cd8ab451727b44c39259f97bded47 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Sep 8 10:08:28 2013 +0300 CBMEM: Always have early initialisation Assume EARLY_CBMEM_INIT=y everywhere and remove option from Kconfig. If romstage does not make the cbmem_initialize() call, features like COLLECT_TIMESTAMPS and early CBMEM_CONSOLE will execute during romstage, but that data will get lost as no CAR migration is executed. Change-Id: I5615645ed0f5fd78fbc372cf5c3da71a3134dd85 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/Kconfig | 11 +---------- src/console/Kconfig | 1 - src/lib/Makefile.inc | 6 +----- src/lib/cbmem.c | 4 ---- src/mainboard/emulation/qemu-i440fx/Kconfig | 1 - src/mainboard/emulation/qemu-q35/Kconfig | 1 - src/mainboard/google/butterfly/Kconfig | 1 - src/mainboard/google/link/Kconfig | 1 - src/mainboard/google/parrot/Kconfig | 1 - src/mainboard/google/stout/romstage.c | 4 ---- src/mainboard/intel/emeraldlake2/Kconfig | 1 - src/mainboard/kontron/ktqm77/Kconfig | 1 - src/mainboard/lenovo/t60/Kconfig | 1 - src/mainboard/lenovo/x60/Kconfig | 1 - src/mainboard/samsung/lumpy/Kconfig | 1 - src/mainboard/samsung/stumpy/Kconfig | 1 - src/mainboard/via/epia-m850/romstage.c | 2 -- src/northbridge/intel/sandybridge/raminit.c | 2 -- 18 files changed, 2 insertions(+), 39 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index be2cb24..ae385dd 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -170,15 +170,6 @@ config INCLUDE_CONFIG_FILE config 0x8d740 raw 3324 (empty) 0x8e480 null 3610440 -config EARLY_CBMEM_INIT - bool - default n - help - Make coreboot initialize the CBMEM structures while running in ROM - stage. This is useful when the ROM stage wants to communicate - some, for instance, execution timestamps. It needs support in - romstage.c and should be enabled by the board's Kconfig. - config DYNAMIC_CBMEM bool "The CBMEM space is dynamically grown." default n @@ -189,7 +180,7 @@ config DYNAMIC_CBMEM config COLLECT_TIMESTAMPS bool "Create a table of timestamps collected during boot" - depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM) + default n help Make coreboot create a table of timer-ID/timer-value pairs to allow measuring time spent at different phases of the boot process. diff --git a/src/console/Kconfig b/src/console/Kconfig index 38f51e3..e9fca11 100644 --- a/src/console/Kconfig +++ b/src/console/Kconfig @@ -253,7 +253,6 @@ config CONSOLE_NE2K_IO_PORT boundary, qemu needs broader align) config CONSOLE_CBMEM - depends on (EARLY_CBMEM_INIT || DYNAMIC_CBMEM) bool "Send console output to a CBMEM buffer" default n help diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 44b5ebd..1455e4c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -56,10 +56,6 @@ romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c romstage-$(CONFIG_USBDEBUG) += usbdebug.c endif -ifneq ($(CONFIG_DYNAMIC_CBMEM),y) -romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c -endif - romstage-y += compute_ip_checksum.c ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y) romstage-y += memmove.c @@ -112,7 +108,7 @@ ramstage-y += dynamic_cbmem.c romstage-y += dynamic_cbmem.c else ramstage-y += cbmem.c -romstage-$(CONFIG_HAVE_ACPI_RESUME) += cbmem.c +romstage-$(CONFIG_CACHE_AS_RAM) += cbmem.c endif # CONFIG_DYNAMIC_CBMEM ramstage-y += cbmem_info.c diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c index 495ee5a..8d69435 100644 --- a/src/lib/cbmem.c +++ b/src/lib/cbmem.c @@ -95,7 +95,6 @@ void cbmem_late_set_table(uint64_t base, uint64_t size) * - suspend/resume backup memory */ -#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) static void cbmem_init(void) { uint64_t baseaddr, size; @@ -120,7 +119,6 @@ static void cbmem_init(void) .size = size - CBMEM_TOC_RESERVED }; } -#endif int cbmem_reinit(void) { @@ -220,7 +218,6 @@ void *cbmem_find(u32 id) return (void *)NULL; } -#if CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__) /* Returns True if it was not initialized before. */ int cbmem_initialize(void) { @@ -244,7 +241,6 @@ int cbmem_initialize(void) return rv; } -#endif #ifndef __PRE_RAM__ static void init_cbmem_post_device(void *unused) diff --git a/src/mainboard/emulation/qemu-i440fx/Kconfig b/src/mainboard/emulation/qemu-i440fx/Kconfig index b462b8c..2eed55b 100644 --- a/src/mainboard/emulation/qemu-i440fx/Kconfig +++ b/src/mainboard/emulation/qemu-i440fx/Kconfig @@ -11,7 +11,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_256 - select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT config MAINBOARD_DIR diff --git a/src/mainboard/emulation/qemu-q35/Kconfig b/src/mainboard/emulation/qemu-q35/Kconfig index 9d78bb8..43bba46 100644 --- a/src/mainboard/emulation/qemu-q35/Kconfig +++ b/src/mainboard/emulation/qemu-q35/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES # select HAVE_ACPI_RESUME select BOARD_ROMSIZE_KB_256 - select EARLY_CBMEM_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT config MAINBOARD_DIR diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig index e9ad6ef..d35be8d 100644 --- a/src/mainboard/google/butterfly/Kconfig +++ b/src/mainboard/google/butterfly/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_SMI_HANDLER select GFXUMA select CHROMEOS - select EARLY_CBMEM_INIT # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index b74c604..d040599 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -16,7 +16,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHROMEOS select SERIRQ_CONTINUOUS_MODE select MAINBOARD_HAS_NATIVE_VGA_INIT - select EARLY_CBMEM_INIT select MARK_GRAPHICS_MEM_WRCOMB config MAINBOARD_DIR diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig index 191e856..1108b13 100644 --- a/src/mainboard/google/parrot/Kconfig +++ b/src/mainboard/google/parrot/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_SMI_HANDLER select GFXUMA select CHROMEOS - select EARLY_CBMEM_INIT # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 5ace4f6..464ddea 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -296,11 +296,7 @@ void main(unsigned long bist) post_code(0x3e); MCHBAR16(SSKPD) = 0xCAFE; -#if CONFIG_EARLY_CBMEM_INIT cbmem_was_initted = !cbmem_initialize(); -#else - cbmem_was_initted = cbmem_reinit(); -#endif #if CONFIG_HAVE_ACPI_RESUME /* If there is no high memory area, we didn't boot before, so diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index fd98485..1ad50d9 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select GFXUMA #select CHROMEOS - select EARLY_CBMEM_INIT config MAINBOARD_DIR string diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index e9d1ce7..d379f6f 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -14,7 +14,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select HAVE_SMI_HANDLER select GFXUMA - select EARLY_CBMEM_INIT select ENABLE_VMX select HAVE_MRC diff --git a/src/mainboard/lenovo/t60/Kconfig b/src/mainboard/lenovo/t60/Kconfig index 0f0670e..ec03534 100644 --- a/src/mainboard/lenovo/t60/Kconfig +++ b/src/mainboard/lenovo/t60/Kconfig @@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CHANNEL_XOR_RANDOMIZATION select HAVE_ACPI_TABLES select HAVE_ACPI_RESUME - select EARLY_CBMEM_INIT config MAINBOARD_DIR string default lenovo/t60 diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 72aeef8..8eb159b 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -24,7 +24,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_RESUME select USE_OPTION_TABLE select MAINBOARD_HAS_NATIVE_VGA_INIT - select EARLY_CBMEM_INIT config MAINBOARD_DIR string diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig index 91dc3b6..13c8748 100644 --- a/src/mainboard/samsung/lumpy/Kconfig +++ b/src/mainboard/samsung/lumpy/Kconfig @@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_SMSC_MEC1308 select DRIVERS_GENERIC_IOAPIC - select EARLY_CBMEM_INIT select HAVE_MRC config MAINBOARD_DIR diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig index f4f8e4d..17f854f 100644 --- a/src/mainboard/samsung/stumpy/Kconfig +++ b/src/mainboard/samsung/stumpy/Kconfig @@ -13,7 +13,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select NORTHBRIDGE_INTEL_SANDYBRIDGE select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_ITE_IT8772F - select EARLY_CBMEM_INIT select HAVE_MRC config MAINBOARD_DIR diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 23b5aea..8bbb1f5 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -94,9 +94,7 @@ void main(unsigned long bist) print_debug("We passed RAM verify\n"); /* We got RAM working, now we can write the timestamps to RAM */ -#if CONFIG_EARLY_CBMEM_INIT cbmem_initialize(); -#endif timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); /* FIXME: See if this is needed or take this out please */ diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 3b321d7..db96202 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -58,7 +58,6 @@ static void save_mrc_data(struct pei_data *pei_data) { u16 c1, c2, checksum; -#if CONFIG_EARLY_CBMEM_INIT struct mrc_data_container *mrcdata; int output_len = ALIGN(pei_data->mrc_output_len, 16); @@ -84,7 +83,6 @@ static void save_mrc_data(struct pei_data *pei_data) mrcdata->mrc_checksum = compute_ip_checksum(mrcdata->mrc_data, mrcdata->mrc_data_size); -#endif /* Save the MRC seed values to CMOS */ cmos_write32(CMOS_OFFSET_MRC_SEED, pei_data->scrambler_seed);

1 0

Patch set updated for coreboot: 47ed3c5 CBMEM: Always select CAR_MIGRATION
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3916 -gerrit commit 47ed3c525757ae5cf5ea03c5934b10f71742af00 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 10 00:07:21 2013 +0300 CBMEM: Always select CAR_MIGRATION If romstage does not make cbmem_initialize() call, linker should optimize the code for CAR migration away. This simplifies design of CBMEM console by a considerable amount. As console buffer is now migrated within cbmem_initialize() call there is no longer need for cbmemc_reinit() call made at end of romstage. Change-Id: I8675ecaafb641fa02675e9ba3f374caa8e240f1d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/boot/cbmem.c | 2 +- src/cpu/intel/haswell/Kconfig | 1 - src/cpu/intel/haswell/romstage.c | 1 - src/cpu/x86/Kconfig | 9 ------ src/cpu/x86/Makefile.inc | 2 +- src/include/cpu/x86/car.h | 2 +- src/include/timestamp.h | 4 +-- src/lib/cbmem_console.c | 42 ++------------------------ src/lib/hardwaremain.c | 2 +- src/lib/timestamp.c | 5 ++- src/lib/usbdebug.c | 4 +-- src/mainboard/emulation/qemu-i440fx/romstage.c | 5 --- src/mainboard/emulation/qemu-q35/romstage.c | 5 --- src/mainboard/google/butterfly/romstage.c | 5 --- src/mainboard/google/link/romstage.c | 5 --- src/mainboard/google/parrot/romstage.c | 5 --- src/mainboard/google/stout/romstage.c | 5 --- src/mainboard/intel/emeraldlake2/romstage.c | 5 --- src/mainboard/kontron/ktqm77/romstage.c | 5 --- src/mainboard/lenovo/t60/romstage.c | 5 --- src/mainboard/lenovo/x60/romstage.c | 5 --- src/mainboard/samsung/lumpy/romstage.c | 5 --- src/mainboard/samsung/stumpy/romstage.c | 5 --- src/mainboard/via/epia-m850/romstage.c | 1 - 24 files changed, 14 insertions(+), 121 deletions(-) diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c index 991a3e6..58ccbca 100644 --- a/src/arch/x86/boot/cbmem.c +++ b/src/arch/x86/boot/cbmem.c @@ -47,7 +47,7 @@ void __attribute__((weak)) backup_top_of_ram(uint64_t ramtop) /* This is for compatibility with old boards only. Any new chipset and board * must implement get_top_of_ram() for both romstage and ramstage to support - * features like CAR_MIGRATION and CBMEM_CONSOLE. + * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE. */ void set_top_of_ram(uint64_t ramtop) { diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index c352e36..7b6fc43 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -18,7 +18,6 @@ config CPU_SPECIFIC_OPTIONS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select CAR_MIGRATION config BOOTBLOCK_CPU_INIT string diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c index e62b894..757cc34 100644 --- a/src/cpu/intel/haswell/romstage.c +++ b/src/cpu/intel/haswell/romstage.c @@ -278,7 +278,6 @@ void romstage_common(const struct romstage_params *params) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); } diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index c10dd15..c64a8e4 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -115,12 +115,3 @@ config X86_AMD_FIXED_MTRRS help This option informs the MTRR code to use the RdMem and WrMem fields in the fixed MTRR MSRs. - -config CAR_MIGRATION - def_bool n - depends on DYNAMIC_CBMEM || EARLY_CBMEM_INIT - help - Migrate the cache-as-ram variables to CBMEM once CBMEM is set up - in romstage. This option is only needed if one will be doing more - work in romstage after the cache-as-ram is torn down aside from - loading ramstage. diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index fe8648c..311dcc1 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1 +1 @@ -romstage-$(CONFIG_CAR_MIGRATION) += car.c +romstage-$(CONFIG_CACHE_AS_RAM) += car.c diff --git a/src/include/cpu/x86/car.h b/src/include/cpu/x86/car.h index 7b5cedf..5fc11f9 100644 --- a/src/include/cpu/x86/car.h +++ b/src/include/cpu/x86/car.h @@ -28,7 +28,7 @@ #define CAR_CBMEM #endif -#if CONFIG_CAR_MIGRATION && defined(__PRE_RAM__) +#if defined(__PRE_RAM__) #define CAR_MIGRATE_ATTR __attribute__ ((used,section (".car.migrate"))) /* Call migrate_fn_() when CAR globals are migrated. */ diff --git a/src/include/timestamp.h b/src/include/timestamp.h index 0f56200..edc0076 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -59,13 +59,13 @@ enum timestamp_id { void timestamp_init(tsc_t base); void timestamp_add(enum timestamp_id id, tsc_t ts_time); void timestamp_add_now(enum timestamp_id id); -void timestamp_sync(void); +void timestamp_reinit(void); tsc_t get_initial_timestamp(void); #else #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) -#define timestamp_sync() +#define timestamp_reinit() #endif #endif diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index 819c27f..881865c 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -45,17 +45,6 @@ static struct cbmem_console *cbmem_console_p CAR_GLOBAL; static struct cbmem_console car_cbmem_console CAR_CBMEM; -/* - * Once DRAM is initialized and the cache as ram mode is disabled, while still - * running from ROM, the console buffer in the cache as RAM area becomes - * unavailable. - * - * By this time the console log buffer is already available in - * CBMEM. The location at 0x600 is used as the redirect pointer allowing to - * find out where the actual console log buffer is. - */ -#define CBMEM_CONSOLE_REDIRECT (*((struct cbmem_console **)0x600)) - #else /* @@ -69,30 +58,12 @@ static u8 static_console[40000]; static inline struct cbmem_console *current_console(void) { -#if CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) - return car_get_var(cbmem_console_p); -#else - /* - * This check allows to tell if the cache as RAM mode has been exited - * or not. If it has been exited, the real memory is being used - * (resulting in the variable on the stack located below - * DCACHE_RAM_BASE), use the redirect pointer to find out where the - * actual console buffer is. - */ - if ((uintptr_t)__builtin_frame_address(0) < - (uintptr_t)CONFIG_DCACHE_RAM_BASE) - return CBMEM_CONSOLE_REDIRECT; return car_get_var(cbmem_console_p); -#endif /* CONFIG_CAR_MIGRATION */ } static inline void current_console_set(struct cbmem_console *new_console_p) { -#if CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) car_set_var(cbmem_console_p, new_console_p); -#else - CBMEM_CONSOLE_REDIRECT = new_console_p; -#endif } static inline void init_console_ptr(void *storage, u32 total_space) @@ -193,7 +164,7 @@ static void copy_console_buffer(struct cbmem_console *new_cons_p) new_cons_p->buffer_cursor = cursor; } -static void cbmemc_reinit_(void) +void cbmemc_reinit(void) { struct cbmem_console *cbm_cons_p = NULL; @@ -221,12 +192,5 @@ static void cbmemc_reinit_(void) current_console_set(cbm_cons_p); } -void cbmemc_reinit(void) -{ -#if !CONFIG_CAR_MIGRATION || !defined(__PRE_RAM__) - cbmemc_reinit_(); -#endif -} - -/* Call cbmemc_reinit_() at CAR migration time. */ -CAR_MIGRATE(cbmemc_reinit_) +/* Call cbmemc_reinit() at CAR migration time. */ +CAR_MIGRATE(cbmemc_reinit) diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index dd97196..a5993c4 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -177,7 +177,7 @@ static boot_state_t bs_post_device(void *arg) { timestamp_add_now(TS_DEVICE_DONE); - timestamp_sync(); + timestamp_reinit(); return BS_OS_RESUME_CHECK; } diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 63f17f7..a9c354e 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -140,7 +140,7 @@ void timestamp_init(tsc_t base) #endif } -void timestamp_sync(void) +void timestamp_reinit(void) { if (!boot_cpu()) return; @@ -154,3 +154,6 @@ void timestamp_sync(void) if (ts_table) timestamp_do_sync(); } + +/* Call timestamp_reinit at CAR migration time. */ +CAR_MIGRATE(timestamp_reinit) diff --git a/src/lib/usbdebug.c b/src/lib/usbdebug.c index 7a8402d..f44a7d4 100644 --- a/src/lib/usbdebug.c +++ b/src/lib/usbdebug.c @@ -869,7 +869,6 @@ void pci_ehci_read_resources(struct device *dev) } #endif -#if CONFIG_CAR_MIGRATION #if !defined(__PRE_RAM__) && !defined(__SMM__) static int get_usbdebug_from_cbmem(struct ehci_debug_info *info) { @@ -899,7 +898,6 @@ static void migrate_ehci_debug(void) } CAR_MIGRATE(migrate_ehci_debug); #endif -#endif /* CONFIG_CAR_MIGRATION */ unsigned long pci_ehci_base_regs(pci_devfn_t sdev) { @@ -931,7 +929,7 @@ int usbdebug_init(void) { struct ehci_debug_info *dbg_info = dbgp_ehci_info(); -#if CONFIG_CAR_MIGRATION && !defined(__PRE_RAM__) && !defined(__SMM__) +#if !defined(__PRE_RAM__) && !defined(__SMM__) if (!get_usbdebug_from_cbmem(dbg_info)) return 0; #endif diff --git a/src/mainboard/emulation/qemu-i440fx/romstage.c b/src/mainboard/emulation/qemu-i440fx/romstage.c index 70c7202..db8891e 100644 --- a/src/mainboard/emulation/qemu-i440fx/romstage.c +++ b/src/mainboard/emulation/qemu-i440fx/romstage.c @@ -51,11 +51,6 @@ void main(unsigned long bist) cbmem_was_initted = !cbmem_initialize(); timestamp_init(rdtsc()); - timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/emulation/qemu-q35/romstage.c b/src/mainboard/emulation/qemu-q35/romstage.c index abc9474..fae5095 100644 --- a/src/mainboard/emulation/qemu-q35/romstage.c +++ b/src/mainboard/emulation/qemu-q35/romstage.c @@ -53,11 +53,6 @@ void main(unsigned long bist) cbmem_was_initted = !cbmem_initialize(); timestamp_init(rdtsc()); - timestamp_sync(); timestamp_add_now(TS_START_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c index 670fc00..f56884d 100644 --- a/src/mainboard/google/butterfly/romstage.c +++ b/src/mainboard/google/butterfly/romstage.c @@ -273,10 +273,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index aaecfc6..27a22f7 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -316,10 +316,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c index 444386f..2fe61d6 100644 --- a/src/mainboard/google/parrot/romstage.c +++ b/src/mainboard/google/parrot/romstage.c @@ -274,10 +274,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c index 464ddea..a0700af 100644 --- a/src/mainboard/google/stout/romstage.c +++ b/src/mainboard/google/stout/romstage.c @@ -326,10 +326,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c index 09dc60b..7691116 100644 --- a/src/mainboard/intel/emeraldlake2/romstage.c +++ b/src/mainboard/intel/emeraldlake2/romstage.c @@ -328,10 +328,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c index 22fff42..773079d 100644 --- a/src/mainboard/kontron/ktqm77/romstage.c +++ b/src/mainboard/kontron/ktqm77/romstage.c @@ -322,10 +322,5 @@ void main(unsigned long bist) } #endif post_code(0x3f); - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 42514e3..1b7e693 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -343,11 +343,6 @@ void main(unsigned long bist) } #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 97317f8..26a7b9b 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -347,11 +347,6 @@ void main(unsigned long bist) } #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index d7b165b..6c87f88 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -347,10 +347,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index b0ac5a8..ee715e7 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -354,10 +354,5 @@ void main(unsigned long bist) #if CONFIG_CHROMEOS init_chromeos(boot_mode); #endif - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); -#if CONFIG_CONSOLE_CBMEM - /* Keep this the last thing this function does. */ - cbmemc_reinit(); -#endif } diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c index 8bbb1f5..473e60e 100644 --- a/src/mainboard/via/epia-m850/romstage.c +++ b/src/mainboard/via/epia-m850/romstage.c @@ -95,7 +95,6 @@ void main(unsigned long bist) /* We got RAM working, now we can write the timestamps to RAM */ cbmem_initialize(); - timestamp_sync(); timestamp_add_now(TS_END_ROMSTAGE); /* FIXME: See if this is needed or take this out please */ /* Disable Memcard and SDIO */

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Patch set updated for coreboot: c7f7e0b ROMCC boards: Fix builds with CBMEM console, timestamps or usbdebug
by Kyösti Mälkki 13 Sep '13

13 Sep '13

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3919 -gerrit commit c7f7e0baf1df38cf214bb3ca5dd82fbe41a6a499 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Sep 10 13:50:32 2013 +0300 ROMCC boards: Fix builds with CBMEM console, timestamps or usbdebug These features depend on CAR_GLOBAL region, which is not available when romstage is built with ROMCC. Exclude these from romstage, keep them available for ramstage. A follow-up patch will fix the dependencies and allows enabling these features in menuconfig. Change-Id: I9de5ad41ea733655a3fbdc734646f818e39cc471 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/arch/x86/lib/romcc_console.c | 3 --- src/console/console.c | 2 +- src/include/console/cbmem_console.h | 6 ++++++ src/lib/Makefile.inc | 6 ++++-- 4 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c index 0e1f4e6..13ee1f0 100644 --- a/src/arch/x86/lib/romcc_console.c +++ b/src/arch/x86/lib/romcc_console.c @@ -46,9 +46,6 @@ static void __console_tx_byte(unsigned char byte) #if CONFIG_CONSOLE_NE2K ne2k_append_data_byte(byte, CONFIG_CONSOLE_NE2K_IO_PORT); #endif -#if CONFIG_CONSOLE_CBMEM - cbmemc_tx_byte(byte); -#endif } static void __console_tx_nibble(unsigned nibble) diff --git a/src/console/console.c b/src/console/console.c index b2b06b3..06a4604 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -119,7 +119,7 @@ void console_init(void) #if CONFIG_SPKMODEM spkmodem_init(); #endif -#if CONFIG_USBDEBUG +#if CONFIG_USBDEBUG && !defined(__BOOT_BLOCK__) usbdebug_init(); #endif diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h index 37ea4d8..9e2f14e 100644 --- a/src/include/console/cbmem_console.h +++ b/src/include/console/cbmem_console.h @@ -19,8 +19,14 @@ #ifndef _CONSOLE_CBMEM_CONSOLE_H_ #define _CONSOLE_CBMEM_CONSOLE_H_ +#if CONFIG_CACHE_AS_RAM || !defined(__PRE_RAM__) void cbmemc_init(void); void cbmemc_reinit(void); void cbmemc_tx_byte(unsigned char data); +#else +#define cbmemc_init() +#define cbmemc_reinit() +#define cbmemc_tx_byte() +#endif #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index f3e7dc5..44b5ebd 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -47,12 +47,14 @@ romstage-$(CONFIG_COMPRESS_RAMSTAGE) += lzma.c romstage-$(CONFIG_CACHE_AS_RAM) += ramtest.c romstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c romstage-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c -romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c romstage-$(CONFIG_CONSOLE_NE2K) += ne2k.c -romstage-$(CONFIG_USBDEBUG) += usbdebug.c romstage-$(CONFIG_SPKMODEM) += spkmodem.c +ifeq ($(CONFIG_CACHE_AS_RAM),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c +romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c +romstage-$(CONFIG_USBDEBUG) += usbdebug.c +endif ifneq ($(CONFIG_DYNAMIC_CBMEM),y) romstage-$(CONFIG_EARLY_CBMEM_INIT) += cbmem.c

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coreboot-gerrit September 2013