the following patch was just integrated into master:
commit 6cfe223da0ac786e1aaf675fbb5dc605e600bb75
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Jul 1 05:16:19 2013 -0700
am335x: Add the config variable ROMSTAGE_BASE to the CPU's Kconfig.
This variable wasn't being defined and was defaulting to zero when used in the
ROM stage's linker script. This change defines it as a variable, and gives it
a value which is slightly beyond the end of the bootblock. By making the ROM
stage request to be loaded slightly farther into memory than it was loaded by
the SOC's masked ROM, we ensure that it's moved away from the stage's metadata
instead of on top of it. When it moves the other way, it clobbers important
values like the entry point vefore the bootblock has had a chance to use them.
Change-Id: I027a1365d05f1d79d7fc1e1349965ccb7d4e81b9
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3582
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See http://review.coreboot.org/3582 for details.
-gerrit
the following patch was just integrated into master:
commit 81cbadadc13a73220e8a02d47c2d0a182fa5b22f
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Jul 1 05:12:40 2013 -0700
beaglebone: Put some code in romstage.c so we can tell if it ran.
The placeholder code in beaglebone's romstage.c didn't do anything, it just
immediately tried to load the RAM stage and jump into it. That doesn't
currently work, and there's no indication whether you actually successfully
got into the ROM stage or not.
This change adds a few lines which initialize the console and say "Hi" so that
we can tell that the ROM stage is running.
Change-Id: I45a0908c3ac65b21e0e5020428696d2e54933d0e
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3581
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See http://review.coreboot.org/3581 for details.
-gerrit
the following patch was just integrated into master:
commit 978c21512751c50ad92d459cbca39d98d9fc39a9
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Jul 1 05:03:47 2013 -0700
ARM: Define custom ELF headers for ARM.
At least when building with the gnu toolchain, the headers the linker
automatically generate save space for the actual ELF headers in one of the
loadable segments. This creates two problems. First, the data you intended to
be at the start of the image doesn't actually show up there, it's actually the
ELF headers. Second, the ELF headers are essentially useless for firmware
since there's currently nothing to tell you where they are, and even if there
was, there isn't much of a reason to look at them. They're useful in userspace
for, for instance, the dynamic linker, but not really in firmware.
This change adds a PHDRS construct to each of the linker scripts used on ARM
which define a single segment called to_load which does not have the flag set
which would tell the linker to put headers in it. The first section defined in
the script has ": to_load" to tell the linker which segment to put it in, and
from that point on the other sections go in there by default.
Change-Id: I24b721eb436d17afd234002ae82f9166d2fcf65d
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3580
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See http://review.coreboot.org/3580 for details.
-gerrit
the following patch was just integrated into master:
commit c392b6477f656331c7e19b22f6eb240cdd5465a1
Author: Peter Stuge <peter(a)stuge.se>
Date: Sat Jul 6 19:51:12 2013 +0200
SMBIOS: Add smbios_write_type11() for creating an OEM Strings structure
Change-Id: Id338968429435bac26595c4843b07cdbb91dd64d
Signed-off-by: Peter Stuge <peter(a)stuge.se>
Reviewed-on: http://review.coreboot.org/3618
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See http://review.coreboot.org/3618 for details.
-gerrit
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3771
-gerrit
commit acb8a4efdd94336e6d4b76a441ee53b245cca225
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Sun Jul 14 23:17:32 2013 -0700
beaglebone: Get rid of a redundant CBFS_ROM_OFFSET.
CBFS_ROM_OFFSET was declared in both the am335x config and the beaglebone
config. This removes it from the beaglebone config.
Change-Id: I657cb8e83a1ee961d8bdc995a41f303920bc53f9
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/ti/beaglebone/Kconfig | 4 ----
1 file changed, 4 deletions(-)
diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig
index 8651c9b..7029d1c 100644
--- a/src/mainboard/ti/beaglebone/Kconfig
+++ b/src/mainboard/ti/beaglebone/Kconfig
@@ -62,10 +62,6 @@ config CBFS_HEADER_ROM_OFFSET
hex
default 0x10
-config CBFS_ROM_OFFSET
- hex
- default 0x5000
-
choice CONSOLE_SERIAL_UART_CHOICES
prompt "Serial Console UART"
default CONSOLE_SERIAL_UART0
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3579
-gerrit
commit f5ecf8ac589f8d8e3af3d2a47a5d51fc108d8e50
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Jul 1 04:34:29 2013 -0700
CBFS: Change how the bss is zeroed when loading a stage.
For reasons explained in a previous CL, it might be necessary to "load" a file
from CBFS in place. The loading code in CBFS was, however, zeroing the area of
memory the stage was about to be loaded into. When the CBFS data is located
elsewhere this works fine, but when it isn't you end up clobbering the data
you're trying to load. Also, there's no reason to zero memory we're about to
load something into or have just loaded something into. This change makes it
so that we only zero out the portion of the memory between what was
loaded/decompressed and the final size of the stage in memory.
Change-Id: If34df16bd74b2969583e11ef6a26eb4065842f57
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
payloads/libpayload/libcbfs/cbfs.c | 16 ++++++++++------
src/lib/cbfs.c | 6 ++++--
2 files changed, 14 insertions(+), 8 deletions(-)
diff --git a/payloads/libpayload/libcbfs/cbfs.c b/payloads/libpayload/libcbfs/cbfs.c
index 6243473..4dfe30a 100644
--- a/payloads/libpayload/libcbfs/cbfs.c
+++ b/payloads/libpayload/libcbfs/cbfs.c
@@ -136,6 +136,7 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name)
/* this is a mess. There is no ntohll. */
/* for now, assume compatible byte order until we solve this. */
uint32_t entry;
+ uint32_t final_size;
if (stage == NULL)
return (void *) -1;
@@ -144,15 +145,18 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name)
name,
(uint32_t) stage->load, stage->memlen,
stage->entry);
- memset((void *) (uint32_t) stage->load, 0, stage->memlen);
- if (!cbfs_decompress(stage->compression,
- ((unsigned char *) stage) +
- sizeof(struct cbfs_stage),
- (void *) (uint32_t) stage->load,
- stage->len))
+ final_size = cbfs_decompress(stage->compression,
+ ((unsigned char *) stage) +
+ sizeof(struct cbfs_stage),
+ (void *) (uint32_t) stage->load,
+ stage->len);
+ if (!final_size)
return (void *) -1;
+ memset((void *)((uintptr_t)stage->load + final_size), 0,
+ stage->memlen - final_size);
+
DEBUG("stage loaded.\n");
entry = stage->entry;
diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c
index 400b8a5..f48d887 100644
--- a/src/lib/cbfs.c
+++ b/src/lib/cbfs.c
@@ -268,8 +268,6 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name)
name,
(uint32_t) stage->load, stage->memlen,
stage->entry);
- /* Stages rely the below clearing so that the bss is initialized. */
- memset((void *) (uint32_t) stage->load, 0, stage->memlen);
final_size = cbfs_decompress(stage->compression,
((unsigned char *) stage) +
@@ -279,6 +277,10 @@ void * cbfs_load_stage(struct cbfs_media *media, const char *name)
if (!final_size)
return (void *) -1;
+ /* Stages rely the below clearing so that the bss is initialized. */
+ memset((void *)((uintptr_t)stage->load + final_size), 0,
+ stage->memlen - final_size);
+
DEBUG("stage loaded.\n");
entry = stage->entry;
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3577
-gerrit
commit 4c64fbca524caef29175fa6d1aa148abd9a146c4
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Jul 1 04:28:23 2013 -0700
CBFS: Use memmove instead of memcpy when loading a file from CBFS.
It might be the case that a file is being loaded from a portion of CBFS which
has already been loaded into a limitted bit of memory somewhere, and we want
to load that file in place, effectively, so that it's original location in
CBFS overlaps with its new location. That's only guaranteed to work if you use
memmove instead of memcpy.
Change-Id: Id550138c875907749fff05f330fcd2fb5f9ed924
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/lib/Makefile.inc | 3 +++
src/lib/cbfs_core.c | 2 +-
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index f1783ba..c421038 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -122,6 +122,9 @@ endif
ifneq ($(CONFIG_HAVE_ARCH_MEMCPY),y)
smm-y += memcpy.c
endif
+ifneq ($(CONFIG_HAVE_ARCH_MEMMOVE),y)
+smm-y += memmove.c
+endif
smm-y += cbfs.c memcmp.c
smm-$(CONFIG_CONSOLE_SERIAL8250) += uart8250.c
smm-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem.c
diff --git a/src/lib/cbfs_core.c b/src/lib/cbfs_core.c
index 852b37f..39c1ff6 100644
--- a/src/lib/cbfs_core.c
+++ b/src/lib/cbfs_core.c
@@ -195,7 +195,7 @@ int cbfs_decompress(int algo, void *src, void *dst, int len)
{
switch (algo) {
case CBFS_COMPRESS_NONE:
- memcpy(dst, src, len);
+ memmove(dst, src, len);
return 0;
#ifdef CBFS_CORE_WITH_LZMA
case CBFS_COMPRESS_LZMA:
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3583
-gerrit
commit 8e7809de863e0179fdab6f0e6bed95fdff557a24
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Jul 1 05:38:45 2013 -0700
am335x: Make the default media for the bootblock sram instead of NAND flash.
The SOC's built in ROM loads the bootblock and the ROM stage into the on chip
memory before handing over control to the bootblock. To avoid having to add
one or more driver to the bootblock so that it can re-load the ROM stage from
whatever media Coreboot is stored on, we can just take advantage of the copy
that's already there. Loading the RAM stage/payloads won't be so simple,
so the ROM stage and the RAM stage will have to have different media drivers.
Change-Id: Id74ed4bc3afd2063277a36e666080522af2305dd
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/cpu/ti/am335x/Makefile.inc | 2 +-
src/cpu/ti/am335x/bootblock_media.c | 72 +++++++++++++++++++++++++++++++++++++
2 files changed, 73 insertions(+), 1 deletion(-)
diff --git a/src/cpu/ti/am335x/Makefile.inc b/src/cpu/ti/am335x/Makefile.inc
index e1220fa..ff00733 100644
--- a/src/cpu/ti/am335x/Makefile.inc
+++ b/src/cpu/ti/am335x/Makefile.inc
@@ -1,5 +1,5 @@
bootblock-y += dmtimer.c
-bootblock-y += nand.c
+bootblock-y += bootblock_media.c
bootblock-y += pinmux.c
bootblock-$(CONFIG_EARLY_CONSOLE) += uart.c
diff --git a/src/cpu/ti/am335x/bootblock_media.c b/src/cpu/ti/am335x/bootblock_media.c
new file mode 100644
index 0000000..553fe42
--- /dev/null
+++ b/src/cpu/ti/am335x/bootblock_media.c
@@ -0,0 +1,72 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <cbfs.h>
+#include <console/console.h>
+#include <string.h>
+
+static int dummy_open(struct cbfs_media *media)
+{
+ return 0;
+}
+
+static int dummy_close(struct cbfs_media *media)
+{
+ return 0;
+}
+
+static void * on_chip_memory_map(struct cbfs_media *media, size_t offset,
+ size_t count)
+{
+ return (void *)((uintptr_t)CONFIG_BOOTBLOCK_BASE + offset);
+}
+
+static void * dummy_unmap(struct cbfs_media *media, const void *address)
+{
+ return NULL;
+}
+
+static size_t on_chip_memory_read(struct cbfs_media *media, void *dest,
+ size_t offset, size_t count)
+{
+ void *ptr = media->map(media, offset, count);
+ memcpy(dest, ptr, count);
+ media->unmap(media, ptr);
+ return count;
+}
+
+int init_default_cbfs_media(struct cbfs_media *media)
+{
+ struct cbfs_header *header =
+ (struct cbfs_header *)((uintptr_t)CONFIG_BOOTBLOCK_BASE +
+ CONFIG_CBFS_HEADER_ROM_OFFSET);
+
+ if (CBFS_HEADER_MAGIC != ntohl(header->magic)) {
+ printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header);
+ return -1;
+ }
+
+ media->open = dummy_open;
+ media->close = dummy_close;
+ media->map = on_chip_memory_map;
+ media->unmap = dummy_unmap;
+ media->read = on_chip_memory_read;
+
+ return 0;
+}