coreboot-gerrit June 2013

coreboot-gerrit@coreboot.org

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744 discussions

Patch merged into coreboot/master: 1cc3416 Add support to enable/disable builtin GbE (again)
by gerrit＠coreboot.org 28 Jun '13

28 Jun '13

the following patch was just integrated into master: commit 1cc3416f5fb58883fdad7192856c258c01909fd7 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:59:18 2013 -0700 Add support to enable/disable builtin GbE (again) This requires a new system agent binary (v6 / v11 on haswell). Note that the existing system agent binaries are long time obsolete and won't work with current coreboot, so this update is overdue. Change-Id: I48d8649576ca84d2b85ab082ce06f3462e189059 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/3568 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/3568 for details. -gerrit

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Patch merged into coreboot/master: e44a89f amd/agesa/f15/Lib/amdlib.c: Add missing breaks to switch statement
by gerrit＠coreboot.org 28 Jun '13

28 Jun '13

the following patch was just integrated into master: commit e44a89f6fd4f421f28ef766b380dca112bf4aea2 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Tue Jun 25 14:14:14 2013 -0600 amd/agesa/f15/Lib/amdlib.c: Add missing breaks to switch statement Static analysis often flags case statements that do not include a terminating "break;" statement. Eclipse's CODAN is an example of this. This changelist modifies amdlib.c to terminate case statements with "break;". Change-Id: I3d43acaf64e2e2d9717421cb547fec35e582cf8b Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3539 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3539 for details. -gerrit

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Patch merged into coreboot/master: af881b8 amd/agesa/f15/Proc/CPU: Add length modifier to eliminate compiler warnings
by gerrit＠coreboot.org 28 Jun '13

28 Jun '13

the following patch was just integrated into master: commit af881b898a11eb5c56407475441f4795548f84a2 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Tue Jun 25 14:53:24 2013 -0600 amd/agesa/f15/Proc/CPU: Add length modifier to eliminate compiler warnings This change adds length modifiers to constant values to eliminate compiler warning messages. Change-Id: I032cb37cec788e2b5f79f5bbf9efc19a7892dc14 Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3538 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3538 for details. -gerrit

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Patch merged into coreboot/master: 940ccaa vendorcode/amd/agesa/f15: Eliminate compiler warnings
by gerrit＠coreboot.org 28 Jun '13

28 Jun '13

the following patch was just integrated into master: commit 940ccaa51066e776ceb8fd59157ab93a619a9ef6 Author: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Date: Tue Jun 25 14:50:57 2013 -0600 vendorcode/amd/agesa/f15: Eliminate compiler warnings This change is mostly type casts to eliminate compile time warnings. These specific changes are mostly cherry-picked from AMD Family 14 code and, as such, contain artifacts copied over from F14. For example, there are a number of UINT64 casts that are commented out rather than removed. This is to maintain consistency between AGESA versions. Ultimately, this is in preparation for turning on warnings as errors for AMD Family 15 server parts. Change-Id: Ic73d0b6ebab18d97015a9dd1130aff4e5e432fb7 Signed-off-by: Bruce Griffith <Bruce.Griffith(a)se-eng.com> Reviewed-on: http://review.coreboot.org/3525 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3525 for details. -gerrit

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Patch set updated for coreboot: 17f7bbe Add support to enable/disable builtin GbE (again)
by Stefan Reinauer 28 Jun '13

28 Jun '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3568 -gerrit commit 17f7bbe7b6ad0281e3fdce94dc06435c7dd664af Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:59:18 2013 -0700 Add support to enable/disable builtin GbE (again) This requires a new system agent binary (v6 / v11 on haswell). Note that the existing system agent binaries are long time obsolete and won't work with current coreboot, so this update is overdue. Change-Id: I48d8649576ca84d2b85ab082ce06f3462e189059 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/mainboard/samsung/lumpy/romstage.c | 1 + src/mainboard/samsung/stumpy/romstage.c | 1 + src/northbridge/intel/haswell/pei_data.h | 3 ++- src/northbridge/intel/sandybridge/Kconfig | 3 +-- src/northbridge/intel/sandybridge/Makefile.inc | 5 ----- src/northbridge/intel/sandybridge/pei_data.h | 3 ++- 6 files changed, 7 insertions(+), 9 deletions(-) diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index b941021..be1411e 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -148,6 +148,7 @@ void main(unsigned long bist) #endif struct pei_data pei_data = { + .pei_version = PEI_VERSION, .mchbar = DEFAULT_MCHBAR, .dmibar = DEFAULT_DMIBAR, .epbar = DEFAULT_EPBAR, diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index dda3ab5..f64e860 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -183,6 +183,7 @@ void main(unsigned long bist) }; #endif struct pei_data pei_data = { + pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, dmibar: DEFAULT_DMIBAR, epbar: DEFAULT_EPBAR, diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h index 280c73b..7c10e41 100644 --- a/src/northbridge/intel/haswell/pei_data.h +++ b/src/northbridge/intel/haswell/pei_data.h @@ -31,7 +31,7 @@ #define PEI_DATA_H typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 10 +#define PEI_VERSION 11 struct pei_data { @@ -53,6 +53,7 @@ struct pei_data uint8_t spd_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 56d2cd7..3a65782 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -118,8 +118,7 @@ config HAVE_MRC config MRC_FILE string "Intel System Agent path and filename" depends on HAVE_MRC - default "systemagent-ivybridge.bin" if NORTHBRIDGE_INTEL_IVYBRIDGE - default "systemagent-sandybridge.bin" if NORTHBRIDGE_INTEL_SANDYBRIDGE + default "systemagent-r6.bin" help The path and filename of the file to use as System Agent binary. diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 1428bdb..be07e93 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -35,12 +35,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE),y) mrc.bin-position := 0xfffa0000 -endif -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y) -mrc.bin-position := 0xfffe0000 -endif mrc.bin-type := 0xab $(obj)/mrc.cache: diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index fb56873..d317515 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -38,7 +38,7 @@ typedef struct { } pch_usb3_controller_settings; typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 5 +#define PEI_VERSION 6 struct pei_data { @@ -61,6 +61,7 @@ struct pei_data uint8_t ts_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel

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Patch set updated for coreboot: b2487be Add support to enable/disable builtin GbE (again)
by Stefan Reinauer 28 Jun '13

28 Jun '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3568 -gerrit commit b2487be7cbd78b54043130cc094271789a48d850 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:59:18 2013 -0700 Add support to enable/disable builtin GbE (again) This requires a new system agent binary (v6 / v11 on haswell). Note that the existing system agent binaries are long time obsolete and won't work with current coreboot, so this update is overdue. Change-Id: I48d8649576ca84d2b85ab082ce06f3462e189059 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/mainboard/samsung/lumpy/romstage.c | 1 + src/mainboard/samsung/stumpy/romstage.c | 1 + src/northbridge/intel/haswell/pei_data.h | 3 ++- src/northbridge/intel/sandybridge/Kconfig | 3 +-- src/northbridge/intel/sandybridge/Makefile.inc | 5 ----- src/northbridge/intel/sandybridge/pei_data.h | 3 ++- 6 files changed, 7 insertions(+), 9 deletions(-) diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index b941021..be1411e 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -148,6 +148,7 @@ void main(unsigned long bist) #endif struct pei_data pei_data = { + .pei_version = PEI_VERSION, .mchbar = DEFAULT_MCHBAR, .dmibar = DEFAULT_DMIBAR, .epbar = DEFAULT_EPBAR, diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index dda3ab5..f64e860 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -183,6 +183,7 @@ void main(unsigned long bist) }; #endif struct pei_data pei_data = { + pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, dmibar: DEFAULT_DMIBAR, epbar: DEFAULT_EPBAR, diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h index 280c73b..7c10e41 100644 --- a/src/northbridge/intel/haswell/pei_data.h +++ b/src/northbridge/intel/haswell/pei_data.h @@ -31,7 +31,7 @@ #define PEI_DATA_H typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 10 +#define PEI_VERSION 11 struct pei_data { @@ -53,6 +53,7 @@ struct pei_data uint8_t spd_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 56d2cd7..28244f3 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -118,8 +118,7 @@ config HAVE_MRC config MRC_FILE string "Intel System Agent path and filename" depends on HAVE_MRC - default "systemagent-ivybridge.bin" if NORTHBRIDGE_INTEL_IVYBRIDGE - default "systemagent-sandybridge.bin" if NORTHBRIDGE_INTEL_SANDYBRIDGE + default "systemagent-v6.bin" help The path and filename of the file to use as System Agent binary. diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 1428bdb..be07e93 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -35,12 +35,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE),y) mrc.bin-position := 0xfffa0000 -endif -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y) -mrc.bin-position := 0xfffe0000 -endif mrc.bin-type := 0xab $(obj)/mrc.cache: diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index fb56873..d317515 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -38,7 +38,7 @@ typedef struct { } pch_usb3_controller_settings; typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 5 +#define PEI_VERSION 6 struct pei_data { @@ -61,6 +61,7 @@ struct pei_data uint8_t ts_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel

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New patch to review for coreboot: 86cf7e6 Add support to enable/disable builtin GbE (again)
by Stefan Reinauer 28 Jun '13

28 Jun '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3568 -gerrit commit 86cf7e6345865a2a00c4ff04e041e6e336ee5919 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:59:18 2013 -0700 Add support to enable/disable builtin GbE (again) This requires a new system agent binary (v6 / v11 on haswell). Note that the existing system agent binaries are long time obsolete and won't work with current coreboot, so this update is overview. Change-Id: I48d8649576ca84d2b85ab082ce06f3462e189059 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- src/mainboard/samsung/lumpy/romstage.c | 1 + src/mainboard/samsung/stumpy/romstage.c | 1 + src/northbridge/intel/haswell/pei_data.h | 3 ++- src/northbridge/intel/sandybridge/Kconfig | 3 +-- src/northbridge/intel/sandybridge/Makefile.inc | 5 ----- src/northbridge/intel/sandybridge/pei_data.h | 3 ++- 6 files changed, 7 insertions(+), 9 deletions(-) diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index b941021..be1411e 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -148,6 +148,7 @@ void main(unsigned long bist) #endif struct pei_data pei_data = { + .pei_version = PEI_VERSION, .mchbar = DEFAULT_MCHBAR, .dmibar = DEFAULT_DMIBAR, .epbar = DEFAULT_EPBAR, diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c index dda3ab5..f64e860 100644 --- a/src/mainboard/samsung/stumpy/romstage.c +++ b/src/mainboard/samsung/stumpy/romstage.c @@ -183,6 +183,7 @@ void main(unsigned long bist) }; #endif struct pei_data pei_data = { + pei_version: PEI_VERSION, mchbar: DEFAULT_MCHBAR, dmibar: DEFAULT_DMIBAR, epbar: DEFAULT_EPBAR, diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h index 280c73b..7c10e41 100644 --- a/src/northbridge/intel/haswell/pei_data.h +++ b/src/northbridge/intel/haswell/pei_data.h @@ -31,7 +31,7 @@ #define PEI_DATA_H typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 10 +#define PEI_VERSION 11 struct pei_data { @@ -53,6 +53,7 @@ struct pei_data uint8_t spd_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 56d2cd7..28244f3 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -118,8 +118,7 @@ config HAVE_MRC config MRC_FILE string "Intel System Agent path and filename" depends on HAVE_MRC - default "systemagent-ivybridge.bin" if NORTHBRIDGE_INTEL_IVYBRIDGE - default "systemagent-sandybridge.bin" if NORTHBRIDGE_INTEL_SANDYBRIDGE + default "systemagent-v6.bin" help The path and filename of the file to use as System Agent binary. diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index 1428bdb..be07e93 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -35,12 +35,7 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE)) -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE),y) mrc.bin-position := 0xfffa0000 -endif -ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE),y) -mrc.bin-position := 0xfffe0000 -endif mrc.bin-type := 0xab $(obj)/mrc.cache: diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index fb56873..d317515 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -38,7 +38,7 @@ typedef struct { } pch_usb3_controller_settings; typedef void (*tx_byte_func)(unsigned char byte); -#define PEI_VERSION 5 +#define PEI_VERSION 6 struct pei_data { @@ -61,6 +61,7 @@ struct pei_data uint8_t ts_addresses[4]; int boot_mode; int ec_present; + int gbe_enable; // 0 = leave channel enabled // 1 = disable dimm 0 on channel // 2 = disable dimm 1 on channel

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Patch merged into coreboot/master: 6737629 Update 3rdparty mark to latest repository
by gerrit＠coreboot.org 28 Jun '13

28 Jun '13

the following patch was just integrated into master: commit 673762906b6068d86210873fb681d0694591d4be Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:34:58 2013 -0700 Update 3rdparty mark to latest repository For new systemagent v6 binaries. Change-Id: I550533fd19c7c5592f3e3c9b514efe2750619c8f Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/3567 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Tested-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3567 for details. -gerrit

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Patch merged into coreboot/master: 9aedd91 gitmodules: Fix 3rdparty updates
by gerrit＠coreboot.org 28 Jun '13

28 Jun '13

the following patch was just integrated into master: commit 9aedd918d38ce3bd4f8893b37b6d68bfb4aa99b1 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:32:05 2013 -0700 gitmodules: Fix 3rdparty updates Commit 039223a: gitmodules: Ignore 3rdparty in "diff family" changed the behavior of our 3rdparty repository and disallowed updates to the checked out hash. Instead of "ignore=all" we want "ignore=dirty" to ignore local changes but allow changing to the HEAD of the 3rdparty repo. Change-Id: I66c35ad4fcfb0efb0ba611f67648a096a6de1479 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/3566 Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Tested-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/3566 for details. -gerrit

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New patch to review for coreboot: 0ef9fa0 Update 3rdparty mark to latest repository
by Stefan Reinauer 28 Jun '13

28 Jun '13

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3567 -gerrit commit 0ef9fa05922d579e806b3412aacd83e1b194f53f Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Thu Jun 27 15:34:58 2013 -0700 Update 3rdparty mark to latest repository For new systemagent v6 binaries. Change-Id: I550533fd19c7c5592f3e3c9b514efe2750619c8f Signed-off-by: Stefan Reinauer <reinauer(a)google.com> --- 3rdparty | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty b/3rdparty index ba8caa3..e934f70 160000 --- a/3rdparty +++ b/3rdparty @@ -1 +1 @@ -Subproject commit ba8caa30bd5ed6d89dbfd40e17c75c94d43804c6 +Subproject commit e934f70a1a1b06a11ee061c7988c405b1ea5f1ef

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coreboot-gerrit June 2013