coreboot-gerrit November 2013

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: 099b914 lenovo/x60: export reboot_bits nvram configuration.
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 099b914dcd63cb8c177fa1e981046cd25f4565f7 Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Sat Oct 26 22:35:46 2013 +0200 lenovo/x60: export reboot_bits nvram configuration. This permits any software running after the ramstage to tell coreboot that the boot was successfull. Change-Id: I6b19160dcf1ea1948360db71d02e344a3bcb44ef Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Reviewed-on: http://review.coreboot.org/3992 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/3992 for details. -gerrit

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Patch merged into coreboot/master: f3c1c9b payloads/external/SeaBIOS/Makefile.inc: Remove empty lines at file beginning
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit f3c1c9b6ac73c7b5346d36ac06e5bf08244e1d82 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Mon Nov 18 11:20:30 2013 +0100 payloads/external/SeaBIOS/Makefile.inc: Remove empty lines at file beginning Change-Id: I3e6eba62b6790836edf9813c2a45c77390d8c078 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/4094 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/4094 for details. -gerrit

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Patch merged into coreboot/master: 25b8b7b haswell: Put each logical processor in its own P-state domain
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 25b8b7b8813f849c132db597510c4d61c47566fa Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Apr 19 10:02:23 2013 -0700 haswell: Put each logical processor in its own P-state domain The recommendation from Intel is to report each core as a separate logical domain in the _PSD table. This goes against the recommendation in the ACPI specification because all of these cores are on the same package and share a VR so they will do voltage transitions together. The reasoning is that with a larger number of logical processors the P-state often ramps too quickly resulting in higher power consumption. By exposing each core as a separate domain the OS can manage them individually allowing the socket to select the optimum frequency. $ cat /sys/firmware/acpi/tables/SSDT > /tmp/SSDT $ iasl -d /tmp/SSDT Processor (\_PR.CPU0, 0x00, 0x00000000, 0x00) { Name (_PSD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00000000, 0x000000FE, 0x00000001 } }) } Processor (\_PR.CPU1, 0x01, 0x00000000, 0x00) { Name (_PSD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00000001, 0x000000FE, 0x00000001 } }) } Processor (\_PR.CPU2, 0x02, 0x00000000, 0x00) { Name (_PSD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00000002, 0x000000FE, 0x00000001 } }) } Processor (\_PR.CPU3, 0x03, 0x00000000, 0x00) { Name (_PSD, Package (0x01) { Package (0x05) { 0x05, 0x00, 0x00000003, 0x000000FE, 0x00000001 } }) } Change-Id: I5ef41b6ead4d88e9ba117003293dbc629c376803 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48662 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/4130 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/4130 for details. -gerrit

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Patch merged into coreboot/master: 77647b3 haswell: Update microcode for ULT/40651 to rev 8
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 77647b33cf33e882a0a21f7d46c42b54945e8045 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Fri Apr 19 09:47:58 2013 -0700 haswell: Update microcode for ULT/40651 to rev 8 $ cat /sys/devices/system/cpu/cpu*/microcode/version 0x8 0x8 0x8 0x8 Change-Id: Id6491ae96c516ae0b55471e53f79f0407cf3ffdb Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48661 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: http://review.coreboot.org/4129 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/4129 for details. -gerrit

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Patch merged into coreboot/master: 7a91816 Fix compile error in chromeos by adding stddef.h
by gerrit＠coreboot.org 24 Nov '13

24 Nov '13

the following patch was just integrated into master: commit 7a91816bdbccd488361356eb309e9afb0f02db22 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Mon Apr 8 09:32:12 2013 -0700 Fix compile error in chromeos by adding stddef.h Compile was failing with the following error: In file included from src/vendorcode/google/chromeos/vboot_handoff.h:22:0, from src/vendorcode/google/chromeos/chromeos.c:22: vboot_reference/firmware/include/vboot_api.h:388:18: error: unknown type name 'size_t' src/vendorcode/google/chromeos/chromeos.c: In function 'vboot_get_payload': src/vendorcode/google/chromeos/chromeos.c:50:23: error: 'NULL' undeclared (first use in this function) Change-Id: I13f9e41ef6a4151dc65a49eacfa0574083f72978 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/48289 Reviewed-on: http://review.coreboot.org/4131 Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> See http://review.coreboot.org/4131 for details. -gerrit

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Patch set updated for coreboot: 2fe6dfa global: Fix usage of get_option() to make use of CB_CMOS_ codes
by Alexandru Gagniuc 24 Nov '13

24 Nov '13

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4266 -gerrit commit 2fe6dfaeb3279b0ac36d43164a07dcd9180de048 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sat Nov 23 19:22:53 2013 -0600 global: Fix usage of get_option() to make use of CB_CMOS_ codes Do not directly check the return value of get_option, but instead compare the returned value against a CB_CMOS_ error code, or against CB_SUCCESS. Change-Id: I2fa7761d13ebb5e9b4606076991a43f18ae370ad Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/console/console.c | 6 ++++-- src/cpu/amd/model_fxx/model_fxx_init.c | 4 +--- src/ec/lenovo/h8/h8.c | 6 +++--- src/ec/lenovo/pmh7/pmh7.c | 2 +- src/lib/uart8250.c | 3 +-- src/lib/uart8250mem.c | 3 +-- src/mainboard/ibase/mb899/mainboard.c | 12 ++++++------ src/mainboard/kontron/986lcd-m/mainboard.c | 12 ++++++------ src/mainboard/kontron/ktqm77/mainboard.c | 4 ++-- src/mainboard/lenovo/t60/mainboard.c | 2 +- src/mainboard/siemens/sitemp_g1p1/mainboard.c | 8 ++++---- src/northbridge/amd/amdk8/misc_control.c | 4 +--- src/northbridge/intel/i945/gma.c | 2 +- src/southbridge/amd/sb600/sata.c | 2 +- src/southbridge/intel/i82801dx/lpc.c | 2 +- src/southbridge/intel/i82801gx/lpc.c | 2 +- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/via/vt8237r/lpc.c | 2 +- 18 files changed, 37 insertions(+), 41 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index 39a30b5..a31e293 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -24,6 +24,7 @@ #ifndef __PRE_RAM__ #include <string.h> +#include <types.h> /* * FIXME: get_option() needs to be abstracted better so that other non-volatile @@ -33,14 +34,15 @@ #if CONFIG_USE_OPTION_TABLE #include <pc80/mc146818rtc.h> #else -static inline int get_option(void *dest, const char *name) { return -1; } +static inline enum cb_err get_option(void *dest, const char *name) + { return CB_CMOS_OTABLE_DISABLED; } #endif /* initialize the console */ void console_init(void) { struct console_driver *driver; - if(get_option(&console_loglevel, "debug_level")) + if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS) console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL; for(driver = console_drivers; driver < econsole_drivers; driver++) { diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 42c6f95..4beecab 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -245,10 +245,8 @@ static void init_ecc_memory(unsigned node_id) /* See if we scrubbing should be enabled */ enable_scrubbing = 1; - if( get_option(&enable_scrubbing, "hw_scrubber") < 0 ) - { + if (get_option(&enable_scrubbing, "hw_scrubber") != CB_SUCCESS) enable_scrubbing = CONFIG_HW_SCRUBBER; - } /* Enable cache scrubbing at the lowest possible rate */ if (enable_scrubbing) { diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index af2aab3..0430fa9 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -152,14 +152,14 @@ static void h8_enable(device_t dev) h8_trackpoint_enable(conf->trackpoint_enable); h8_usb_power_enable(1); - if (!get_option(&val, "volume")) + if (get_option(&val, "volume") == CB_SUCCESS) ec_write(H8_VOLUME_CONTROL, val); - if (!get_option(&val, "bluetooth")) + if (get_option(&val, "bluetooth") == CB_SUCCESS) h8_bluetooth_enable(val); - if (!get_option(&val, "first_battery")) { + if (get_option(&val, "first_battery") == CB_SUCCESS) { tmp = ec_read(H8_CONFIG3); tmp &= ~(1 << 4); tmp |= (val & 1)<< 4; diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c index 7bbe471..b02b52a 100644 --- a/src/ec/lenovo/pmh7/pmh7.c +++ b/src/ec/lenovo/pmh7/pmh7.c @@ -113,7 +113,7 @@ static void enable_dev(device_t dev) pmh7_backlight_enable(conf->backlight_enable); pmh7_dock_event_enable(conf->dock_event_enable); - if (!get_option(&val, "touchpad")) + if (get_option(&val, "touchpad") == CB_SUCCESS) pmh7_touchpad_enable(val); } diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index 261b90f..aa18d2a 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -123,9 +123,8 @@ void uart_init(void) b_index &= 7; div = divisor[b_index]; #else - if (get_option(&b_index, "baud_rate") == 0) { + if (get_option(&b_index, "baud_rate") == CB_SUCCESS) div = divisor[b_index]; - } #endif #endif diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 8d85855..1482142 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -118,9 +118,8 @@ u32 uart_mem_init(void) b_index &= 7; uart_baud = baud[b_index]; #else - if (get_option(&b_index, "baud_rate") == 0) { + if (get_option(&b_index, "baud_rate") == CB_SUCCESS) uart_baud = baud[b_index]; - } #endif #endif diff --git a/src/mainboard/ibase/mb899/mainboard.c b/src/mainboard/ibase/mb899/mainboard.c index 4fc7d04..0d386f8 100644 --- a/src/mainboard/ibase/mb899/mainboard.c +++ b/src/mainboard/ibase/mb899/mainboard.c @@ -116,18 +116,18 @@ static void hwm_setup(void) int cpufan_speed = 0, sysfan_speed = 0; int cpufan_temperature = 0, sysfan_temperature = 0; - if (get_option(&cpufan_control, "cpufan_cruise_control") < 0) + if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) cpufan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&cpufan_speed, "cpufan_speed") < 0) + if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) cpufan_speed = FAN_SPEED_5625; - //if (get_option(&cpufan_temperature, "cpufan_temperature") < 0) + //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) // cpufan_temperature = FAN_TEMPERATURE_30DEGC; - if (get_option(&sysfan_control, "sysfan_cruise_control") < 0) + if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) sysfan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&sysfan_speed, "sysfan_speed") < 0) + if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) sysfan_speed = FAN_SPEED_5625; - //if (get_option(&sysfan_temperature, "sysfan_temperature") < 0) + //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) // sysfan_temperature = FAN_TEMPERATURE_30DEGC; // hwm_write(0x31, 0x20); // AVCC high limit diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index 061944a..8a04ca3 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -124,18 +124,18 @@ static void hwm_setup(void) int cpufan_speed = 0, sysfan_speed = 0; int cpufan_temperature = 0, sysfan_temperature = 0; - if (get_option(&cpufan_control, "cpufan_cruise_control") < 0) + if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) cpufan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&cpufan_speed, "cpufan_speed") < 0) + if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) cpufan_speed = FAN_SPEED_5625; - //if (get_option(&cpufan_temperature, "cpufan_temperature") < 0) + //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) // cpufan_temperature = FAN_TEMPERATURE_30DEGC; - if (get_option(&sysfan_control, "sysfan_cruise_control") < 0) + if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) sysfan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&sysfan_speed, "sysfan_speed") < 0) + if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) sysfan_speed = FAN_SPEED_5625; - //if (get_option(&sysfan_temperature, "sysfan_temperature") < 0) + //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) // sysfan_temperature = FAN_TEMPERATURE_30DEGC; // hwm_write(0x31, 0x20); // AVCC high limit diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c index 3829d72..30f0468 100644 --- a/src/mainboard/kontron/ktqm77/mainboard.c +++ b/src/mainboard/kontron/ktqm77/mainboard.c @@ -163,7 +163,7 @@ static void mainboard_enable(device_t dev) verb_setup(); unsigned disable = 0; - if ((get_option(&disable, "ethernet1") == 0) && disable) { + if ((get_option(&disable, "ethernet1") == CB_SUCCESS) && disable) { device_t nic = dev_find_slot(0, PCI_DEVFN(0x1c, 2)); if (nic) { printk(BIOS_DEBUG, "DISABLE FIRST NIC!\n"); @@ -171,7 +171,7 @@ static void mainboard_enable(device_t dev) } } disable = 0; - if ((get_option(&disable, "ethernet2") == 0) && disable) { + if ((get_option(&disable, "ethernet2") == CB_SUCCESS) && disable) { device_t nic = dev_find_slot(0, PCI_DEVFN(0x1c, 3)); if (nic) { printk(BIOS_DEBUG, "DISABLE SECOND NIC!\n"); diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index 2e54c7b..52f5dcf 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -78,7 +78,7 @@ static void mainboard_enable(device_t dev) ec_write(0x0c, 0x08); ec_write(0x0c, inb(0x164c) & 8 ? 0x89 : 0x09); - if (get_option(&defaults_loaded, "cmos_defaults_loaded") < 0) { + if (get_option(&defaults_loaded, "cmos_defaults_loaded") != CB_SUCCESS) { printk(BIOS_INFO, "failed to get cmos_defaults_loaded"); defaults_loaded = 0; } diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c index 4fc6855..89309f2 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c +++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c @@ -448,11 +448,11 @@ static void set_thermal_config(void) cpu_fan_control = cpu_fan_control_defaults; case_fan_control = case_fan_control_defaults; - if( get_option(&byte, "cpu_fan_control") == -4 ) { + if (get_option(&byte, "cpu_fan_control") == CB_CMOS_CHECKSUM_INVALID) { printk(BIOS_WARNING, "%s: CMOS checksum invalid, keeping default values\n",__func__); } else { // get all the options needed - if( get_option(&byte, "cpu_fan_control") == 0 ) + if( get_option(&byte, "cpu_fan_control") == CB_SUCCESS ) cpu_fan_control.enable = byte ? 1 : 0; get_option(&cpu_fan_control.polarity, "cpu_fan_polarity"); @@ -461,7 +461,7 @@ static void set_thermal_config(void) get_option(&cpu_fan_control.pwm_min, "cpu_dutycycle_min"); get_option(&cpu_fan_control.pwm_max, "cpu_dutycycle_max"); - if( get_option(&byte, "chassis_fan_control") == 0) + if( get_option(&byte, "chassis_fan_control") == CB_SUCCESS) case_fan_control.enable = byte ? 1 : 0; get_option(&case_fan_control.polarity, "chassis_fan_polarity"); get_option(&case_fan_control.t_min, "chassis_t_min"); @@ -816,7 +816,7 @@ static void mainboard_init(device_t dev) dev_name(dev), dev_path(dev), dev->subsystem_vendor, dev->subsystem_device, __func__); #if CONFIG_PCI_OPTION_ROM_RUN_REALMODE - if( get_option(&int15_func.regs.func00_LCD_panel_id, "lcd_panel_id") < 0 ) + if (get_option(&int15_func.regs.func00_LCD_panel_id, "lcd_panel_id") != CB_SUCCESS) int15_func.regs.func00_LCD_panel_id = PANEL_TABLE_ID_NO; int15_func.regs.func05_TV_standard = TV_MODE_NO; install_INT15_function_extensions(&int15_func); diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c index 030c992..cab56c2 100644 --- a/src/northbridge/amd/amdk8/misc_control.c +++ b/src/northbridge/amd/amdk8/misc_control.c @@ -48,10 +48,8 @@ static void mcf3_read_resources(device_t dev) } iommu = 1; - if( get_option(&iommu, "iommu") < 0 ) - { + if (get_option(&iommu, "iommu") != CB_SUCCESS) iommu = CONFIG_IOMMU; - } if (iommu) { /* Add a GART aperture resource */ diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 20e8bf3..24576b0 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -90,7 +90,7 @@ static void gma_func1_init(struct device *dev) pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER | PCI_COMMAND_IO); - if (!get_option(&val, "tft_brightness")) + if (get_option(&val, "tft_brightness") == CB_SUCCESS) pci_write_config8(dev, 0xf4, val); else pci_write_config8(dev, 0xf4, 0xff); diff --git a/src/southbridge/amd/sb600/sata.c b/src/southbridge/amd/sb600/sata.c index 8664483..a17aab8 100644 --- a/src/southbridge/amd/sb600/sata.c +++ b/src/southbridge/amd/sb600/sata.c @@ -119,7 +119,7 @@ static void sata_init(struct device *dev) pci_write_config8(dev, 0x40, byte); // 1 means IDE, 0 means AHCI - if( get_option(&i, "sata_mode") < 0 ) { + if (get_option(&i, "sata_mode") != CB_SUCCESS) { // no cmos option i = CONFIG_SATA_MODE; } diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index cf4e132..de09b16 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -116,7 +116,7 @@ static void i82801dx_power_options(device_t dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON; reg8 = pci_read_config8(dev, GEN_PMCON_3); diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 9285080..b9caac6 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -175,7 +175,7 @@ static void i82801gx_power_options(device_t dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON; reg8 = pci_read_config8(dev, GEN_PMCON_3); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index bea0d98..61a11b3 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -181,7 +181,7 @@ static void i82801ix_power_options(device_t dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON; reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3); diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 01d2a9c..d8251a0 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -543,7 +543,7 @@ static void vt8237_common_init(struct device *dev) } /* configure power state of the board after loss of power */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = 1; enables = pci_read_config8(dev, 0x58); pci_write_config8(dev, 0x58, enables & ~0x02);

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New patch to review for coreboot: 889ca9e global: Fix usage of get_option() to make use of CB_CMOS_ codes
by Alexandru Gagniuc 24 Nov '13

24 Nov '13

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4266 -gerrit commit 889ca9ea330afefc80a7852c3963628742023bff Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sat Nov 23 19:22:53 2013 -0600 global: Fix usage of get_option() to make use of CB_CMOS_ codes Do not directly check the return value of get_option, but instead compare the returned value against a CB_CMOS_ error code, or against CB_SUCCESS. Change-Id: I2fa7761d13ebb5e9b4606076991a43f18ae370ad Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/console/console.c | 2 +- src/cpu/amd/model_fxx/model_fxx_init.c | 4 +--- src/ec/lenovo/h8/h8.c | 6 +++--- src/ec/lenovo/pmh7/pmh7.c | 2 +- src/lib/uart8250.c | 3 +-- src/lib/uart8250mem.c | 3 +-- src/mainboard/ibase/mb899/mainboard.c | 12 ++++++------ src/mainboard/kontron/986lcd-m/mainboard.c | 12 ++++++------ src/mainboard/kontron/ktqm77/mainboard.c | 4 ++-- src/mainboard/lenovo/t60/mainboard.c | 2 +- src/mainboard/siemens/sitemp_g1p1/mainboard.c | 8 ++++---- src/northbridge/amd/amdk8/misc_control.c | 4 +--- src/northbridge/intel/i945/gma.c | 2 +- src/southbridge/amd/sb600/sata.c | 2 +- src/southbridge/intel/i82801dx/lpc.c | 2 +- src/southbridge/intel/i82801gx/lpc.c | 2 +- src/southbridge/intel/i82801ix/lpc.c | 2 +- src/southbridge/via/vt8237r/lpc.c | 2 +- 18 files changed, 34 insertions(+), 40 deletions(-) diff --git a/src/console/console.c b/src/console/console.c index 39a30b5..5d59ecd 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -40,7 +40,7 @@ static inline int get_option(void *dest, const char *name) { return -1; } void console_init(void) { struct console_driver *driver; - if(get_option(&console_loglevel, "debug_level")) + if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS) console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL; for(driver = console_drivers; driver < econsole_drivers; driver++) { diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c index 42c6f95..4beecab 100644 --- a/src/cpu/amd/model_fxx/model_fxx_init.c +++ b/src/cpu/amd/model_fxx/model_fxx_init.c @@ -245,10 +245,8 @@ static void init_ecc_memory(unsigned node_id) /* See if we scrubbing should be enabled */ enable_scrubbing = 1; - if( get_option(&enable_scrubbing, "hw_scrubber") < 0 ) - { + if (get_option(&enable_scrubbing, "hw_scrubber") != CB_SUCCESS) enable_scrubbing = CONFIG_HW_SCRUBBER; - } /* Enable cache scrubbing at the lowest possible rate */ if (enable_scrubbing) { diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index af2aab3..0430fa9 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -152,14 +152,14 @@ static void h8_enable(device_t dev) h8_trackpoint_enable(conf->trackpoint_enable); h8_usb_power_enable(1); - if (!get_option(&val, "volume")) + if (get_option(&val, "volume") == CB_SUCCESS) ec_write(H8_VOLUME_CONTROL, val); - if (!get_option(&val, "bluetooth")) + if (get_option(&val, "bluetooth") == CB_SUCCESS) h8_bluetooth_enable(val); - if (!get_option(&val, "first_battery")) { + if (get_option(&val, "first_battery") == CB_SUCCESS) { tmp = ec_read(H8_CONFIG3); tmp &= ~(1 << 4); tmp |= (val & 1)<< 4; diff --git a/src/ec/lenovo/pmh7/pmh7.c b/src/ec/lenovo/pmh7/pmh7.c index 7bbe471..b02b52a 100644 --- a/src/ec/lenovo/pmh7/pmh7.c +++ b/src/ec/lenovo/pmh7/pmh7.c @@ -113,7 +113,7 @@ static void enable_dev(device_t dev) pmh7_backlight_enable(conf->backlight_enable); pmh7_dock_event_enable(conf->dock_event_enable); - if (!get_option(&val, "touchpad")) + if (get_option(&val, "touchpad") == CB_SUCCESS) pmh7_touchpad_enable(val); } diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c index 261b90f..aa18d2a 100644 --- a/src/lib/uart8250.c +++ b/src/lib/uart8250.c @@ -123,9 +123,8 @@ void uart_init(void) b_index &= 7; div = divisor[b_index]; #else - if (get_option(&b_index, "baud_rate") == 0) { + if (get_option(&b_index, "baud_rate") == CB_SUCCESS) div = divisor[b_index]; - } #endif #endif diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c index 8d85855..1482142 100644 --- a/src/lib/uart8250mem.c +++ b/src/lib/uart8250mem.c @@ -118,9 +118,8 @@ u32 uart_mem_init(void) b_index &= 7; uart_baud = baud[b_index]; #else - if (get_option(&b_index, "baud_rate") == 0) { + if (get_option(&b_index, "baud_rate") == CB_SUCCESS) uart_baud = baud[b_index]; - } #endif #endif diff --git a/src/mainboard/ibase/mb899/mainboard.c b/src/mainboard/ibase/mb899/mainboard.c index 4fc7d04..0d386f8 100644 --- a/src/mainboard/ibase/mb899/mainboard.c +++ b/src/mainboard/ibase/mb899/mainboard.c @@ -116,18 +116,18 @@ static void hwm_setup(void) int cpufan_speed = 0, sysfan_speed = 0; int cpufan_temperature = 0, sysfan_temperature = 0; - if (get_option(&cpufan_control, "cpufan_cruise_control") < 0) + if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) cpufan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&cpufan_speed, "cpufan_speed") < 0) + if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) cpufan_speed = FAN_SPEED_5625; - //if (get_option(&cpufan_temperature, "cpufan_temperature") < 0) + //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) // cpufan_temperature = FAN_TEMPERATURE_30DEGC; - if (get_option(&sysfan_control, "sysfan_cruise_control") < 0) + if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) sysfan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&sysfan_speed, "sysfan_speed") < 0) + if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) sysfan_speed = FAN_SPEED_5625; - //if (get_option(&sysfan_temperature, "sysfan_temperature") < 0) + //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) // sysfan_temperature = FAN_TEMPERATURE_30DEGC; // hwm_write(0x31, 0x20); // AVCC high limit diff --git a/src/mainboard/kontron/986lcd-m/mainboard.c b/src/mainboard/kontron/986lcd-m/mainboard.c index 061944a..8a04ca3 100644 --- a/src/mainboard/kontron/986lcd-m/mainboard.c +++ b/src/mainboard/kontron/986lcd-m/mainboard.c @@ -124,18 +124,18 @@ static void hwm_setup(void) int cpufan_speed = 0, sysfan_speed = 0; int cpufan_temperature = 0, sysfan_temperature = 0; - if (get_option(&cpufan_control, "cpufan_cruise_control") < 0) + if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) cpufan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&cpufan_speed, "cpufan_speed") < 0) + if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) cpufan_speed = FAN_SPEED_5625; - //if (get_option(&cpufan_temperature, "cpufan_temperature") < 0) + //if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) // cpufan_temperature = FAN_TEMPERATURE_30DEGC; - if (get_option(&sysfan_control, "sysfan_cruise_control") < 0) + if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) sysfan_control = FAN_CRUISE_CONTROL_DISABLED; - if (get_option(&sysfan_speed, "sysfan_speed") < 0) + if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) sysfan_speed = FAN_SPEED_5625; - //if (get_option(&sysfan_temperature, "sysfan_temperature") < 0) + //if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) // sysfan_temperature = FAN_TEMPERATURE_30DEGC; // hwm_write(0x31, 0x20); // AVCC high limit diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c index 3829d72..30f0468 100644 --- a/src/mainboard/kontron/ktqm77/mainboard.c +++ b/src/mainboard/kontron/ktqm77/mainboard.c @@ -163,7 +163,7 @@ static void mainboard_enable(device_t dev) verb_setup(); unsigned disable = 0; - if ((get_option(&disable, "ethernet1") == 0) && disable) { + if ((get_option(&disable, "ethernet1") == CB_SUCCESS) && disable) { device_t nic = dev_find_slot(0, PCI_DEVFN(0x1c, 2)); if (nic) { printk(BIOS_DEBUG, "DISABLE FIRST NIC!\n"); @@ -171,7 +171,7 @@ static void mainboard_enable(device_t dev) } } disable = 0; - if ((get_option(&disable, "ethernet2") == 0) && disable) { + if ((get_option(&disable, "ethernet2") == CB_SUCCESS) && disable) { device_t nic = dev_find_slot(0, PCI_DEVFN(0x1c, 3)); if (nic) { printk(BIOS_DEBUG, "DISABLE SECOND NIC!\n"); diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c index 2e54c7b..52f5dcf 100644 --- a/src/mainboard/lenovo/t60/mainboard.c +++ b/src/mainboard/lenovo/t60/mainboard.c @@ -78,7 +78,7 @@ static void mainboard_enable(device_t dev) ec_write(0x0c, 0x08); ec_write(0x0c, inb(0x164c) & 8 ? 0x89 : 0x09); - if (get_option(&defaults_loaded, "cmos_defaults_loaded") < 0) { + if (get_option(&defaults_loaded, "cmos_defaults_loaded") != CB_SUCCESS) { printk(BIOS_INFO, "failed to get cmos_defaults_loaded"); defaults_loaded = 0; } diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c index 4fc6855..89309f2 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c +++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c @@ -448,11 +448,11 @@ static void set_thermal_config(void) cpu_fan_control = cpu_fan_control_defaults; case_fan_control = case_fan_control_defaults; - if( get_option(&byte, "cpu_fan_control") == -4 ) { + if (get_option(&byte, "cpu_fan_control") == CB_CMOS_CHECKSUM_INVALID) { printk(BIOS_WARNING, "%s: CMOS checksum invalid, keeping default values\n",__func__); } else { // get all the options needed - if( get_option(&byte, "cpu_fan_control") == 0 ) + if( get_option(&byte, "cpu_fan_control") == CB_SUCCESS ) cpu_fan_control.enable = byte ? 1 : 0; get_option(&cpu_fan_control.polarity, "cpu_fan_polarity"); @@ -461,7 +461,7 @@ static void set_thermal_config(void) get_option(&cpu_fan_control.pwm_min, "cpu_dutycycle_min"); get_option(&cpu_fan_control.pwm_max, "cpu_dutycycle_max"); - if( get_option(&byte, "chassis_fan_control") == 0) + if( get_option(&byte, "chassis_fan_control") == CB_SUCCESS) case_fan_control.enable = byte ? 1 : 0; get_option(&case_fan_control.polarity, "chassis_fan_polarity"); get_option(&case_fan_control.t_min, "chassis_t_min"); @@ -816,7 +816,7 @@ static void mainboard_init(device_t dev) dev_name(dev), dev_path(dev), dev->subsystem_vendor, dev->subsystem_device, __func__); #if CONFIG_PCI_OPTION_ROM_RUN_REALMODE - if( get_option(&int15_func.regs.func00_LCD_panel_id, "lcd_panel_id") < 0 ) + if (get_option(&int15_func.regs.func00_LCD_panel_id, "lcd_panel_id") != CB_SUCCESS) int15_func.regs.func00_LCD_panel_id = PANEL_TABLE_ID_NO; int15_func.regs.func05_TV_standard = TV_MODE_NO; install_INT15_function_extensions(&int15_func); diff --git a/src/northbridge/amd/amdk8/misc_control.c b/src/northbridge/amd/amdk8/misc_control.c index 030c992..cab56c2 100644 --- a/src/northbridge/amd/amdk8/misc_control.c +++ b/src/northbridge/amd/amdk8/misc_control.c @@ -48,10 +48,8 @@ static void mcf3_read_resources(device_t dev) } iommu = 1; - if( get_option(&iommu, "iommu") < 0 ) - { + if (get_option(&iommu, "iommu") != CB_SUCCESS) iommu = CONFIG_IOMMU; - } if (iommu) { /* Add a GART aperture resource */ diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 20e8bf3..24576b0 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -90,7 +90,7 @@ static void gma_func1_init(struct device *dev) pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER | PCI_COMMAND_IO); - if (!get_option(&val, "tft_brightness")) + if (get_option(&val, "tft_brightness") == CB_SUCCESS) pci_write_config8(dev, 0xf4, val); else pci_write_config8(dev, 0xf4, 0xff); diff --git a/src/southbridge/amd/sb600/sata.c b/src/southbridge/amd/sb600/sata.c index 8664483..a17aab8 100644 --- a/src/southbridge/amd/sb600/sata.c +++ b/src/southbridge/amd/sb600/sata.c @@ -119,7 +119,7 @@ static void sata_init(struct device *dev) pci_write_config8(dev, 0x40, byte); // 1 means IDE, 0 means AHCI - if( get_option(&i, "sata_mode") < 0 ) { + if (get_option(&i, "sata_mode") != CB_SUCCESS) { // no cmos option i = CONFIG_SATA_MODE; } diff --git a/src/southbridge/intel/i82801dx/lpc.c b/src/southbridge/intel/i82801dx/lpc.c index cf4e132..de09b16 100644 --- a/src/southbridge/intel/i82801dx/lpc.c +++ b/src/southbridge/intel/i82801dx/lpc.c @@ -116,7 +116,7 @@ static void i82801dx_power_options(device_t dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON; reg8 = pci_read_config8(dev, GEN_PMCON_3); diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 9285080..b9caac6 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -175,7 +175,7 @@ static void i82801gx_power_options(device_t dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON; reg8 = pci_read_config8(dev, GEN_PMCON_3); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index bea0d98..61a11b3 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -181,7 +181,7 @@ static void i82801ix_power_options(device_t dev) * * If the option is not existent (Laptops), use MAINBOARD_POWER_ON. */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON; reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3); diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index 01d2a9c..d8251a0 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -543,7 +543,7 @@ static void vt8237_common_init(struct device *dev) } /* configure power state of the board after loss of power */ - if (get_option(&pwr_on, "power_on_after_fail") < 0) + if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = 1; enables = pci_read_config8(dev, 0x58); pci_write_config8(dev, 0x58, enables & ~0x02);

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New patch to review for coreboot: 83b0037 pc80/mc146818rtc: Return an error code rather than an integer
by Alexandru Gagniuc 24 Nov '13

24 Nov '13

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4265 -gerrit commit 83b0037e8413c97deab96bd63bb5562d71c10238 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sat Nov 23 18:54:44 2013 -0600 pc80/mc146818rtc: Return an error code rather than an integer Do not return hardcoded numerical values to communicate succes/failure, but instead use an enumeration. Change-Id: I742b08796adf136dce5984b702533f91640846dd Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/drivers/pc80/mc146818rtc.c | 48 ++++++++++++++++++++++-------------------- src/include/pc80/mc146818rtc.h | 15 ++++++++----- src/include/types.h | 7 ++++++ 3 files changed, 42 insertions(+), 28 deletions(-) diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index be52454..c469091 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -150,9 +150,10 @@ void rtc_init(int invalid) length = number of bits to include in the value ret = a character pointer to where the value is to be returned output the value placed in ret - returns 0 = successful, -1 = an error occurred + returns CB_SUCCESS = successful, cb_err code if an error occurred */ -static int get_cmos_value(unsigned long bit, unsigned long length, void *vret) +static enum cb_err get_cmos_value(unsigned long bit, unsigned long length, + void *vret) { unsigned char *ret; unsigned long byte,byte_bit; @@ -176,10 +177,10 @@ static int get_cmos_value(unsigned long bit, unsigned long length, void *vret) ret[i]=cmos_read(byte); } } - return 0; + return CB_SUCCESS; } -int get_option(void *dest, const char *name) +enum cb_err get_option(void *dest, const char *name) { struct cmos_option_table *ct; struct cmos_entries *ce; @@ -195,7 +196,7 @@ int get_option(void *dest, const char *name) if (!ct) { printk(BIOS_ERR, "RTC: cmos_layout.bin could not be found. " "Options are disabled\n"); - return(-2); + return CB_CMOS_LAYOUT_NOT_FOUND; } ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length); for(;ce->tag==LB_TAG_OPTION; @@ -207,18 +208,18 @@ int get_option(void *dest, const char *name) } if(!found) { printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name); - return(-2); + return CB_CMOS_OPTION_NOT_FOUND; } - if(get_cmos_value(ce->bit, ce->length, dest)) - return(-3); - if(!rtc_checksum_valid(LB_CKS_RANGE_START, - LB_CKS_RANGE_END,LB_CKS_LOC)) - return(-4); - return(0); + if(get_cmos_value(ce->bit, ce->length, dest) != CB_SUCCESS) + return CB_CMOS_ACCESS_ERROR; + if(!rtc_checksum_valid(LB_CKS_RANGE_START, LB_CKS_RANGE_END,LB_CKS_LOC)) + return CB_CMOS_CHECKSUM_INVALID; + return CB_SUCCESS; } -static int set_cmos_value(unsigned long bit, unsigned long length, void *vret) +static enum cb_err set_cmos_value(unsigned long bit, unsigned long length, + void *vret) { unsigned char *ret; unsigned long byte,byte_bit; @@ -241,7 +242,7 @@ static int set_cmos_value(unsigned long bit, unsigned long length, void *vret) chksum_update_needed = 1; } else { /* more that one byte so transfer the whole bytes */ if (byte_bit || length % 8) - return -1; + return CB_ERR_ARG; for(i=0; length; i++, length-=8, byte++) cmos_write(ret[i], byte); @@ -253,11 +254,11 @@ static int set_cmos_value(unsigned long bit, unsigned long length, void *vret) rtc_set_checksum(LB_CKS_RANGE_START, LB_CKS_RANGE_END,LB_CKS_LOC); } - return 0; + return CB_SUCCESS; } -int set_option(const char *name, void *value) +enum cb_err set_option(const char *name, void *value) { struct cmos_option_table *ct; struct cmos_entries *ce; @@ -273,7 +274,7 @@ int set_option(const char *name, void *value) CBFS_COMPONENT_CMOS_LAYOUT); if (!ct) { printk(BIOS_ERR, "cmos_layout.bin could not be found. Options are disabled\n"); - return(-2); + return CB_CMOS_LAYOUT_NOT_FOUND; } ce=(struct cmos_entries*)((unsigned char *)ct + ct->header_length); for(;ce->tag==LB_TAG_OPTION; @@ -285,21 +286,22 @@ int set_option(const char *name, void *value) } if(!found) { printk(BIOS_DEBUG, "WARNING: No CMOS option '%s'.\n", name); - return(-2); + return CB_CMOS_OPTION_NOT_FOUND; } length = ce->length; if (ce->config == 's') { length = MAX(strlen((const char *)value) * 8, ce->length - 8); /* make sure the string is null terminated */ - if ((set_cmos_value(ce->bit + ce->length - 8, 8, &(u8[]){0}))) - return (-3); + if (set_cmos_value(ce->bit + ce->length - 8, 8, &(u8[]){0}) + != CB_SUCCESS) + return (CB_CMOS_ACCESS_ERROR); } - if ((set_cmos_value(ce->bit, length, value))) - return (-3); + if (set_cmos_value(ce->bit, length, value) != CB_SUCCESS) + return (CB_CMOS_ACCESS_ERROR); - return 0; + return CB_SUCCESS; } #endif /* CONFIG_USE_OPTION_TABLE */ diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 170a433..ef48a36 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -1,6 +1,8 @@ #ifndef PC80_MC146818RTC_H #define PC80_MC146818RTC_H +#include <types.h> + #ifndef RTC_BASE_PORT #define RTC_BASE_PORT 0x70 #endif @@ -171,13 +173,16 @@ static inline void cmos_write32(u8 offset, u32 value) void rtc_init(int invalid); void rtc_check_update_cmos_date(u8 has_century); #if CONFIG_USE_OPTION_TABLE -int set_option(const char *name, void *val); -int get_option(void *dest, const char *name); +enum cb_err set_option(const char *name, void *val); +enum cb_err get_option(void *dest, const char *name); unsigned read_option_lowlevel(unsigned start, unsigned size, unsigned def); #else -static inline int set_option(const char *name __attribute__((unused)), void *val __attribute__((unused))) { return -2; }; -static inline int get_option(void *dest __attribute__((unused)), - const char *name __attribute__((unused))) { return -2; } +static inline enum cb_err set_option(const char *name __attribute__((unused)), + void *val __attribute__((unused))) + { return CB_CMOS_OTABLE_DISABLED; }; +static inline enum cb_err get_option(void *dest __attribute__((unused)), + const char *name __attribute__((unused))) + { return CB_CMOS_OTABLE_DISABLED; } #define read_option_lowlevel(start, size, def) def #endif #else diff --git a/src/include/types.h b/src/include/types.h index 180fa3a..d1f991e 100644 --- a/src/include/types.h +++ b/src/include/types.h @@ -34,6 +34,13 @@ enum cb_err { CB_SUCCESS = 0, /**< Call completed succesfully */ CB_ERR = -1, /**< Generic error code */ CB_ERR_ARG = -2, /**< Invalid argument */ + + /* NVRAM/CMOS errors */ + CB_CMOS_OTABLE_DISABLED = -100, /**< Option table disabled */ + CB_CMOS_LAYOUT_NOT_FOUND = -101, /**< Layout file not found */ + CB_CMOS_OPTION_NOT_FOUND = -102, /**< Option string not found */ + CB_CMOS_ACCESS_ERROR = -103, /**< CMOS access error */ + CB_CMOS_CHECKSUM_INVALID = -104, /**< CMOS checksum is invalid */ }; #endif /* __TYPES_H */

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New patch to review for coreboot: 306fb34 include/types.h: Add generic enum for error codes
by Alexandru Gagniuc 24 Nov '13

24 Nov '13

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4264 -gerrit commit 306fb34c88e3bee54a3f1072f4c57ae476a953be Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sat Nov 23 17:46:04 2013 -0600 include/types.h: Add generic enum for error codes The idea is that instead of: if (do_something()) do_something_else(); It is more readable to write: if (do_something() != CB_SUCCESS) handle_error(); Change-Id: I4fa5a6f2d2960cd747fda6602bdfff6aef08f8e2 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/include/types.h | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/src/include/types.h b/src/include/types.h index 384fac5..180fa3a 100644 --- a/src/include/types.h +++ b/src/include/types.h @@ -21,5 +21,19 @@ #define __TYPES_H #include <stdint.h> #include <stddef.h> -#endif +/** + * Coreboot error codes + * + * When building functions that return a status or an error code, use cb_err as + * the return type. When failure reason needs to be communicated by the return + * value, define a it here. Start new enum groups with values in decrements of + * 100. + */ +enum cb_err { + CB_SUCCESS = 0, /**< Call completed succesfully */ + CB_ERR = -1, /**< Generic error code */ + CB_ERR_ARG = -2, /**< Invalid argument */ +}; + +#endif /* __TYPES_H */

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Patch set updated for coreboot: 334fefa cpu/amd/model_fxx/powernow_acpi.c: Remove set but unused variable `Start_vid`
by Ronald G. Minnich 24 Nov '13

24 Nov '13

Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4036 -gerrit commit 334fefafe0bfd5f5636a4b3aef250aa75768594d Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Tue Oct 29 20:41:50 2013 +0100 cpu/amd/model_fxx/powernow_acpi.c: Remove set but unused variable `Start_vid` When adding support for PSS object generation for AMD pre Family Fh CPUs (199c694f) the function `pstates_algorithm` was copied and adapted, but `Start_vid` is not needed anymore as a static table is used. So remove the variable `Start_vid`. Change-Id: I3002951d168cade6461941c16d78373c47792e13 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/cpu/amd/model_fxx/powernow_acpi.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/src/cpu/amd/model_fxx/powernow_acpi.c b/src/cpu/amd/model_fxx/powernow_acpi.c index af1e24b..eca736c 100644 --- a/src/cpu/amd/model_fxx/powernow_acpi.c +++ b/src/cpu/amd/model_fxx/powernow_acpi.c @@ -758,7 +758,7 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) u16 Pstate_feq[MAXP+1]; u8 Pstate_vid[MAXP+1]; u32 Pstate_power[MAXP+1]; - u8 Max_fid, Start_fid, Start_vid, Max_vid; + u8 Max_fid, Start_fid, Max_vid; struct cpuid_result cpuid1; /* See if the CPUID(0x80000007) returned EDX[2:1]==11b */ @@ -777,7 +777,6 @@ static int pstates_algorithm(u32 pcontrol_blk, u8 plen, u8 onlyBSP) Max_fid = (msr.lo & 0x3F0000) >> 16; Max_vid = (msr.hi & 0x3F0000) >> 16; Start_fid = (msr.lo & 0x3F00) >> 8; - Start_vid = (msr.hi & 0x3F00) >> 8; cmp_cap = (pci_read_config16(dev_find_slot(0, PCI_DEVFN(0x18, 3)), 0xE8) &

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coreboot-gerrit November 2013