coreboot-gerrit November 2013

coreboot-gerrit@coreboot.org

1 participants
856 discussions

New patch to review for coreboot: e0cea2a Refactor Makefile build system as decompartmentalise arm and i386 targets from crossgcc.
by Edward O'Callaghan 01 Nov '13

01 Nov '13

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4008 -gerrit commit e0cea2a34490ba5bc4ad08345a51f25e680844d3 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 2 03:40:39 2013 +1100 Refactor Makefile build system as decompartmentalise arm and i386 targets from crossgcc. Change-Id: If93f62050810ba594c9925a9eb8ba9d04bc76459 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- Makefile.inc | 20 ++++++++++++++++---- util/crossgcc/Makefile | 13 +++++++++---- 2 files changed, 25 insertions(+), 8 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 69ad3a1..ecbe62b 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -368,11 +368,23 @@ gitconfig: git config remote.origin.push HEAD:refs/for/master (git config --global user.name >/dev/null && git config --global user.email >/dev/null) || (printf 'Please configure your name and email in git:\n\n git config --global user.name "Your Name Comes Here"\n git config --global user.email your.email(a)example.com\n'; exit 1) -crossgcc: clean-for-update - $(MAKE) -C util/crossgcc build-without-gdb +crossgcc: crossgcc-i386 -crosstools: clean-for-update - $(MAKE) -C util/crossgcc build +.PHONY: crossgcc-i386 +crossgcc-i386: clean-for-update + $(MAKE) -C util/crossgcc buildi386-without-gdb + +crossgcc-arm: clean-for-update + $(MAKE) -C util/crossgcc buildarm-without-gdb + +crosstools: crosstools-i386 + +.PHONY: crosstools-i386 +crosstools-i386: clean-for-update + $(MAKE) -C util/crossgcc buildi386 + +crosstools-arm: clean-for-update + $(MAKE) -C util/crossgcc buildarm crossgcc-clean: clean-for-update $(MAKE) -C util/crossgcc clean diff --git a/util/crossgcc/Makefile b/util/crossgcc/Makefile index da3b36b..c3acf91 100644 --- a/util/crossgcc/Makefile +++ b/util/crossgcc/Makefile @@ -1,12 +1,17 @@ -all: build +all: buildi386 buildarm -build: +buildi386: bash ./buildgcc -G -p i386-elf + +buildarm: bash ./buildgcc -G -p armv7a-eabi -.PHONY: build-without-gdb -build-without-gdb: +.PHONY: buildi386-without-gdb +buildi386-without-gdb: bash ./buildgcc -p i386-elf + +.PHONY: buildarm-without-gdb +buildarm-without-gdb: bash ./buildgcc -p armv7a-eabi clean:

1 0

New patch to review for coreboot: e76e17e Add inital work on supporting the Acer Aspire 5520 ICW50 laptop (WIP).
by Edward O'Callaghan 01 Nov '13

01 Nov '13

Edward O'Callaghan (eocallaghan(a)alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4007 -gerrit commit e76e17ea41cd13cbe01e03be998edf2228f4d578 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 2 03:17:28 2013 +1100 Add inital work on supporting the Acer Aspire 5520 ICW50 laptop (WIP). Change-Id: I33217e23d97d0e158f696809e5228a559de1a0b7 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> --- src/mainboard/Kconfig | 3 +++ src/mainboard/acer/Kconfig | 35 +++++++++++++++++++++++++ src/mainboard/acer/fuquene/Kconfig | 52 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 90 insertions(+) diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig index fdb0eac..89d1340 100644 --- a/src/mainboard/Kconfig +++ b/src/mainboard/Kconfig @@ -8,6 +8,8 @@ config VENDOR_AAEON bool "Aaeon" config VENDOR_ABIT bool "Abit" +config VENDOR_ACER + bool "Acer" config VENDOR_ADLINK bool "ADLINK" config VENDOR_ADVANSUS @@ -142,6 +144,7 @@ endchoice source "src/mainboard/a-trend/Kconfig" source "src/mainboard/aaeon/Kconfig" source "src/mainboard/abit/Kconfig" +source "src/mainboard/acer/Kconfig" source "src/mainboard/adlink/Kconfig" source "src/mainboard/advansus/Kconfig" source "src/mainboard/advantech/Kconfig" diff --git a/src/mainboard/acer/Kconfig b/src/mainboard/acer/Kconfig new file mode 100644 index 0000000..c0af794 --- /dev/null +++ b/src/mainboard/acer/Kconfig @@ -0,0 +1,35 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## +if VENDOR_ACER + +choice + prompt "Mainboard model" + +config BOARD_ACER_FUQUENE + bool "Fuquene" + +endchoice + +source "src/mainboard/acer/fuquene/Kconfig" + +config MAINBOARD_VENDOR + string + default "Acer" + +endif # VENDOR_ACER diff --git a/src/mainboard/acer/fuquene/Kconfig b/src/mainboard/acer/fuquene/Kconfig new file mode 100644 index 0000000..741fe94 --- /dev/null +++ b/src/mainboard/acer/fuquene/Kconfig @@ -0,0 +1,52 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2013 Edward O'Callaghan <eocallaghan(a)alterapraxis.com> +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## +## You should have received a copy of the GNU General Public License +## along with this program; if not, write to the Free Software +## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +## +if BOARD_ACER_FUQUENE + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select ARCH_X86 + select CPU_AMD_SOCKET_S1G1 + select NORTHBRIDGE_AMD_AMDK8 + select SOUTHBRIDGE_AMD_RS690 + select SOUTHBRIDGE_AMD_SB600 + select SUPERIO_ITE_IT8712F + select HAVE_ACPI_TABLES + select HAVE_MP_TABLE + select HAVE_PIRQ_TABLE + select HAVE_OPTION_TABLE + select SB_HT_CHAIN_UNITID_OFFSET_ONLY + select BOARD_ROMSIZE_KB_1024 + select RAMINIT_SYSINFO + select QRANK_DIMM_SUPPORT + select SET_FIDVID + + +config MAINBOARD_DIR + string + default acer/fuquene + +config MAINBOARD_PART_NUMBER + string + default "FUQUENE" + +config IRQ_SLOT_COUNT + int + default 9 + +endif # BOARD_ACER_FUQUENE

1 0

Patch set updated for coreboot: a204fca lenovo/x60: export reboot_bits nvram configuration.
by Denis Carikli 01 Nov '13

01 Nov '13

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3992 -gerrit commit a204fca0c02e1ba52d066710a1df25ba8acebfb9 Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Sat Oct 26 22:35:46 2013 +0200 lenovo/x60: export reboot_bits nvram configuration. This permits any software running after the ramstage to tell coreboot that the boot was successfull. Change-Id: I6b19160dcf1ea1948360db71d02e344a3bcb44ef Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/mainboard/lenovo/x60/cmos.layout | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/src/mainboard/lenovo/x60/cmos.layout b/src/mainboard/lenovo/x60/cmos.layout index ab51a84..d622dcd 100644 --- a/src/mainboard/lenovo/x60/cmos.layout +++ b/src/mainboard/lenovo/x60/cmos.layout @@ -71,7 +71,7 @@ entries # RTC_BOOT_BYTE (coreboot hardcoded) 384 1 e 4 boot_option 385 1 e 4 last_boot -388 4 r 0 reboot_bits +388 4 e 10 reboot_bits #390 2 r 0 unused? # ----------------------------------------------------------------- @@ -146,6 +146,22 @@ enumerations 8 1 Yes 9 0 Secondary 9 1 Primary +10 0 0 +10 1 1 +10 2 2 +10 3 3 +10 4 4 +10 5 5 +10 6 6 +10 7 7 +10 8 8 +10 9 9 +10 10 10 +10 11 11 +10 12 12 +10 13 13 +10 14 14 +10 15 15 # ----------------------------------------------------------------- checksums

1 0

Patch set updated for coreboot: 914c5d3 Move set_boot_successful to drivers/pc80/mc146818rtc.c
by Denis Carikli 01 Nov '13

01 Nov '13

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3996 -gerrit commit 914c5d3d97b11491a7cfc47e8f8bfc8e9b1def76 Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Sun Oct 27 17:58:11 2013 +0100 Move set_boot_successful to drivers/pc80/mc146818rtc.c set_boot_successful depends on CONFIG_PC80_SYSTEM, it also is specific to the mc146818 RTC. Change-Id: I57d28d7c81ea595ce06bd4ec9c4981fa71566db9 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/drivers/pc80/mc146818rtc.c | 23 +++++++++++++++++++++++ src/include/fallback.h | 8 +++++--- src/include/pc80/mc146818rtc.h | 1 + src/lib/fallback_boot.c | 30 ------------------------------ 4 files changed, 29 insertions(+), 33 deletions(-) diff --git a/src/drivers/pc80/mc146818rtc.c b/src/drivers/pc80/mc146818rtc.c index be52454..1f064ea 100644 --- a/src/drivers/pc80/mc146818rtc.c +++ b/src/drivers/pc80/mc146818rtc.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <pc80/mc146818rtc.h> #include <boot/coreboot_tables.h> +#include <fallback.h> #include <string.h> #if CONFIG_USE_OPTION_TABLE #include "option_table.h" @@ -322,3 +323,25 @@ void rtc_check_update_cmos_date(u8 has_century) rtc_update_cmos_date(has_century); } } + +/* Reset the boot count if the boot is considered successfull */ +void set_boot_successful(void) +{ + /* Remember I successfully booted by setting + * the initial boot direction + * to the direction that I booted. + */ + unsigned char index, byte; + index = inb(RTC_PORT(0)) & 0x80; + index |= RTC_BOOT_BYTE; + outb(index, RTC_PORT(0)); + + byte = inb(RTC_PORT(1)); + byte &= 0xfe; + byte |= (byte & (1 << 1)) >> 1; + + /* If we are in normal mode set the boot count to 0 */ + if(byte & 1) + byte &= 0x0f; + outb(byte, RTC_PORT(1)); +} diff --git a/src/include/fallback.h b/src/include/fallback.h index 7f3c823..cca52a9 100644 --- a/src/include/fallback.h +++ b/src/include/fallback.h @@ -4,9 +4,11 @@ #if !defined(__ASSEMBLER__) && !defined(__PRE_RAM__) void boot_successful(void); +void set_boot_successful(void); -#endif /* __ASSEMBLER__ */ - -#define RTC_BOOT_BYTE 48 +#if !CONFIG_PC80_SYSTEM +void set_boot_successful(void) { } +#endif +#endif /* __ASSEMBLER__ */ #endif /* FALLBACK_H */ diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 170a433..76935f5 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -14,6 +14,7 @@ #define RTC_REG_C 12 #define RTC_REG_D 13 +#define RTC_BOOT_BYTE 48 /********************************************************************** * register details diff --git a/src/lib/fallback_boot.c b/src/lib/fallback_boot.c index b956c94..0c49d5c 100644 --- a/src/lib/fallback_boot.c +++ b/src/lib/fallback_boot.c @@ -3,36 +3,6 @@ #include <watchdog.h> #include <arch/io.h> -#if CONFIG_PC80_SYSTEM -#include <pc80/mc146818rtc.h> - -static void set_boot_successful(void) -{ - /* Remember I successfully booted by setting - * the initial boot direction - * to the direction that I booted. - */ - unsigned char index, byte; - index = inb(RTC_PORT(0)) & 0x80; - index |= RTC_BOOT_BYTE; - outb(index, RTC_PORT(0)); - - byte = inb(RTC_PORT(1)); - byte &= 0xfe; - byte |= (byte & (1 << 1)) >> 1; - - /* If we are in normal mode set the boot count to 0 */ - if(byte & 1) - byte &= 0x0f; - outb(byte, RTC_PORT(1)); -} -#else -static void set_boot_successful(void) -{ - /* To be implemented */ -} -#endif - void boot_successful(void) { #if CONFIG_FRAMEBUFFER_SET_VESA_MODE && !CONFIG_FRAMEBUFFER_KEEP_VESA_MODE

1 0

Patch set updated for coreboot: 7e365e3 lenovo/x60: Require only one failed boot to switch to fallback in X86_BOOTBLOCK_NORMAL mode.
by Denis Carikli 01 Nov '13

01 Nov '13

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3991 -gerrit commit 7e365e36613f00b687eb498c86310b2c275ab45b Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Sun Oct 20 23:37:35 2013 +0200 lenovo/x60: Require only one failed boot to switch to fallback in X86_BOOTBLOCK_NORMAL mode. src/arch/x86/Kconfig defines MAX_REBOOT_CNT as 3. If that value is not overrided, then the Lenovo X60 coreboot image gets it too. At the end of a successfull boot, with CONFIG_KEEP_BOOT_COUNT, the Lenovo X60 increments its reboot_bits cmos option by one. In case of a failed boot, the user probably doesn't know that coreboot will only switch to fallback after 3 failed boots, and will act as if the laptop will not boot anymore with its current coreboot image. Change-Id: I746df11c933dfe62e01e1591479ca96a84907dc0 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/mainboard/lenovo/x60/Kconfig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/lenovo/x60/Kconfig b/src/mainboard/lenovo/x60/Kconfig index 72aeef8..90d472c 100644 --- a/src/mainboard/lenovo/x60/Kconfig +++ b/src/mainboard/lenovo/x60/Kconfig @@ -54,6 +54,10 @@ config MAX_CPUS int default 2 +config MAX_REBOOT_CNT + int + default 1 + config MAINBOARD_SMBIOS_MANUFACTURER string default "LENOVO"

1 0

Patch set updated for coreboot: 27665d8 Add a KEEP_BOOT_COUNT Kconfig option.
by Denis Carikli 01 Nov '13

01 Nov '13

Denis Carikli (GNUtoo(a)no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3990 -gerrit commit 27665d835e2cb927c46e71255a42b5e346b4812c Author: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Date: Mon Oct 21 01:56:47 2013 +0200 Add a KEEP_BOOT_COUNT Kconfig option. The use case of that option is to inform coreboot (trough the nvram) at the next boot, that the computer could not fully boot to boot to an usable state. In that case, the boot count is incremented by one. Previously there was no way to tell coreboot that the computer really booted successfully, because it was assumed that if set_boot_successful was called in ramstage, then the computer would have booted successfully. However many things can go wrong after that point, for instance the payload could fail to boot, or the operating system's kernel could fail to boot too, due to the wrong configurations passed to it by coreboot and the payload. Change-Id: I01af053455eb6bd2f7a4f9d37e8c234ba8d55250 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> --- src/arch/x86/Kconfig | 8 ++++++++ src/lib/fallback_boot.c | 3 +++ 2 files changed, 11 insertions(+) diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 0a21fcc..b4e8eb0 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -72,6 +72,14 @@ config X86_BOOTBLOCK_NORMAL endchoice +config KEEP_BOOT_COUNT + bool "Keep boot count" + default n + depends on PC80_SYSTEM && X86_BOOTBLOCK_NORMAL + help + If enabled, the boot count is not reset anymore in the ramstage. + This delegates that task to the software running after the ramstage. + config BOOTBLOCK_SOURCE string default "bootblock_simple.c" if X86_BOOTBLOCK_SIMPLE diff --git a/src/lib/fallback_boot.c b/src/lib/fallback_boot.c index 0c49d5c..f6bc9fb 100644 --- a/src/lib/fallback_boot.c +++ b/src/lib/fallback_boot.c @@ -10,8 +10,11 @@ void boot_successful(void) vbe_textmode_console(); #endif + +#if !CONFIG_KEEP_BOOT_COUNT /* Remember this was a successful boot */ set_boot_successful(); +#endif /* turn off the boot watchdog */ watchdog_off();

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit November 2013