Change in coreboot[master]: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides
Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
soc/intel/{cnl,icl}: Enable support to configure interrupt overrides
This implementation selects SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE config. It would enable support from SOC to dynamically populate the PCI IRQ routing table based on the devices enabled from the mainboard. And pass the same to FSP to configure the IRQ entries in ITSS PIRx register. The same table can be used to generate the ACPI PIRQ mapping table.
Change-Id: I8464d5797cb4ff85406c06e1ecb92c7207380acd Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/icelake/Kconfig 2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/34517/1
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index f859cd5..0283f2c 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -97,6 +97,7 @@ select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_NHLT select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 5dca44b..79a19ee 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -51,6 +51,7 @@ select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE select SOC_INTEL_COMMON_PCH_BASE select SOC_INTEL_COMMON_RESET select SSE2
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34517
to look at the new patch set (#2).
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
soc/intel/{cnl,icl}: Enable support to configure interrupt overrides
This implementation selects SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE config. It would enable support from SOC to dynamically populate the PCI IRQ routing table based on the devices enabled from the mainboard. And pass the same to FSP to configure the IRQ entries in ITSS PIRx register. The same table can be used to generate the ACPI PIRQ mapping table.
Change-Id: I8464d5797cb4ff85406c06e1ecb92c7207380acd Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/icelake/Kconfig 2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/34517/2
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34517
to look at the new patch set (#7).
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
soc/intel/{cnl,icl}: Enable support to configure interrupt overrides
This implementation selects SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE config. It would enable support from SOC to dynamically populate the PCI IRQ routing table based on the devices enabled from the mainboard. And pass the same to FSP to configure the IRQ entries in ITSS PIRx register. The same table can be used to generate the ACPI PIRQ mapping table.
Change-Id: I8464d5797cb4ff85406c06e1ecb92c7207380acd Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/icelake/Kconfig 2 files changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/34517/7
Hello Patrick Rudolph, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34517
to look at the new patch set (#8).
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
soc/intel/{cnl,icl}: Enable support to configure interrupt overrides
This implementation selects SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE config. It would enable support from SOC to dynamically populate the PCI IRQ routing table based on the devices enabled from the mainboard. And pass the same to FSP to configure the IRQ entries in ITSS PIRx register. The same table can be used to generate the ACPI PIRQ mapping table.
Change-Id: I8464d5797cb4ff85406c06e1ecb92c7207380acd Signed-off-by: Aamir Bohra aamir.bohra@intel.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/icelake/Kconfig 2 files changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/34517/8
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
Patch Set 11: Code-Review+2
Lean Sheng Tan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
Patch Set 11: Code-Review+1
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
Patch Set 11:
@Nico more itss stuff...
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
Patch Set 11: Code-Review+2
Mimoja has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl}: Enable support to configure interrupt overrides ......................................................................
Patch Set 11: Code-Review+1
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34517 )
Change subject: soc/intel/{cnl,icl,tgl}: Enable support to configure interrupt overrides ......................................................................
Patch Set 12:
This change is ready for review.
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Aamir Bohra (Code Review) -
Lean Sheng Tan (Code Review)
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Michael Niewöhner (Code Review)
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Mimoja (Code Review)
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Subrata Banik (Code Review)
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Tim Wawrzynczak (Code Review)