Aamir Bohra uploaded patch set #8 to this change.

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soc/intel/{cnl,icl}: Enable support to configure interrupt overrides

This implementation selects SOC_INTEL_COMMON_ITSS_INTERRUPT_OVERRIDE
config. It would enable support from SOC to dynamically populate the
PCI IRQ routing table based on the devices enabled from the mainboard.
And pass the same to FSP to configure the IRQ entries in ITSS PIRx
register. The same table can be used to generate the ACPI PIRQ mapping
table.

Change-Id: I8464d5797cb4ff85406c06e1ecb92c7207380acd
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
---
M src/soc/intel/cannonlake/Kconfig
M src/soc/intel/icelake/Kconfig
2 files changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/34517/8

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I8464d5797cb4ff85406c06e1ecb92c7207380acd
Gerrit-Change-Number: 34517
Gerrit-PatchSet: 8
Gerrit-Owner: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra@intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter@users.sourceforge.net>
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