Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Enable xHCI Gevents ......................................................................
mb/google/zork: Enable xHCI Gevents
This allows the xHCI to wake the system from S3.
BUG=b:154756391 TEST=Boot trembyle and inspect the smi registers. S3 doesn't currently work upstream, so I can't fully test.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 2 files changed, 30 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/1
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index b5b2847..d7a2db8 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -3,6 +3,7 @@ #include <baseboard/variants.h> #include <soc/gpio.h> #include <soc/smi.h> +#include <soc/xhci.h> #include <stdlib.h> #include <boardid.h> #include <variant/gpio.h> @@ -225,6 +226,15 @@ return gpio_set_stage_ram; }
+static const struct sci_source gpe_table[] = { + { + .scimap = SMITYPE_XHC0_PME, + .gpe = XHCI_GEVENT, + .direction = SMI_SCI_LVL_HIGH, + .level = SMI_SCI_EDG + } +}; + /* * This function is still needed for boards that sets gevents above 23 * that will generate SCI or SMI. Normally this function @@ -234,5 +244,6 @@ */ const __weak struct sci_source *get_gpe_table(size_t *num) { - return NULL; + *num = ARRAY_SIZE(gpe_table); + return gpe_table; } diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 6101330..456ac40 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -3,6 +3,7 @@ #include <baseboard/variants.h> #include <soc/gpio.h> #include <soc/smi.h> +#include <soc/xhci.h> #include <stdlib.h> #include <boardid.h> #include <variant/gpio.h> @@ -234,6 +235,21 @@ return gpio_set_stage_ram; }
+static const struct sci_source gpe_table[] = { + { + .scimap = SMITYPE_XHC0_PME, + .gpe = XHCI_GEVENT, + .direction = SMI_SCI_LVL_HIGH, + .level = SMI_SCI_EDG + }, + { + .scimap = SMITYPE_XHC1_PME, + .gpe = XHCI_GEVENT, + .direction = SMI_SCI_LVL_HIGH, + .level = SMI_SCI_EDG + } +}; + /* * This function is still needed for boards that sets gevents above 23 * that will generate SCI or SMI. Normally this function @@ -243,5 +259,6 @@ */ const __weak struct sci_source *get_gpe_table(size_t *num) { - return NULL; + *num = ARRAY_SIZE(gpe_table); + return gpe_table; }
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Enable xHCI Gevents ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41973/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c:
https://review.coreboot.org/c/coreboot/+/41973/1/src/mainboard/google/zork/v... PS1, Line 233: HIGH Shouldn't this be low?
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41973
to look at the new patch set (#2).
Change subject: mb/google/zork: Generate xHCI ACPI ACPI nodes ......................................................................
mb/google/zork: Generate xHCI ACPI ACPI nodes
This generates the xHCI ACPI nodes and configures the system to wake from S3.
BUG=b:154756391 TEST=Boot trembyle and inspect the smi registers. S3 doesn't currently work upstream, so I can't fully test.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb 9 files changed, 122 insertions(+), 78 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI ACPI nodes ......................................................................
Uploaded patch set 2.
(1 comment)
https://review.coreboot.org/c/coreboot/+/41973/1/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c:
https://review.coreboot.org/c/coreboot/+/41973/1/src/mainboard/google/zork/v... PS1, Line 233: HIGH
Shouldn't this be low?
The default in the PPR is HIGH. See SMIx008
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41973
to look at the new patch set (#3).
Change subject: mb/google/zork: Generate xHCI ACPI ACPI nodes ......................................................................
mb/google/zork: Generate xHCI ACPI ACPI nodes
This generates the xHCI ACPI nodes and configures the system to wake from S3.
BUG=b:154756391 TEST=Boot trembyle and inspect the smi registers. S3 doesn't currently work upstream, so I can't fully test.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb 9 files changed, 122 insertions(+), 78 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/3
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI ACPI nodes ......................................................................
Uploaded patch set 3.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI ACPI nodes ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41973/3/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/berknip/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/41973/3/src/mainboard/google/zork/v... PS3, Line 47: 31 GEVENT_31
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Uploaded patch set 4.
(1 comment)
https://review.coreboot.org/c/coreboot/+/41973/3/src/mainboard/google/zork/v... File src/mainboard/google/zork/variants/berknip/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/41973/3/src/mainboard/google/zork/v... PS3, Line 47: 31
GEVENT_31
Done
Hello build bot (Jenkins), Furquan Shaikh, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41973
to look at the new patch set (#4).
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
mb/google/zork: Generate xHCI ACPI nodes
This generates the xHCI ACPI nodes and configures the system to wake from S3.
BUG=b:154756391 TEST=Boot trembyle and inspect the smi registers. S3 doesn't currently work upstream, so I can't fully test.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/Kconfig M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/trembyle/overridetree.cb 9 files changed, 123 insertions(+), 79 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/4
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Patch Set 4: Code-Review+2
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Uploaded patch set 5: Patch Set 4 was rebased.
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Uploaded patch set 6: Patch Set 5 was rebased.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Patch Set 6:
Can we land this chain?
Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Patch Set 6:
Patch Set 6:
Can we land this chain?
These comments need to be resolved: https://review.coreboot.org/c/coreboot/+/41900/6/src/drivers/usb/pci_xhci/pc...
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Patch Set 6:
Patch Set 6:
Patch Set 6:
Can we land this chain?
These comments need to be resolved: https://review.coreboot.org/c/coreboot/+/41900/6/src/drivers/usb/pci_xhci/pc...
There hasn't been a response for nearly 2 weeks. When will that get resolved?
Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Generate xHCI ACPI nodes ......................................................................
Patch Set 6:
Patch Set 6:
Patch Set 6:
Patch Set 6:
Can we land this chain?
These comments need to be resolved: https://review.coreboot.org/c/coreboot/+/41900/6/src/drivers/usb/pci_xhci/pc...
There hasn't been a response for nearly 2 weeks. When will that get resolved?
When I get time to actually work on it :) Furquan want's some refactoring I haven't had time to deal with.
Hello build bot (Jenkins), Furquan Shaikh, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41973
to look at the new patch set (#7).
Change subject: mb/google/zork: Provide xHCI GPEs to the xHCI PCI driver ......................................................................
mb/google/zork: Provide xHCI GPEs to the xHCI PCI driver
This configures the system to wake via USB from S3.
I renamed `get_gpe_table` to `variant_gpt_table` to match the other methods.
BUG=b:154756391 TEST=Boot trembyle and dump the ACPI table and see the GPE correctly set.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/mainboard.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 4 files changed, 38 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/7
Hello build bot (Jenkins), Furquan Shaikh, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41973
to look at the new patch set (#8).
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table. ......................................................................
mb/google/zork: Rename get_gpe_table to variant_gpe_table.
This matches the other methods.
BUG=b:154756391 TEST=Build trembyle
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/mainboard.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/8
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table. ......................................................................
Patch Set 8:
I wonder if we should completely drop get_gpe_table()/variant_gpe_table()?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table. ......................................................................
Patch Set 8: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/41973/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41973/8//COMMIT_MSG@7 PS8, Line 7: . no trailing periods on commit summaries please
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table. ......................................................................
Patch Set 8:
Patch Set 8:
I wonder if we should completely drop get_gpe_table()/variant_gpe_table()?
Yes please. IT's actually very next on my train of not-yet-published commits.
Felix Held has uploaded a new patch set (#9) to the change originally created by Raul Rangel. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table ......................................................................
mb/google/zork: Rename get_gpe_table to variant_gpe_table
This matches the other methods.
BUG=b:154756391 TEST=Build trembyle
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 --- M src/mainboard/google/zork/mainboard.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/9
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table ......................................................................
Patch Set 9:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41973/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/41973/8//COMMIT_MSG@7 PS8, Line 7: .
no trailing periods on commit summaries please
Done
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41973 )
Change subject: mb/google/zork: Rename get_gpe_table to variant_gpe_table ......................................................................
mb/google/zork: Rename get_gpe_table to variant_gpe_table
This matches the other methods.
BUG=b:154756391 TEST=Build trembyle
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41973 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/zork/mainboard.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 4 files changed, 4 insertions(+), 4 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved
diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index f295271..f3ef5c5 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -160,7 +160,7 @@ * For boards that only have GPIO generated events, table gpe_table[] * must be removed, and get_gpe_table() should return NULL. */ - gpes = get_gpe_table(&num); + gpes = variant_gpe_table(&num); if (gpes != NULL) gpe_configure_sci(gpes, num); } diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index cdce5d3..23b5458 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -204,7 +204,7 @@ * calls it was modified so that when this function returns NULL then the * caller does nothing. */ -const __weak struct sci_source *get_gpe_table(size_t *num) +const __weak struct sci_source *variant_gpe_table(size_t *num) { return NULL; } diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index a0d3854..640b765 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -194,7 +194,7 @@ * calls it was modified so that when this function returns NULL then the * caller does nothing. */ -const __weak struct sci_source *get_gpe_table(size_t *num) +const __weak struct sci_source *variant_gpe_table(size_t *num) { return NULL; } diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index 14123d5..dab7332 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -10,7 +10,7 @@ #include <soc/platform_descriptors.h> #include "chip.h"
-const struct sci_source *get_gpe_table(size_t *num); +const struct sci_source *variant_gpe_table(size_t *num); const struct soc_amd_gpio *variant_early_gpio_table(size_t *size); const struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size); /*