Raul Rangel has uploaded this change for review.

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mb/google/zork: Enable xHCI Gevents

This allows the xHCI to wake the system from S3.

BUG=b:154756391
TEST=Boot trembyle and inspect the smi registers. S3 doesn't currently
work upstream, so I can't fully test.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18
---
M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
2 files changed, 30 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/41973/1
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
index b5b2847..d7a2db8 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c
@@ -3,6 +3,7 @@
#include <baseboard/variants.h>
#include <soc/gpio.h>
#include <soc/smi.h>
+#include <soc/xhci.h>
#include <stdlib.h>
#include <boardid.h>
#include <variant/gpio.h>
@@ -225,6 +226,15 @@
return gpio_set_stage_ram;
}

+static const struct sci_source gpe_table[] = {
+ {
+ .scimap = SMITYPE_XHC0_PME,
+ .gpe = XHCI_GEVENT,
+ .direction = SMI_SCI_LVL_HIGH,
+ .level = SMI_SCI_EDG
+ }
+};
+
/*
* This function is still needed for boards that sets gevents above 23
* that will generate SCI or SMI. Normally this function
@@ -234,5 +244,6 @@
*/
const __weak struct sci_source *get_gpe_table(size_t *num)
{
- return NULL;
+ *num = ARRAY_SIZE(gpe_table);
+ return gpe_table;
}
diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
index 6101330..456ac40 100644
--- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
+++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c
@@ -3,6 +3,7 @@
#include <baseboard/variants.h>
#include <soc/gpio.h>
#include <soc/smi.h>
+#include <soc/xhci.h>
#include <stdlib.h>
#include <boardid.h>
#include <variant/gpio.h>
@@ -234,6 +235,21 @@
return gpio_set_stage_ram;
}

+static const struct sci_source gpe_table[] = {
+ {
+ .scimap = SMITYPE_XHC0_PME,
+ .gpe = XHCI_GEVENT,
+ .direction = SMI_SCI_LVL_HIGH,
+ .level = SMI_SCI_EDG
+ },
+ {
+ .scimap = SMITYPE_XHC1_PME,
+ .gpe = XHCI_GEVENT,
+ .direction = SMI_SCI_LVL_HIGH,
+ .level = SMI_SCI_EDG
+ }
+};
+
/*
* This function is still needed for boards that sets gevents above 23
* that will generate SCI or SMI. Normally this function
@@ -243,5 +259,6 @@
*/
const __weak struct sci_source *get_gpe_table(size_t *num)
{
- return NULL;
+ *num = ARRAY_SIZE(gpe_table);
+ return gpe_table;
}

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I6ba1fc5756c17da4dc1727425af17c4582c01a18
Gerrit-Change-Number: 41973
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel <rrangel@chromium.org>
Gerrit-MessageType: newchange