Change in coreboot[master]: lib/edid.c: Remove trailing space from detailed mode output

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/17644 )

Change subject: lib/edid.c: Remove trailing space from detailed mode output
......................................................................

lib/edid.c: Remove trailing space from detailed mode output

When the bit for interlaced mode is not set, a trailing space is added
to the end.

As the space is already accounted for in `" interlaced"`, remove that
space.

TEST=Boot on Lenovo X60t, and verify the trailing space in the detailed
     mode is gone.

Change-Id: I4114c9e61a040fa005c806404ec51c12e2f02f4d
Signed-off-by: Paul Menzel 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/17644
Tested-by: build bot (Jenkins) 
Reviewed-by: HAOUAS Elyes 
---
M src/lib/edid.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  HAOUAS Elyes: Looks good to me, approved

diff --git a/src/lib/edid.c b/src/lib/edid.c
index 4a2f07a..238fed5 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -573,7 +573,7 @@
    	"Detailed mode (IN HEX): Clock %d KHz, %x mm x %x mm\n"
           "               %04x %04x %04x %04x hborder %x\n"
           "               %04x %04x %04x %04x vborder %x\n"
-	       "               %chsync %cvsync%s%s %s\n",
+	       "               %chsync %cvsync%s%s%s\n",
           out->mode.pixel_clock,
           extra_info.x_mm,
           extra_info.y_mm,