Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38831 )
Change subject: nb/intel/sandybridge/acpi: Update PEG code ......................................................................
nb/intel/sandybridge/acpi: Update PEG code
* Use new ACPI syntax * Return either 0 or 0xf for PCI root port. That will make the device show up in Windows. This might help users and possibly Windows drivers working with PCIe ports.
Change-Id: I1e76b735ab1472f6a4ea493c733cd6b2e6fca29e Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/northbridge/intel/sandybridge/acpi/peg.asl 1 file changed, 4 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/38831/1
diff --git a/src/northbridge/intel/sandybridge/acpi/peg.asl b/src/northbridge/intel/sandybridge/acpi/peg.asl index f98a4ce..fcec00e 100644 --- a/src/northbridge/intel/sandybridge/acpi/peg.asl +++ b/src/northbridge/intel/sandybridge/acpi/peg.asl @@ -20,8 +20,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 3, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 3) & 1) * 0xf) }
Device (DEV0) @@ -36,8 +35,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 2, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 2) & 1) * 0xf) }
Device (DEV0) @@ -52,8 +50,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 1, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 1) & 1) * 0xf) }
Device (DEV0) @@ -68,8 +65,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 13, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 13) & 1) * 0xf) }
Device (DEV0)
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38831 )
Change subject: nb/intel/sandybridge/acpi: Update PEG code ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38831 )
Change subject: nb/intel/sandybridge/acpi: Update PEG code ......................................................................
Patch Set 1: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/38831/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38831/1//COMMIT_MSG@10 PS1, Line 10: * Return either 0 or 0xf for PCI root port. That will make the Nice. How did you find this out?
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38831 )
Change subject: nb/intel/sandybridge/acpi: Update PEG code ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38831/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38831/1//COMMIT_MSG@10 PS1, Line 10: * Return either 0 or 0xf for PCI root port. That will make the
Nice. […]
ACPI spec defines the meaning of those bits returned by the _STA method
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38831 )
Change subject: nb/intel/sandybridge/acpi: Update PEG code ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38831/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38831/1//COMMIT_MSG@10 PS1, Line 10: * Return either 0 or 0xf for PCI root port. That will make the
ACPI spec defines the meaning of those bits returned by the _STA method
Done
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38831 )
Change subject: nb/intel/sandybridge/acpi: Update PEG code ......................................................................
nb/intel/sandybridge/acpi: Update PEG code
* Use new ACPI syntax * Return either 0 or 0xf for PCI root port. That will make the device show up in Windows. This might help users and possibly Windows drivers working with PCIe ports.
Change-Id: I1e76b735ab1472f6a4ea493c733cd6b2e6fca29e Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38831 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Felix Held felix-coreboot@felixheld.de Reviewed-by: Paul Menzel paulepanter@users.sourceforge.net --- M src/northbridge/intel/sandybridge/acpi/peg.asl 1 file changed, 4 insertions(+), 8 deletions(-)
Approvals: build bot (Jenkins): Verified Paul Menzel: Looks good to me, but someone else must approve Felix Held: Looks good to me, approved
diff --git a/src/northbridge/intel/sandybridge/acpi/peg.asl b/src/northbridge/intel/sandybridge/acpi/peg.asl index f98a4ce..fcec00e 100644 --- a/src/northbridge/intel/sandybridge/acpi/peg.asl +++ b/src/northbridge/intel/sandybridge/acpi/peg.asl @@ -20,8 +20,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 3, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 3) & 1) * 0xf) }
Device (DEV0) @@ -36,8 +35,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 2, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 2) & 1) * 0xf) }
Device (DEV0) @@ -52,8 +50,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 1, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 1) & 1) * 0xf) }
Device (DEV0) @@ -68,8 +65,7 @@
Method (_STA) { - ShiftRight (_SB.PCI0.MCHC.DVEN, 13, Local0) - Return (And (Local0, 1)) + Return (((_SB.PCI0.MCHC.DVEN >> 13) & 1) * 0xf) }
Device (DEV0)
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Felix Held (Code Review) -
Patrick Rudolph (Code Review)
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Paul Menzel (Code Review)