Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
cpu/x86: Introduce `CPU_X86_MTRR`
There's no need for relative paths with Kconfig options.
Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/44230/1
diff --git a/src/cpu/amd/agesa/family14/Kconfig b/src/cpu/amd/agesa/family14/Kconfig index b9354c1..ecf8175 100644 --- a/src/cpu/amd/agesa/family14/Kconfig +++ b/src/cpu/amd/agesa/family14/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY14 diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index fbde30e..7dbb065 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -8,6 +8,5 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family15tn/Kconfig b/src/cpu/amd/agesa/family15tn/Kconfig index 7b83c0c..525677c 100644 --- a/src/cpu/amd/agesa/family15tn/Kconfig +++ b/src/cpu/amd/agesa/family15tn/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY15_TN diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index abc8609..357e80b 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/agesa/family16kb/Kconfig b/src/cpu/amd/agesa/family16kb/Kconfig index 0b31d7b..f87f241 100644 --- a/src/cpu/amd/agesa/family16kb/Kconfig +++ b/src/cpu/amd/agesa/family16kb/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS
if CPU_AMD_AGESA_FAMILY16_KB diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index d22a6b7..b110dec 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -8,6 +8,5 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00630F01/Kconfig b/src/cpu/amd/pi/00630F01/Kconfig index 1b7423f..66df66d 100644 --- a/src/cpu/amd/pi/00630F01/Kconfig +++ b/src/cpu/amd/pi/00630F01/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS
if CPU_AMD_PI_00630F01 diff --git a/src/cpu/amd/pi/00630F01/Makefile.inc b/src/cpu/amd/pi/00630F01/Makefile.inc index abc8609..357e80b 100644 --- a/src/cpu/amd/pi/00630F01/Makefile.inc +++ b/src/cpu/amd/pi/00630F01/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../../mtrr subdirs-y += ../../smm subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00660F01/Kconfig b/src/cpu/amd/pi/00660F01/Kconfig index 3f41e5a..dff7a44 100644 --- a/src/cpu/amd/pi/00660F01/Kconfig +++ b/src/cpu/amd/pi/00660F01/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS
if CPU_AMD_PI_00660F01 diff --git a/src/cpu/amd/pi/00660F01/Makefile.inc b/src/cpu/amd/pi/00660F01/Makefile.inc index a19ca89..6a2ab03 100644 --- a/src/cpu/amd/pi/00660F01/Makefile.inc +++ b/src/cpu/amd/pi/00660F01/Makefile.inc @@ -7,6 +7,5 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/amd/pi/00730F01/Kconfig b/src/cpu/amd/pi/00730F01/Kconfig index f809f3f..25b72a7 100644 --- a/src/cpu/amd/pi/00730F01/Kconfig +++ b/src/cpu/amd/pi/00730F01/Kconfig @@ -4,6 +4,7 @@ bool select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS select SUPPORT_CPU_UCODE_IN_CBFS select MICROCODE_BLOB_UNDISCLOSED diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index a95bb4b..ea06ced 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -9,6 +9,5 @@
subdirs-y += ../../mtrr subdirs-y += ../../../x86/tsc -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae subdirs-y += ../../../x86/smm diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index a026108..8e40c73 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -11,6 +11,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index ddcc51d..247c266 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@
subdirs-y += ../microcode subdirs-y += ../turbo -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc
diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 0ed4338..289aa62 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -11,6 +11,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select SSE2 select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index e8c4924..99ef0ed 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -14,7 +14,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index 61c8da2..500a717 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -11,6 +11,7 @@ select ARCH_RAMSTAGE_X86_32 select CPU_X86_CACHE select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE2 select UDELAY_TSC diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 8488a8f..5d44eef 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -18,7 +18,6 @@ subdirs-y += ../microcode subdirs-y += ../smm/gen1 subdirs-y += ../turbo -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/name subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index 689def0..8d0804e 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -13,6 +13,7 @@ select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX select CPU_X86_LAPIC + select CPU_X86_MTRR select NO_SMM select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index f44757a..de4dae6 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -8,7 +8,6 @@ subdirs-y += ../model_68x subdirs-y += ../model_6bx subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../microcode
diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index bf16db7..5852a10 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_106CX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select SETUP_XIP_CACHE diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index e69ef26..c5b3223 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -10,6 +10,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index b986c4c..9862038 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -2,6 +2,7 @@ bool select CPU_INTEL_MODEL_1067X select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE
diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index 17aa3d1..de3c201 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -10,6 +10,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index ff258e7..b79427e 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -9,6 +9,7 @@ def_bool y select CPU_INTEL_MODEL_106CX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select CPU_HAS_L2_ENABLE_MSR diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 26e58b1..47dd01d 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -10,6 +10,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 4ac9060..9b039fc 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -10,6 +10,7 @@ select CPU_INTEL_MODEL_F4X select CPU_INTEL_MODEL_1067X select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select SIPI_VECTOR_IN_ROM diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index cb69052..cfe19d1 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -14,6 +14,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_m/Kconfig b/src/cpu/intel/socket_m/Kconfig index ad9c473..1860ff1 100644 --- a/src/cpu/intel/socket_m/Kconfig +++ b/src/cpu/intel/socket_m/Kconfig @@ -8,6 +8,7 @@ select CPU_INTEL_MODEL_6EX select CPU_INTEL_MODEL_6FX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE
diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index a77514e..7f814cc 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index 03e910a..bc3f5ba 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -7,6 +7,7 @@ def_bool y select CPU_INTEL_MODEL_F2X select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE select UDELAY_TSC diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 1e160d0..6d8b838 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_f2x subdirs-y += ../../x86/tsc -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../microcode subdirs-y += ../hyperthreading diff --git a/src/cpu/intel/socket_p/Kconfig b/src/cpu/intel/socket_p/Kconfig index 5755d6b..506fbeb 100644 --- a/src/cpu/intel/socket_p/Kconfig +++ b/src/cpu/intel/socket_p/Kconfig @@ -3,6 +3,7 @@ select CPU_INTEL_MODEL_1067X select CPU_INTEL_MODEL_6FX select CPU_X86_LAPIC + select CPU_X86_MTRR select MMX select SSE
diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 7692987..3974e1c 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -11,6 +11,5 @@ subdirs-y += ../hyperthreading subdirs-y += ../microcode subdirs-y += ../speedstep -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/smm subdirs-y += ../../x86/tsc diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig index bf5bac3..ad130f2 100644 --- a/src/cpu/qemu-x86/Kconfig +++ b/src/cpu/qemu-x86/Kconfig @@ -7,6 +7,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select SMP select UDELAY_TSC select TSC_MONOTONIC_TIMER diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 5f54262..c3d0aad 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -7,6 +7,5 @@
ramstage-y += qemu.c
-subdirs-y += ../x86/mtrr subdirs-y += ../x86/smm subdirs-y += ../x86/tsc diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index 334fd95..617e093 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -6,6 +6,10 @@ bool default n
+config CPU_X86_MTRR + bool + default n + # TODO These two options look too similar config PARALLEL_CPU_INIT bool diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 8b4f522..0dccdff 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,6 +1,7 @@ subdirs-y += pae subdirs-$(CONFIG_CPU_X86_CACHE) += cache subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic +subdirs-$(CONFIG_CPU_X86_MTRR) += lapic subdirs-$(CONFIG_PARALLEL_MP) += name ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c ramstage-y += backup_default_smm.c diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index bee9ec6..3d3968b 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -14,6 +14,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select RESET_VECTOR_IN_RAM select X86_AMD_FIXED_MTRRS select X86_AMD_INIT_SIPI diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index c4a0f54..3b2b497 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index b88d031..ac629fd 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -14,6 +14,7 @@ select ARCH_ROMSTAGE_X86_32 select ARCH_RAMSTAGE_X86_32 select CPU_X86_LAPIC + select CPU_X86_MTRR select X86_AMD_FIXED_MTRRS select ACPI_AMD_HARDWARE_SLEEP_VALUES select COLLECT_TIMESTAMPS_NO_TSC diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 4c9ea38..2019fb0 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-y += ../../../cpu/x86/smm
diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 62b984a..2421d26 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -30,6 +30,7 @@ # CPU specific options select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select IOAPIC select PCR_COMMON_IOSF_1_0 select SMP diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index fe62311..5e58538 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc
diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 39da73d..3ac33cf 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -15,6 +15,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_X86_LAPIC + select CPU_X86_MTRR select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 17cc9cf..a2e4340 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 65f5b62..b02f4f3 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -15,6 +15,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_X86_LAPIC + select CPU_X86_MTRR select SUPPORT_CPU_UCODE_IN_CBFS select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index b8f5abe..701424b 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BRASWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 69ab95b..515026b 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select SOUTHBRIDGE_INTEL_COMMON_RESET diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index 3a18110..da42f35 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -1,7 +1,6 @@ ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index ac7b87d..a77a8a1 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -68,6 +68,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_COMPRESS_FSP_S_LZMA select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 979dccc..ec4e82b 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index e8a68d1..7532ccb 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -16,6 +16,7 @@ select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CPU_X86_LAPIC + select CPU_X86_MTRR select DEBUG_GPIO select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index 9e3e1a8..3bd2106 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 02300a8..b2cf82d 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -17,6 +17,7 @@ select CACHE_MRC_SETTINGS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index 8ecb332..8ae39f7 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc
diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index eed1b02..eb34598 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index 0b27e2c..f87d0fd 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc
diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 6571eb2..fa6861e 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -13,6 +13,7 @@ select ARCH_RAMSTAGE_X86_32 select ARCH_ROMSTAGE_X86_32 select ARCH_VERSTAGE_X86_32 + select CPU_X86_MTRR select NO_MMCONF_SUPPORT select REG_SCRIPT select PLATFORM_USES_FSP2_0 diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index 387884a..5800e04 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/tsc
bootblock-y += bootblock/esram_init.S diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 13e52cd..37ae68d 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -30,6 +30,7 @@ select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_INTEL_COMMON_HYPERTHREADING select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_M_XIP select GENERIC_GPIO_LIB select HAVE_FSP_GOP diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index 62dbf7d..c858d1e 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/common subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 25ee119..8c73d76 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -18,6 +18,7 @@ select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select CPU_X86_LAPIC + select CPU_X86_MTRR select FSP_COMPRESS_FSP_S_LZ4 select FSP_M_XIP select GENERIC_GPIO_LIB diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index 23af5fe..27b62a0 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += romstage subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/smm subdirs-y += ../../../cpu/x86/tsc
diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index 5aa058d..540212c 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -31,6 +31,7 @@ select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES select CPU_X86_LAPIC + select CPU_X86_MTRR select POSTCAR_CONSOLE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 04972ee..59ca104 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_COOPERLAKE_SP),y)
subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-y += ../../../../cpu/intel/microcode
diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 657136f..db29e1c 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/tsc subdirs-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm
Hello David Guckian, Patrick Georgi, Martin Roth, Vanessa Eusebio, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44230
to look at the new patch set (#2).
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
cpu/x86: Introduce `CPU_X86_MTRR`
There's no need for relative paths with Kconfig options.
Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/44230/2
Hello build bot (Jenkins), David Guckian, Patrick Georgi, Martin Roth, Vanessa Eusebio, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44230
to look at the new patch set (#3).
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
cpu/x86: Introduce `CPU_X86_MTRR`
There's no need for relative paths with Kconfig options.
Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/amd/agesa/family14/Kconfig M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Kconfig M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Kconfig M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00630F01/Kconfig M src/cpu/amd/pi/00630F01/Makefile.inc M src/cpu/amd/pi/00660F01/Kconfig M src/cpu/amd/pi/00660F01/Makefile.inc M src/cpu/amd/pi/00730F01/Kconfig M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Kconfig M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Kconfig M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Kconfig M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Kconfig M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Kconfig M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Kconfig M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Kconfig M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Kconfig M src/cpu/x86/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Kconfig M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/Makefile.inc M src/soc/intel/broadwell/Kconfig M src/soc/intel/broadwell/Makefile.inc M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/icelake/Kconfig M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Kconfig M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Kconfig M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/Kconfig M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 67 files changed, 37 insertions(+), 33 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/44230/3
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44230/4/src/cpu/x86/Kconfig File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44230/4/src/cpu/x86/Kconfig@11 PS4, Line 11: default n maybe just 'default y if ARCH_X86' ? Only very old or weird CPU's have a different configurable caching mechanism.
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44230/4/src/cpu/x86/Kconfig File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44230/4/src/cpu/x86/Kconfig@11 PS4, Line 11: default n
maybe just 'default y if ARCH_X86' ? Only very old or weird CPU's have a different configurable cach […]
For now, I prefer to keep it default to n. It makes this patch easier to verify.
Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
Abandoned
Sorry, I ran out of patience and energy to care about these changes any longer.
Angel Pons has restored this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu/x86: Introduce `CPU_X86_MTRR` ......................................................................
Restored
Attention is currently required from: Felix Held. Felix Held has uploaded a new patch set (#5) to the change originally created by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs ......................................................................
cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
All x86-based CPUs and SoCs in the coreboot tree end up including the Makefile in cpu/x86/mtrr, so include this directly in the Makefile in cpu/x86 to add it for all x86 CPUs/SoCs. In the unlikely case that a new x86 CPU/SoC will be added, a CPU_X86_MTRR Kconfig option that is selected be default could be added and the new CPU/SoC without MTRR support can override this option that then will be used in the Makefile to guard adding the Makefile from the cpu/x86/mtrr sub-directory.
In cpu/intel all models except model 2065X and 206AX are selcted by a socket and rely on the socket's Makefile.inc to add x86/mtrr to the subdirs, so those models don't add x86/mtrr themselves. The Intel Broadwell SoC selects CPU_INTEL_HASWELL and which added x86/mtrr to the subdirs. The Intel Xeon SP SoC directory contains two sub-folders for different versions or generations which both add x86/mtrr to the subdirs in their Makefiles.
Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons th3fanbus@gmail.com Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Makefile.inc M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/soc/example/min86/Makefile.inc M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Makefile.inc M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/elkhartlake/Makefile.inc M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 35 files changed, 1 insertion(+), 35 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/44230/5
Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Angel Pons, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Christian Walter, Suresh Bellampalli, Tim Wawrzynczak, Michal Motyl, Tim Chu. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs ......................................................................
Patch Set 5:
(1 comment)
File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44230/comment/f66f93be_abecbb3c PS4, Line 11: default n
For now, I prefer to keep it default to n. It makes this patch easier to verify.
when updating this patch i went through all x86 CPUs and SoCs and verified that all end up selecting this option, so i always include this. the same situation is already in place for the PAE support, so i also dropped the Kconfig option. if you think that i shold keep that Kconfig option, i'll set it to y, so that not all CPUs/SoCs need to select that option
Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Angel Pons, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Christian Walter, Suresh Bellampalli, Tim Wawrzynczak, Michal Motyl, Tim Chu. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs ......................................................................
Patch Set 5:
(1 comment)
File src/cpu/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/44230/comment/d18d4d7d_3e9fd234 PS4, Line 11: default n
when updating this patch i went through all x86 CPUs and SoCs and verified that all end up selecting […]
after going through all other related patches, i'd say that a kconfig option for this should be added when/if it's needed. having a kconfig option with only one valid value shouldn't be a kconfig option
Attention is currently required from: Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Angel Pons, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Marshall Dawson, Johnny Lin, Christian Walter, Suresh Bellampalli, Michal Motyl, Felix Held, Tim Chu. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs ......................................................................
Patch Set 5: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44230 )
Change subject: cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs ......................................................................
cpu,soc/x86: always include cpu/x86/mtrr on x86 CPUs/SoCs
All x86-based CPUs and SoCs in the coreboot tree end up including the Makefile in cpu/x86/mtrr, so include this directly in the Makefile in cpu/x86 to add it for all x86 CPUs/SoCs. In the unlikely case that a new x86 CPU/SoC will be added, a CPU_X86_MTRR Kconfig option that is selected be default could be added and the new CPU/SoC without MTRR support can override this option that then will be used in the Makefile to guard adding the Makefile from the cpu/x86/mtrr sub-directory.
In cpu/intel all models except model 2065X and 206AX are selcted by a socket and rely on the socket's Makefile.inc to add x86/mtrr to the subdirs, so those models don't add x86/mtrr themselves. The Intel Broadwell SoC selects CPU_INTEL_HASWELL and which added x86/mtrr to the subdirs. The Intel Xeon SP SoC directory contains two sub-folders for different versions or generations which both add x86/mtrr to the subdirs in their Makefiles.
Change-Id: I743eaac99a85a5c712241ba48a320243c5a51f76 Signed-off-by: Angel Pons th3fanbus@gmail.com Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/44230 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/cpu/amd/agesa/family14/Makefile.inc M src/cpu/amd/agesa/family15tn/Makefile.inc M src/cpu/amd/agesa/family16kb/Makefile.inc M src/cpu/amd/pi/00730F01/Makefile.inc M src/cpu/intel/haswell/Makefile.inc M src/cpu/intel/model_2065x/Makefile.inc M src/cpu/intel/model_206ax/Makefile.inc M src/cpu/intel/slot_1/Makefile.inc M src/cpu/intel/socket_441/Makefile.inc M src/cpu/intel/socket_BGA956/Makefile.inc M src/cpu/intel/socket_FCBGA559/Makefile.inc M src/cpu/intel/socket_LGA775/Makefile.inc M src/cpu/intel/socket_m/Makefile.inc M src/cpu/intel/socket_mPGA604/Makefile.inc M src/cpu/intel/socket_p/Makefile.inc M src/cpu/qemu-x86/Makefile.inc M src/cpu/x86/Makefile.inc M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Makefile.inc M src/soc/example/min86/Makefile.inc M src/soc/intel/alderlake/Makefile.inc M src/soc/intel/apollolake/Makefile.inc M src/soc/intel/baytrail/Makefile.inc M src/soc/intel/braswell/Makefile.inc M src/soc/intel/cannonlake/Makefile.inc M src/soc/intel/denverton_ns/Makefile.inc M src/soc/intel/elkhartlake/Makefile.inc M src/soc/intel/icelake/Makefile.inc M src/soc/intel/jasperlake/Makefile.inc M src/soc/intel/quark/Makefile.inc M src/soc/intel/skylake/Makefile.inc M src/soc/intel/tigerlake/Makefile.inc M src/soc/intel/xeon_sp/cpx/Makefile.inc M src/soc/intel/xeon_sp/skx/Makefile.inc 35 files changed, 1 insertion(+), 35 deletions(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/cpu/amd/agesa/family14/Makefile.inc b/src/cpu/amd/agesa/family14/Makefile.inc index c9074d87..1497100 100644 --- a/src/cpu/amd/agesa/family14/Makefile.inc +++ b/src/cpu/amd/agesa/family14/Makefile.inc @@ -9,5 +9,4 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/cache -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/agesa/family15tn/Makefile.inc b/src/cpu/amd/agesa/family15tn/Makefile.inc index 42e1c2c..af06dd17 100644 --- a/src/cpu/amd/agesa/family15tn/Makefile.inc +++ b/src/cpu/amd/agesa/family15tn/Makefile.inc @@ -12,5 +12,4 @@ subdirs-y += ../../smm subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/cache -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/agesa/family16kb/Makefile.inc b/src/cpu/amd/agesa/family16kb/Makefile.inc index 05e61ea..f466bbc 100644 --- a/src/cpu/amd/agesa/family16kb/Makefile.inc +++ b/src/cpu/amd/agesa/family16kb/Makefile.inc @@ -9,5 +9,4 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/cache -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae diff --git a/src/cpu/amd/pi/00730F01/Makefile.inc b/src/cpu/amd/pi/00730F01/Makefile.inc index 446be5d..9f41082 100644 --- a/src/cpu/amd/pi/00730F01/Makefile.inc +++ b/src/cpu/amd/pi/00730F01/Makefile.inc @@ -10,5 +10,4 @@ subdirs-y += ../../mtrr subdirs-y += ../../../x86/lapic subdirs-y += ../../../x86/cache -subdirs-y += ../../../x86/mtrr subdirs-y += ../../../x86/pae diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc index ebdcc91..a46effe 100644 --- a/src/cpu/intel/haswell/Makefile.inc +++ b/src/cpu/intel/haswell/Makefile.inc @@ -15,7 +15,6 @@
postcar-y += ../car/non-evict/exit_car.S
-subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/model_2065x/Makefile.inc b/src/cpu/intel/model_2065x/Makefile.inc index 85602de..544755a 100644 --- a/src/cpu/intel/model_2065x/Makefile.inc +++ b/src/cpu/intel/model_2065x/Makefile.inc @@ -1,7 +1,6 @@ ramstage-y += model_2065x_init.c subdirs-y += ../../x86/name subdirs-y += ../../x86/cache -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../intel/turbo subdirs-y += ../../intel/microcode diff --git a/src/cpu/intel/model_206ax/Makefile.inc b/src/cpu/intel/model_206ax/Makefile.inc index 2b28eb4f..1217f33 100644 --- a/src/cpu/intel/model_206ax/Makefile.inc +++ b/src/cpu/intel/model_206ax/Makefile.inc @@ -2,7 +2,6 @@ subdirs-y += ../../x86/name subdirs-y += ../smm/gen1
-subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/slot_1/Makefile.inc b/src/cpu/intel/slot_1/Makefile.inc index df7a0bd..28df10e 100644 --- a/src/cpu/intel/slot_1/Makefile.inc +++ b/src/cpu/intel/slot_1/Makefile.inc @@ -7,7 +7,6 @@ subdirs-y += ../model_67x subdirs-y += ../model_68x subdirs-y += ../model_6bx -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_441/Makefile.inc b/src/cpu/intel/socket_441/Makefile.inc index 47fa296..dfed16c 100644 --- a/src/cpu/intel/socket_441/Makefile.inc +++ b/src/cpu/intel/socket_441/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_106cx -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_BGA956/Makefile.inc b/src/cpu/intel/socket_BGA956/Makefile.inc index bdf90a9..a397984 100644 --- a/src/cpu/intel/socket_BGA956/Makefile.inc +++ b/src/cpu/intel/socket_BGA956/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_1067x -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_FCBGA559/Makefile.inc b/src/cpu/intel/socket_FCBGA559/Makefile.inc index 3a0db36..64d0c36 100644 --- a/src/cpu/intel/socket_FCBGA559/Makefile.inc +++ b/src/cpu/intel/socket_FCBGA559/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_106cx -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_LGA775/Makefile.inc b/src/cpu/intel/socket_LGA775/Makefile.inc index f684bfb..a16f670 100644 --- a/src/cpu/intel/socket_LGA775/Makefile.inc +++ b/src/cpu/intel/socket_LGA775/Makefile.inc @@ -4,7 +4,6 @@ #subdirs-y += ../model_f6x #subdirs-y += ../model_1066x subdirs-y += ../model_1067x -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_m/Makefile.inc b/src/cpu/intel/socket_m/Makefile.inc index 2192328..2bcd580 100644 --- a/src/cpu/intel/socket_m/Makefile.inc +++ b/src/cpu/intel/socket_m/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_6ex subdirs-y += ../model_6fx -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_mPGA604/Makefile.inc b/src/cpu/intel/socket_mPGA604/Makefile.inc index 345e4e0..2bca94e 100644 --- a/src/cpu/intel/socket_mPGA604/Makefile.inc +++ b/src/cpu/intel/socket_mPGA604/Makefile.inc @@ -1,5 +1,4 @@ subdirs-y += ../model_f2x -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/intel/socket_p/Makefile.inc b/src/cpu/intel/socket_p/Makefile.inc index 2565493..8588c37 100644 --- a/src/cpu/intel/socket_p/Makefile.inc +++ b/src/cpu/intel/socket_p/Makefile.inc @@ -1,6 +1,5 @@ subdirs-y += ../model_6fx subdirs-y += ../model_1067x -subdirs-y += ../../x86/mtrr subdirs-y += ../../x86/lapic subdirs-y += ../../x86/cache subdirs-y += ../microcode diff --git a/src/cpu/qemu-x86/Makefile.inc b/src/cpu/qemu-x86/Makefile.inc index 1b1b603..42e1806 100644 --- a/src/cpu/qemu-x86/Makefile.inc +++ b/src/cpu/qemu-x86/Makefile.inc @@ -7,5 +7,4 @@
ramstage-y += qemu.c
-subdirs-y += ../x86/mtrr subdirs-y += ../x86/lapic diff --git a/src/cpu/x86/Makefile.inc b/src/cpu/x86/Makefile.inc index 1ad04b5..016b601 100644 --- a/src/cpu/x86/Makefile.inc +++ b/src/cpu/x86/Makefile.inc @@ -1,3 +1,4 @@ +subdirs-y += mtrr subdirs-y += pae subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm subdirs-$(CONFIG_UDELAY_TSC) += tsc diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc index 918aa81..5e6b257 100644 --- a/src/soc/amd/cezanne/Makefile.inc +++ b/src/soc/amd/cezanne/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_AMD_CEZANNE),y)
subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage
diff --git a/src/soc/amd/picasso/Makefile.inc b/src/soc/amd/picasso/Makefile.inc index d873079..e95a173 100644 --- a/src/soc/amd/picasso/Makefile.inc +++ b/src/soc/amd/picasso/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/cache -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += psp_verstage subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../common/psp_verstage diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index fb6e204..46e5b9d 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/cache -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/pae
bootblock-y += uart.c diff --git a/src/soc/example/min86/Makefile.inc b/src/soc/example/min86/Makefile.inc index 9c1c7f0..c3cc195 100644 --- a/src/soc/example/min86/Makefile.inc +++ b/src/soc/example/min86/Makefile.inc @@ -10,6 +10,4 @@ ramstage-y += chip.c ramstage-y += timer.c
-subdirs-y += ../../../cpu/x86/mtrr - endif diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 728c58c..bd554b9 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -3,7 +3,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 49707da..6ef79fc 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index 5500da9..33aaba0 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -2,7 +2,6 @@
subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/braswell/Makefile.inc b/src/soc/intel/braswell/Makefile.inc index 0080d72..07bd26f 100644 --- a/src/soc/intel/braswell/Makefile.inc +++ b/src/soc/intel/braswell/Makefile.inc @@ -2,7 +2,6 @@
subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 49e9f0c..bc15e1f 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/intel/common
bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/denverton_ns/Makefile.inc b/src/soc/intel/denverton_ns/Makefile.inc index c222920..d49be24 100644 --- a/src/soc/intel/denverton_ns/Makefile.inc +++ b/src/soc/intel/denverton_ns/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr subdirs-y += ../../../cpu/x86/cache
bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/elkhartlake/Makefile.inc b/src/soc/intel/elkhartlake/Makefile.inc index e3cf119..c32ba1f 100644 --- a/src/soc/intel/elkhartlake/Makefile.inc +++ b/src/soc/intel/elkhartlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/icelake/Makefile.inc b/src/soc/intel/icelake/Makefile.inc index a53a225..847418d 100644 --- a/src/soc/intel/icelake/Makefile.inc +++ b/src/soc/intel/icelake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/jasperlake/Makefile.inc b/src/soc/intel/jasperlake/Makefile.inc index f450257..276f3c0 100644 --- a/src/soc/intel/jasperlake/Makefile.inc +++ b/src/soc/intel/jasperlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index c0b213e..8b0c8bf 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_QUARK),y)
subdirs-y += romstage -subdirs-y += ../../../cpu/x86/mtrr
bootblock-y += bootblock/esram_init.S bootblock-y += bootblock/bootblock.c diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index c191aac..775bec1 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -6,7 +6,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
bootblock-y += bootblock/bootblock.c bootblock-y += i2c.c diff --git a/src/soc/intel/tigerlake/Makefile.inc b/src/soc/intel/tigerlake/Makefile.inc index bce3653..9e5a3c8 100644 --- a/src/soc/intel/tigerlake/Makefile.inc +++ b/src/soc/intel/tigerlake/Makefile.inc @@ -4,7 +4,6 @@ subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/x86/lapic -subdirs-y += ../../../cpu/x86/mtrr
# all (bootblock, verstage, romstage, postcar, ramstage) all-y += gspi.c diff --git a/src/soc/intel/xeon_sp/cpx/Makefile.inc b/src/soc/intel/xeon_sp/cpx/Makefile.inc index 2df370a..ef38ce8 100644 --- a/src/soc/intel/xeon_sp/cpx/Makefile.inc +++ b/src/soc/intel/xeon_sp/cpx/Makefile.inc @@ -4,7 +4,6 @@
subdirs-y += ../../../../cpu/intel/turbo subdirs-y += ../../../../cpu/x86/lapic -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/intel/microcode
romstage-y += romstage.c ddr.c diff --git a/src/soc/intel/xeon_sp/skx/Makefile.inc b/src/soc/intel/xeon_sp/skx/Makefile.inc index 5840580..eafd800 100644 --- a/src/soc/intel/xeon_sp/skx/Makefile.inc +++ b/src/soc/intel/xeon_sp/skx/Makefile.inc @@ -5,7 +5,6 @@ subdirs-y += ../../../../cpu/intel/microcode subdirs-y += ../../../../cpu/intel/turbo subdirs-y += ../../../../cpu/x86/lapic -subdirs-y += ../../../../cpu/x86/mtrr subdirs-y += ../../../../cpu/x86/cache
postcar-y += soc_util.c
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Arthur Heymans (Code Review)
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