Change in coreboot[master]: soc/amd/cezanne,soc/intel/common: rework CPPC table generation

[Michael Niewöhner (Code Review)]

Attention is currently required from:  Felix Singer, Raul Rangel, Furquan Shaikh, Paul Menzel, Angel Pons, Subrata Banik, Kyösti Mälkki, Patrick Rudolph, Lance Zhao, Jason Glenesk, Matt Delco, Nico Huber, Marshall Dawson, Tim Wawrzynczak, Felix Held.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57888 )

Change subject: soc/amd/cezanne,soc/intel/common: rework CPPC table generation
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Patch Set 12:

(4 comments)

Patchset:

PS10:
> see CB:57948

Done

File src/cpu/intel/common/common_init.c:

https://review.coreboot.org/c/coreboot/+/57888/comment/2a793997_dee36bcb 
PS10, Line 109:  *	ResourceTemplate(){Register(FFixedHW,  8,  0, 0x771, 4,)}, // Highest Performance
> TBH, looking at the C version, I would just drop the comments. They say the […]

Done

File src/include/acpi/acpi.h:

https://review.coreboot.org/c/coreboot/+/57888/comment/affbbb95_6facdda0 
PS12, Line 133: (acpi_addr_t)
needed temporarily. will vanish in CB:58118

https://review.coreboot.org/c/coreboot/+/57888/comment/19932aa7_2400c8de 
PS12, Line 141: (acpi_addr_t)
needed temporarily. will vanish in CB:58118