Change in coreboot[master]: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE - coreboot-gerrit

1 Nov 2019


      Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33928 )
Change subject: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE
......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/33928/14//COMMIT_MSG 
Commit Message:
https://review.coreboot.org/c/coreboot/+/33928/14//COMMIT_MSG@7 
PS14, Line 7: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE
...
The x86 timers are a mess. […]
Could you please add that info to the commit description?
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1690cb80295d6b006b75ed69edea28899b674b68
Gerrit-Change-Number: 33928
Gerrit-PatchSet: 14
Gerrit-Owner: Kyösti Mälkki kyosti.malkki@gmail.com
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