Change in coreboot[master]: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33928 )

Change subject: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE
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Patch Set 14:

(1 comment)

https://review.coreboot.org/c/coreboot/+/33928/14//COMMIT_MSG 
Commit Message:

https://review.coreboot.org/c/coreboot/+/33928/14//COMMIT_MSG@7 
PS14, Line 7: cpu/x86/tsc: Replace TSC_CONSTANT_RATE with UNKNOWN_TSC_RATE
> I don't understand this subject nor the reason for removing the explicitness of TSC_CONSTANT_RATE. […]
> The x86 timers are a mess. Different stages using different counters, timestamps using different counters from udelays..

The original intention was to only flip TSC_CONSTANT_RATE Kconfig to NO_TSC_CONSTANT_RATE. The name would be incorrect, those TSCs do run with a constant rate but we just lack the implementation of tsc_freq_mhz() on three platforms.

It then got more complicated because x86/tsc_delay.tsc was using two different guards, with nb/via/vx900 claiming UDELAY_TSC but pulling in udelay_io.c for romstage without guards at all.

The net result here is we should always define tsc_freq_mhz() and thus get rid of the couple remaining UNKNOWN_TSC_RATE cases.



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Gerrit-Project: coreboot
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Gerrit-Change-Id: I1690cb80295d6b006b75ed69edea28899b674b68
Gerrit-Change-Number: 33928
Gerrit-PatchSet: 14
Gerrit-Owner: Kyösti Mälkki <[e-mail]>
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