Attention is currently required from: Appukuttan V K, Arthur Heymans, Krishna P Bhat D, Subrata Banik, Wonkyu Kim.
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81661?usp=email )
Change subject: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
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Patch Set 13:
(1 comment)
File src/drivers/intel/fsp2_0/memory_init.c:
https://review.coreboot.org/c/coreboot/+/81661/comment/7cad78c1_2e0d95f6 :
PS6, Line 37: static uint8_t temp_ram[CONFIG_FSP_TEMP_RAM_SIZE] __aligned(16);
Reverted to original version to keep 32bit compatibility
i'd align the stack to 16 bytes in all cases just to be on the safe side and not have different cases here. if i don't misremember that, also when using SSE or AVX instructions, the stack frame should be 16 byte aligned anyway; no matter if in 32 or 64 bit mode. there's also no real downside to using a stricter stack alignment that necessary, so i'd just change this to 16 bytes in all cases, since something being 16 byte aligned implies that it's also 4 byte aligned
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