Change in coreboot[master]: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree
Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree
This CL selects the PcieRpClkReqDetect for the required root ports which is needed to allow proper clksrc gpio configuration.
BUG=None BRANCH=None TEST=Build and boot jslrvp with NVMe
Change-Id: Ie4ae1365a7621b8be3b795798c171e3f7ea9e487 Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/40758/1
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index 7dc45ae..9a06f4b 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -67,8 +67,17 @@ register "PcieRpEnable[1]" = "1" register "PcieRpEnable[4]" = "1"
+ # Enable ClkReqDetect 1 for WLAN + # Enable ClkReqDetect 4 for NVMe + register "PcieRpClkReqDetect[1]" = "1" + register "PcieRpClkReqDetect[4]" = "1" + register "PcieClkSrcUsage[0]" = "0x04" register "PcieClkSrcUsage[1]" = "0x01" + register "PcieClkSrcUsage[2]" = "0xFF" + register "PcieClkSrcUsage[3]" = "0xFF" + register "PcieClkSrcUsage[4]" = "0xFF" + register "PcieClkSrcUsage[5]" = "0xFF"
register "PcieClkSrcClkReq[0]" = "0x00" register "PcieClkSrcClkReq[1]" = "0x01"
Meera Ravindranath has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree
This CL selects the PcieRpClkReqDetect for the required root ports which is needed to allow proper clksrc gpio configuration. Also, sets the unused PcieClkSrcUsage to 0xFF.
BUG=None BRANCH=None TEST=Build and boot jslrvp with NVMe
Change-Id: Ie4ae1365a7621b8be3b795798c171e3f7ea9e487 Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/40758/2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
Patch Set 2: Code-Review+2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
Patch Set 2: Code-Review+2
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
Patch Set 2: Code-Review+2
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
Patch Set 2: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/40758 )
Change subject: mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree ......................................................................
mb/intel/jasperlake_rvp: Select PcieRpClkReqDetect in device tree
This CL selects the PcieRpClkReqDetect for the required root ports which is needed to allow proper clksrc gpio configuration. Also, sets the unused PcieClkSrcUsage to 0xFF.
BUG=None BRANCH=None TEST=Build and boot jslrvp with NVMe
Change-Id: Ie4ae1365a7621b8be3b795798c171e3f7ea9e487 Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/40758 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Subrata Banik subrata.banik@intel.com Reviewed-by: V Sowmya v.sowmya@intel.com Reviewed-by: Ronak Kanabar ronak.kanabar@intel.com Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com --- M src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb 1 file changed, 9 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved V Sowmya: Looks good to me, approved Maulik V Vaghela: Looks good to me, approved Ronak Kanabar: Looks good to me, approved
diff --git a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb index cb3d1f3..1b5e256 100644 --- a/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb +++ b/src/mainboard/intel/jasperlake_rvp/variants/jslrvp/devicetree.cb @@ -67,8 +67,17 @@ register "PcieRpEnable[1]" = "1" register "PcieRpEnable[4]" = "1"
+ # Enable ClkReqDetect 1 for WLAN + # Enable ClkReqDetect 4 for NVMe + register "PcieRpClkReqDetect[1]" = "1" + register "PcieRpClkReqDetect[4]" = "1" + register "PcieClkSrcUsage[0]" = "0x04" register "PcieClkSrcUsage[1]" = "0x01" + register "PcieClkSrcUsage[2]" = "0xFF" + register "PcieClkSrcUsage[3]" = "0xFF" + register "PcieClkSrcUsage[4]" = "0xFF" + register "PcieClkSrcUsage[5]" = "0xFF"
register "PcieClkSrcClkReq[0]" = "0x00" register "PcieClkSrcClkReq[1]" = "0x01"
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Maulik V Vaghela (Code Review) -
Meera Ravindranath (Code Review)
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Patrick Georgi (Code Review)
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Ronak Kanabar (Code Review)
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Subrata Banik (Code Review)
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V Sowmya (Code Review)