Hello Iru Cai,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/41393
to review the following change.
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
util: add a tool to dump and insert MEC1322 firmware
Refer to chip/mec1322/util/pack_ec.py in chromeec project for MEC1322 firmware format.
Tested on the backup files of the system and private flashes of HP EliteBook 820 G1. This tool can dump the EC firmware from both flashes and insert the EC firmware to the original ROM file and make the ROM unchanged.
It needs to be tested on real hardware to see if a modified ROM with a re-inserted EC firmware works.
Change-Id: I999bf0289216bf72c4f8f19182c7670d7008b5f9 Signed-off-by: Iru Cai mytbk920423@gmail.com --- M util/README.md A util/mec1322/Makefile A util/mec1322/mec1322.c 3 files changed, 324 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41393/1
diff --git a/util/README.md b/util/README.md index 8b05f6f..672d1da 100644 --- a/util/README.md +++ b/util/README.md @@ -63,6 +63,7 @@ * __marvell__ - Add U-Boot boot loader for Marvell ARMADA38X `C` * __[me_cleaner](https://github.com/corna/me_cleaner)__ - Tool for partial deblobbing of Intel ME/TXE firmware images `Python` +* __mec1322__ - Dumps and inserts MEC1322 EC firmware `C` * __mma__ - Memory Margin Analysis automation tests `Bash` * __msrtool__ - Dumps chipset-specific MSR registers. `C` * __mtkheader__ - Generate MediaTek bootload header. `Python2` diff --git a/util/mec1322/Makefile b/util/mec1322/Makefile new file mode 100644 index 0000000..4ccbe92 --- /dev/null +++ b/util/mec1322/Makefile @@ -0,0 +1,21 @@ +## This file is part of the coreboot project. +## +## SPDX-License-Identifier: GPL-2.0-or-later + +obj = mec1322 +HOSTCC := $(if $(shell type gcc 2>/dev/null),gcc,cc) + +ifeq ($(VERIFY_SIG),1) + CFLAGS += -DVERIFY_SIG + LIBS := -lcrypto +endif + +all: $(obj) + +%: %.c + $(HOSTCC) $(CFLAGS) -Wall -o $@ $< $(LIBS) + +clean: + rm -f $(obj) + +.PHONY: all clean diff --git a/util/mec1322/mec1322.c b/util/mec1322/mec1322.c new file mode 100644 index 0000000..7ee83bb --- /dev/null +++ b/util/mec1322/mec1322.c @@ -0,0 +1,302 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <stdio.h> +#include <string.h> +#include <stdint.h> +#include <stdlib.h> + +#ifdef VERIFY_SIG +#include <openssl/obj_mac.h> +#include <openssl/rsa.h> +#include <openssl/sha.h> +#endif + +void usage(void) +{ + fprintf(stderr, + "Usage:\n" + "\tmec1322 dump [-s <flash size>] [-o <outfile>] <infile>\n" + "\tmec1322 insert [-s <flash size>] [-f <image>] <infile> <header_loc>\n"); + + exit(1); +} + +const int SPI_CLOCK_LIST[] = {48, 24, 12, 8}; +const uint8_t SPI_READ_CMD_LIST[] = {0x3, 0xb, 0x3b}; + +// FIXME: uint32_t cannot be used directly on big endian systems +struct mec1322_header { + uint8_t sig[6]; // "CSMS\0\0" + uint8_t spi_clk; + uint8_t spi_read_cmd; + uint32_t load_addr; + uint32_t entry_point; + uint16_t payload_blks; // payload_len >> 6 + uint8_t padding0[2]; + uint32_t payload_offset; + uint8_t padding1[8]; + uint8_t payload_key_exp[16]; // @0x20 + uint8_t payload_key_modulus[256]; // @0x30 +}; + +uint8_t crc8(const uint8_t *data, size_t len) +{ + const uint8_t CRC_TABLE[] = {0x00, 0x07, 0x0e, 0x09, 0x1c, 0x1b, 0x12, 0x15, + 0x38, 0x3f, 0x36, 0x31, 0x24, 0x23, 0x2a, 0x2d}; + uint8_t crc = 0; + for (size_t i = 0; i < len; i++) { + uint8_t v = data[i]; + crc = (crc << 4) ^ (CRC_TABLE[(crc >> 4) ^ (v >> 4)]); + crc = (crc << 4) ^ (CRC_TABLE[(crc >> 4) ^ (v & 0xf)]); + } + return crc ^ 0x55; +} + +// return the total length of the firmware, including header, +// header_signature, and payload +// return 0 if there's error +size_t parse_header(const struct mec1322_header *hdr) +{ + if (memcmp(hdr->sig, "CSMS", 4) != 0) { + fprintf(stderr, "MEC1322 header signature error!\n"); + return 0; + } + + printf("SPI clock = %hhd MHz\n", SPI_CLOCK_LIST[hdr->spi_clk]); + printf("SPI read cmd = 0x%hhx\n", SPI_READ_CMD_LIST[hdr->spi_read_cmd]); + printf("load address = 0x%x\n", hdr->load_addr); + printf("entry point = 0x%x\n", hdr->entry_point); + size_t payload_len = (size_t)hdr->payload_blks * 64; + printf("payload length = 0x%lx\n", payload_len); + printf("payload offset = 0x%x\n", hdr->payload_offset); + return payload_len + hdr->payload_offset; +} + +int verify_payload_signature(const struct mec1322_header *hdr, void *payload, + const uint8_t *sig) +{ +#ifdef VERIFY_SIG + uint8_t hash[32]; + uint8_t sigrev[256]; + + for (size_t i = 0; i < 256; i++) + sigrev[i] = sig[255 - i]; + + RSA *rsa = RSA_new(); + BIGNUM *modulus = BN_lebin2bn(hdr->payload_key_modulus, 256, NULL); + BIGNUM *exp = BN_lebin2bn(hdr->payload_key_exp, 8, NULL); + RSA_set0_key(rsa, modulus, exp, NULL); + + SHA256(payload, (size_t)(hdr->payload_blks) * 64, hash); + + int v = RSA_verify(NID_sha256, hash, 32, sigrev, 256, rsa); + if (!v) + fprintf(stderr, "MEC1322 payload RSA signature error!\n"); + else + printf("MEC1322 payload RSA signature matches the payload.\n"); + + return v; +#else + fprintf(stderr, + "** MEC1322 payload signature verification is not enabled.\n" + "** You can run `make VERIFY_SIG=1` to enable it.\n"); + return 1; +#endif +} + +int mec1322_dump(int argc, char *argv[]) +{ + FILE *infile, *outfile = NULL; + long spisize = 0; + + while (argc > 2) { + if (strcmp(argv[0], "-s") == 0) { + spisize = strtol(argv[1], NULL, 0); + argc -= 2; + argv += 2; + continue; + } + if (strcmp(argv[0], "-o") == 0) { + outfile = fopen(argv[1], "w"); + if (outfile == NULL) { + fprintf(stderr, "Fail to open file %s!\n", argv[1]); + exit(1); + } + argc -= 2; + argv += 2; + continue; + } + // otherwise, print usage and exit + usage(); + } + + if (argc != 1) + usage(); + + // without the above options, it's the input file + infile = fopen(argv[0], "r"); + if (infile == NULL) { + fprintf(stderr, "Fail to open file %s!\n", argv[0]); + exit(1); + } + + if (spisize == 0) { + fseek(infile, -1, SEEK_END); + spisize = ftell(infile) + 1; + + printf("Input file size is 0x%lx.\n", spisize); + } + + // read MEC1322 firmware tag + fseek(infile, -256, SEEK_END); + uint8_t fwTag[4]; + uint32_t header_loc; + fread(fwTag, 1, 4, infile); + + if (crc8(fwTag, 3) == fwTag[3]) { + header_loc = (((uint32_t)fwTag[0]) << 8) | (((uint32_t)fwTag[1]) << 16) + | (((uint32_t)fwTag[2]) << 24); + printf("MEC1322 firmware header location is 0x%x.\n", header_loc); + } else { + fprintf(stderr, "MEC1322 tag CRC8 error!\n"); + return 1; + } + + // we use the distance of header_loc to end when seeking + struct mec1322_header hdr; + fseek(infile, header_loc - spisize, SEEK_END); + fread(&hdr, 1, sizeof(hdr), infile); + size_t fwlen = parse_header(&hdr); + if (fwlen == 0) { + fprintf(stderr, "Error parsing MEC1322 firmware header!\n"); + return 1; + } + + if (outfile) { + fseek(infile, header_loc - spisize, SEEK_END); + void *image = malloc(fwlen); + fread(image, 1, fwlen, infile); + fwrite(image, 1, fwlen, outfile); + + uint8_t rsasig[256]; + fread(rsasig, 1, 256, infile); + fwrite(rsasig, 1, 256, outfile); + + if (!verify_payload_signature(&hdr, image + hdr.payload_offset, rsasig)) + return 1; + + free(image); + fclose(outfile); + } + + fclose(infile); + return 0; +} + +int mec1322_insert(int argc, char *argv[]) +{ + FILE *infile, *ecfile = NULL; + void *image = NULL; + size_t fwlen; + long spisize = 0; + long header_loc; + + if (argc < 2) + usage(); + + while (argc > 2) { + if (strcmp(argv[0], "-s") == 0) { + spisize = strtol(argv[1], NULL, 0); + argc -= 2; + argv += 2; + continue; + } + if (strcmp(argv[0], "-f") == 0) { + ecfile = fopen(argv[1], "r"); + if (ecfile == NULL) { + fprintf(stderr, "Fail to open EC file %s!\n", argv[1]); + return 1; + } + argc -= 2; + argv += 2; + continue; + } + usage(); + } + + if (argc != 2) + usage(); + + infile = fopen(argv[0], "r+"); + header_loc = strtol(argv[1], NULL, 0); + + if (infile == NULL) { + fprintf(stderr, "Fail to open firmware image %s!\n", argv[1]); + return 1; + } + + if (spisize == 0) { + fseek(infile, -1, SEEK_END); + spisize = ftell(infile) + 1; + + printf("Input file size is 0x%lx.\n", spisize); + } + + if (ecfile != NULL) { + struct mec1322_header hdr; + fread(&hdr, 1, sizeof(hdr), ecfile); + fwlen = parse_header(&hdr); + + if (fwlen == 0) { + fprintf(stderr, "Error parsing MEC1322 firmware header!\n"); + return 1; + } + fseek(ecfile, 0, SEEK_SET); + size_t totallen = fwlen + 256; // firmware length with signature + image = malloc(totallen); + fread(image, 1, totallen, ecfile); + fclose(ecfile); + + if (!verify_payload_signature(&hdr, image + hdr.payload_offset, image + fwlen)) + return 1; + + fwlen = totallen; + } + + if (header_loc & 0xff) { + fprintf(stderr, "Header location should be aligned to 256 bytes!\n"); + return 1; + } + uint8_t fwTag[4] = {header_loc >> 8, header_loc >> 16, header_loc >> 24}; + fwTag[3] = crc8(fwTag, 3); + + // write tag + fseek(infile, -256, SEEK_END); + fwrite(fwTag, 1, 4, infile); + + // if EC image is given, write EC image + if (image) { + fseek(infile, header_loc - spisize, SEEK_END); + fwrite(image, 1, fwlen, infile); + free(image); + } + + fclose(infile); + + return 0; +} + +int main(int argc, char *argv[]) +{ + if (argc < 3) + usage(); + + if (strcmp(argv[1], "dump") == 0) + return mec1322_dump(argc - 2, argv + 2); + + if (strcmp(argv[1], "insert") == 0) + return mec1322_insert(argc - 2, argv + 2); + + // no action provided + usage(); +}
HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41393/1/util/mec1322/Makefile File util/mec1322/Makefile:
https://review.coreboot.org/c/coreboot/+/41393/1/util/mec1322/Makefile@1 PS1, Line 1: ## This file is part of the coreboot project. : ## remove
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 1: Code-Review+1
Idwer Vollering has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 1:
Nit pick: did you build with clang?
mec1322.c:65:35: warning: format specifies type 'char' but the argument has type 'int' [-Wformat] printf("SPI clock = %hhd MHz\n", SPI_CLOCK_LIST[hdr->spi_clk]); ~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ %d
Hello build bot (Jenkins), Angel Pons, Iru Cai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41393
to look at the new patch set (#2).
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
util: add a tool to dump and insert MEC1322 firmware
Refer to chip/mec1322/util/pack_ec.py in chromeec project for MEC1322 firmware format.
Tested with HP ProBook 640 G1. This tool can dump the EC firmware from the OEM firmware image, insert the firmware to a coreboot image, and make the coreboot image work.
Change-Id: I999bf0289216bf72c4f8f19182c7670d7008b5f9 Signed-off-by: Iru Cai mytbk920423@gmail.com --- M util/README.md A util/mec1322/Makefile A util/mec1322/mec1322.c 3 files changed, 324 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41393/2
Hello build bot (Jenkins), Angel Pons, Iru Cai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41393
to look at the new patch set (#3).
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
util: add a tool to dump and insert MEC1322 firmware
Refer to chip/mec1322/util/pack_ec.py in chromeec project for MEC1322 firmware format.
Tested with HP ProBook 640 G1. This tool can dump the EC firmware from the OEM firmware image, insert the firmware to a coreboot image, and make the coreboot image work.
Change-Id: I999bf0289216bf72c4f8f19182c7670d7008b5f9 Signed-off-by: Iru Cai mytbk920423@gmail.com --- M util/README.md A util/mec1322/Makefile A util/mec1322/mec1322.c 3 files changed, 322 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41393/3
Iru Cai (vimacs) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 3:
(1 comment)
Patch Set 1:
Nit pick: did you build with clang?
mec1322.c:65:35: warning: format specifies type 'char' but the argument has type 'int' [-Wformat] printf("SPI clock = %hhd MHz\n", SPI_CLOCK_LIST[hdr->spi_clk]); ~~~~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ %d
Fixed.
https://review.coreboot.org/c/coreboot/+/41393/1/util/mec1322/Makefile File util/mec1322/Makefile:
https://review.coreboot.org/c/coreboot/+/41393/1/util/mec1322/Makefile@1 PS1, Line 1: ## This file is part of the coreboot project. : ##
remove
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 3: Code-Review+1
(8 comments)
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c File util/mec1322/mec1322.c:
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@9 PS3, Line 9: openssl Ah, I see why it's not enabled by default
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@19 PS3, Line 19: image ec_fw ?
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@38 PS3, Line 38: Why noy use tabs everywhere?
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@44 PS3, Line 44: const uint8_t CRC_TABLE[] = {0x00, 0x07, 0x0e, 0x09, 0x1c, 0x1b, 0x12, 0x15, : 0x38, 0x3f, 0x36, 0x31, 0x24, 0x23, 0x2a, 0x2d}; nit: place the values in a new line?
const uint8_t CRC_TABLE[] = { 0x00, 0x07, 0x0e, 0x09, 0x1c, 0x1b, 0x12, 0x15, 0x38, 0x3f, 0x36, 0x31, 0x24, 0x23, 0x2a, 0x2d, };
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@79 PS3, Line 79: 32 #define this?
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@82 PS3, Line 82: 256 #define this?
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@152 PS3, Line 152: fwTag nit: fw_tag
https://review.coreboot.org/c/coreboot/+/41393/3/util/mec1322/mec1322.c@157 PS3, Line 157: uint32_t Casting this shouldn't be necessary
Hello build bot (Jenkins), Angel Pons, Iru Cai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41393
to look at the new patch set (#4).
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
util: add a tool to dump and insert MEC1322 firmware
Refer to chip/mec1322/util/pack_ec.py in chromeec project for MEC1322 firmware format.
Tested with HP ProBook 640 G1. This tool can dump the EC firmware from the OEM firmware image, insert the firmware to a coreboot image, and make the coreboot image work.
Change-Id: I999bf0289216bf72c4f8f19182c7670d7008b5f9 Signed-off-by: Iru Cai mytbk920423@gmail.com --- M util/README.md A util/mec1322/Makefile A util/mec1322/mec1322.c 3 files changed, 326 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41393/4
Attention is currently required from: Angel Pons. Iru Cai (vimacs) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 4:
(5 comments)
File util/mec1322/mec1322.c:
https://review.coreboot.org/c/coreboot/+/41393/comment/d4dc5f93_a4871ebe PS3, Line 19: image
ec_fw ?
Done
https://review.coreboot.org/c/coreboot/+/41393/comment/14a953ca_f6d2d2e3 PS3, Line 44: const uint8_t CRC_TABLE[] = {0x00, 0x07, 0x0e, 0x09, 0x1c, 0x1b, 0x12, 0x15, : 0x38, 0x3f, 0x36, 0x31, 0x24, 0x23, 0x2a, 0x2d};
nit: place the values in a new line? […]
Done
https://review.coreboot.org/c/coreboot/+/41393/comment/87b87828_50af95f7 PS3, Line 79: 32
#define this?
Done
https://review.coreboot.org/c/coreboot/+/41393/comment/1fd4bcde_b0fc2436 PS3, Line 82: 256
#define this?
Done
https://review.coreboot.org/c/coreboot/+/41393/comment/ff3a1036_39538d14 PS3, Line 152: fwTag
nit: fw_tag
Done
Attention is currently required from: Angel Pons. Hello build bot (Jenkins), Angel Pons, Iru Cai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41393
to look at the new patch set (#5).
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
util: add a tool to dump and insert MEC1322 firmware
Refer to chip/mec1322/util/pack_ec.py in chromeec project for MEC1322 firmware format.
Tested with HP ProBook 640 G1. This tool can dump the EC firmware from the OEM firmware image, insert the firmware to a coreboot image, and make the coreboot image work.
Change-Id: I999bf0289216bf72c4f8f19182c7670d7008b5f9 Signed-off-by: Iru Cai mytbk920423@gmail.com --- M util/README.md A util/mec1322/Makefile A util/mec1322/mec1322.c 3 files changed, 325 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41393/5
Attention is currently required from: Angel Pons. Iru Cai (vimacs) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 5:
(2 comments)
File util/mec1322/mec1322.c:
https://review.coreboot.org/c/coreboot/+/41393/comment/cf5e4b70_ae1bd281 PS3, Line 38:
Why noy use tabs everywhere?
Changed to a space.
https://review.coreboot.org/c/coreboot/+/41393/comment/88461296_7f844ce0 PS3, Line 157: uint32_t
Casting this shouldn't be necessary
Done
Attention is currently required from: Iru Cai. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41393 )
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
Patch Set 6:
(22 comments)
File util/mec1322/mec1322.c:
https://review.coreboot.org/c/coreboot/+/41393/comment/61f1b6b3_d578e5fd PS6, Line 16: void usage(void) All functions except `main()` should be declared as `static`.
https://review.coreboot.org/c/coreboot/+/41393/comment/243349b8_f4c0d8e0 PS6, Line 26: SPI_CLOCK_LIST we only use uppercase names for macros
https://review.coreboot.org/c/coreboot/+/41393/comment/8e56d8b4_3d8e4d2a PS6, Line 26: int `unsigned int` ?
https://review.coreboot.org/c/coreboot/+/41393/comment/7c2536fc_45251e69 PS6, Line 26: const int SPI_CLOCK_LIST[] = {48, 24, 12, 8}; : const uint8_t SPI_READ_CMD_LIST[] = {0x3, 0xb, 0x3b}; These two arrays are only used in one function. Why not declare them as local variables?
https://review.coreboot.org/c/coreboot/+/41393/comment/4716fa7b_f0b3059d PS6, Line 29: // FIXME: uint32_t cannot be used directly on big endian systems See CB:55039 for a possible solution. Also, same problem applies to `uint16_t`
https://review.coreboot.org/c/coreboot/+/41393/comment/54a2b306_9c729b16 PS6, Line 30: struct mec1322_header { : uint8_t sig[6]; // "CSMS\0\0" : uint8_t spi_clk; : uint8_t spi_read_cmd; : uint32_t load_addr; : uint32_t entry_point; : uint16_t payload_blks; // payload_len >> 6 : uint8_t padding0[2]; : uint32_t payload_offset; : uint8_t padding1[8]; : uint8_t payload_key_exp[16]; // @0x20 : uint8_t payload_key_modulus[SIGNATURE_LEN]; // @0x30 : }; Shouldn't this struct be __packed?
https://review.coreboot.org/c/coreboot/+/41393/comment/4c612f2f_e5dc02a4 PS6, Line 64: memcmp Why not use `strncmp()` instead?
https://review.coreboot.org/c/coreboot/+/41393/comment/6bf9b9da_5541f575 PS6, Line 73: (size_t) This cast shouldn't be necessary
https://review.coreboot.org/c/coreboot/+/41393/comment/341dbc20_3cc98b2a PS6, Line 74: %lx Please use `%zx` to print `size_t` values in hex for portability reasons.
https://review.coreboot.org/c/coreboot/+/41393/comment/d1c63248_26e619db PS6, Line 69: printf("SPI clock = %d MHz\n", SPI_CLOCK_LIST[hdr->spi_clk]); : printf("SPI read cmd = 0x%hhx\n", SPI_READ_CMD_LIST[hdr->spi_read_cmd]); : printf("load address = 0x%x\n", hdr->load_addr); : printf("entry point = 0x%x\n", hdr->entry_point); : size_t payload_len = (size_t)hdr->payload_blks * 64; : printf("payload length = 0x%lx\n", payload_len); : printf("payload offset = 0x%x\n", hdr->payload_offset); nit: align equals signs on printed messages for readability? I'd also move the `payload_len` assignment at the top:
size_t payload_len = (size_t)hdr->payload_blks * 64; printf("SPI clock = %d MHz\n", SPI_CLOCK_LIST[hdr->spi_clk]); printf("SPI read cmd = 0x%hhx\n", SPI_READ_CMD_LIST[hdr->spi_read_cmd]); printf("load address = 0x%x\n", hdr->load_addr); printf("entry point = 0x%x\n", hdr->entry_point); printf("payload length = 0x%zx\n", payload_len); printf("payload offset = 0x%x\n", hdr->payload_offset);
https://review.coreboot.org/c/coreboot/+/41393/comment/f2587301_fee2216c PS6, Line 94: (size_t)(hdr->payload_blks) * 64 Cast shouldn't be needed here.
https://review.coreboot.org/c/coreboot/+/41393/comment/0637cd93_7cd3feb6 PS6, Line 118: spisize = strtol(argv[1], NULL, 0); What if `spisize` is negative?
https://review.coreboot.org/c/coreboot/+/41393/comment/02689ead_3966f3ed PS6, Line 126: fprintf(stderr, "Fail to open file %s!\n", argv[1]); Does the errno get printed? If it doesn't, I'd print it using `strerror()` or similar.
https://review.coreboot.org/c/coreboot/+/41393/comment/e8b37a20_f465d869 PS6, Line 126: Fail Fail*ed*
https://review.coreboot.org/c/coreboot/+/41393/comment/2ba53f08_c0774df2 PS6, Line 124: outfile = fopen(argv[1], "w"); : if (outfile == NULL) { : fprintf(stderr, "Fail to open file %s!\n", argv[1]); : exit(1); : } This pattern appears at least three more times. Why not put it into a helper function?
static FILE *open_file(const char *filename, const char *mode) { FILE *file = fopen(filename, mode); if (file == NULL) { fprintf(stderr, "Could not open file %s: %s\n", filename, strerror(errno)); exit(1); } return file; }
https://review.coreboot.org/c/coreboot/+/41393/comment/6baaaa47_9a6a1d49 PS6, Line 155: fseek(infile, -256, SEEK_END); No error checking?
https://review.coreboot.org/c/coreboot/+/41393/comment/d95b7db6_3b15b7e8 PS6, Line 158: fread(fw_tag, 1, 4, infile); No error checking?
https://review.coreboot.org/c/coreboot/+/41393/comment/2e39990f_346ed94b PS6, Line 165: return 1; Shouldn't file descriptors be closed?
https://review.coreboot.org/c/coreboot/+/41393/comment/8b82b1fa_f9e9e292 PS6, Line 180: void *image = malloc(fwlen); No error checking?
https://review.coreboot.org/c/coreboot/+/41393/comment/1c300eef_67d83df9 PS6, Line 212: spisize = strtol(argv[1], NULL, 0); What if `spisize` is negative?
https://review.coreboot.org/c/coreboot/+/41393/comment/f7ccd561_70e3d993 PS6, Line 234: header_loc = strtol(argv[1], NULL, 0); What if `header_loc` is negative?
https://review.coreboot.org/c/coreboot/+/41393/comment/54ac1156_c795e546 PS6, Line 259: image = malloc(totallen); No error checking?
Attention is currently required from: Iru Cai.
Hello build bot (Jenkins), Angel Pons, Iru Cai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41393
to look at the new patch set (#7).
Change subject: util: add a tool to dump and insert MEC1322 firmware ......................................................................
util: add a tool to dump and insert MEC1322 firmware
Refer to chip/mec1322/util/pack_ec.py in chromeec project for MEC1322 firmware format.
Tested with HP ProBook 640 G1. This tool can dump the EC firmware from the OEM firmware image, insert the firmware to a coreboot image, and make the coreboot image work.
Change-Id: I999bf0289216bf72c4f8f19182c7670d7008b5f9 Signed-off-by: Iru Cai mytbk920423@gmail.com --- M util/README.md A util/mec1322/Makefile A util/mec1322/mec1322.c 3 files changed, 369 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/41393/7