Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44339 )
Change subject: sb/intel/bd82x6x: Make `pch_silicon_supported` static ......................................................................
sb/intel/bd82x6x: Make `pch_silicon_supported` static
It's not needed anywhere else.
Change-Id: Ibc02e432bbc669b3fcfcb8add3c7b0c2a9f77d77 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h 2 files changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44339/1
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 7b0662b..82b95f6 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -41,7 +41,7 @@ return pch_type; }
-int pch_silicon_supported(int type, int rev) +static int pch_silicon_supported(int type, int rev) { int cur_type = pch_silicon_type(); int cur_rev = pch_silicon_revision(); diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 68f599d..eff0858 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -42,7 +42,6 @@
int pch_silicon_revision(void); int pch_silicon_type(void); -int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
void enable_usb_bar(void);
Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44339
to look at the new patch set (#2).
Change subject: sb/intel/bd82x6x: Make `pch_silicon_supported` static ......................................................................
sb/intel/bd82x6x: Make `pch_silicon_supported` static
It's not needed anywhere else.
Change-Id: Ibc02e432bbc669b3fcfcb8add3c7b0c2a9f77d77 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h 2 files changed, 1 insertion(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44339/2
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44339 )
Change subject: sb/intel/bd82x6x: Make `pch_silicon_supported` static ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44339 )
Change subject: sb/intel/bd82x6x: Make `pch_silicon_supported` static ......................................................................
sb/intel/bd82x6x: Make `pch_silicon_supported` static
It's not needed anywhere else.
Change-Id: Ibc02e432bbc669b3fcfcb8add3c7b0c2a9f77d77 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44339 Reviewed-by: Patrick Rudolph siro@das-labor.org Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h 2 files changed, 1 insertion(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Rudolph: Looks good to me, approved
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c index 7b0662b..82b95f6 100644 --- a/src/southbridge/intel/bd82x6x/pch.c +++ b/src/southbridge/intel/bd82x6x/pch.c @@ -41,7 +41,7 @@ return pch_type; }
-int pch_silicon_supported(int type, int rev) +static int pch_silicon_supported(int type, int rev) { int cur_type = pch_silicon_type(); int cur_rev = pch_silicon_revision(); diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h index 68f599d..eff0858 100644 --- a/src/southbridge/intel/bd82x6x/pch.h +++ b/src/southbridge/intel/bd82x6x/pch.h @@ -42,7 +42,6 @@
int pch_silicon_revision(void); int pch_silicon_type(void); -int pch_silicon_supported(int type, int rev); void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
void enable_usb_bar(void);
-
Angel Pons (Code Review) -
Patrick Rudolph (Code Review)