Angel Pons has uploaded this change for review.

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sb/intel/bd82x6x: Make `pch_silicon_supported` static

It's not needed anywhere else.

Change-Id: Ibc02e432bbc669b3fcfcb8add3c7b0c2a9f77d77
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
---
M src/southbridge/intel/bd82x6x/pch.c
M src/southbridge/intel/bd82x6x/pch.h
2 files changed, 1 insertion(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44339/1
diff --git a/src/southbridge/intel/bd82x6x/pch.c b/src/southbridge/intel/bd82x6x/pch.c
index 7b0662b..82b95f6 100644
--- a/src/southbridge/intel/bd82x6x/pch.c
+++ b/src/southbridge/intel/bd82x6x/pch.c
@@ -41,7 +41,7 @@
return pch_type;
}

-int pch_silicon_supported(int type, int rev)
+static int pch_silicon_supported(int type, int rev)
{
int cur_type = pch_silicon_type();
int cur_rev = pch_silicon_revision();
diff --git a/src/southbridge/intel/bd82x6x/pch.h b/src/southbridge/intel/bd82x6x/pch.h
index 68f599d..eff0858 100644
--- a/src/southbridge/intel/bd82x6x/pch.h
+++ b/src/southbridge/intel/bd82x6x/pch.h
@@ -42,7 +42,6 @@

int pch_silicon_revision(void);
int pch_silicon_type(void);
-int pch_silicon_supported(int type, int rev);
void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);

void enable_usb_bar(void);

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibc02e432bbc669b3fcfcb8add3c7b0c2a9f77d77
Gerrit-Change-Number: 44339
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus@gmail.com>
Gerrit-MessageType: newchange