Change in coreboot[master]: cpu/intel/haswell: Add Broadwell CPUIDs and microcode

[Angel Pons (Code Review)]

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46942 )


Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................

cpu/intel/haswell: Add Broadwell CPUIDs and microcode

Broadwell can now use the Haswell CPU driver.

Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Signed-off-by: Angel Pons <[e-mail]>
---
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/haswell/haswell_init.c
2 files changed, 8 insertions(+), 0 deletions(-)



  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/46942/1

diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index b93b911..3c4db4f 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -23,3 +23,7 @@
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*)
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*)
+
+ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
+cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin
+endif
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 04f5802..577061c 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -728,6 +728,10 @@
 	{ X86_VENDOR_INTEL, CPUID_HASWELL_ULT_C0 },
 	{ X86_VENDOR_INTEL, CPUID_CRYSTALWELL_B0 },
 	{ X86_VENDOR_INTEL, CPUID_CRYSTALWELL_C0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_C0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_C0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_D0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_E0 },
 	{ 0, 0 },
 };
 

-- 
To view, visit https://review.coreboot.org/c/coreboot/+/46942
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Gerrit-Change-Number: 46942
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Martin Roth <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-MessageType: newchange

[Michael Niewöhner (Code Review)]

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46942 )

Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................


Patch Set 2: Code-Review+1


-- 
To view, visit https://review.coreboot.org/c/coreboot/+/46942
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Gerrit-Change-Number: 46942
Gerrit-PatchSet: 2
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Martin Roth <[e-mail]>
Gerrit-Reviewer: Michael Niewöhner <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: build bot (Jenkins) <[e-mail]>
Gerrit-CC: Paul Menzel <[e-mail]>
Gerrit-Comment-Date: Thu, 29 Oct 2020 21:01:55 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment

[Angel Pons (Code Review)]

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Michael Niewöhner, Patrick Rudolph, 

I'd like you to reexamine a change. Please visit

    https://review.coreboot.org/c/coreboot/+/46942

to look at the new patch set (#5).

Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................

cpu/intel/haswell: Add Broadwell CPUIDs and microcode

Broadwell can now use the Haswell CPU driver.

Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Signed-off-by: Angel Pons <[e-mail]>
---
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/haswell/haswell_init.c
2 files changed, 8 insertions(+), 0 deletions(-)


  git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/46942/5
-- 
To view, visit https://review.coreboot.org/c/coreboot/+/46942
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Gerrit-Change-Number: 46942
Gerrit-PatchSet: 5
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Martin Roth <[e-mail]>
Gerrit-Reviewer: Michael Niewöhner <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: build bot (Jenkins) <[e-mail]>
Gerrit-CC: Paul Menzel <[e-mail]>
Gerrit-MessageType: newpatchset

[Arthur Heymans (Code Review)]

Attention is currently required from: Angel Pons.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46942 )

Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................


Patch Set 16:

(1 comment)

File src/cpu/intel/haswell/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/46942/comment/aafcbeed_5930df6a 
PS16, Line 27: ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
             : cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin
             : endif
get rid of it in soc/intel/broadwell/cpu/Makefile.inc ?



-- 
To view, visit https://review.coreboot.org/c/coreboot/+/46942
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Gerrit-Change-Number: 46942
Gerrit-PatchSet: 16
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Martin Roth <[e-mail]>
Gerrit-Reviewer: Michael Niewöhner <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: build bot (Jenkins) <[e-mail]>
Gerrit-CC: Arthur Heymans <[e-mail]>
Gerrit-CC: Paul Menzel <[e-mail]>
Gerrit-Attention: Angel Pons <[e-mail]>
Gerrit-Comment-Date: Fri, 22 Jan 2021 19:29:40 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment

[Arthur Heymans (Code Review)]

Attention is currently required from: Angel Pons.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46942 )

Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................


Patch Set 16: Code-Review+2

(1 comment)

File src/cpu/intel/haswell/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/46942/comment/76234124_87c138c3 
PS16, Line 27: ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
             : cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin
             : endif
> get rid of it in soc/intel/broadwell/cpu/Makefile. […]
> Uh nvm. They are made mutally exclusive later on.

[Angel Pons (Code Review)]

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46942 )

Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................

cpu/intel/haswell: Add Broadwell CPUIDs and microcode

Broadwell can now use the Haswell CPU driver.

Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Signed-off-by: Angel Pons <[e-mail]>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46942
Reviewed-by: Arthur Heymans <[e-mail]>
Reviewed-by: Michael Niewöhner <[e-mail]>
Tested-by: build bot (Jenkins) <[e-mail]>
---
M src/cpu/intel/haswell/Makefile.inc
M src/cpu/intel/haswell/haswell_init.c
2 files changed, 8 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved
  Michael Niewöhner: Looks good to me, but someone else must approve



diff --git a/src/cpu/intel/haswell/Makefile.inc b/src/cpu/intel/haswell/Makefile.inc
index b93b911..3c4db4f 100644
--- a/src/cpu/intel/haswell/Makefile.inc
+++ b/src/cpu/intel/haswell/Makefile.inc
@@ -23,3 +23,7 @@
 
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-3c-*)
 cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-45-*)
+
+ifeq ($(CONFIG_SOC_INTEL_BROADWELL),y)
+cpu_microcode_bins += 3rdparty/blobs/soc/intel/broadwell/microcode.bin
+endif
diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c
index 04f5802..577061c 100644
--- a/src/cpu/intel/haswell/haswell_init.c
+++ b/src/cpu/intel/haswell/haswell_init.c
@@ -728,6 +728,10 @@
 	{ X86_VENDOR_INTEL, CPUID_HASWELL_ULT_C0 },
 	{ X86_VENDOR_INTEL, CPUID_CRYSTALWELL_B0 },
 	{ X86_VENDOR_INTEL, CPUID_CRYSTALWELL_C0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_C0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_C0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_D0 },
+	{ X86_VENDOR_INTEL, CPUID_BROADWELL_ULT_E0 },
 	{ 0, 0 },
 };
 

-- 
To view, visit https://review.coreboot.org/c/coreboot/+/46942
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Gerrit-Change-Number: 46942
Gerrit-PatchSet: 17
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Angel Pons <[e-mail]>
Gerrit-Reviewer: Arthur Heymans <[e-mail]>
Gerrit-Reviewer: Martin Roth <[e-mail]>
Gerrit-Reviewer: Michael Niewöhner <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: build bot (Jenkins) <[e-mail]>
Gerrit-CC: Paul Menzel <[e-mail]>
Gerrit-MessageType: merged

[S] Change in coreboot[master]: cpu/intel/haswell: Add Broadwell CPUIDs and microcode

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46942 )

Change subject: cpu/intel/haswell: Add Broadwell CPUIDs and microcode
......................................................................


Patch Set 17:

(1 comment)

File src/cpu/intel/haswell/Makefile.inc:

https://review.coreboot.org/c/coreboot/+/46942/comment/659ae9c2_30b9b3f9 
PS17, Line 29: endif
I'll have to refine this. We don't need to add µcode for Trad(itional) when building for ULT/ULX, and viceversa. Also, the Broadwell µcode updates from the repo are ancient, and we should try to use the intel-microcode repo instead.



-- 
To view, visit https://review.coreboot.org/c/coreboot/+/46942
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I36138cab72b1e3ad0ff7f6434996f5ce00de9d0d
Gerrit-Change-Number: 46942
Gerrit-PatchSet: 17
Gerrit-Owner: Angel Pons <[e-mail]>
Gerrit-Reviewer: Angel Pons <[e-mail]>
Gerrit-Reviewer: Arthur Heymans <[e-mail]>
Gerrit-Reviewer: Martin L Roth <[e-mail]>
Gerrit-Reviewer: Michael Niewöhner <[e-mail]>
Gerrit-Reviewer: Patrick Georgi <[e-mail]>
Gerrit-Reviewer: Patrick Rudolph <[e-mail]>
Gerrit-Reviewer: build bot (Jenkins) <[e-mail]>
Gerrit-CC: Paul Menzel <[e-mail]>
Gerrit-Comment-Date: Sun, 11 Sep 2022 11:04:09 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment