Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/qemu-riscv: Initialize cbmem in romstage ......................................................................
mb/emulation/qemu-riscv: Initialize cbmem in romstage
Change-Id: I00f8e3b315e57a5c042889f48450f79d263f24b1 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/mainboard/emulation/qemu-riscv/romstage.c 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/36446/1
diff --git a/src/mainboard/emulation/qemu-riscv/romstage.c b/src/mainboard/emulation/qemu-riscv/romstage.c index 684b249..d9b87c9 100644 --- a/src/mainboard/emulation/qemu-riscv/romstage.c +++ b/src/mainboard/emulation/qemu-riscv/romstage.c @@ -13,11 +13,13 @@ * GNU General Public License for more details. */
+#include <cbmem.h> #include <console/console.h> #include <program_loading.h>
void main(void) { console_init(); + cbmem_initialize_empty(); run_ramstage(); }
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/qemu-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36446/1/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-riscv/romstage.c:
https://review.coreboot.org/c/coreboot/+/36446/1/src/mainboard/emulation/qem... PS1, Line 23: cbmem_initialize_empty(); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/36446/1/src/mainboard/emulation/qem... PS1, Line 23: cbmem_initialize_empty(); please, no spaces at the start of a line
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/qemu-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 1: Code-Review-1
Do on spike too.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/qemu-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 2:
(2 comments)
https://review.coreboot.org/c/coreboot/+/36446/2/src/mainboard/emulation/qem... File src/mainboard/emulation/qemu-riscv/romstage.c:
https://review.coreboot.org/c/coreboot/+/36446/2/src/mainboard/emulation/qem... PS2, Line 23: cbmem_initialize_empty(); code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/36446/2/src/mainboard/emulation/qem... PS2, Line 23: cbmem_initialize_empty(); please, no spaces at the start of a line
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/qemu-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 2:
Oops. I rebased it thinking it was tripping over a build error because of the previous dependency. I'll push the spike fix too with this CL.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/*-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 3:
Patch Set 1: Code-Review-1
Do on spike too.
done
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/*-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 3: Code-Review+2
Note that it is likely broken without CB:36445. Probing for RAM launches exceptions.
Philipp Hug has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/*-riscv: Initialize cbmem in romstage ......................................................................
Patch Set 4: Code-Review+2
Thanks
Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36446 )
Change subject: mb/emulation/*-riscv: Initialize cbmem in romstage ......................................................................
mb/emulation/*-riscv: Initialize cbmem in romstage
It is expected that cbmem is initialized in romstage. The qemu-riscv target did not perform that correctly. Fix this omission.
Change-Id: I00f8e3b315e57a5c042889f48450f79d263f24b1 Signed-off-by: Arthur Heymans arthur@aheymans.xyz Signed-off-by: Aaron Durbin adurbin@chromium.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/36446 Reviewed-by: Philipp Hug philipp@hug.cx Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/emulation/qemu-riscv/romstage.c M src/mainboard/emulation/spike-riscv/romstage.c 2 files changed, 5 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Philipp Hug: Looks good to me, approved
diff --git a/src/mainboard/emulation/qemu-riscv/romstage.c b/src/mainboard/emulation/qemu-riscv/romstage.c index 684b249..52c69f9 100644 --- a/src/mainboard/emulation/qemu-riscv/romstage.c +++ b/src/mainboard/emulation/qemu-riscv/romstage.c @@ -13,11 +13,13 @@ * GNU General Public License for more details. */
+#include <cbmem.h> #include <console/console.h> #include <program_loading.h>
void main(void) { console_init(); + cbmem_initialize_empty(); run_ramstage(); } diff --git a/src/mainboard/emulation/spike-riscv/romstage.c b/src/mainboard/emulation/spike-riscv/romstage.c index 205c89e..b3d1b4d 100644 --- a/src/mainboard/emulation/spike-riscv/romstage.c +++ b/src/mainboard/emulation/spike-riscv/romstage.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */
+#include <cbmem.h> #include <console/console.h> #include <program_loading.h>
@@ -20,6 +21,8 @@ { console_init();
+ cbmem_initialize_empty(); + //query_mem(configstring(), &base, &size); //printk(BIOS_SPEW, "0x%zx bytes of memory at 0x%llx\n", size, base);