Arthur Heymans has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36446 ) Change subject: mb/emulation/*-riscv: Initialize cbmem in romstage ...................................................................... mb/emulation/*-riscv: Initialize cbmem in romstage It is expected that cbmem is initialized in romstage. The qemu-riscv target did not perform that correctly. Fix this omission. Change-Id: I00f8e3b315e57a5c042889f48450f79d263f24b1 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36446 Reviewed-by: Philipp Hug <philipp@hug.cx> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> --- M src/mainboard/emulation/qemu-riscv/romstage.c M src/mainboard/emulation/spike-riscv/romstage.c 2 files changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved Philipp Hug: Looks good to me, approved diff --git a/src/mainboard/emulation/qemu-riscv/romstage.c b/src/mainboard/emulation/qemu-riscv/romstage.c index 684b249..52c69f9 100644 --- a/src/mainboard/emulation/qemu-riscv/romstage.c +++ b/src/mainboard/emulation/qemu-riscv/romstage.c @@ -13,11 +13,13 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <console/console.h> #include <program_loading.h> void main(void) { console_init(); + cbmem_initialize_empty(); run_ramstage(); } diff --git a/src/mainboard/emulation/spike-riscv/romstage.c b/src/mainboard/emulation/spike-riscv/romstage.c index 205c89e..b3d1b4d 100644 --- a/src/mainboard/emulation/spike-riscv/romstage.c +++ b/src/mainboard/emulation/spike-riscv/romstage.c @@ -13,6 +13,7 @@ * GNU General Public License for more details. */ +#include <cbmem.h> #include <console/console.h> #include <program_loading.h> @@ -20,6 +21,8 @@ { console_init(); + cbmem_initialize_empty(); + //query_mem(configstring(), &base, &size); //printk(BIOS_SPEW, "0x%zx bytes of memory at 0x%llx\n", size, base); -- To view, visit https://review.coreboot.org/c/coreboot/+/36446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00f8e3b315e57a5c042889f48450f79d263f24b1 Gerrit-Change-Number: 36446 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin@chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz> Gerrit-Reviewer: Philipp Hug <philipp@hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> Gerrit-Reviewer: ron minnich <rminnich@gmail.com> Gerrit-MessageType: merged