John Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: PMC mux control ......................................................................
soc/intel/tigerlake: PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc_mux.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 74 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/1
diff --git a/src/soc/intel/tigerlake/acpi/pmc_mux.asl b/src/soc/intel/tigerlake/acpi/pmc_mux.asl new file mode 100644 index 0000000..c105fe8 --- /dev/null +++ b/src/soc/intel/tigerlake/acpi/pmc_mux.asl @@ -0,0 +1,70 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2020 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +External (_SB.PCI0, DeviceObj) + +Scope (_SB.PCI0){ + + Device (PMC) + { + Name (_HID, "INTC1026") + Name (_DDN, "Intel(R) Tiger Lake IPC1 Controller") + + Name (_CRS, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0xFE000000, 0x00010000) + }) + + /* The OS mux driver will be bind to this device node. */ + Device (MUX) + { + Name (_HID, "INTC105C") + Name (_DDN, "Intel(R) Tiger Lake North Mux-Agent") + /* + * Each connector shall have its own ACPI device entry (node), + * under the actual Mux device. + * + * These nodes are the ones that the USB Type-C port/connector + * devices will refer to in order to configure the mux. + */ + Device (CON0) + { + Name (_ADR, 0) + /* + * These properties should have the values that the driver + * needs to supply to the PMC via IPC when the muxes are + * being configured. + */ + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package() { + Package () {"usb2-port", 6}, + Package () {"usb3-port", 3}, + }, + }) + } + Device (CON1) + { + Name (_ADR, 1) + Name (_DSD, Package () { + ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package() { + Package () {"usb2-port", 5}, + Package () {"usb3-port", 2}, + }, + }) + } + } + } +} diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 8593d07..64e9722 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2019 Intel Corp. + * Copyright (C) 2019-2020 Intel Corp. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -51,3 +51,6 @@
/* PCI _OSC */ #include <soc/intel/common/acpi/pci_osc.asl> + +/* PMC mux control */ +#include "pmc_mux.asl"
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#2).
Change subject: soc/intel/tigerlake: PMC mux control ......................................................................
soc/intel/tigerlake: PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 74 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: PMC mux control ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38777/2//COMMIT_MSG@7 PS2, Line 7: soc/intel/tigerlake: PMC mux control Please make that a statement by adding a verb (in imperative mood).
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#3).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 74 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/3
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/38777/2//COMMIT_MSG@7 PS2, Line 7: soc/intel/tigerlake: PMC mux control
Please make that a statement by adding a verb (in imperative mood).
done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 3: Code-Review-1
I don't think this is correct. It is hardcoding mainboard information about USB ports in SoC code.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 3:
Patch Set 3: Code-Review-1
I don't think this is correct. It is hardcoding mainboard information about USB ports in SoC code.
Thanks. We will move con0 and con1 from SoC to platform.
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 40 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/4
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... PS4, Line 26: 0xFE000000 What is this address? Is this the p2sb address? And PMC is port 0 with 16KiB of space? this needs some commentary.
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 43 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/5
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... PS4, Line 26: 0xFE000000
What is this address? Is this the p2sb address? And PMC is port 0 with 16KiB of space? this needs so […]
PCH preserves 64K (0xFE000000 - 0xFE00FFFF) for PMC MBAR.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/4/src/soc/intel/tigerlake/acp... PS4, Line 26: 0xFE000000
PCH preserves 64K (0xFE000000 - 0xFE00FFFF) for PMC MBAR.
PMC MBAR values and range had been commented.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... PS5, Line 29: 0xFE000000 This looks like it could be read from 0:1f.2@0x10. Or at least PCH_PWRM_BASE_ADDRESS
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... PS5, Line 29: 0xFE000000
This looks like it could be read from 0:1f.2@0x10. […]
PCH_PWRM_BASE_ADDRESS is the PMC MBAR MMIO base address, which is programmed through pci pch segment 00:1f.2.
Please advise if you prefer the PCH_PWRM_BASE_ADDRESS instead of hardcode 0xFE000000.
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... PS5, Line 29: 0xFE000000
PCH_PWRM_BASE_ADDRESS is the PMC MBAR MMIO base address, which is programmed through pci pch segment […]
If we have a macro we should use it. We shouldn't open code the same literal in two different places. That just leads to inconsistency if anything changes in the future.
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... PS5, Line 29: 0xFE000000
If we have a macro we should use it. […]
Ya using PCH_PWRM_BASE_ADDRESS should be fine.
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#6).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/6
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38777
to look at the new patch set (#7).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/7
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... PS5, Line 29: 0xFE000000
Ya using PCH_PWRM_BASE_ADDRESS should be fine.
ok, thanks, just updated.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/7/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/7/src/soc/intel/tigerlake/acp... PS7, Line 34: bind bound
Hello Brandon Breitenstein, Patrick Rudolph, Divya Sasidharan, Shamile Khan, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38777
to look at the new patch set (#8).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/8
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/7/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/7/src/soc/intel/tigerlake/acp... PS7, Line 34: bind
bound
done
Hello build bot (Jenkins), Furquan Shaikh, Shamile Khan, Divya Sasidharan, Brandon Breitenstein, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#9).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
BUG=None TEST=Booted to kernel on volteer board and verified PMC and Mux agent devices identification.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/9
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 9:
(2 comments)
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/5/src/soc/intel/tigerlake/acp... PS5, Line 29: 0xFE000000
ok, thanks, just updated.
Ack
https://review.coreboot.org/c/coreboot/+/38777/7/src/soc/intel/tigerlake/acp... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/7/src/soc/intel/tigerlake/acp... PS7, Line 34: bind
done
Ack
Hello build bot (Jenkins), Furquan Shaikh, Shamile Khan, Divya Sasidharan, Brandon Breitenstein, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/38777
to look at the new patch set (#10).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
BUG=b:140404595 TEST=Booted to kernel on volteer board and verified PMC and Mux agent devices identification.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 45 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/10
Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 10: Code-Review+2
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 10: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 10:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... PS10, Line 18: External (_SB.PCI0, DeviceObj) I don't think this is required.
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... PS10, Line 24: INTC1026 Where is the kernel side of the change that updates this HID? I still see INT34D2 in 5.4 kernel in chromium tree. Are you working on pushing an update for that as well?
Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Shamile Khan, Divya Sasidharan, Nick Vaccaro, Brandon Breitenstein, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#11).
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
BUG=b:140404595 TEST=Booted to kernel on volteer board and verified PMC and Mux agent devices identification.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com --- A src/soc/intel/tigerlake/acpi/pmc.asl M src/soc/intel/tigerlake/acpi/southbridge.asl 2 files changed, 43 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/11
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 11:
(2 comments)
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... PS10, Line 18: External (_SB.PCI0, DeviceObj)
I don't think this is required.
Ack
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... PS10, Line 24: INTC1026
Where is the kernel side of the change that updates this HID? I still see INT34D2 in 5. […]
../kernel/v5.4/drivers/platform/x86/intel_scu_pltdrv.c: { "INTC1026" },
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 11: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... File src/soc/intel/tigerlake/acpi/pmc.asl:
https://review.coreboot.org/c/coreboot/+/38777/10/src/soc/intel/tigerlake/ac... PS10, Line 24: INTC1026
../kernel/v5.4/drivers/platform/x86/intel_scu_pltdrv. […]
Thanks for the pointer!
Divya S Sasidharan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 11: Code-Review-1
Can we not merge this as 105C "Mux agent driver" is not ready. Would you be able to upload only the part that brings in "New PMC IPC driver" 1026.
Furquan Shaikh has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Removed Code-Review+2 by Furquan Shaikh furquan@google.com
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 13:
This change is ready for review.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 13:
Patch Set 13:
What's the status of this change?
It is ready.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
Patch Set 13: Code-Review+2
The driver has landed in the kernel
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/38777 )
Change subject: soc/intel/tigerlake: Add PMC mux control ......................................................................
soc/intel/tigerlake: Add PMC mux control
PMC supports messages that can be used for configuring the USB Type-C Multiplexer/Demultiplexer.
BUG=b:151646486 TEST=Booted to kernel on volteer board and verified PMC and Mux agent devices identification.
Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52 Signed-off-by: John Zhao john.zhao@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/38777 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org --- M src/soc/intel/tigerlake/acpi/pmc.asl 1 file changed, 8 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved
diff --git a/src/soc/intel/tigerlake/acpi/pmc.asl b/src/soc/intel/tigerlake/acpi/pmc.asl index 2f7fa46..8e4e306 100644 --- a/src/soc/intel/tigerlake/acpi/pmc.asl +++ b/src/soc/intel/tigerlake/acpi/pmc.asl @@ -14,7 +14,14 @@ * 64KB (0xFE000000 - 0xFE00FFFF) for PMC MBAR. */ Name (_CRS, ResourceTemplate () { - Memory32Fixed (ReadWrite, PCH_PWRM_BASE_ADDRESS, 0x00010000) + Memory32Fixed (ReadWrite, PCH_PWRM_BASE_ADDRESS, PCH_PWRM_BASE_SIZE) }) + + /* The OS mux driver will be bound to this device node. */ + Device (MUX) + { + Name (_HID, "INTC105C") + Name (_DDN, "Intel(R) Tiger Lake North Mux-Agent") + } } }