John Zhao has uploaded this change for review.

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soc/intel/tigerlake: PMC mux control

PMC supports messages that can be used for configuring the USB
Type-C Multiplexer/Demultiplexer.

Change-Id: I00c5f929b2eea5de3f8eba794dbe9b36c8083c52
Signed-off-by: John Zhao <john.zhao@intel.com>
---
A src/soc/intel/tigerlake/acpi/pmc_mux.asl
M src/soc/intel/tigerlake/acpi/southbridge.asl
2 files changed, 74 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/38777/1

diff --git a/src/soc/intel/tigerlake/acpi/pmc_mux.asl b/src/soc/intel/tigerlake/acpi/pmc_mux.asl
new file mode 100644
index 0000000..c105fe8
--- /dev/null
+++ b/src/soc/intel/tigerlake/acpi/pmc_mux.asl
@@ -0,0 +1,70 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2020 Intel Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+External (\_SB.PCI0, DeviceObj)
+
+Scope (\_SB.PCI0){
+
+	Device (PMC)
+	{
+		Name (_HID, "INTC1026")
+		Name (_DDN, "Intel(R) Tiger Lake IPC1 Controller")
+
+		Name (_CRS, ResourceTemplate () {
+			Memory32Fixed (ReadWrite, 0xFE000000, 0x00010000)
+		})
+
+		/* The OS mux driver will be bind to this device node. */
+		Device (MUX)
+		{
+			Name (_HID, "INTC105C")
+			Name (_DDN, "Intel(R) Tiger Lake North Mux-Agent")
+			/*
+			 * Each connector shall have its own ACPI device entry (node),
+			 * under the actual Mux device.
+			 *
+			 * These nodes are the ones that the USB Type-C port/connector
+			 * devices will refer to in order to configure the mux.
+			 */
+			Device (CON0)
+			{
+				Name (_ADR, 0)
+				/*
+				 * These properties should have the values that the driver
+				 * needs to supply to the PMC via IPC when the muxes are
+				 * being configured.
+				 */
+				Name (_DSD, Package () {
+					ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+					Package() {
+					Package () {"usb2-port", 6},
+					Package () {"usb3-port", 3},
+					},
+				})
+			}
+			Device (CON1)
+			{
+				Name (_ADR, 1)
+				Name (_DSD, Package () {
+				ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
+				Package() {
+					Package () {"usb2-port", 5},
+					Package () {"usb3-port", 2},
+					},
+				})
+			}
+		}
+	}
+}
diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl
index 8593d07..64e9722 100644
--- a/src/soc/intel/tigerlake/acpi/southbridge.asl
+++ b/src/soc/intel/tigerlake/acpi/southbridge.asl
@@ -1,7 +1,7 @@
 /*
  * This file is part of the coreboot project.
  *
- * Copyright (C) 2019 Intel Corp.
+ * Copyright (C) 2019-2020 Intel Corp.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -51,3 +51,6 @@
 
 /* PCI _OSC */
 #include <soc/intel/common/acpi/pci_osc.asl>
+
+/* PMC mux control */
+#include "pmc_mux.asl"

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